Filter package with hybrid three-dimensional inductors partitioned to multiple electrically coupled substrates

Abstract

An improved filter for high frequencies such as 5G wireless communications can include inductor Q value improvement and reduced die size with hybrid 3D inductor integration. In some examples, an IPD and a fan-out package can be used to form the inductor. A first multi-layer substrate (IPD) includes a plurality of metal-insulator-metal (MIM) capacitors formed using various layers (e.g., M1 and M2) and a first portion of each of the 3D inductors (in M3 and M4), and a second multi-layer substrate (FO-PKG) includes at least a second portion of each of the 3D inductors (in Cu Pillar and RDL), where the two portions combine to form a coil of the 3D inductor. The 3D inductor is electrically coupled to the MIM capacitors to form at least one filter network. The first substrate is arranged face down with respect to the second substrate. The IPD can also include a planar inductor. The capacitors are formed in a lower layup metal layer of the first substrate and vertically above the 3D inductor in a stacking direction.

Description

[0001] Cross-references to other applications

[0002] This patent application claims priority to non-provisional application No. 16-812,294 entitled “HYBRIDTHREE DIMENSIONAL INDUCTOR”, filed on March 7, 2020 and assigned to its assignee, which is hereby expressly incorporated by reference. Technical Field

[0003] This disclosure generally relates to inductors, and more specifically, but not exclusively, to three-dimensional (3D) inductors. Background Technology

[0004] As wireless communication systems become increasingly prevalent, there is a need to improve the performance and capacity of existing wireless communication networks. The next-generation standard (5G) is the fifth generation of wireless technology used in digital cellular networks. Like previous standards, coverage areas are divided into areas called "cells," which are served by individual antennas. In fact, all major telecommunications service providers in developed countries are deploying antennas or plan to do so soon. The 5G spectrum is divided into millimeter wave, mid-wave, and low-wave bands. The low-wave band uses a frequency range similar to the previous generation communication standard, 4G. 5G millimeter wave is the fastest, with actual downlink speeds often reaching 1-2 Gb / s. Frequency ranges above 24 GHz, reaching 72 GHz, which is above the lower limit of extremely high frequencies. Range is shorter, thus requiring more cells. Millimeter waves have difficulty penetrating many walls and windows, limiting indoor coverage. The 5G mid-wave band is the most widely deployed among more than 20 networks. For downlink, speeds in the 100 MHz wideband are typically 100-400 Mb / s. Frequency ranges are deployed from 2.4 GHz to 4.2 GHz. However, due to the increase in the frequencies used, the filter design of wireless communication devices must also change to adapt to the ever-changing frequency bands.

[0005] Conventional filter designs, including those based on integrated passive devices (IPDs), rely on planar (2D) inductors formed within the die. However, with the increasing number of frequencies and bandwidth in 5G systems, conventional inductor / filter designs are becoming increasingly inadequate in terms of performance and size. For example, previous 4G systems typically had bandwidths of less than 100MHz, while the filter performance of 5G systems will have to accommodate increased bandwidths of 400MHz or higher.

[0006] Accordingly, there is a need for systems, apparatuses, and methods to overcome the shortcomings of conventional approaches, including the methods, systems, and apparatuses provided herein for improving filter performance and reducing die size by increasing the Q value of the inductor. Summary of the Invention

[0007] The following is a simplified overview of one or more aspects and / or examples relating to the apparatus and methods disclosed herein. Thus, this overview should not be considered a comprehensive summary relating to all hypothetical aspects and / or examples, nor should it be considered as identifying key or essential elements relating to the hypothetical aspects and / or examples, or as defining the scope associated with any particular aspect and / or example. Accordingly, the sole purpose of the following overview is to present, in a simplified form, certain concepts relating to one or more aspects and / or examples of the apparatus and methods disclosed herein, prior to the detailed description that follows.

[0008] In one aspect, a filter package includes: a first multilayer substrate including a first portion of a plurality of metal-insulator-metal (MIM) capacitors and a plurality of three-dimensional (3D) inductors; and a second substrate including a second portion of a plurality of 3D inductors, wherein the plurality of 3D inductors are electrically coupled to the plurality of MIM capacitors to form a filter network.

[0009] In another aspect, a filter package includes: a first multilayer substrate including a plurality of metal-insulator-metal (MIM) capacitors and a first portion of means for storing electrical energy; and a second substrate including a second portion of means for storing electrical energy, wherein the means for storing electrical energy are electrically coupled to the plurality of MIM capacitors to form a filter network.

[0010] In another aspect, a method for manufacturing a filter package includes: forming a first multilayer substrate including a first portion of a plurality of metal-insulator-metal (MIM) capacitors and a plurality of three-dimensional (3D) inductors; forming a second substrate including a second portion of the plurality of 3D inductors; and electrically coupling the plurality of 3D inductors to the plurality of MIM capacitors to form a filter network.

[0011] Other features and advantages associated with the mechanisms and methods disclosed herein will be apparent to those skilled in the art based on the accompanying drawings and detailed description. Attached Figure Description

[0012] The various aspects of this disclosure and the advantages thereof will be readily understood when considered in conjunction with the accompanying drawings, which are provided for illustrative purposes only and not for limiting the scope of this disclosure.

[0013] Figure 1 A plan view of an exemplary filter package according to some examples of this disclosure is shown;

[0014] Figure 2 A side view of an exemplary filter package according to some examples of this disclosure is shown;

[0015] Figure 3 A side view of an exemplary filter package according to some examples of this disclosure is shown;

[0016] Figure 4 A side view of an exemplary 3D inductor according to some examples of this disclosure is shown;

[0017] Figures 5A-5C An exemplary 3D inductor according to some examples of this disclosure is shown;

[0018] Figure 6 Exemplary partial methods according to some examples of this disclosure are shown;

[0019] Figure 7 Exemplary mobile devices are shown, representing some examples according to this disclosure; and

[0020] Figure 8 Examples of various electronic devices that can be integrated with any of the methods, devices, semiconductor devices, integrated circuits, dies, in-cell components, or stacked packages (POPs) described above are shown according to this disclosure.

[0021] By convention, features depicted in the accompanying drawings may not be drawn to scale. Therefore, for clarity, the dimensions of the depicted features may be arbitrarily enlarged or reduced. By convention, some drawings have been simplified for clarity. Therefore, the drawings may not depict all components of a particular mechanism or method. Furthermore, similar reference numerals denote similar features throughout the specification and drawings. Detailed Implementation

[0022] The exemplary methods, mechanisms, and systems disclosed herein alleviate the shortcomings of conventional methods, mechanisms, and systems, as well as other previously unidentified needs. Various examples herein may include hybrid 3D inductors comprising both an integrated passive device (IPD) layer and a redistribution layer (RDL) in a fan-out package (FO-PKG), which allows for improved insertion-loss of 5G filters and reduced die size. Furthermore, by using hybrid techniques (IPD and FO-PKG) to expand the coil aperture, the Q value of the inductor is improved through a 3D solenoid inductor structure. In various respects, replacing conventional planar inductors with 3D inductors having higher Q values ​​results in an increased inductance (L) to resistance (R) ratio at a given frequency.

[0023] In some examples, an inductor is formed using a combination of an IPD and a fan-out package. For example, a first multilayer substrate (IPD) includes multiple metal-insulator-metal (MIM) capacitors formed using various layers (e.g., M1 and M2), and a first portion of a 3D inductor, and a second substrate includes at least a second portion of the 3D inductor. In another example, a hybrid 3D inductor can be formed as part of a filter package. The filter package may include a first multilayer substrate having at least a first portion of a MIM capacitor and a 3D inductor, wherein the MIM capacitor and at least a first portion of the 3D inductor are formed on various metal layers, and a second substrate having a second portion of the 3D inductor, wherein the two portions are combined to form a coil of one or more 3D inductors. The first multilayer substrate and the second substrate are electrically coupled via copper pillars / copper studs, which can form part of the 3D inductor (e.g., a vertical portion of the coil), which also allows vertical extension into the filter package while reducing the width (die size). Furthermore, the copper traces of the redistribution layer in the second substrate can be used to form a portion of the 3D inductor (e.g., the horizontal bottom portion of the coil). The first multilayer substrate can have a first portion of multiple 3D inductors formed using the metal layers (M3 and M4) closest to the second substrate, and the MIM capacitors can be formed using metal layers (e.g., M1 and M2) away from the second substrate. In some examples, the first multilayer substrate is an integrated passive device, and the second substrate is a fan-out package. The 3D inductors can be electrically coupled to the MIM capacitors to form at least one filter network. Furthermore, it should be understood that the first multilayer substrate (IPD) can include at least one planar inductor. Accordingly, not all inductors must be configured as 3D inductors.

[0024] Figure 1 A plan view of an exemplary filter package according to some examples of this disclosure is shown. Figure 1 As shown, the filter package 100 may include a first multilayer substrate 110 having a first portion of a plurality of three-dimensional (3D) inductors 130, and a second substrate 120 having a second portion of a plurality of 3D inductors 130, wherein the plurality of 3D inductors 130 are electrically coupled to a plurality of MIM capacitors integrated into the first multilayer substrate 110 (see...). Figure 2 To form a filter network. For example... Figure 1 As shown, the filter package 100 may further include one or more planar inductors 140. The planar inductors 140 have low Q ratings, while the 3D inductors 130 have high Q ratings. Because Therefore, the inductance Q value is improved by altering the structure of the 3D solenoid inductor 130 through the use of hybrid techniques (i.e., IPD and FO-PKG) to expand the coil aperture. Replacing a conventional planar inductor with a 3D inductor with a higher Q value results in an increase in the inductance (L) to resistance (R) ratio for a given frequency. However, it is not necessary to replace all planar inductors, especially when the overall circuit Q is more suitable by using one or more low-Q planar inductors, and / or when the second substrate 120 below the planar inductor location does not have a structure to support the 3D inductor.

[0025] Figure 2 A side view of an exemplary filter package according to some examples of this disclosure is shown. Figure 2 As shown, the filter package 200 (e.g., filter package 100) may include a first multilayer substrate 210 and a second substrate 220. The first multilayer substrate 210 has a first portion 250 of a plurality of 3D inductors 230 and a plurality of MIM capacitors 260. The second substrate 220 has a second portion 270 of a plurality of 3D inductors 230, wherein the plurality of 3D inductors 230 are electrically coupled to the plurality of MIM capacitors 260 to form a filter network. Figure 2 As shown, the first multilayer substrate 210 and the second substrate 220 are electrically coupled via a plurality of copper pillars (or columns or studs) 280 in the second substrate 220, and the copper pillars 280 form the third portion 290 of a plurality of 3D inductors 230. The copper pillars 280 can be of any suitable height, such as less than 40 μm. Similarly, as... Figure 2 As shown, a redistribution layer 225 in the second substrate 220 forms a fourth portion 295 of a plurality of 3D inductors 230. The third portion 290 and the fourth portion 295 can be considered as part of the second portion 270. As shown, a first portion 250 of the plurality of 3D inductors 230 includes a first plurality of metal layers of a first multilayer substrate 210 closest to the second substrate 220, and a plurality of MIM capacitors 260 include a second plurality of metal layers farther from the second substrate 220 than the first plurality of metal layers. The filter package 200 may also include one or more planar inductors 240. It should be understood that the first multilayer substrate 210 may be an integrated passive device (IPD), and the second substrate 220 may be a fan-out package.

[0026] Figure 3 A side view of an exemplary filter package according to some examples of this disclosure is shown. Figure 3As shown, the filter package 300 may include a first portion 350 of a plurality of 3D inductors 330, a plurality of MIM capacitors 360, a second portion 370 of a plurality of 3D inductors 330, a third portion 390 of a plurality of 3D inductors 330, and a fourth portion 395 of a plurality of 3D inductors 330. The third portion 390 and the fourth portion 395 may be considered as part of the second portion 370.

[0027] Figure 4 A side view of an exemplary 3D inductor according to some examples of this disclosure is shown. Figure 4 As shown, the filter package 400 may include a first multilayer substrate 410 (e.g., an integrated passive device (IPD)) and a second substrate 420. The first multilayer substrate 410 has first portions 450 of a plurality of 3D inductors 430, and the second substrate 420 has third portions 490 and fourth portions 495 of a plurality of 3D inductors 430. It should be understood that the first multilayer substrate 410 may be an integrated passive device (IPD), and the second substrate 420 may be a fan-out package.

[0028] Figures 5A-5C Exemplary 3D inductors according to some examples of this disclosure are shown. For example... Figures 5A-5C As shown, the 3D inductor 530 (e.g., 3D inductor 130, 3D inductor 230, 3D inductor 330, 3D inductor 430) may include multiple portions, such as two rows of vertical pillars 531, a bottom horizontal layer 533, an upper horizontal layer 535, an output 537, and an output 539. As discussed above, an RDL layer (e.g., a fourth portion) may form part of the bottom horizontal layer 533, copper pillars, copper struts, or copper studs may form part of the vertical pillars 531 (e.g., a third portion), a portion of the second substrate may form part of the vertical pillars 531 (e.g., a second portion), and a first plurality of metal layers in the first multilayer substrate closest to the second substrate may form part of the upper horizontal layer 535 (e.g., a first portion).

[0029] Figure 6 Exemplary partial methods for manufacturing filter packages according to some examples of this disclosure are shown. Figure 6As shown, part of method 600 may begin at block 602, wherein a first multilayer substrate is formed, the first multilayer substrate including a plurality of metal-insulator-metal (MIM) capacitors and a first portion of a plurality of three-dimensional (3D) inductors. Part of method 600 may continue at block 604, wherein a second substrate is formed, the second substrate including a second portion of the plurality of 3D inductors. Part of method 600 may end at block 606, wherein the plurality of 3D inductors are electrically coupled to the plurality of MIM capacitors to form a filter network. Furthermore, part of method 600 may also include wherein: the first multilayer substrate further includes planar inductors; the method further includes electrically coupling the first multilayer substrate to the second substrate via a plurality of copper pillars in the second substrate, wherein the plurality of copper pillars form a third portion of the 3D inductors; a redistribution layer in the second substrate forms a fourth portion of the plurality of 3D inductors; the first portion of the plurality of 3D inductors includes a first plurality of metal layers of the first multilayer substrate closest to the second substrate, and the plurality of MIM capacitors include a second plurality of metal layers farther from the second substrate than the first plurality of metal layers; the first multilayer substrate further includes a plurality of planar inductors; the plurality of MIM capacitors are coupled to the second substrate... Above the first portion of a plurality of 3D inductors opposite to the board; at least one of a plurality of MIM capacitors is vertically above at least one of the plurality of 3D inductors and within the vertical perimeter of at least one of the plurality of 3D inductors; and / or a filter package is incorporated into a device selected from the group consisting of: music players, video players, entertainment units, navigation devices, communication devices, mobile devices, mobile phones, smartphones, personal digital assistants, fixed-location terminals, tablet computers, computers, wearable devices, laptop computers, servers, and devices in motor vehicles.

[0030] Figure 7 Exemplary mobile devices according to some examples of this disclosure are shown. Reference now. Figure 7 A block diagram of a mobile device configured according to exemplary aspects is depicted, and is generally designated 700. In some aspects, the mobile device 700 may be configured as a wireless communication device. As shown, the mobile device 700 includes a processor 701, which may be configured to implement the methods described herein in some aspects. The processor 701 is shown as including an instruction pipeline 712, a buffer processing unit (BPU) 708, a branch instruction queue (BIQ) 711, and a throttler 710, as are well known in the art. For clarity, other well-known details of these boxes (e.g., counters, entries, confidence regions, weighted sums, comparators, etc.) are omitted from the view of the processor 701.

[0031] The processor 701 can be coupled to the memory 732 via a link, which can be a die-to-die or chip-to-chip link. The mobile device 700 may also include a display 728 and a display controller 726, wherein the display controller 726 is coupled to the processor 701 and the display 728.

[0032] In some respects, Figure 7 It may include an encoder / decoder (CODEC) 734 (e.g., an audio and / or voice CODEC) coupled to the processor 701; a speaker 736 and a microphone 738 coupled to the CODEC 734; and a wireless controller 740 (which may include a modem) coupled to the wireless antenna 742 and the processor 701.

[0033] In a specific context, with one or more of the boxes described above present, the processor 701, display controller 726, memory 732, CODEC 734, and wireless controller 740 may be included in an in-package system or system-on-a-chip device 722. Input device 730 (e.g., a physical or virtual keyboard), power supply 744 (e.g., a battery), display 728, input device 730, speaker 736, microphone 738, wireless antenna 742, and power supply 744 may be external to the system-on-a-chip device 722 and may be coupled to components of the system-on-a-chip device 722, such as interfaces or controllers.

[0034] It should be noted that, although Figure 7 Mobile device 700 is depicted, but processor 701 and memory 732 can also be integrated into set-top boxes, music players, video players, entertainment units, navigation devices, personal digital assistants (PDAs), fixed location data units, computers, laptops, tablets, communication devices, mobile phones or other similar devices.

[0035] Figure 8 Examples of various electronic devices that can be integrated with any of the integrated devices, semiconductor devices, integrated circuits, dies, in-cell components, packages, or PoPs described herein are shown according to some examples of this disclosure. For example, mobile phone device 802, laptop computer device 804, and fixed-location terminal device 806 may include the integrated device 800 as described herein. The integrated device 800 may be, for example, any of the integrated circuits, dies, integrated devices, integrated device packages, integrated circuit devices, device packages, integrated circuit (IC) packages, and PoPs described herein. Figure 8The devices 802, 804, and 806 shown are merely exemplary. Other electronic devices may also feature integrated device 800, including, but not limited to, a group of devices (e.g., electronic devices) comprising: mobile devices, handheld personal communication system (PCS) units, portable data units such as personal digital assistants, devices supporting Global Positioning System (GPS), navigation devices, set-top boxes, music players, video players, entertainment units, fixed location data units such as meter reading equipment, communication devices, smartphones, tablet computers, computers, wearable devices, servers, routers, electronic devices implemented in motor vehicles (e.g., autonomous vehicles), or any other device for storing or retrieving data or computer instructions, or any combination thereof.

[0036] It should be understood that the various aspects disclosed herein can be described as functional equivalents of structures, materials, and / or devices as described and / or recognized by those skilled in the art. It should also be noted that the mechanisms disclosed in the specification or claims can be implemented by devices including various means of action for performing the method. For example, in one aspect, a filter package includes: a first multilayer substrate comprising a first portion of a plurality of metal-insulator-metal (MIM) capacitors and means for storing electrical energy (e.g., one or more 3D inductors); and a second substrate comprising a second portion of the means for storing electrical energy, wherein the means for storing electrical energy is electrically coupled to the plurality of MIM capacitors to form a filter network. Optionally, the first multilayer substrate further includes a planar inductor; the first multilayer substrate and the second substrate are electrically coupled via a plurality of copper pillars in the second substrate, and the plurality of copper pillars form a third portion of a means for storing electrical energy; a redistribution layer in the second substrate forms a fourth portion of the means for storing electrical energy; the first portion of the means for storing electrical energy includes a first plurality of metal layers closest to the first multilayer substrate of the second substrate, and the plurality of MIM capacitors include a second plurality of metal layers farther from the second substrate than the first plurality of metal layers; and / or the first multilayer substrate is an integrated passive device, and the second substrate is a fan-out package. It should be understood that the above aspects are provided by way of example only, and the claimed aspects are not limited to the specific references and / or illustrations cited as examples.

[0037] Figures 1-8 One or more components, processes, features, and / or functions shown may be rearranged and / or combined into a single component, process, feature, or function, or merged into several components, processes, or functions. Additional elements, components, processes, and / or functions may be added without departing from this disclosure. It should also be noted that in this disclosure… Figures 1-8 The corresponding descriptions are not limited to dies and / or ICs. In some implementations, Figures 1-8The descriptions and their corresponding information can be used to manufacture, create, provide, and / or produce integrated devices. In some embodiments, a device may include a die, an integrated device, a die package, an integrated circuit (IC), a device package, an integrated circuit (IC) package, a wafer, a semiconductor device, a package-on-a-piece (PoP) device, and / or an internal component. The active side of a device (such as a die) is the portion of the device that contains active components (e.g., transistors, resistors, capacitors, inductors, etc.) that perform device operation or function. The back side of a device is the side of the device opposite to the active side.

[0038] As used herein, the terms “user equipment” (or “UE”), “user device,” “user terminal,” “client device,” “communication device,” “wireless device,” “wireless communication device,” “handheld device,” “mobile device,” “mobile terminal,” “mobile station,” “handheld,” “access terminal,” “subscriber device,” “subscriber terminal,” “subscriber station,” “terminal,” and variations thereof may interchangeably refer to any suitable mobile or fixed device capable of receiving wireless communication signals and / or navigation signals. These terms include, but are not limited to, music players, video players, entertainment units, navigation devices, communication devices, smartphones, personal digital assistants, fixed-location terminals, tablet computers, computers, wearable devices, laptop computers, servers, motor vehicle equipment in motor vehicles, and / or other types of portable electronic devices that are typically carried by a person and / or have communication capabilities (e.g., wireless, cellular, infrared, short-range radio, etc.). These terms are also intended to include devices that communicate with another device capable of receiving wireless communication signals and / or navigation signals, such as via short-range wireless, infrared, wired connections, or other connections, whether satellite signal reception, auxiliary data reception, and / or location-related processing are performed on that device or on another device. Furthermore, these terms are intended to encompass all devices, including wireless and wired communication devices capable of communicating with the core network via a radio access network (RAN), and UEs capable of connecting to external networks (such as the Internet) and other UEs via the core network. Of course, other mechanisms for connecting to the core network and / or the Internet are also feasible for the UE, such as via a wired access network, a wireless local area network (WLAN) (e.g., based on IEEE 802.11, etc.). The UE can be implemented using any of a variety of devices, including but not limited to printed circuit (PC) cards, compact flash memory devices, external or internal modems, wireless or wired telephones, smartphones, tablets, tracking devices, asset tags, etc. The communication link through which the UE sends signals to the RAN is referred to as an uplink channel (e.g., reverse traffic channel, reverse control channel, access channel, etc.). The communication link through which the RAN sends signals to the UE is referred to as a downlink or forward link channel (e.g., paging channel, control channel, broadcast channel, forward traffic channel, etc.). As used herein, the term Traffic Channel (TCH) can refer to either uplink / reverse or downlink / forward traffic channel.

[0039] Wireless communication between electronic devices can be based on various technologies, such as Code Division Multiple Access (CDMA), W-CDMA, Time Division Multiple Access (TDMA), Frequency Division Multiple Access (FDMA), Orthogonal Frequency Division Multiplexing (OFDM), Global System for Mobile Communications (GSM), 3GPP Long Term Evolution (LTE), Bluetooth (BT), Bluetooth Low Energy (BLE), IEEE 802.11 (WiFi), and IEEE 802.15.4 (Zigbee / Thread), or other protocols that can be used in wireless or data communication networks. Bluetooth Low Energy (also known as Bluetooth LE, BLE, and Bluetooth Smart) is a wireless personal area network (PAN) technology designed and marketed by the Bluetooth Special Interest Group (Bluetooth Special Interest Group) to significantly reduce power consumption and cost while maintaining similar communication range. With the adoption of Bluetooth Core Specification Version 4.0, BLE was incorporated into the main Bluetooth standard in 2010 and updated in Bluetooth 5 (both explicitly included in this document).

[0040] The term “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any detail described herein as “exemplary” should not be construed as superior to other examples. Similarly, the term “example” does not mean that all examples include the features, advantages, or modes of operation discussed. Furthermore, a particular feature and / or structure may be combined with one or more other features and / or structures. Moreover, at least a portion of the apparatus described herein may be configured to perform at least a portion of the methods described herein.

[0041] The terminology used herein is intended to describe particular examples and is not intended to limit the scope of this disclosure. As used herein, the forms “a,” “an,” and “the / said” are also intended to include plural forms unless the context clearly indicates otherwise. It will also be understood that, when used herein, the terms “comprising,” “including,” and / or “containing” specify the presence of the stated features, wholes, actions, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, wholes, actions, operations, elements, components, and / or groups thereof.

[0042] It should be noted that the terms “connection,” “coupling,” or any variation thereof refer to any direct or indirect connection or coupling between elements, and may cover the presence of an intermediate element between two elements that are “connected” or “coupled” together via an intermediate element.

[0043] The use of names such as "first," "second," etc., to refer to any element herein does not limit the number and / or order of these elements. Rather, these names serve as a convenient way to distinguish between two or more elements and / or instances of two or more elements. Similarly, unless otherwise stated, a group of elements may include one or more elements.

[0044] Nothing in or shown in these claims is intended to specifically donate any component, action, feature, benefit, advantage, or equivalent to the public, whether or not such component, action, feature, benefit, or equivalent is listed in the claims.

[0045] Furthermore, those skilled in the art will understand that the various illustrative logic blocks, modules, circuits, and algorithmic actions described in conjunction with the examples disclosed herein can be implemented as electronic hardware, computer software, or a combination of both. To clearly illustrate this interchangeability between hardware and software, various illustrative components, blocks, modules, circuits, and actions have been generally described above in terms of their functionality. Whether such functionality is implemented as hardware or software depends on the specific application and design constraints imposed on the system as a whole. Those skilled in the art may implement the described functionality in different ways for each specific application, but such implementation decisions should not be construed as departing from the scope of this disclosure.

[0046] Although some aspects have been described in conjunction with the device, it is self-evident that these aspects also constitute a description of the corresponding method, and therefore the frame or component of the device should also be understood as a corresponding method action or feature of a method action. Similarly, the aspects described in relation to or as a method action also constitute a description of the corresponding frame, detail, or feature of the corresponding device. Some or all method actions can be performed by (or using) a hardware mechanism, such as, for example, a microprocessor, a programmable computer, or an electronic circuit. In some examples, some or more of the most important method actions can be performed by such a mechanism.

[0047] As can be seen in the detailed description above, different features are grouped together in the examples. This manner of disclosure should not be construed as meaning that the claimed examples have more features than expressly mentioned in the corresponding claims. Rather, this disclosure may include all features less than those of the individual examples disclosed. Therefore, the following claims should be considered as incorporated into the specification, where each claim may serve as a separate example on its own. Although each claim may serve as a separate example on its own, it should be noted that while dependent claims may refer to a specific combination of one or more claims in the claims, other examples may also cover or include combinations of the subject matter of the dependent claim with any other dependent claim, or any feature combined with other dependent and independent claims. Such combinations are presented herein unless expressly stated not to be intended to include a particular combination. Furthermore, it is intended that features of a claim be included in any other independent claim, even if the claim does not directly depend on that independent claim.

[0048] Furthermore, in some examples, a single action can be subdivided into multiple sub-actions or contain multiple sub-actions. Such sub-actions can be included in the public content of the individual action and are part of the public content of the individual action.

[0049] While the foregoing disclosure illustrates illustrative examples of this disclosure, it should be noted that various changes and modifications may be made herein without departing from the scope of this disclosure as defined by the appended claims. The functions and / or actions of the method claims according to the examples disclosed herein do not need to be performed in any particular order. Furthermore, well-known elements will not be described in detail or will be omitted so as not to obscure the relevant details of the aspects and examples disclosed herein. Moreover, although this disclosure may be described or claimed in the singular, the plural form may be considered unless a limitation on the singular is expressly specified.

Claims

1. A filter package, comprising: A first multilayer substrate, the first multilayer substrate including a plurality of metal-insulator-metal (MIM) capacitors and a first portion of a plurality of three-dimensional (3D) inductors; as well as A second substrate includes second portions of the plurality of 3D inductors, wherein the plurality of 3D inductors are electrically coupled to the plurality of MIM capacitors to form a filter network. The first multilayer substrate further includes at least one planar inductor, and the at least one planar inductor is arranged at a location where the second substrate lacks a structure for supporting the second portion of the 3D inductor.

2. The filter package of claim 1, wherein the first multilayer substrate and the second substrate are electrically coupled via a plurality of copper pillars in the second substrate, and the plurality of copper pillars form a third portion of the plurality of 3D inductors.

3. The filter package of claim 1, wherein a fourth portion of the plurality of 3D inductors is formed in the redistribution layer in the second substrate.

4. The filter package of claim 1, wherein the first portion of the plurality of 3D inductors includes a first plurality of metal layers of the first multilayer substrate closest to the second substrate, and the plurality of MIM capacitors include a second plurality of metal layers farther from the second substrate than the first plurality of metal layers.

5. The filter package of claim 1, wherein the first multilayer substrate is an integrated passive device, and the second substrate is a fan-out package.

6. The filter package of claim 1, wherein the first multilayer substrate further comprises a plurality of planar inductors.

7. The filter package of claim 1, wherein the plurality of MIM capacitors are located above the first portion of the plurality of 3D inductors opposite the second substrate.

8. The filter package of claim 7, wherein at least one of the plurality of MIM capacitors is vertically positioned above at least one of the plurality of 3D inductors and within the vertical perimeter of the at least one of the plurality of 3D inductors.

9. The filter package of claim 1, wherein the filter package is incorporated into a device selected from the group consisting of: entertainment units, navigation devices, communication devices, personal digital assistants, fixed-location terminals, wearable devices, and servers.

10. A filter package, comprising: A first multilayer substrate, the first multilayer substrate including a plurality of metal-insulator-metal (MIM) capacitors and a first part of a device for storing electrical energy; as well as The second substrate includes a second portion of the device for storing electrical energy, wherein the device for storing electrical energy is electrically coupled to the plurality of MIM capacitors to form a filter network. The first multilayer substrate further includes at least one planar inductor, and the at least one planar inductor is arranged at a location where the second substrate lacks a structure for supporting the second portion of the 3D inductor.

11. The filter package of claim 10, wherein the first multilayer substrate and the second substrate are electrically coupled via a plurality of copper pillars in the second substrate, and the plurality of copper pillars form a third portion of the device for storing electrical energy.

12. The filter package of claim 10, wherein the redistribution layer in the second substrate forms the fourth portion of the device for storing electrical energy.

13. The filter package of claim 10, wherein the first portion of the means for storing electrical energy includes a first plurality of metal layers of the first multilayer substrate closest to the second substrate, and the plurality of MIM capacitors include a second plurality of metal layers farther from the second substrate than the first plurality of metal layers.

14. The filter package of claim 10, wherein the first multilayer substrate is an integrated passive device, and the second substrate is a fan-out package.

15. The filter package of claim 10, wherein the first multilayer substrate further comprises a plurality of planar inductors.

16. The filter package of claim 10, wherein the plurality of MIM capacitors are located above the first portion of the device for storing electrical energy opposite to the second substrate.

17. The filter package of claim 16, wherein at least one of the plurality of MIM capacitors is vertically positioned above at least one of the devices for storing electrical energy and within the vertical perimeter of the at least one of the devices for storing electrical energy.

18. The filter package of claim 10, wherein the filter package is incorporated into a device selected from the group consisting of: entertainment units, navigation devices, communication devices, personal digital assistants, fixed-location terminals, wearable devices, and servers.

19. A method for manufacturing a filter package, the method comprising: A first multilayer substrate is formed, the first multilayer substrate including a plurality of metal-insulator-metal (MIM) capacitors and a first portion of a plurality of three-dimensional (3D) inductors; A second substrate is formed, the second substrate including a second portion of the plurality of 3D inductors; as well as The plurality of 3D inductors are electrically coupled to the plurality of MIM capacitors to form a filter network. The first multilayer substrate further includes at least one planar inductor, and the at least one planar inductor is arranged at a location where the second substrate lacks a structure for supporting the second portion of the 3D inductor.

20. The method of claim 19, wherein the method further comprises electrically coupling the first multilayer substrate to the second substrate via a plurality of copper pillars in the second substrate, wherein the plurality of copper pillars form a third portion of the plurality of 3D inductors.

21. The method of claim 19, wherein a fourth portion of the plurality of 3D inductors is formed in a redistribution layer in the second substrate.

22. The method of claim 19, wherein the first portion of the plurality of 3D inductors includes a first plurality of metal layers of the first multilayer substrate closest to the second substrate, and the plurality of MIM capacitors include a second plurality of metal layers farther from the second substrate than the first plurality of metal layers.

23. The method of claim 19, wherein the first multilayer substrate further comprises a plurality of planar inductors.

24. The method of claim 19, wherein the plurality of MIM capacitors are located above the first portion of the plurality of 3D inductors opposite the second substrate.

25. The method of claim 24, wherein at least one of the plurality of MIM capacitors is vertically positioned above at least one of the plurality of 3D inductors and within the vertical perimeter of the at least one of the plurality of 3D inductors.

26. The method of claim 19, further comprising incorporating a filter into a device selected from the group consisting of: entertainment units, navigation devices, communication devices, personal digital assistants, fixed-location terminals, wearable devices, and servers.

Images