Method and device for verifying performance of speed limiting module, electronic equipment and storage medium

Abstract

The application discloses a performance verification method and device of a rate limiting module, electronic equipment and a storage medium. When it is detected that a token bucket in the rate limiting module is switched from a deficit state to a non-deficit state for the first time, a first current time point is acquired. Whenever it is detected that the token bucket in the rate limiting module is switched from the deficit state to the non-deficit state again, a second current time point is acquired, and a total number of token deductions of the token bucket in a time interval determined by the first current time point and the second current time point is acquired. According to the first current time point, the second current time point and the total number of token deductions, a current rate is calculated, and the rate limiting module is verified in performance according to the current rate and a preset rate configuration value. The application solves the problems of inaccuracy and incompleteness of the rate limiting module verified based on a fuzzy statistical verification method, guarantees the correctness and verification completeness of the rate limiting module function realized based on a token bucket algorithm, and realizes quantitative performance verification of the rate limiting module.

Description

Technical Field

[0001] This invention relates to the field of performance testing technology, and in particular to a performance verification method, apparatus, electronic device, and storage medium for a speed limiting module. Background Technology

[0002] Chip design can be divided into front-end logic design and back-end physical design. Chip verification is a special case, like a branch line—relatively independent but parallel to the process from requirement definition to synthesis and physical implementation, running throughout the entire chip design flow. The significance of chip verification lies in continuously providing crucial feedback for the design or implementation process, identifying issues such as performance non-compliance, functional defects in design code, and overall chip integration errors. In the verification of flow management chips, the performance verification of the rate limiting module is particularly critical.

[0003] Currently, in the verification technology of flow management chips based on EDA (Electronic Design Automation) platforms, the verification method for rate limiting modules is based on fuzzy statistics. This verification method estimates the rate limiting capability of the rate limiting module by statistically analyzing the flow within a statistical time period to determine the rate within that statistical time period.

[0004] In the process of developing this invention, the inventors discovered the following shortcomings in the existing technology: the verification method for the rate limiting module relies on the selection of the start and end times within the statistical time period, which can only guarantee that the bandwidth rate of the transmitted traffic is within a rough range, and cannot prove the correctness and accuracy of the rate limiting logic. Because such statistics are coarse, this method cannot verify the range of precision of the limited rate, and therefore cannot guarantee the correctness and completeness of the rate limiting module's function. Summary of the Invention

[0005] This invention provides a performance verification method, apparatus, electronic device, and storage medium for a rate limiting module, enabling quantitative performance testing of a rate limiting module based on the token bucket algorithm.

[0006] According to one aspect of the present invention, a performance verification method for a speed limiting module is provided, wherein the method includes:

[0007] When the token bucket in the rate limiting module first switches from a deficit state to a non-deficient state, the first current time point is obtained;

[0008] Whenever the token bucket in the rate limiting module is detected to switch from a deficit state to a non-deficit state again, perform the following operations:

[0009] Get the second current time point, and get the total number of tokens deducted from the token bucket within the time interval determined by the first and second current time points;

[0010] The current rate is calculated based on the first current time point, the second current time point, and the total number of tokens deducted. The performance of the rate limiting module is then verified based on the current rate and the preset rate configuration value.

[0011] According to another aspect of the present invention, a performance verification device for a speed limiting module is provided, wherein the device includes:

[0012] The first current time point acquisition module is used to acquire the first current time point when the token bucket in the rate limiting module is detected to switch from a deficit state to a non-deficit state for the first time.

[0013] The trigger execution module is used to trigger the execution of the token deduction total determination module and the performance verification module whenever the token bucket in the rate limiting module is detected to switch from a deficit state to a non-deficit state again;

[0014] The token deduction total determination module is used to obtain the second current time point and obtain the total number of tokens deducted from the token bucket within the time interval determined by the first current time point and the second current time point;

[0015] The performance verification module is used to calculate the current rate based on the first current time point, the second current time point, and the total number of tokens deducted, and to perform performance verification on the rate limiting module based on the current rate and the preset rate configuration value.

[0016] According to another aspect of the present invention, an electronic device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the performance verification method of the speed limiting module according to any embodiment of the present invention.

[0017] According to another aspect of the present invention, a computer-readable storage medium is provided, the computer-readable storage medium storing computer instructions for causing a processor to execute and implement the performance verification method of the speed limiting module according to any embodiment of the present invention.

[0018] The technical solution of this invention solves the problems of inaccuracy and incompleteness in verifying the rate limiting module based on fuzzy statistical verification methods. It obtains a first current time point when the token bucket in the rate limiting module first switches from a deficit state to a non-deficit state, and then obtains a second current time point each time the token bucket switches back from a deficit state to a non-deficit state. The solution also obtains the total number of tokens deducted by the token bucket within the time interval determined by the first and second current time points. Based on the first and second current time points and the total number of tokens deducted, the current rate is calculated, and the performance of the rate limiting module is verified according to the current rate and a preset rate configuration value. This ensures the correctness and verification completeness of the rate limiting module function implemented based on the token bucket algorithm, achieving quantitative performance verification of the rate limiting module.

[0019] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a flowchart of a performance verification method for a speed limiting module according to Embodiment 1 of the present invention;

[0022] Figure 2 This is a flowchart of another performance verification method for a speed limiting module provided in Embodiment 2 of the present invention;

[0023] Figure 3 This is a schematic diagram of the structure of a performance verification device for a speed limiting module according to Embodiment 3 of the present invention;

[0024] Figure 4 This is a schematic diagram of the structure of an electronic device provided according to Embodiment 4 of the present invention. Detailed Implementation

[0025] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0026] It should be noted that the terms "target," "current," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0027] Example 1

[0028] Figure 1 The flowchart below shows a performance verification method for a rate limiting module according to Embodiment 1 of the present invention. This embodiment is applicable to the performance verification of a rate limiting module based on the token bucket algorithm. The method can be executed by a performance verification device for the rate limiting module. The performance verification device for the rate limiting module can be implemented in hardware and / or software and can generally be integrated into a computer device used to implement chip performance testing functions.

[0029] Correspondingly, such as Figure 1 As shown, the method includes:

[0030] S110. When the token bucket in the rate limiting module is detected to switch from a deficit state to a non-deficit state for the first time, the first current time point is obtained.

[0031] The first current time point can be the time point corresponding to the token bucket first changing from a deficit state to a non-deficit state.

[0032] First, it should be noted that the implementation of the technical solutions in the various embodiments of the present invention occurs during the software function testing phase after the software logic design of the Traffic Manager (TM) chip is completed and before the actual chip product is fabricated. That is, the rate limiting module described in the embodiments of the present invention is not a hardware rate limiting module in the actual TM chip, but rather software logic code capable of implementing all the functions of that hardware rate limiting module.

[0033] Furthermore, the performance testing rate-limiting module applicable to the technical solutions of the various embodiments of the present invention is a rate-limiting module based on the token bucket algorithm. The main principle of the token bucket algorithm is as follows: a certain number of tokens are placed in the token bucket within the rate-limiting module. Whenever data traffic needs to be transmitted and processed, a number of tokens matching the data traffic are deducted. And at regular intervals, a certain number of tokens are added back to the token bucket. Thus, when the number of deducted tokens exceeds the number of added tokens, the token bucket will experience a deficit (i.e., the number of tokens in the token bucket is negative). In a deficit situation, further data traffic will not be allowed to pass through, thereby achieving the function of traffic rate limiting.

[0034] The inventors discovered through research that irregular token deductions lead to a closed token bucket, while periodic token replenishment causes the bucket to transition from a closed to an open state. Furthermore, these processes occur one after another, arranged in a periodic pattern of varying lengths, creating temporal continuity across the entire cycle. Therefore, when performing speed limiting performance analysis, the time interval used can be determined based on the transition of the token bucket from one open state to another.

[0035] In other words, whenever the token bucket shows a deficit, it indicates that the token bucket has implemented the rate limiting function. Therefore, when the rate is statistically analyzed within the time interval determined by the two open processes, the calculation results can reflect the rate limiting performance of the rate limiting module.

[0036] Based on this, the present invention detects the first current time point when the token bucket in the rate limiting module first switches from a deficit state to a non-deficit state (the first open process), and uses this first current time point as the starting point for performance testing and subsequent processing.

[0037] Specifically, after the rate limiting module starts running, before each refill of the token bucket, it can check whether the number of tokens in the token bucket before this refill is negative. If it is negative, it can continue to check whether the number of tokens in the token bucket after this refill is positive. If it is positive, it can be determined that the token bucket in the rate limiting module has switched from a deficit state to a non-deficit state for the first time, and the current system time can be obtained as the first current time point.

[0038] S120. Whenever it is detected that the token bucket in the rate limiting module switches from a deficit state to a non-deficit state again, execute S130-S140.

[0039] In this embodiment, whenever the token bucket in the rate limiting module is detected to switch from a deficit state to a non-deficit state again, it is equivalent to detecting a new open process. After obtaining the second current time point corresponding to the new open process, a time interval can be determined by combining it with the first current time point. Based on this time interval, a rate calculation can be performed.

[0040] S130. Obtain the second current time point and obtain the total number of tokens deducted from the token bucket within the time interval determined by the first current time point and the second current time point.

[0041] The second current time point can be the system time corresponding to each time the token bucket changes from a deficit state to a non-deficit state. Therefore, S130 and S140 are a cyclical process; each time the token bucket in the rate limiting module is detected to switch from a deficit state to a non-deficit state, this process is executed to perform a performance evaluation of the rate limiting module.

[0042] Whenever a second current time point is calculated, it can be combined with the first current time point to form a current time interval. Furthermore, by calculating the total number of tokens deducted in different time intervals, the continuity of each current rate calculation in actual time can be guaranteed.

[0043] The total number of tokens deducted can be the number of tokens deducted for processing data traffic within a current time interval. This total number of tokens deducted can be obtained by counting the traffic.

[0044] The total number of tokens deducted can be divided into two parts: the number of tokens deducted when the token bucket is in a non-deficit state, and the number of tokens deducted when it is in a deficit state. The total number of tokens deducted can be obtained by calculating the sum of the two.

[0045] S140. Calculate the current rate based on the first current time point, the second current time point, and the total number of tokens deducted, and perform performance verification on the rate limiting module based on the current rate and the preset rate configuration value.

[0046] The current rate describes the actual speed of the data flow after processing by the rate limiting module. The rate configuration value is the data flow rate limit preset by the rate limiting module. The rate configuration value is generally configured through registers.

[0047] In this embodiment, the speed limiting module's performance is verified based on the relationship between the current rate and the preset rate configuration value. The performance verification result can indicate that the speed limiting module is in a normal state or an abnormal state. If the current rate is within the error range of the preset rate configuration value, the speed limiting module can be determined to be in a normal state; otherwise, it can be determined that the speed limiting module is in an abnormal state.

[0048] Optionally, calculating the current rate based on the first current time point, the second current time point, and the total number of tokens deducted may include:

[0049] Calculate the target time difference by subtracting the first current time point from the second current time point; calculate the result of dividing the total number of tokens deducted by the target time difference, and use it as the current rate.

[0050] The target time difference can be the time difference obtained by subtracting the first current time point from the second current time point.

[0051] Assuming the second current time point is T2, the first current time point is T1, and the total number of tokens deducted is M, the current rate R can be calculated. 当 For R 当 =M / (T2-T1).

[0052] The technical solution of this invention solves the problems of inaccuracy and incompleteness in verifying the rate limiting module based on fuzzy statistical verification methods. It obtains a first current time point when the token bucket in the rate limiting module first switches from a deficit state to a non-deficit state; and whenever the token bucket in the rate limiting module switches from a deficit state to a non-deficit state again, it obtains a second current time point and the total number of tokens deducted from the token bucket within the time interval determined by the first and second current time points. Based on the first current time point, the second current time point, and the total number of tokens deducted, it calculates the current rate and verifies the performance of the rate limiting module based on the current rate and a preset rate configuration value. This ensures the correctness and verification completeness of the rate limiting module function implemented based on the token bucket algorithm, and achieves quantitative performance verification of the rate limiting module.

[0053] Furthermore, the performance verification of the speed limiting module in this embodiment of the invention is based on a general verification methodology, which is more compatible with mainstream verification methods in the industry and easier to be used by the same industry, and is of great significance to the research and development of domestically produced chips.

[0054] Based on the above embodiments, detecting that the token bucket in the rate limiting module has switched from a deficit state to a non-deficit state may include:

[0055] In response to the periodically generated token bucket refill operation command, it is detected whether the number of tokens in the token bucket before the token bucket refill operation command is executed is negative, and the absolute value of the negative value is less than the preset number of refilled tokens; if so, it is determined that the token bucket in the speed limiting module has switched from a deficit state to a non-deficit state.

[0056] The token bucket refill operation instruction is used to trigger the operation of refilling a certain number of tokens into the token bucket. The number of tokens to be refilled is the value of the number of tokens to be refilled into the token bucket.

[0057] In this embodiment, after completing one data traffic transmission process, if the number of tokens in the token bucket of the rate limiting module is A, and then another data traffic to be processed is received, requiring the consumption of B tokens (it is known that B is greater than A), the rate limiting module will process the data traffic to be processed and consume B tokens. At this time, the number of tokens in the token bucket is AB (the value of AB is negative).

[0058] When the next cycle arrives, a token bucket refill operation is performed according to the token bucket refill instruction. Assume the number of tokens refilled in each cycle is C. Further, it is determined whether the absolute value of AB is less than C. If so, it is confirmed that the token bucket in the rate limiting module has switched from a deficit state to a non-deficit state. If the absolute value of AB is greater than C, it is confirmed that the token bucket in the rate limiting module remains in a deficit state.

[0059] In this embodiment, considering that the token bucket in the rate limiting module only switches from a deficit state to a non-deficient state after the token bucket refill operation, the above state can be detected after each token bucket refill operation command is generated, so as to improve detection efficiency.

[0060] Example 2

[0061] Figure 2 This document provides a flowchart of another performance verification method for a rate limiting module in Embodiment 2 of the present invention. This embodiment is based on and optimized from the above embodiments. In this embodiment, the current rate is calculated based on the first current time point, the second current time point, and the total number of tokens deducted, and the operation of verifying the performance of the rate limiting module is further optimized based on the current rate and the preset rate configuration value.

[0062] Correspondingly, such as Figure 2 As shown, the method includes:

[0063] S210. When the token bucket in the rate limiting module is detected to switch from a deficit state to a non-deficit state for the first time, the first current time point is obtained.

[0064] S220. Obtain the first number of tokens in the token bucket.

[0065] The first token count can be the number of tokens obtained from the token bucket at the first current time point.

[0066] S230. Whenever the token bucket in the rate limiting module is detected to switch from a deficit state to a non-deficit state again, execute S240 to S280 below.

[0067] S240. Obtain the second current time point and obtain the total number of tokens deducted from the token bucket within the time interval determined by the first current time point and the second current time point.

[0068] S250, Obtain the second number of tokens in the token bucket.

[0069] The second token count can be the number of tokens obtained from the token bucket at the second current time point.

[0070] S260. Calculate the current rate based on the first current time point, the second current time point, and the total number of tokens deducted.

[0071] S270. Calculate the absolute value of the difference between the first number of tokens and the second number of tokens, and calculate the result of dividing the absolute value by the target time difference, as the rate error value.

[0072] The error rate value can be the magnitude of the error rate caused by the failure to calculate the number of tokens in the token bucket at the first and second current time points.

[0073] For example, assuming the first number of tokens is M1 and the second number of tokens is M2, the difference can be calculated as M1 - M2. Assuming the second current time point is T2 and the first current time point is T1, the rate error value can be calculated as R. 误 =|M1-M2| / (T2-T1).

[0074] S280. Based on the current rate, the preset rate configuration value, and the rate error value, the performance of the rate limiting module is verified.

[0075] Optionally, performance verification of the rate limiting module can be performed based on the current rate, the preset rate configuration value, and the rate error value, which may include:

[0076] If the current rate is less than the preset rate configuration value, an error will be reported when the sum of the current rate and the rate error value is not equal to the preset rate configuration value.

[0077] If the current rate is greater than the preset rate configuration value, an error will be reported when the difference between the current rate and the rate error value is not equal to the preset rate configuration value.

[0078] In this embodiment, it is assumed that the preset rate configuration value is R. 预If the current rate R 当 Less than the preset rate configuration value R 预 This indicates that the number of tokens in the token buckets corresponding to the first and second current time points is ignored, which also means the rate error value is ignored. Therefore, the current rate R is calculated. 当 With the rate error value R 误 The sum of the values ​​is calculated, and the relationship between the sum and the preset rate configuration value is determined. If the sum is not equal to the preset rate configuration value, an error is reported, indicating that the performance verification of the rate limiting module has failed.

[0079] Furthermore, if the current rate R 当 Greater than the preset rate configuration value R 预 This is because the number of tokens in the token buckets corresponding to the first and second current time points is ignored, which means the rate error value is ignored. Therefore, the current rate R is calculated. 当 With the rate error value R 误 The difference is calculated, and the relationship between the difference and the preset rate configuration value is determined. If the difference is not equal to the preset rate configuration value, an error is reported, indicating that the performance verification of the rate limiting module has failed.

[0080] If the current rate is equal to the preset rate configuration value, it means that the number of tokens in the token bucket corresponding to the first current time point and the second current time point is the same, there is no rate error value, and it means that the performance verification of the rate limiting module has passed.

[0081] Specifically, let's assume the rate configuration value is R. 预 Current rate R 当 It is possible to calculate the current rate R after n cycles. 当 For: R 当 =R 预 +ΔM / ΔT=R 预 ±|ΔM| / nT. Where ΔM is the difference in the number of tokens in the token bucket corresponding to the first and second current time points, ΔT is the difference between the first and second current time points, and T is the cycle time for executing the token bucket refill operation instruction.

[0082] The technical solution of this invention calculates the rate error value using a first token count and a second token count. The performance of the rate limiting module is verified using the current rate, a preset rate configuration value, and the rate error value. By calculating the rate error value, the completeness of the verification of the rate limiting module's function based on token bucket technology is ensured, and performance verification can be performed more accurately, thereby improving the accuracy of performance verification and achieving quantitative performance verification of the rate limiting module.

[0083] Based on the above embodiments, while performing performance verification of the rate limiting module according to the current rate and a preset rate configuration value, the following may also be included:

[0084] Obtain the generation cycle of the token bucket backfilling operation instruction; if the result of dividing the target time difference by the generation cycle is not a positive integer, generate an error report.

[0085] According to the above formula: R 当 =R 预 +ΔM / ΔT=R 预 ±|ΔM| / nT can be understood as ΔT=nT, meaning the difference between the first and second current time points should be an integer multiple of the period. If this condition is not met, the performance verification of the speed limiting module may have an anomaly, requiring error handling.

[0086] In this embodiment, because the token bucket refilling operation is executed according to a certain period, the token bucket in the rate limiting module can only switch states and obtain the second current time point after the token bucket refilling operation is executed. Therefore, the time difference between the first current time point and the second current time point should be a positive integer multiple of the generation period. If the result of dividing the target time difference by the generation period is not a positive integer, it indicates that the performance verification has failed, possibly due to a fault in the rate limiting module, and another verification is needed to determine the cause of the anomaly.

[0087] The advantage of this setting is that by calculating the relationship between the time difference and the generation cycle, it is possible to determine whether there are any anomalies, which allows for more accurate and comprehensive performance verification of the speed limiting module.

[0088] Based on the above embodiments, after verifying the performance of the rate limiting module according to the current rate and the preset rate configuration value, the method further includes:

[0089] If no error is reported when the verification ends, the performance of the rate limiting module is determined to meet the design expectations.

[0090] Specifically, the verification can be terminated when the continuous verification time meets a preset time threshold, or when the tested data traffic exceeds a preset data traffic threshold, or when the number of calculations at the current speed exceeds a preset number threshold.

[0091] In this embodiment, the speed limiting module was tested for performance. No abnormal errors occurred, indicating that the performance test was successful. In other words, the performance of the speed limiting module meets the preset performance requirements, which means that the performance of the speed limiting module meets the design expectations.

[0092] Example 3

[0093] Figure 3 This is a schematic diagram of a performance verification device for a rate limiting module provided in Embodiment 3 of the present invention. The performance verification device for a rate limiting module provided in this embodiment can be implemented by software and / or hardware, and can be configured in a server or terminal device to implement a performance verification method for a rate limiting module according to an embodiment of the present invention. Figure 3 As shown, the device includes: a first current time point acquisition module 310, a trigger execution module 320, a token deduction total determination module 330, and a performance verification module 340.

[0094] The first current time point acquisition module 310 is used to acquire the first current time point when the token bucket in the rate limiting module is detected to switch from a deficit state to a non-deficit state for the first time.

[0095] The trigger execution module 320 is used to trigger the execution of the token deduction total determination module and the performance verification module whenever the token bucket in the rate limiting module is detected to switch from a deficit state to a non-deficit state again.

[0096] The token deduction total determination module 330 is used to obtain the second current time point and obtain the total number of tokens deducted from the token bucket within the time interval determined by the first current time point and the second current time point;

[0097] The performance verification module 340 is used to calculate the current rate based on the first current time point, the second current time point, and the total number of tokens deducted, and to perform performance verification on the rate limiting module based on the current rate and the preset rate configuration value.

[0098] The technical solution of this invention solves the problems of inaccuracy and incompleteness in verifying the rate limiting module based on fuzzy statistical verification methods. It obtains a first current time point when the token bucket in the rate limiting module first switches from a deficit state to a non-deficit state; and whenever the token bucket in the rate limiting module switches from a deficit state to a non-deficit state again, it obtains a second current time point and the total number of tokens deducted from the token bucket within the time interval determined by the first and second current time points. Based on the first current time point, the second current time point, and the total number of tokens deducted, it calculates the current rate and verifies the performance of the rate limiting module based on the current rate and a preset rate configuration value. This ensures the correctness and verification completeness of the rate limiting module function implemented based on the token bucket algorithm, and achieves quantitative performance verification of the rate limiting module.

[0099] Optionally, the token deduction total determination module 330 can be specifically used to: calculate the target time difference obtained by subtracting the first current time point from the second current time point; and calculate the result obtained by dividing the total token deduction by the target time difference as the current rate.

[0100] Optionally, it may also include: a first token count acquisition module, used to acquire the first token count in the token bucket while acquiring the first current time point;

[0101] Optionally, it may also include: a second token acquisition module, used to acquire the second token count in the token bucket while acquiring the second current time point;

[0102] Optionally, the performance verification module 340 may specifically include:

[0103] The rate error value determination unit is used to calculate the absolute value of the difference between the first number of tokens and the second number of tokens, and to calculate the result of dividing the absolute value by the target time difference as the rate error value;

[0104] The performance verification unit is used to verify the performance of the rate limiting module based on the current rate, the preset rate configuration value, and the rate error value.

[0105] Optionally, the performance verification unit may be specifically used to: if the current rate is less than a preset rate configuration value, then when the sum of the current rate and the rate error value is not equal to the preset rate configuration value, generate an error report; if the current rate is greater than the preset rate configuration value, then when the difference between the current rate and the rate error value is not equal to the preset rate configuration value, generate an error report.

[0106] Optionally, the token deduction total determination module 330 or the performance verification module 340 may be specifically used to: in response to the periodically generated token bucket refill operation command, detect whether the number of tokens in the token bucket before the token bucket refill operation command is negative, and the absolute value of the negative value is less than the preset number of refilled tokens; if so, determine that the token bucket in the rate limiting module has switched from a deficit state to a non-deficit state.

[0107] Optionally, it may also include an error reporting module, which may be specifically used to: obtain the generation cycle of the token bucket backfilling operation instruction; and report an error when the result of dividing the target time difference by the generation cycle is not a positive integer.

[0108] Optionally, it may also include a performance satisfaction determination module, specifically used to: after verifying the performance of the rate limiting module according to the current rate and the preset rate configuration value, if no abnormal error is reported when the end verification condition is met, then determine that the performance of the rate limiting module meets the design expectations.

[0109] The performance verification device for the speed limiting module provided in this embodiment of the invention can execute the performance verification method for the speed limiting module provided in any embodiment of the invention, and has the corresponding functional modules and beneficial effects of the method.

[0110] Example 4

[0111] Figure 4 A schematic diagram of an electronic device 10 that can be used to implement embodiments of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the invention described and / or claimed herein.

[0112] like Figure 4 As shown, the electronic device 10 includes at least one processor 11 and a memory, such as a read-only memory (ROM) 12 or a random access memory (RAM) 13, communicatively connected to the at least one processor 11. The memory stores computer programs executable by the at least one processor. The processor 11 can perform various appropriate actions and processes based on the computer program stored in the ROM 12 or loaded from storage unit 18 into the RAM 13. The RAM 13 may also store various programs and data required for the operation of the electronic device 10. The processor 11, ROM 12, and RAM 13 are interconnected via a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0113] Multiple components in electronic device 10 are connected to I / O interface 15, including: input unit 16, such as keyboard, mouse, etc.; output unit 17, such as various types of displays, speakers, etc.; storage unit 18, such as disk, optical disk, etc.; and communication unit 19, such as network card, modem, wireless transceiver, etc. Communication unit 19 allows electronic device 10 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0114] Processor 11 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. Processor 11 performs the various methods and processes described above, such as the performance verification method of the rate limiting module.

[0115] That is, the method includes: when the token bucket in the rate limiting module is detected to switch from a deficit state to a non-deficit state for the first time, obtaining a first current time point; whenever the token bucket in the rate limiting module is detected to switch from a deficit state to a non-deficit state again, performing the following operations: obtaining a second current time point, and obtaining the total number of tokens deducted from the token bucket within the time interval determined by the first current time point and the second current time point; calculating the current rate based on the first current time point, the second current time point, and the total number of tokens deducted, and performing performance verification on the rate limiting module based on the current rate and a preset rate configuration value.

[0116] In some embodiments, the performance verification method for the rate limiting module may be implemented as a computer program tangibly contained in a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 10 via ROM 12 and / or communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the performance verification method for the rate limiting module described above may be performed. Alternatively, in other embodiments, processor 11 may be configured to perform the performance verification method for the rate limiting module by any other suitable means (e.g., by means of firmware).

[0117] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.

[0118] Computer programs used for implementing the performance verification method of the rate limiting module of the present invention can be written in any combination of one or more programming languages. These computer programs can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when executed by the processor, the computer programs cause the functions / operations specified in the flowcharts and / or block diagrams to be implemented. The computer programs can be executed entirely on the machine, partially on the machine, as a standalone software package partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0119] In the context of this invention, a computer-readable storage medium can be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, apparatus, or device. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination thereof. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0120] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0121] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as data servers), or computing systems that include middleware components (e.g., application servers), or computing systems that include frontend components (e.g., user computers with graphical user interfaces or web browsers through which users can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., communication networks). Examples of communication networks include local area networks (LANs), wide area networks (WANs), blockchain networks, and the Internet.

[0122] A computing system can include clients and servers. Clients and servers are generally located far apart and typically interact through communication networks. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a hosting product within the cloud computing service system to address the shortcomings of traditional physical hosts and VPS services, such as high management difficulty and weak business scalability.

[0123] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0124] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

[0125] Example 5

[0126] Embodiment 5 of the present invention also provides a computer-readable storage medium, wherein the computer-readable instructions, when executed by a computer processor, are used to perform a performance verification method for a rate limiting module, the method comprising:

[0127] When the token bucket in the rate limiting module first switches from a deficit state to a non-deficit state, a first current time point is obtained. Whenever the token bucket in the rate limiting module switches from a deficit state to a non-deficit state again, the following operations are performed: a second current time point is obtained, and the total number of tokens deducted from the token bucket within the time interval determined by the first and second current time points is obtained; the current rate is calculated based on the first current time point, the second current time point, and the total number of tokens deducted, and the performance of the rate limiting module is verified based on the current rate and the preset rate configuration value.

[0128] Of course, the computer-executable instructions provided in the embodiments of the present invention, which include a computer-readable storage medium, are not limited to the method operations described above, but can also perform related operations in the performance verification method of the rate limiting module provided in any embodiment of the present invention.

[0129] Based on the above description of the implementation methods, those skilled in the art can clearly understand that the present invention can be implemented using software and necessary general-purpose hardware, and of course, it can also be implemented using hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as a computer floppy disk, read-only memory (ROM), random access memory (RAM), flash memory, hard disk, or optical disk, etc., including several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments of the present invention.

[0130] It is worth noting that in the embodiments of the performance verification device for the speed limiting module described above, the various units and modules included are only divided according to functional logic, but are not limited to the above division, as long as the corresponding functions can be achieved; in addition, the specific names of each functional unit are only for easy differentiation and are not used to limit the scope of protection of the present invention.

[0131] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A performance verification method for a speed limiting module, characterized in that, include: When the token bucket in the rate limiting module first switches from a deficit state to a non-deficit state, the first current time point is obtained; Whenever the token bucket in the rate limiting module is detected to switch from a deficit state to a non-deficit state again, perform the following operations: Get the second current time point, and get the total number of tokens deducted from the token bucket within the time interval determined by the first and second current time points; The current rate is calculated based on the first current time point, the second current time point, and the total number of tokens deducted. The performance of the rate limiting module is then verified based on the current rate and the preset rate configuration value. This includes obtaining the first current time point and obtaining the first number of tokens in the token bucket; While obtaining the second current time point, it also includes obtaining the second number of tokens in the token bucket; Based on the current rate and the preset rate configuration value, the performance of the rate limiting module is verified, including: The absolute value of the difference between the first number of tokens and the second number of tokens is calculated, and the result of dividing the absolute value by the target time difference is used as the rate error value. The performance of the speed limiting module is verified based on the current rate, the preset rate configuration value, and the rate error value. The performance verification of the rate limiting module is performed based on the current rate, the preset rate configuration value, and the rate error value, including: If the current rate is less than the preset rate configuration value, an error will be reported when the sum of the current rate and the rate error value is not equal to the preset rate configuration value. If the current rate is greater than the preset rate configuration value, an error will be reported when the difference between the current rate and the rate error value is not equal to the preset rate configuration value. The current rate is calculated based on the first current time point, the second current time point, and the total number of tokens deducted, including: Calculate the target time difference by subtracting the first current time point from the second current time point; The current rate is calculated by dividing the total number of tokens deducted by the target time difference.

2. The method according to claim 1, characterized in that, The token bucket in the rate limiting module was detected to switch from a deficit state to a non-deficit state, including: In response to the periodically generated token bucket refill operation command, it detects whether the number of tokens in the token bucket is negative before the token bucket refill operation command is executed, and the absolute value of the negative value is less than the preset number of tokens to be refilled; If so, it confirms that the token bucket in the rate limiting module has switched from a deficit state to a non-deficit state.

3. The method according to claim 2, characterized in that, In addition to verifying the performance of the rate limiting module based on the current rate and the preset rate configuration value, the process also includes: Obtain the generation cycle of the token bucket backfill operation instruction; An error is reported if the result of dividing the target time difference by the generation period is not a positive integer.

4. The method according to claim 1, characterized in that, After verifying the performance of the rate limiting module based on the current rate and the preset rate configuration value, the following steps are also included: If no error is reported when the verification ends, the performance of the rate limiting module is determined to meet the design expectations.

5. A performance verification device for a speed limiting module, characterized in that, include: The first current time point acquisition module is used to acquire the first current time point when the token bucket in the rate limiting module is detected to switch from a deficit state to a non-deficit state for the first time. The trigger execution module is used to trigger the execution of the token deduction total determination module and the performance verification module whenever the token bucket in the rate limiting module is detected to switch from a deficit state to a non-deficit state again. The token deduction total determination module is used to obtain the second current time point and the total number of tokens deducted from the token bucket within the time interval determined by the first current time point and the second current time point; The performance verification module is used to calculate the current rate based on the first current time point, the second current time point, and the total number of tokens deducted, and to perform performance verification on the rate limiting module based on the current rate and the preset rate configuration value. It also includes: a first token acquisition module, used to acquire the first token count in the token bucket while acquiring the first current time point; and a second token acquisition module, used to acquire the second token count in the token bucket while acquiring the second current time point. The performance verification module specifically includes: a rate error value determination unit, used to calculate the absolute value of the difference between the first number of tokens and the second number of tokens, and to calculate the result of dividing the absolute value by the target time difference as the rate error value; and a performance verification unit, used to perform performance verification on the rate limiting module based on the current rate, the preset rate configuration value, and the rate error value. The performance verification unit is configured to: if the current rate is less than a preset rate configuration value, then report an error when the sum of the current rate and the rate error value is not equal to the preset rate configuration value; if the current rate is greater than the preset rate configuration value, then report an error when the difference between the current rate and the rate error value is not equal to the preset rate configuration value. The token deduction total determination module is used to: calculate the target time difference obtained by subtracting the first current time point from the second current time point; and calculate the result obtained by dividing the total token deduction by the target time difference as the current rate.

6. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the performance verification method for the rate limiting module as described in any one of claims 1-4.

7. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that, when executed by a processor, implement the performance verification method for the rate limiting module as described in any one of claims 1-4.

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