A dynamic data page management system, method, computer device, and storage medium
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SHANDONG YUNHAI GUOCHUANG CLOUD COMPUTING EQUIP IND INNOVATION CENT CO LTD
- Filing Date
- 2022-08-19
- Publication Date
- 2026-06-30
Smart Images
Figure CN115328824B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of computer technology, and specifically to a dynamic data page management system, method, computer device, and storage medium based on an active request mode. Background Technology
[0002] In computer science, a bus serves as the common communication backbone for transmitting information between various functional components of a computer. It is divided into a data bus, an address bus, and a control bus, used to transmit data, data addresses, and control signals, respectively. A bus is an internal structure; it is a common channel for information transmission between the CPU, memory, input / output devices, and other components of the host computer. External devices are connected to the bus through corresponding interface circuits, thus forming the computer hardware system.
[0003] In traditional data page management solutions, data pages are managed separately by the data initiator, such as... Figure 1 As shown, the data receiver passively receives data; the interaction between the two is solely through data streams transmitted via the bus. The data receiver does not participate in data page management. Traditional data page management schemes involve the data initiator allocating data pages, establishing a mapping between data pages and data, and transmitting data to the data receiver via the bus. The data receiver receives the data, performs data aggregation, and then reads the address pointer of the corresponding data in memory based on the aggregation result. In traditional schemes, the data receiver prefetches address pointers for a portion of the data to reduce bus usage and improve system efficiency. However, considering the transmission characteristics of the bus, the data received by the data receiver may be out of order. This can cause the received data to exceed the range of prefetched address pointers, resulting in a "mismatch" between the data and the prefetched pointers. In this case, the data receiver needs to reread the address pointer of the corresponding data to match the out-of-order data. If out-of-order data issues frequently occur on the bus, the data receiver will frequently read address pointers, consuming significant bus resources and severely impacting system performance. Summary of the Invention
[0004] In view of this, traditional data page management schemes often suffer from data mismatches with prefetched address pointers due to frequent out-of-order bus data, requiring frequent prefetching of the corresponding data's address pointer, thus causing significant bus resource consumption and excessive use of system cache resources. The purpose of this invention is to propose a dynamic data page management system, method, computer device, and storage medium based on an active request mode. Data pages are jointly managed by the data receiver and the initiator. The data initiator actively requests data pages from the data receiver, maps the obtained data pages to the data, issues a task to the data receiver to obtain the corresponding data address pointer, and then sends the data, achieving accurate matching between data and address pointers. This processing method can significantly reduce repeated address pointer readings, reduce bus resource consumption, reduce cache resource usage, and improve system operating efficiency, thus solving the problem that frequent out-of-order bus data causes the data receiver to frequently read address pointers, consuming a large amount of bus resources and severely impacting system performance.
[0005] In another aspect, the present invention also provides a dynamic data page management system, including a data page allocation module, an address pointer reading module, and a data reading and dynamic data page management module;
[0006] The data page allocation module is configured to receive a data page request task issued by the data initiator and allocate a corresponding number of data pages to the data initiator according to the internal data page idle status.
[0007] The address pointer reading module is configured to receive the address pointer reading task issued by the data initiator, read the corresponding number of address pointers through the bus according to the parameters contained in the task, and then map the address pointers to the data pages one by one according to the free data page number in the internal cache of the data receiver.
[0008] The data reading and dynamic data page management module is configured to read the corresponding data through the bus according to the address pointer of the data page. When the data of a certain data page is calculated and released, the data page is recycled and cached for use by the data initiator when it is requested again.
[0009] In some embodiments of the data page dynamic management system according to the present invention, the data page application task issued by the data initiator in the data page allocation module includes the parameter: the number of data pages to be applied for, n.
[0010] In some embodiments of the data page dynamic management system according to the present invention, in the data page allocation module, the data receiver is used to cache the released data page numbers locally. When it receives a data page request task issued by the data initiator, it reads out the task parameters, reads out the corresponding number of data page numbers from the local cache in the cache order, and dispatches them to the data initiator.
[0011] In some embodiments of the data page dynamic management system according to the present invention, in the data page allocation module, when allocating data pages, the data receiver will cache the data page numbers that have been released internally in sequence. When it receives a data page request from the data initiator, it reads out the corresponding parameters, and the data receiver reads out the corresponding data page numbers from the cache in sequence and allocates them to the data initiator. The data initiator obtains the corresponding number of data pages and maps the data with the obtained data pages. The address pointer reading task sent by the data initiator to the data receiver will be performed according to this mapping relationship.
[0012] In some embodiments of the data page dynamic management system according to the present invention, when the address pointer reading module performs address pointer reading processing, the data initiator sends an address pointer reading task to the data receiver. The data receiver reads the corresponding number of address pointers through the bus according to the initial address and the number of pointers to be read. The read address pointers are sequentially written into the pointer address cache according to the free data pages in the receiver's cache.
[0013] In some embodiments of the data page dynamic management system according to the present invention, in the data reading and data page management module, when the data calculation of a certain data page is completed and all data is released, the data page is recycled and cached for use by the data initiator when it is requested again.
[0014] In some embodiments of the data page dynamic management system according to the present invention, when the data reading and data page management module performs data reading and data page dynamic management, the data initiator sends data to the data receiver through the bus, and the order in which the bus data arrives at the data receiver is sorted by time.
[0015] To achieve the above objectives, in another aspect, the present invention provides a dynamic data page management method, wherein the data page is jointly managed by the data receiver and the data initiator, and the method includes the following steps:
[0016] The data initiator proactively requests data pages from the data receiver, and the data receiver allocates usable data pages to the data initiator based on the availability of its internal data pages.
[0017] The data initiator then sends a corresponding number of address pointer read tasks to the data receiver based on the obtained data pages. The data initiator maps the requested data pages to the data to be sent.
[0018] The system waits for the data receiver's pointer to finish reading the task and then notifies the data initiator. The data initiator then sends the corresponding data page to the data receiver.
[0019] In another aspect, the present invention provides a computer-readable storage medium storing computer program instructions that, when executed, implement any of the above-described data page dynamic management methods according to the present invention.
[0020] In another aspect, the present invention provides a computer device including a memory and a processor, wherein the memory stores a computer program that, when executed by the processor, performs any of the above-described data page dynamic management methods according to the present invention.
[0021] This invention offers at least the following beneficial technical effects: It proposes a dynamic data page management system and method. Data pages are jointly managed by the data receiver and the data initiator. The data initiator actively requests data pages from the data receiver. The data receiver allocates usable data pages to the data initiator based on its internal data page availability. The data initiator then sends a corresponding number of address pointer read tasks to the data receiver based on the obtained data pages. Simultaneously, the data initiator maps the requested data pages to the data to be sent. The receiver waits for the pointer read tasks to complete and notifies the data initiator. At this point, the data initiator sends the corresponding data page to the data receiver. This scheme ensures that the address pointers cached by the data receiver perfectly match the data sent by the data initiator. Even if data is out of order, the data receiver has already cached the corresponding address pointers, achieving a one-to-one correspondence between the sent data and the receiver's internal cached address pointers. This scheme solves the problem of data and address pointer mismatch caused by out-of-order bus data, requiring frequent re-acquisition of address pointers, achieving precise matching of data and address pointers, thereby significantly reducing bus occupancy. In addition, the one-to-one correspondence between data and address pointers eliminates the need for additional prefetch caching of address pointers, saving system cache resources and significantly improving system operating efficiency. Attached Figure Description
[0022] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other embodiments can be obtained based on these drawings without creative effort.
[0023] In the diagram:
[0024] Figure 1This diagram illustrates traditional data page management.
[0025] Figure 2 A flowchart of the dynamic data page management method according to the present invention is shown;
[0026] Figure 3 A hardware architecture diagram of an embodiment of the data page dynamic management system according to the present invention is shown;
[0027] Figure 4 A schematic diagram of data page allocation is shown in an embodiment of the data page dynamic management system according to the present invention;
[0028] Figure 5 A schematic diagram illustrating address pointer reading is shown in an embodiment of the data page dynamic management system according to the present invention;
[0029] Figure 6 A schematic diagram illustrating data reading and dynamic data page management in an embodiment of the data page dynamic management system according to the present invention is shown.
[0030] Figure 7 A schematic diagram illustrating an embodiment of a computer-readable storage medium for implementing a dynamic data page management method according to the present invention is shown;
[0031] Figure 8 A schematic diagram of the hardware structure of an embodiment of a computer device for implementing a dynamic data page management method according to the present invention is shown.
[0032] Figure 9 A schematic diagram of the framework of an embodiment of the chip according to the present invention is shown. Detailed Implementation
[0033] To make the objectives, technical solutions, and advantages of the present invention clearer, the embodiments of the present invention will be further described in detail below with reference to specific examples and the accompanying drawings.
[0034] It should be noted that all uses of "first" and "second" in the embodiments of the present invention are for the purpose of distinguishing two different entities or different parameters with the same name. Therefore, "first" and "second" are merely for convenience of expression and should not be construed as limiting the embodiments of the present invention. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion, such as other steps or units inherent in a process, method, system, product, or device that includes a series of steps or units.
[0035] Simply put, in traditional data page management solutions, data pages are managed solely by the data initiator, such as... Figure 1As shown, the data receiver passively receives data; the interaction between the two is solely through data streams transmitted via the bus. The data receiver does not participate in data page management. Traditional data page management schemes involve the data initiator allocating data pages, establishing a mapping between data pages and data, and transmitting data to the data receiver via the bus. The data receiver receives the data, performs data aggregation, and then reads the address pointer of the corresponding data in memory based on the aggregation result. In traditional schemes, the data receiver prefetches address pointers for a portion of the data to reduce bus usage and improve system efficiency. However, considering the transmission characteristics of the bus, the data received by the data receiver may be out of order. This can cause the received data to exceed the range of prefetched address pointers, resulting in a "mismatch" between the data and the prefetched pointers. In this case, the data receiver needs to reread the address pointer of the corresponding data to match the out-of-order data. If out-of-order data issues frequently occur on the bus, the data receiver will frequently read address pointers, consuming significant bus resources and severely impacting system performance.
[0036] To address the problem of data mismatches with prefetched address pointers caused by frequent out-of-order data in traditional data page management schemes, which necessitates frequent prefetching of the corresponding data's address pointer and thus leads to excessive bus resource consumption and system cache resource usage, this invention aims to propose a dynamic data page management system, method, computer device, and storage medium based on an active request mode. In this system, data pages are jointly managed by the data receiver and the initiator. The data initiator actively requests data pages from the data receiver, maps the obtained data pages to the data, issues a task to the data receiver to obtain the corresponding data address pointer, and then sends the data, achieving precise data-address pointer matching. This approach significantly reduces repeated address pointer reads, bus resource consumption, and cache resource usage, improving system efficiency. This solves the problem of frequent out-of-order bus data causing the data receiver to frequently read address pointers, consuming excessive bus resources and severely impacting system performance.
[0037] Therefore, in a first aspect, the present invention provides a method for dynamic management of data pages, wherein the data pages are jointly managed by the data receiver and the data initiator, and the method includes the following steps:
[0038] The data initiator proactively requests data pages from the data receiver, and the data receiver allocates usable data pages to the data initiator based on the availability of its internal data pages.
[0039] The data initiator then sends a corresponding number of address pointer read tasks to the data receiver based on the obtained data pages. The data initiator maps the requested data pages to the data to be sent.
[0040] The system waits for the data receiver's pointer to finish reading the task and then notifies the data initiator. The data initiator then sends the corresponding data page to the data receiver.
[0041] When performing dynamic management of data pages based on an active request model, such as Figure 2 As shown, the specific process of the data page dynamic management method based on the active request mode in this embodiment of the invention is as follows:
[0042] The data initiator proactively requests data pages from the data receiver. The data receiver allocates usable data pages to the data initiator based on its internal data page availability. The data initiator then sends a corresponding number of address pointer read tasks to the data receiver based on the allocated data pages. Simultaneously, the data initiator maps the requested data pages to the data to be sent. The receiver waits for the pointer read tasks to complete and notify the data initiator. At this point, the data initiator then sends the data for the corresponding data page to the data receiver.
[0043] This invention ensures that the address pointers cached by the data receiver perfectly match the data sent by the data initiator. Even if data is out of order, the data receiver has already cached the corresponding address pointers, achieving a one-to-one correspondence between the sent data and the cached address pointers within the receiver. This invention solves the problem of frequent address pointer re-acquisition due to data mismatch caused by out-of-order bus data, achieving precise matching between data and address pointers and significantly reducing bus usage. Furthermore, the one-to-one correspondence between data and address pointers eliminates the need for additional prefetching and caching of address pointers, saving system cache resources and greatly improving system efficiency.
[0044] A second aspect of the present invention also provides a dynamic data page management system. The hardware architecture diagram of an embodiment of the present invention is shown below. Figure 3 As shown, the system includes a data page allocation module, an address pointer reading module, and a data reading and data page dynamic management module. These three parts will be explained in detail below.
[0045] The data page allocation module is configured to receive a data page request task issued by the data initiator and allocate a corresponding number of data pages to the data initiator according to the internal data page idle status.
[0046] The address pointer reading module is configured to receive the address pointer reading task issued by the data initiator, read the corresponding number of address pointers through the bus according to the parameters contained in the task, and then map the address pointers to the data pages one by one according to the free data page number in the internal cache of the data receiver.
[0047] The data reading and dynamic data page management module is configured to read the corresponding data through the bus according to the address pointer of the data page. When the data of a certain data page is calculated and released, the data page is recycled and cached for use by the data initiator when it is requested again.
[0048] In an embodiment of the present invention, see Figure 4 As shown, the data page allocation module is responsible for receiving data page request tasks from the data initiator and allocating a corresponding number of data pages to the data initiator based on the availability of internal data pages. The data page request task issued by the data initiator includes the parameter: the number of data pages requested, n.
[0049] The specific processing flow is as follows: The data receiver caches the released data page numbers (i.e., free data pages) locally. When it receives a data page request task from the data initiator, it reads the task parameters (the number of data pages requested, n), and sequentially reads the corresponding number of data page numbers from the local cache according to the cache order, and dispatches them to the data initiator.
[0050] Figure 4 A diagram illustrating data page allocation, such as... Figure 4 As illustrated in the diagram, the data receiver first caches the numbers of the released data pages sequentially. Currently, data pages 2, 3, 4, 6, 7, 8, 9, and 10 are idle, and these idle data page numbers are cached sequentially. When a data page request is received from the data initiator, its parameters are read (in this task, the data initiator requests 7 data pages). The data receiver then reads the 7 data page numbers from the cache and allocates them to the data initiator. The data initiator obtains the corresponding number of data pages and maps the data to the obtained data pages. Subsequent address pointer read tasks sent by the data initiator to the data receiver will be performed based on this mapping relationship.
[0051] In an embodiment of the present invention, the address pointer reading module is responsible for receiving the address pointer reading task issued by the data initiator. According to the parameters contained in the task (the address pointer corresponds to the initial address and the number of address pointers), the module reads the corresponding number of address pointers through the bus. Then, according to the free data page number in the internal cache of the data receiver, the module maps the address pointers to the data pages one by one (using the data page number as the address, the address pointer is stored in the cache).
[0052] by Figure 5The following diagram illustrates the address pointer read process: The data initiator sends an address pointer read task to the data receiver (this task includes the starting address, the address corresponding to address pointer 2, and the number of address pointers to read, 7). The data receiver, based on the initial address and the number of pointers to read, reads the corresponding 7 address pointers via the bus. The 7 read address pointers are then sequentially written into the pointer address cache according to the free data pages in the receiver's cache, i.e.:
[0053] The write address corresponding to address pointer 2 in the cache is the number of data page 2;
[0054] The write address corresponding to address pointer 3 in the cache is the number of data page 3;
[0055] Address pointer 4 corresponds to the write address of cache, which is the number of data page 4;
[0056] Address pointer 6 corresponds to the write address of cache, which is the number of data page 6;
[0057] The write address corresponding to address pointer 7 in the cache is the number of data page 7;
[0058] The write address corresponding to address pointer 8 in the cache is the number of data page 8;
[0059] The write address corresponding to address pointer 9 in the cache is the number of data page 9;
[0060] This establishes a one-to-one mapping between data pages and address pointers, preparing for precise matching of bus data and address pointers.
[0061] In embodiments of the present invention, the data reading and data page management module is primarily responsible for: reading the corresponding data via the bus according to the address pointer corresponding to the data page; and reclaiming and caching the data page when its data calculation is complete and all data is released, so that it can be used again by the data initiator when requesting it again. Since the data initiator internally maps data pages (obtained from the data receiver) to corresponding data, and the data receiver also maps data pages (allocated to the data receiver) to address pointers, the data sent by the data initiator and the address pointers cached by the data receiver can be perfectly matched, with the data page acting as an intermediary bridge. Even if the data sent by the data initiator via the bus is out of order, the data receiver can still perfectly match its corresponding address pointer.
[0062] by Figure 6 The diagram below illustrates the data reading and dynamic data page management process. Figure 6As shown, the data initiator sends data to the data receiver via the bus. The order in which the bus data arrives at the data receiver, sorted by time, is as follows: data corresponding to data page 2, data corresponding to data page 3, data corresponding to data page 4, data corresponding to data page 7, data corresponding to data page 8, data corresponding to data page 9, and data corresponding to data page 6. This data is out of order twice.
[0063] Data recipient:
[0064] Read the corresponding address pointer 2 based on data page 2, and read the corresponding data through the bus.
[0065] Read the corresponding address pointer 3 based on data page 3, and read the corresponding data through the bus.
[0066] Read the corresponding address pointer 4 based on data page 4, and read the corresponding data through the bus.
[0067] Read the corresponding address pointer 7 based on data page 7, and read the corresponding data through the bus.
[0068] The data is out of order at this point, but the data receiver has cached the address pointer corresponding to data page 7 in advance, so the data can still hit the corresponding address pointer.
[0069] Read the corresponding address pointer 8 based on data page 8, and read the corresponding data through the bus.
[0070] Read the corresponding address pointer 9 based on data page 9, and read the corresponding data through the bus.
[0071] According to the data page 6, the corresponding address pointer 6 is read, and the corresponding data is read through the bus. At this time, the data is out of order, but the data receiver has cached the address pointer corresponding to the data page 6 in advance, so the data can still hit the corresponding address pointer.
[0072] The read data will be used in the calculations of other modules. Once the data processing for data page 11 and data page 12 is complete, the data page is released and cached for future use by the data initiator.
[0073] The superiority of this improved invention can be analyzed through the detailed description above. Because the data initiator and data receiver jointly manage the data pages, and establish a mapping relationship between data pages and data, as well as between data pages and address pointers, accurate matching between the bus data sent by the data initiator and the address pointers cached by the data receiver is achieved. Even if out-of-order bus data occurs, it is still within the "expected" range of the cached address pointers and can be completely matched. Compared to traditional data page management inventions, where frequent out-of-order data leads to data and prefetch address pointer misses, requiring frequent rereading of the corresponding data's address pointer, this improved invention can significantly reduce the number of bus accesses, thereby reducing bus occupancy and improving system operating efficiency and speed. Simultaneously, the elimination of address pointer over-prefetching also saves system cache resources.
[0074] This invention employs a dynamic data page management method based on an active request mode, which significantly reduces the number of times the system accesses the bus, improves the system's operating speed and execution efficiency, and ensures accurate matching of data and address pointers without the need for additional address pointer prefetching, thereby saving system cache resources.
[0075] It should be noted that the data page dynamic management system based on the active request mode provided by this invention accurately matches bus data with address pointers. Compared with the traditional data page management method, this improved invention can significantly reduce the number of times the system accesses the bus and save system resources.
[0076] Compared to traditional data page management methods, which suffer from frequent out-of-order bus data leading to frequent reads of corresponding address pointers, this improved invention establishes a one-to-one correspondence between bus data and local cache address pointers, achieving precise matching between the two. Furthermore, it eliminates the need for additional address pointer reads and caching. This improved invention effectively reduces the system's bus access frequency, improves system operating efficiency, and also reduces the system's cache resource consumption.
[0077] Furthermore, the fewer the number of address pointer read tasks issued by the data initiator, and the more address pointers need to be read within each task, the lower the frequency of bus access in the proposed improvement. However, if the address pointer read tasks issued by the data initiator are fragmented and small, the invention needs to frequently access the bus to obtain address pointers, and the bus access frequency depends on the number of addressing tasks. Therefore, in order to maximize system efficiency and minimize bus occupancy time, the data initiator should aggregate tasks as much as possible to reduce the number of addressing tasks.
[0078] A third aspect of the present invention also provides a computer-readable storage medium. Figure 7A schematic diagram of a computer-readable storage medium for a data page dynamic management method provided according to an embodiment of the present invention is shown. Figure 7 As shown, the computer-readable storage medium 300 stores computer program instructions 310, which can be executed by a processor. When executed, the computer program instructions 310 implement the method of any of the above embodiments.
[0079] It should be understood that, where there is no conflict, all the embodiments, features and advantages described above for the data page dynamic management method according to the present invention are equally applicable to the data page dynamic management system and storage medium according to the present invention.
[0080] A fourth aspect of the present invention also provides a computer device 400, including a memory 420 and a processor 410, wherein the memory stores a computer program, which, when executed by the processor, implements the method of any of the above embodiments.
[0081] like Figure 8 The diagram shown is a hardware structure schematic of an embodiment of the computer device for implementing the dynamic data page management method provided by the present invention. Figure 8 Taking the computer device 400 shown as an example, this computer device includes a processor 410 and a memory 420, and may also include an input device 430 and an output device 440. The processor 410, memory 420, input device 430, and output device 440 can be connected via a bus or other means. Figure 8 Taking a bus connection as an example, input device 430 can receive input digital or character information and generate signal inputs related to dynamic management of data pages. Output device 440 may include display devices such as a display screen.
[0082] Memory 420, as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer-executable programs, and modules, such as the program instructions / modules corresponding to the resource monitoring method in this embodiment. Memory 420 may include a program storage area and a data storage area, wherein the program storage area may store the operating system and application programs required for at least one function; the data storage area may store data created by the use of the resource monitoring method, etc. In addition, memory 420 may include high-speed random access memory and may also include non-volatile memory, such as at least one disk storage device, flash memory device, or other non-volatile solid-state storage device. In some embodiments, memory 420 may optionally include memory remotely located relative to processor 410, and these remote memories can be connected to the local module via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.
[0083] The processor 410 executes various server functions and data processing by running non-volatile software programs, instructions, and modules stored in the memory 420, thereby implementing the resource monitoring method of the above method embodiment.
[0084] A fifth aspect of the present invention also provides a chip 500 tested according to any of the above-described data page dynamic management methods according to the present invention. Figure 9 A schematic diagram of the frame of the chip 500 according to the present invention is shown. (As shown) Figure 9 As shown, in this embodiment, the chip 500 architecture includes a CPU reset vector register 510, a CPU release control pin 520, a CPU release control register 530, and a debug interface 540, wherein...
[0085] The CPU reset vector register 510 is used to control the address of the instructions read and executed after the CPU is released;
[0086] The CPU release control register 520 is used to control the CPU release when the chip 500 is powered on.
[0087] The CPU release control pin 530 is used to control the validity of the CPU release control register 520;
[0088] The debug interface 540 is used to read and write on-chip RAM and registers to perform chip testing.
[0089] Those skilled in the art will also understand that the various exemplary logic blocks, modules, circuits, and algorithm steps described in conjunction with the disclosure herein can be implemented as electronic hardware, computer software, or a combination of both. To clearly illustrate this interchangeability between hardware and software, the functionality of various illustrative components, blocks, modules, circuits, and steps has been generally described. Whether this functionality is implemented as software or as hardware depends on the specific application and the design constraints imposed on the system as a whole. Those skilled in the art can implement the functionality in various ways for each specific application, but such implementation decisions should not be construed as departing from the scope of the embodiments disclosed herein.
[0090] Finally, it should be noted that the computer-readable storage medium (e.g., memory) described herein can be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. By way of example, and not limitation, non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM), which can act as external cache memory. By way of example, and not limitation, RAM can be obtained in various forms, such as synchronous RAM (DRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct Rambus RAM (DRRAM). The storage devices disclosed herein are intended to include, but are not limited to, these and other suitable types of memory.
[0091] The various exemplary logic blocks, modules, and circuits described herein can be implemented or performed using the following components designed to perform the functions herein: general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs) or other programmable logic devices, discrete gate or transistor logic, discrete hardware components, or any combination of these components. A general-purpose processor may be a microprocessor, but alternatively, the processor may be any conventional processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors combined with a DSP, and / or any other such configuration.
[0092] The above are exemplary embodiments disclosed in this invention. However, it should be noted that various changes and modifications can be made without departing from the scope of the embodiments of this invention as defined by the claims. The functions, steps, and / or actions of the methods according to the disclosed embodiments described herein do not need to be performed in any particular order. Furthermore, although the elements disclosed in the embodiments of this invention may be described or claimed individually, they may be understood as multiple unless explicitly limited to a singular number.
[0093] It should be understood that, as used herein, the singular form "a" is intended to include the plural form as well, unless the context clearly supports an exception. It should also be understood that, as used herein, "and / or" refers to any and all possible combinations of one or more of the associatedly listed items. The embodiment numbers disclosed above are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.
[0094] Those skilled in the art should understand that the discussion of any of the above embodiments is merely exemplary and is not intended to imply that the scope of the invention (including the claims) is limited to these examples. Within the framework of the invention, technical features of the above embodiments or different embodiments can be combined, and many other variations of different aspects of the invention exist, which are not provided in the details for the sake of brevity. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the invention should be included within the protection scope of the invention.
Claims
1. A dynamic data page management system, characterized in that, It includes a data page allocation module, an address pointer reading module, and a data reading and data page dynamic management module; The data page allocation module is configured to receive a data page request task issued by the data initiator and allocate a corresponding number of data pages to the data initiator according to the internal data page idle status. The address pointer reading module is configured to receive the address pointer reading task issued by the data initiator, read the corresponding number of address pointers through the bus according to the parameters contained in the task, and then map the address pointers to the data pages one by one according to the free data page number in the internal cache of the data receiver. The data reading and dynamic data page management module is configured to read the corresponding data through the bus according to the address pointer of the data page. When the data of a certain data page is calculated and released, the data page is recycled and cached for use by the data initiator when it is requested again.
2. The data page dynamic management system according to claim 1, characterized in that, The data page allocation module includes the following parameter in the data page request task issued by the data initiator: the number of data pages requested, n.
3. The data page dynamic management system according to claim 2, characterized in that, In the data page allocation module, the data receiver internally caches the released data page numbers locally. When it receives a data page request task from the data initiator, it reads the task parameters, reads the corresponding number of data page numbers from the local cache in the cache order, and dispatches them to the data initiator.
4. The data page dynamic management system according to claim 3, characterized in that, In the data page allocation module, during data page allocation, the data receiver caches the internally released data page numbers sequentially. When it receives a data page request from the data initiator, it reads the corresponding parameters, reads the corresponding data page numbers from the cache sequentially, and allocates them to the data initiator. The data initiator obtains the corresponding number of data pages and maps the data to the obtained data pages. The address pointer reading task sent by the data initiator to the data receiver will be performed according to this mapping relationship.
5. The data page dynamic management system according to claim 1, characterized in that, When the address pointer reading module performs address pointer reading processing, the data initiator sends an address pointer reading task to the data receiver. The data receiver reads the corresponding number of address pointers through the bus according to the initial address and the number of pointers to be read. The read address pointers are then written into the pointer address cache in sequence according to the free data pages in the receiver's cache.
6. The data page dynamic management system according to claim 5, characterized in that, In the data reading and dynamic data page management module, when the data calculation of a certain data page is completed and all data is released, the data page is recycled and cached for use by the data initiator when it is requested again.
7. The data page dynamic management system according to claim 6, characterized in that, When the data reading and data page dynamic management module performs data reading and data page dynamic management, the data initiator sends data to the data receiver through the bus, and the order in which the bus data arrives at the data receiver is sorted by time.
8. A method for dynamic management of data pages, characterized in that, The data page dynamic management system according to any one of claims 1-7 performs dynamic management of data pages, wherein the data pages are jointly managed by the data receiver and the initiator. The method includes the following steps: The data initiator proactively requests data pages from the data receiver, and the data receiver allocates usable data pages to the data initiator based on the availability of its internal data pages. The data initiator then sends a corresponding number of address pointer read tasks to the data receiver based on the obtained data pages. The data initiator maps the requested data pages to the data to be sent. The system waits for the data receiver's pointer to finish reading the task and then notifies the data initiator. The data initiator then sends the corresponding data page to the data receiver.
9. A computer device, characterized in that, The computer device includes multiple computer devices, each computer device including a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that the processors of the multiple computer devices jointly implement the steps of the data page dynamic management method of claim 8 when executing the computer program.
10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program stored in the storage medium is executed by the processor, it implements the steps of the dynamic data page management method of claim 8.