Chip forming parameter automatic generation method and system

Abstract

The application discloses a kind of chip forming parameter automatic generation method and system, method includes: obtaining input molding number, read PCB design file, obtain the attribute information of all pads of molding chip, analyze chip package form, the pad inside and outside spacing size calculation and ground pad discrimination are carried out to chip identified as FP package form, and according to chip size parameter and molding condition design molding parameter, output result as molding parameter list, to solve the technical problem of low efficiency and poor precision of chip molding parameter manual design.The application extracts molding chip attribute information from PCB design file, analyzes chip package form and calculates pad inside and outside spacing size, and automatically designs molding parameter according to chip shape size library, replaces the method of low efficiency and insufficient precision of manual measurement and design, improves the accuracy and work efficiency of molding parameter design.

Description

Technical Field

[0001] This invention relates to the field of surface mount technology, and in particular to a method and system for automatically generating chip molding parameters. Background Technology

[0002] FP (Flat Package) packaging is divided into QFP (Quad Flat Package) and SOP (Small Outline Package). Chips packaged in this type have low parasitic parameters, are relatively easy to assemble, and have high reliability. With the rapid development of electronic technology, high-grade FP packaged chips are widely used in aerospace electronic products. To provide designers with greater flexibility in printed circuit board design, to allow for programming and simulation testing without soldering, and to prevent chip leads from deforming during storage and transportation, the leads of these chips are not shaped at the factory. Therefore, before electronic assembly, the straight leads of these chips must be bent into shapes that meet the various technical specifications of electronic assembly. The quality of the shaping directly affects the reliability of the assembled product, and one of the technical challenges is the design of the shaping parameters.

[0003] In the production mode of aerospace electronic single-unit products with multiple varieties and small batches, there are often multiple FP packaged chips that need to be wire-formed. Affected by factors such as compatible packaging and the updating of packaging for new and old products, each product's formed chip needs to have forming parameters designed before production. The usual practice is to measure the inner and outer spacing of the pads and the chip size parameters of the formed chip using measuring tools, and then design forming parameters such as shoulder width, solder lead length, bending radius, stand height, and bending angle according to standard requirements. These operations are done manually, which is inefficient and has poor accuracy. Summary of the Invention

[0004] The purpose of this invention is to provide a method and system for automatically generating chip molding parameters, which solves the technical problem of how to improve the design efficiency and quality of chip molding parameters and thus improve the surface mount assembly production efficiency in the production mode of multi-variety, small-batch aerospace electronic products.

[0005] This invention provides a method for automatically generating chip molding parameters, comprising:

[0006] Read the input BOM data of the molded chip to obtain the molded chip code, reference number and specifications;

[0007] Read the chip size database and obtain the chip size parameters from the database based on the molded chip code and specifications;

[0008] Read the input PCB design file, call the component interface to traverse the components, and obtain the component reference attributes;

[0009] For components whose reference designation attribute is the input reference designation, the component pad interface is called to traverse the component pads and obtain the pad attribute information.

[0010] Data processing is performed based on the attribute information of all the pads of the component to analyze and determine whether the package form of the formed chip is FP package;

[0011] For chips identified as FP packages, calculate the pad spacing and identify the ground pad.

[0012] Obtain the preset molding conditions and generate molding parameters based on the chip size parameters and the pad spacing.

[0013] Output a list of molding parameters, which includes tag number, specifications, molding method, and molding parameter data.

[0014] Preferably, the step of processing data based on the attribute information of all the pads of the component, analyzing and determining whether the package form of the formed chip is FP package includes:

[0015] The pad type is determined based on the pad length, pad width, via size, and surface mount properties.

[0016] For all pads with surface mount pad type, group them according to pad attributes to obtain X-direction pad group and Y-direction pad group;

[0017] The packaging form of the formed chip is determined by the number of groups and components of the X-axis pad groups and Y-axis pad groups.

[0018] Preferably, the chip size parameters include: body width, lead height, lead thickness, and whether it is grounded.

[0019] Preferably, the attribute information of the pad includes any one or more combinations of the following: identifier, surface mount attribute, pad type, pad length, pad width, via size, angle, center coordinate X, and center coordinate Y.

[0020] Preferably, the step of determining the pad type based on pad length, pad width, via size, and surface mount attributes includes:

[0021] Determine whether the length or width of the pad is greater than the via size; if so, the pad is identified as a metallized pad.

[0022] Metallized pads with a surface mount attribute of "yes" are surface mount pads, while metallized pads with a surface mount attribute of "no" are through-hole pads.

[0023] Preferably, the step of grouping the pads according to their attributes to obtain the X-direction pad group and the Y-direction pad group includes:

[0024] Determine the shape of the pad based on the pad type, pad length, pad width, and pad angle;

[0025] For pads with the same center coordinate X and the same pad shape, classify them into the pad group in the X direction, and record the number of groups and the number of elements.

[0026] For pads with the same center coordinate Y and the same pad shape, classify them into the pad group in the Y direction, and record the number of groups and the number of elements.

[0027] Preferably, the calculation of pad spacing and ground pad identification for chips identified as FP packages includes:

[0028] For the first target number of components, the pad spacing dimensions are calculated based on the pad length, pad width, pad angle, center coordinate X, and center coordinate Y of the component.

[0029] For the second target component, the grounding pad attributes are determined based on the chip center coordinates and the component's pad length, pad width, center coordinate X, and center coordinate Y.

[0030] Preferably, the chip forming parameters include: shoulder width, solder pad length, bending radius, standing height, bending angle, distance from the root of the solder pad to the edge of the pad, and distance from the toe of the solder pad to the edge of the pad.

[0031] Preferably, obtaining the preset molding conditions and generating molding parameters based on the chip size parameters and the pad spacing dimensions includes:

[0032] Determine whether the chip is grounded based on the properties of the grounding pad and whether the chip is grounded.

[0033] The height of the formed station is calculated based on the station height design conditions and whether the chip is grounded.

[0034] The forming bending angle and bending radius are determined based on the bending design conditions and chip lead thickness.

[0035] The shoulder width and the distance from the root of the solder pad to the edge of the pad are calculated based on the shoulder width design conditions, chip body width, lead thickness, lead height, bending radius, bending angle, standing height, and pad spacing.

[0036] The solder foot length and the distance from the solder foot toe to the edge of the pad are calculated based on the solder foot length design conditions, shoulder width, chip body width, lead thickness, lead height, bending radius, bending angle, stand height, and pad spacing.

[0037] The preset forming conditions include: standing height design conditions, bending design conditions, shoulder width design conditions, and weld leg length design conditions.

[0038] This invention provides an automatic chip molding parameter generation system, comprising:

[0039] The BOM parsing module is used to read the input molded chip BOM data and obtain the molded chip code, reference number, and specifications.

[0040] The chip size acquisition module is used to read the chip size database and obtain the chip size parameters in the database according to the molded chip code and specifications;

[0041] The encapsulated data acquisition module is used to read the input PCB design file, call the component interface to traverse the components, and obtain the component reference attributes;

[0042] For components whose reference designation attribute is the input reference designation, the component pad interface is called to traverse the component pads and obtain the pad attribute information.

[0043] Data processing is performed based on the attribute information of all the pads of the component to analyze and determine whether the package form of the formed chip is FP package;

[0044] The packaging parameter calculation module is used to calculate the pad spacing dimensions and identify the ground pad for chips identified as FP packages.

[0045] Obtain the preset molding conditions and generate molding parameters based on the chip size parameters and the pad spacing.

[0046] The result output module is used to output a list of molding parameters, which includes tag number, specification, molding method, and molding parameter data.

[0047] Compared with the prior art, the present invention has the following beneficial effects:

[0048] The automatic chip molding parameter design method and system adopted in this invention obtains the input molding reference number, reads the PCB design file, obtains the attribute information of all pads of the molded chip, analyzes the chip package form, calculates the inner and outer spacing dimensions of the pads and identifies the ground pad for chips identified as FP packages, and designs molding parameters based on chip size parameters and molding conditions, and outputs the results as a molding parameter list, thereby solving the technical problems of low efficiency and poor accuracy of manual chip molding parameter design.

[0049] The automatic chip molding parameter design method and system of the present invention extracts the chip attribute information from the PCB design file, analyzes the chip package form and calculates the inner and outer spacing dimensions of the pads, and automatically designs the molding parameters based on the chip outline dimension library. This replaces the inefficient and inaccurate manual measurement and design method, and improves the accuracy and efficiency of molding parameter design. Attached Figure Description

[0050] Figure 1 This is a schematic diagram illustrating the steps of the automatic generation method for chip forming parameters described in this embodiment of the invention;

[0051] Figure 2 This is a schematic diagram of the automatic chip forming parameter generation system described in this embodiment of the invention.

[0052] in:

[0053] 1-Automatic chip molding parameter generation system; 11-BOM parsing module; 12-Chip size acquisition module; 13-Package data acquisition module; 131-Component attribute acquisition unit; 132-Pad attribute acquisition unit; 14-Discrimination module; 141-Component discrimination unit; 142-Pad discrimination unit; 15-Package analysis module; 151-Pad grouping unit; 152-Package discrimination unit; 16-Package parameter calculation module; 17-Molding parameter design module; 18-Output module. Detailed Implementation

[0054] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0055] like Figure 1 As shown, the present invention provides a method for automatically generating chip molding parameters, including:

[0056] Step S1: Read the input BOM data of the molded chip to obtain the molded chip code, reference number, and specifications. The Bill of Materials (BOM) is a document that describes the product structure by data type. The BOM data of the product molded chip is obtained by integrating with the PDM (Product Data Management) interface, importing files, or inputting text. The data is then parsed using string functions to obtain the molded chip code, reference number, and specifications.

[0057] Step S2: Read the chip size database and obtain the chip size parameters from the database based on the molded chip code and specifications; access the database using the molded chip code and specifications to obtain the chip size parameters. For molded chips where molding parameters are not obtained or are incorrect, adding and modifying molding parameter data is supported. For example, the chip size parameters include: body width, lead height, lead thickness, and whether grounded.

[0058] Step S3: Read the input PCB design file, call the component interface to traverse the components, and obtain the component reference designator attributes; or use the design software API (Application Programming Interface) to read the PCB design file, call the component interface to traverse the components, and obtain the component reference designator attributes. For example, the PCB design file includes a PCB Layout file.

[0059] Step S4: For components whose reference designator attribute is the input reference designator, the component pad interface is called to traverse the component pads and obtain the pad attribute information; for components whose reference designator attribute is one of the input reference designators, the component pad interface is called to traverse the component pads and obtain the pad attribute information. For example, the pad attribute information includes: identifier, surface mount attribute, type, pad length, pad width, via size, angle, center coordinate X, and center coordinate Y.

[0060] Step S5: Perform data processing based on the attribute information of all the pads of the component, analyze and determine whether the package form of the formed chip is FP package; determine the pad type based on pad length, pad width, via size, and surface mount attributes. For all pads of the surface mount type, group them according to their pad attributes to obtain X-direction pad groups and Y-direction pad groups. Determine the package form of the formed chip based on the number of groups and the number of components in the X-direction and Y-direction pad groups.

[0061] Step S6: Calculate the pad spacing dimensions and identify the ground pad for the chip identified as an FP package.

[0062] Step S7: Obtain the preset molding conditions and generate molding parameters based on the chip size parameters and the pad spacing dimensions;

[0063] Step S8: Output a molding parameter list, which includes the tag number, specifications, molding method, and molding parameter data. The molding parameter list can be used as an appendix to the product work instruction manual and directly for setting parameters on the chip molding machine.

[0064] The automatic chip molding parameter design method and system adopted in this invention obtains the input molding reference number, reads the PCB design file, acquires the attribute information of all pads of the molded chip, analyzes the chip package form, calculates the inner and outer spacing dimensions of the pads and identifies the ground pad for chips identified as FP packages, and designs molding parameters based on chip size parameters and molding conditions, outputting the results as a molding parameter list. This solves the technical problems of low efficiency and poor accuracy in manual chip molding parameter design. By extracting the chip attribute information from the PCB design file, analyzing the chip package form and calculating the inner and outer spacing dimensions of the pads, and automatically designing molding parameters based on the chip outline size library, this method replaces the inefficient and inaccurate manual measurement and design methods, improving the accuracy and efficiency of molding parameter design.

[0065] Specifically, step S5, which involves data processing based on the attribute information of all the pads of the component to analyze and determine whether the package form of the formed chip is an FP package, includes:

[0066] The pad type is determined based on the pad length, pad width, via size, and surface mount properties.

[0067] For all pads with surface mount pad type, group them according to pad attributes to obtain X-direction pad group and Y-direction pad group;

[0068] The packaging form of the formed chip is determined by the number of groups and components of the X-axis pad groups and Y-axis pad groups.

[0069] Those skilled in the art will understand that, in various embodiments, determining the pad type based on pad size, via size, and surface mount attributes includes: determining whether the pad length or pad width is greater than the via size; if so, the pad is identified as a metallized pad. Metallized pads with a surface mount attribute are surface mount pads, while metallized pads with a no surface mount attribute are via pads.

[0070] In various implementations, the step of grouping pads according to their attributes to obtain X-direction and Y-direction pad groups includes: determining the pad shape based on pad type, pad length, pad width, and pad angle. Pads with the same center coordinate X and the same pad shape are grouped into the X-direction pad group, and the number of groups and the number of groups are recorded. Pads with the same center coordinate Y and the same pad shape are grouped into the Y-direction pad group, and the number of groups and the number of groups are recorded.

[0071] In this specific embodiment, determining the packaging form of the formed chip based on the number of groups and components of the X-direction pad groups and Y-direction pad groups includes:

[0072] First, based on the number and distribution characteristics of the formed chip pads, the initial screening criteria for FP packaging are determined as follows: the number of surface mount pads ≥ 6, the number of X-direction pad groups ≥ 2, and the number of Y-direction pad groups ≥ 2. Through-hole components, surface mount components, and other non-FP packaged components are filtered out based on these initial screening criteria. Then, the X-direction pad groups and Y-direction pad groups are sorted from largest to smallest based on the number of components, and the top three component counts are obtained. Finally, the package type of the formed chip is determined based on the number of X-direction and Y-direction pad groups and the number of the top three components, including X-direction SOP, Y-direction SOP, and QFP, with the following criteria:

[0073] X-direction SOP: The number of second elements in the X-direction pad group is ≥3, and the number of first elements in the Y-direction pad group is ≤2. The number of groups in the X-direction pad group is ≥2, and the number of groups in the Y-direction pad group is ≥3.

[0074] Y-direction SOP: The number of second elements in the Y-direction pad group is ≥3, and the number of first elements in the X-direction pad group is ≤2, and the number of groups in the Y-direction pad group is ≥2, and the number of groups in the X-direction pad group is ≥3.

[0075] QFP: The number of second elements in the X-direction pad group is ≥3 and the number of third elements in the X-direction pad group is ≤2. The number of second elements in the Y-direction pad group is ≥3 and the number of third elements in the Y-direction pad group is ≤2. The number of groups in the X-direction pad group is ≥3 and the number of groups in the Y-direction pad group is ≥3.

[0076] Furthermore, step S6, which involves calculating the pad spacing and identifying the ground pad for chips identified as FP packages, includes:

[0077] For the first target number of components, the pad spacing is calculated based on the pad length, pad width, pad angle, center coordinate X, and center coordinate Y of the component. In this embodiment, the first target number of components can be understood as the first and second number of components.

[0078] For the component representing the second target component quantity, the grounding pad attribute is determined based on the chip center coordinates and the component's pad length, pad width, center coordinate X, and center coordinate Y. The component representing the second target component quantity can be understood as a component that is not the first or second target component quantity.

[0079] In this specific embodiment, the calculation of the pad inner and outer spacing dimensions based on the pad length, pad width, pad angle, center coordinate X, and center coordinate Y of the first and second group of elements includes:

[0080] For SOPs in the X direction, it is necessary to calculate the inner and outer spacing of the two sets of pads in the X direction. The two sets of pads are the first and second elements of the pad group in the X direction. The calculation can be performed based on the pad information of the two elements. The calculation principle is as follows: First, it is necessary to obtain the sum of the lengths of the two sets of pads in the X direction. Note that the length in the X direction is not the pad length attribute, but may be the pad width attribute. This is because the pads can be rotated during chip packaging design and are determined by the pad angle. Therefore, it is necessary to calculate the length of the pad in the X direction based on the three parameters of pad length, pad width, and pad angle. That is, the length in the X direction = |pad length * cos(pad angle) + pad width * sin(pad angle)|; Then, the inner and outer spacing of the pads is calculated based on the center coordinates X of the two sets of pads and the sum of the lengths in the X direction. Inner spacing = |center coordinates X of the first element pad - sum of lengths in the X direction of the center coordinates X of the second element pad / 2|, outer spacing = |center coordinates X of the first element pad - sum of lengths in the X direction of the center coordinates X of the second element pad + sum of lengths in the X direction / 2|.

[0081] For a SOP in the Y direction, the inner and outer spacing of the two sets of pads in the Y direction needs to be calculated. The two sets of pads are the first and second elements of the pad group in the Y direction. The calculation can be performed based on the pad information of the two elements. The calculation principle is as follows: First, the sum of the lengths of the two sets of pads in the Y direction needs to be obtained. Note that the length in the Y direction is not the pad length attribute, but may be the pad width attribute. This is because the pads can be rotated during chip packaging design and are determined by the pad angle. Therefore, the length of the pad in the Y direction needs to be calculated based on the three parameters of pad length, pad width, and pad angle. That is, the length in the Y direction = |pad length * cos(pad angle) + pad width * sin(pad angle)|; Then, the inner and outer spacing of the pads is calculated based on the center coordinates Y of the two sets of pads and the sum of the lengths in the Y direction. Inner spacing = |the sum of the lengths in the Y direction of the first element pad center coordinates - the sum of the lengths in the Y direction of the second element pad center coordinates / 2|, outer spacing = |the sum of the lengths in the Y direction of the first element pad center coordinates - the sum of the lengths in the Y direction of the second element pad center coordinates / 2|.

[0082] For QFP, it can be divided into X-direction SOP and Y-direction SOP. According to the above calculation method, the pad spacing of QFP in the X and Y directions can be obtained.

[0083] In this specific embodiment, for elements that are not the first or second group of elements, determining the ground pad attributes based on the chip center coordinates and the pad length, pad width, center coordinate X, and center coordinate Y of the element includes:

[0084] First, the average extreme values ​​of the center coordinates of all surface mount pads are automatically calculated as the chip center coordinates. Then, for elements that are not the first or second group, it is determined whether the pad is a ground pad based on the pad information of the element and the chip center coordinates. The determination criteria are as follows: |center coordinate of element X - center coordinate of chip X| ≤ envelope value, and |center coordinate of element Y - center coordinate of chip Y| ≤ envelope value, where the envelope value = (pad length + pad width - |pad length - pad width|) / 2.

[0085] Furthermore, in step S7, obtaining the preset molding conditions and generating molding parameters based on the chip size parameters and the pad spacing dimensions includes:

[0086] Determine whether the chip is grounded based on the properties of the grounding pad and whether the chip is grounded.

[0087] The height of the formed station is calculated based on the station height design conditions and whether the chip is grounded.

[0088] The forming bending angle and bending radius are determined based on the bending design conditions and chip lead thickness.

[0089] The shoulder width and the distance from the root of the solder pad to the edge of the pad are calculated based on the shoulder width design conditions, chip body width, lead thickness, lead height, bending radius, bending angle, standing height, and pad spacing.

[0090] The solder foot length and the distance from the solder foot toe to the edge of the pad are calculated based on the solder foot length design conditions, shoulder width, chip body width, lead thickness, lead height, bending radius, bending angle, stand height, and pad spacing.

[0091] The preset forming conditions include: standing height design conditions, bending design conditions, shoulder width design conditions, and weld leg length design conditions.

[0092] Specifically, the forming conditions are constraints before forming design, facilitating the acquisition of accurate forming parameters rather than range values. These include: station height design conditions, bending design conditions, shoulder width design conditions, and solder pad length design conditions. The chip forming parameter design includes: determining whether the chip is grounded for forming based on the ground pad attributes and whether the chip is grounded; calculating the forming station height H based on the station height design conditions and whether the chip is grounded for forming; determining the forming bending angle θ and bending radius R based on the bending design conditions and the chip lead thickness t; calculating the shoulder width A and the distance Ein from the solder pad root to the solder pad edge based on the shoulder width design conditions, chip body width W, lead thickness t, lead height h, bending radius R, bending angle θ, station height H, and pad inner spacing Lin; and calculating the solder pad length B and the distance Eout from the solder pad toe to the solder pad edge based on the solder pad length design conditions, shoulder width A, chip body width W, lead thickness t, lead height h, bending radius R, bending angle θ, station height H, and pad outer spacing Lout. For example, the chip forming parameters include: shoulder width A, solder pad length B, bending radius R, standing height H, bending angle θ, distance Ein from the root of the solder pad to the edge of the pad, and distance Eout from the toe of the solder pad to the edge of the pad.

[0093] In this specific embodiment, obtaining the station height design conditions includes: First, determining the design range of the station height H based on standard or empirical requirements, namely the minimum value H_min and the maximum value H_max. Generally, H_min = 0.5mm and H_max = 1.0mm. Then, determining the selection principles for the station height H, including three types: minimum value, maximum value, and fixed value. The fixed value must meet the design range.

[0094] In this specific embodiment, obtaining the bending design conditions includes: First, determining the design range of the bending radius R, i.e., the minimum value R_min, based on standard or empirical requirements. Generally, R_min = lead wire thickness t. Then, determining the selection principles for the bending radius R, including both minimum and fixed values, where the fixed value must satisfy the design range. Next, determining the design range of the bending angle θ, i.e., the minimum value θ_min and the maximum value θ_max, based on standard or empirical requirements. Generally, θ_min = 45°, θ_max = 90°. Then, determining the selection principles for the bending angle θ, including minimum, maximum, and fixed values, where the fixed value must satisfy the design range.

[0095] In this specific embodiment, obtaining the shoulder width design conditions includes: First, determining the design range of the distance Ein from the solder pad root to the pad edge, i.e., the minimum value Ein_min, based on standard or empirical requirements. Generally, Ein_min = 0.5mm. Then, determining the design range of the shoulder width A, i.e., the minimum value A_min, based on standard or empirical requirements. Generally, for round leads: A_min = 2 * lead diameter; for flat leads: A_min = 0.5mm. Finally, determining the selection principles for the distance Ein from the solder pad root to the pad edge and the shoulder width A, including two types: lower limit selection and fixed value. The lower limit selection is the minimum shoulder width A calculated based on the design range (A ≥ A_min and Ein ≥ Ein_min). The fixed value is to determine the value of one of Ein and A, calculate the other value, and both must satisfy the design range (A ≥ A_min and Ein ≥ Ein_min).

[0096] In this specific embodiment, obtaining the solder lead length design conditions includes: First, determining the design range of the distance Eout from the solder lead to the edge of the pad, based on standard or empirical requirements, i.e., the minimum value Eout_min, generally Eout_min = 0.25mm. Then, determining the design range of the solder lead length B, i.e., the minimum value B_min and the maximum value B_max, based on standard or empirical requirements. Generally, for round leads: B_min = max{1.25mm, 3.5 times the lead diameter}, B_max = 5.5 times the lead diameter; for flat leads: B_min = max{1.25mm, 3 times the lead diameter}, B_max = 5 times the lead diameter. Finally, the selection principles for the solder leg length B are determined, including three types: upper limit selection, lower limit selection, and fixed value. The upper limit selection is the maximum value of the solder leg length B calculated based on the design range (B≤B_max and Eout≥Eout_min); the lower limit selection is the minimum value of the solder leg length B calculated based on the design range (B≥B_min and Eout≥Eout_min); the fixed value is the value of Eout and B, which is used to calculate the other value, and both must satisfy the design range (B_max≥B≥B_min and Eout≥Eout_min).

[0097] In this specific embodiment, determining whether the chip is grounded based on the ground pad attribute and whether the chip is grounded includes: determining whether both the ground pad attribute and whether the chip is grounded are yes; if both are yes, the chip is grounded; otherwise, the chip is grounded.

[0098] In this specific embodiment, the calculation of the station height H based on the station height design conditions and whether the chip is grounded includes: if the chip is grounded and the design conditions are met, the station height design conditions do not need to be met, and the station height H = 0; if the chip is grounded and the design conditions are not met, the station height needs to meet the station height design conditions.

[0099] In this specific embodiment, determining the forming bending angle θ and bending radius R based on the bending design conditions and the chip lead thickness t includes: obtaining the bending angle θ based on the bending design conditions; and obtaining the bending radius R based on the bending design conditions after obtaining the chip lead thickness t.

[0100] In this specific embodiment, the calculation of shoulder width A and distance Ein from the root of the solder pad to the edge of the pad based on the shoulder width design conditions, chip body width W, lead thickness t, lead height h, bending radius R, bending angle θ, stand height H, and pad spacing Lin includes: if the shoulder width design conditions are selected based on the lower limit principle, then A = max{A_min, Ein_min + 0.5*Lin - 0.5*WR*sinθ - (2*R+t)*cosθ*cotθ - (H+h - 2*Rt)*cotθ}. After A is determined, then Ein = A - 0.5*Lin + 0.5*W + R*sinθ + (2*R+t)*cosθ*cotθ + (H+h - 2*Rt)*cotθ. If Ein is a fixed value, then A = Ein + 0.5 * Lin - 0.5 * WR * sinθ - (2 * R + t) * cosθ * cotθ - (H + h - 2 * Rt) * cotθ, and A ≥ A_min. If A is a fixed value, then Ein = A - 0.5 * Lin + 0.5 * W + R * sinθ + (2 * R + t) * cosθ * cotθ + (H + h - 2 * Rt) * cotθ, and Ein ≥ Ein_min.

[0101] In this specific embodiment, the calculation of the solder foot length B and the distance Eout from the solder foot toe to the edge of the pad based on the solder foot length design conditions, shoulder width A, chip body width W, lead thickness t, lead height h, bending radius R, bending angle θ, stand height H, and pad outer spacing Lout includes: if the solder foot length design conditions are based on the upper limit selection principle, then B = min{B_max, 0.5*Lout - Eout_min - A - 0.5*W - (2*R+t)*sinθ

[0102] If the solder joint length design condition is based on the lower limit selection principle, B = B_min. After B is determined, Eout = 0.5*Lout - BA - 0.5*W - (2*R+t)*sinθ - (2*R+t)*cosθ*cotθ - (H+h - 2*Rt)*cotθ, and Eout ≥ Eout_min. If Eout is a fixed value, then B = 0.5*Lout - Eout - A - 0.5*W - (2*R+t)*sinθ - (2*R+t)*cosθ*cotθ - (H+h - 2*Rt)*cotθ, and B_max ≥ B ≥ B_mi. If B is a fixed value, then Eout = 0.5*Lout - BA - 0.5*W - (2*R+t)*sinθ - (2*R+t)*cosθ*cotθ - (H+h - 2*Rt)*cotθ, and Eout ≥ Eout_min.

[0103] Example 2

[0104] like Figure 2 As shown, the present invention provides an automatic chip molding parameter generation system 1, comprising:

[0105] BOM parsing module 11 is used to read the input molded chip BOM data and obtain the molded chip code, tag number and specifications;

[0106] Chip size acquisition module 12 is used to read the chip size database and obtain the chip size parameters in the database according to the molded chip code and specifications;

[0107] The encapsulated data acquisition module 13 is used to read the input PCB design file, call the component interface to traverse the components, and obtain the component reference attributes.

[0108] The discrimination module 14 is used to call the component pad interface to traverse the component pads and obtain the pad attribute information for components whose pad attribute is the input pad.

[0109] The packaging analysis module 15 is used to process data based on the attribute information of all the pads of the component, analyze and determine whether the packaging form of the formed chip is FP packaging;

[0110] The packaging parameter calculation module 16 is used to calculate the pad spacing dimensions and identify the grounding pad for chips identified as FP packages.

[0111] The molding parameter design module 17 is used to obtain preset molding conditions and generate molding parameters based on chip size parameters and pad spacing dimensions.

[0112] The result output module 18 is used to output a molding parameter list, which includes tag number, specification, molding method, and molding parameter data.

[0113] The automatic chip molding parameter design system employed in this invention obtains the input molding reference number, reads the PCB design file, acquires the attribute information of all pads of the molded chip, analyzes the chip package form, calculates the inner and outer spacing dimensions of the pads and identifies the ground pad for chips identified as FP packages, and designs molding parameters based on chip size parameters and molding conditions. The results are output as a molding parameter list, thereby solving the technical problems of low efficiency and poor accuracy in manual chip molding parameter design. It extracts the chip attribute information from the PCB design file, analyzes the chip package form and calculates the inner and outer spacing dimensions of the pads, and automatically designs molding parameters based on the chip outline dimension library, replacing the inefficient and inaccurate manual measurement and design methods, thus improving the accuracy and efficiency of molding parameter design.

[0114] Specifically, the BOM parsing module 11 is used to obtain the BOM data of the product's molded chip through integration with the PDM interface, file import, or text input, and to parse the data using string functions to obtain the molded chip code, reference number, and specifications.

[0115] The chip size acquisition module 12 is specifically used to access and search the database using the shaped chip code and specifications to obtain chip size parameters. For shaped chips for which no molding parameters are obtained or whose molding parameters are incorrect, it supports adding and modifying molding parameter data. The chip size parameters include: body width, lead height, lead thickness, and whether it is grounded.

[0116] The package data acquisition module 13 is specifically used to read the input PCB design file using the design software API, call the component interface to traverse the components, and obtain the component reference designator attributes. For components whose reference designator attributes are the input reference designators, the module calls the component pad interface to traverse the component pads and obtain the pad attribute information. This includes a component attribute acquisition unit 131 and a pad attribute acquisition unit 132. The component attribute acquisition unit 131 is used to call the component interface to traverse the components and obtain the component reference designator attributes. The pad attribute acquisition unit 132 is specifically used to, for components whose reference designator attributes are one of the input reference designators, call the component pad interface to traverse the component pads and obtain the pad attribute information. The pad attribute information includes: identifier, surface mount attribute, type, pad length, pad width, via size, angle, center coordinate X, and center coordinate Y.

[0117] The discrimination module 14 is specifically used to determine whether the traversed components and pad objects meet the conditions for continuing calculation, including a component discrimination unit 141 and a pad discrimination unit 142. The component discrimination unit 141 is used to determine whether the component reference designator attribute is a BOM input reference designator. The pad discrimination unit 142 is used to determine the pad type based on the pad length, pad width, via size, and surface mount attributes, and to determine whether the pad length or pad width is greater than the via size. If so, the pad is identified as a metallized pad. For metallized pads with a surface mount attribute of yes, they are surface mount pads; for metallized pads with a surface mount attribute of no, they are via pads.

[0118] The packaging analysis module 15 is specifically used to group all surface mount pads according to their attributes, obtaining the X-direction pad group and the Y-direction pad group. Based on the number of groups and components in the X-direction and Y-direction pad groups, the packaging form of the formed chip is determined, including a pad grouping unit 151 and a packaging determination unit 152.

[0119] Pad grouping unit 151 is used to determine the pad shape based on pad type, pad length, pad width, and pad angle. Pads with the same center coordinate X and the same pad shape are grouped into elements of the X-direction pad group, and the number of groups and elements is recorded. Pads with the same center coordinate Y and the same pad shape are grouped into elements of the Y-direction pad group, and the number of groups and elements is recorded.

[0120] The packaging discrimination unit 152 is used for: First, determining the preliminary screening conditions for FP packaging based on the number and distribution characteristics of the formed chip pads: the number of surface mount pads ≥ 6, the number of X-direction pad groups ≥ 2, and the number of Y-direction pad groups ≥ 2. Filtering out non-FP package components such as through-hole components and surface mount components based on these preliminary screening conditions. Then, sorting the X-direction pad groups and Y-direction pad groups from largest to smallest based on the number of components, and obtaining the number of the top three components. Finally, judging the package form of the formed chip based on the number of X-direction pad groups and Y-direction pad groups and the number of the top three components, including X-direction SOP, Y-direction SOP, and QFP, with the discrimination conditions described in the above method embodiment.

[0121] The packaging parameter calculation module 16 is specifically used to calculate the pad spacing dimensions and identify the ground pad for chips identified as FP packages. For elements with the first and second number of elements, the pad spacing dimensions are calculated based on the element's pad length, pad width, pad angle, center coordinate X, and center coordinate Y. For elements with fewer than the first and second number of elements, the ground pad attributes are identified based on the chip's center coordinates and the element's pad length, pad width, center coordinate X, and center coordinate Y. The implementation principle is described in the above method embodiment.

[0122] The molding parameter design module 17 is specifically used to obtain molding conditions and design molding parameters based on chip size parameters, molding conditions, and pad spacing dimensions. These chip molding parameters include: pin length, shoulder width, bending radius, and stand height. The implementation principle is described in the above method embodiment.

[0123] The output module 18 is specifically used to output a molding parameter list, which includes the tag number, specifications, molding method, and molding parameter data. The molding parameter list can be used as an appendix to the product operation manual and can be directly used for parameter settings of the chip molding machine.

[0124] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for automatically generating chip molding parameters, characterized in that, include: Read the input BOM data of the molded chip to obtain the molded chip code, reference number and specifications; Read the chip size database and obtain the chip size parameters from the database based on the molded chip code and specifications; Read the input PCB design file, call the component interface to traverse the components, and obtain the component reference attributes; For components whose reference designation attribute is the input reference designation, the component pad interface is called to traverse the component pads and obtain the pad attribute information. Data processing is performed based on the attribute information of all the pads of the component to analyze and determine whether the package form of the formed chip is FP package, including: determining the pad type based on pad length, pad width, via size and surface mount attributes; for all pads of the surface mount type, grouping them according to the pad attributes to obtain X-direction pad group and Y-direction pad group; determining the package form of the formed chip based on the number of groups and the number of components in the X-direction pad group and Y-direction pad group. For chips identified as FP packages, the pad spacing dimensions are calculated and the ground pad is identified, including: for the first target number of components, the pad spacing dimensions are calculated based on the component's pad length, pad width, pad angle, center coordinate X, and center coordinate Y; for the second target number of components, the ground pad attributes are identified based on the chip's center coordinates and the component's pad length, pad width, center coordinate X, and center coordinate Y. The system acquires preset molding conditions and generates molding parameters based on chip size parameters and pad spacing, including: determining whether the chip is grounded for molding based on the ground pad attributes and whether the chip is grounded; calculating the molding height based on the stand height design conditions and whether the chip is grounded for molding; determining the molding bending angle and bending radius based on the bending design conditions and chip lead thickness; calculating the shoulder width and distance from the base of the solder foot to the edge of the pad based on the shoulder width design conditions, chip body width, lead thickness, lead height, bending radius, bending angle, stand height, and pad spacing; and calculating the solder foot length and distance from the toe of the solder foot to the edge of the pad based on the solder foot length design conditions, shoulder width, chip body width, lead thickness, lead height, bending radius, bending angle, stand height, and pad spacing. Output a list of molding parameters, which includes tag number, specifications, molding method, and molding parameter data.

2. The method for automatically generating chip molding parameters as described in claim 1, characterized in that, The chip size parameters include: body width, lead height, lead thickness, and whether it is grounded.

3. The method for automatically generating chip molding parameters as described in claim 1, characterized in that, The attribute information of the pad includes any one or more combinations of the following: identifier, surface mount attribute, pad type, pad length, pad width, via size, angle, center coordinate X, and center coordinate Y.

4. The method for automatically generating chip molding parameters as described in claim 1, characterized in that, The method of determining pad type based on pad length, pad width, via size, and surface mount attributes includes: Determine whether the length or width of the pad is greater than the via size; if so, the pad is identified as a metallized pad. Metallized pads with a surface mount attribute of "yes" are surface mount pads, while metallized pads with a surface mount attribute of "no" are through-hole pads.

5. The method for automatically generating chip molding parameters as described in claim 1, characterized in that, The step of grouping pads according to their attributes to obtain X-direction pad groups and Y-direction pad groups includes: Determine the shape of the pad based on the pad type, pad length, pad width, and pad angle; For pads with the same center coordinate X and the same pad shape, classify them into the pad group in the X direction, and record the number of groups and the number of elements. For pads with the same center coordinate Y and the same pad shape, classify them into the pad group in the Y direction, and record the number of groups and the number of elements.

6. The method for automatically generating chip molding parameters as described in claim 1, characterized in that, The chip forming parameters include: shoulder width, solder lead length, bending radius, standing height, bending angle, distance from the root of the solder lead to the edge of the pad, and distance from the toe of the solder lead to the edge of the pad.

7. The method for automatically generating chip molding parameters as described in claim 1, characterized in that, The preset forming conditions include: standing height design conditions, bending design conditions, shoulder width design conditions, and weld leg length design conditions.

8. An automatic chip molding parameter generation system, characterized in that, include: The BOM parsing module is used to read the input molded chip BOM data and obtain the molded chip code, reference number, and specifications. The chip size acquisition module is used to read the chip size database and obtain the chip size parameters in the database according to the molded chip code and specifications; The encapsulated data acquisition module is used to read the input PCB design file, call the component interface to traverse the components, and obtain the component reference attributes; For components whose reference designation attribute is the input reference designation, the component pad interface is called to traverse the component pads and obtain the pad attribute information. Data processing is performed based on the attribute information of all the pads of the component to analyze and determine whether the package form of the formed chip is FP package, including: determining the pad type based on pad length, pad width, via size and surface mount attributes; for all pads of the surface mount type, grouping them according to the pad attributes to obtain X-direction pad group and Y-direction pad group; determining the package form of the formed chip based on the number of groups and the number of components in the X-direction pad group and Y-direction pad group. The packaging parameter calculation module is used to calculate the pad spacing dimensions and identify the ground pad for chips identified as FP packages. This includes: for the first target number of components, calculating the pad spacing dimensions based on the component's pad length, pad width, pad angle, center coordinate X, and center coordinate Y; for the second target number of components, identifying the ground pad attributes based on the chip's center coordinates and the component's pad length, pad width, center coordinate X, and center coordinate Y. The system acquires preset molding conditions and generates molding parameters based on chip size parameters and pad spacing, including: determining whether the chip is grounded for molding based on the ground pad attributes and whether the chip is grounded; calculating the molding height based on the stand height design conditions and whether the chip is grounded for molding; determining the molding bending angle and bending radius based on the bending design conditions and chip lead thickness; calculating the shoulder width and distance from the root of the solder foot to the edge of the pad based on the shoulder width design conditions, chip body width, lead thickness, lead height, bending radius, bending angle, stand height, and pad spacing; calculating the solder foot length and distance from the toe of the solder foot to the edge of the pad based on the solder foot length design conditions, shoulder width, chip body width, lead thickness, lead height, bending radius, bending angle, stand height, and pad spacing; and outputting a result module to output a molding parameter list, which includes the tag number, specification, molding method, and molding parameter data.

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