A two-dimensional halide perovskite resistive random access memory and a preparation method thereof

CN115332438BActive Publication Date: 2026-10-09SHANGHAI UNIV
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Patent Information

Application Number
CN202210794901.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-07-05
Publication Date
2026-10-09
Estimated Expiration
2042-07-05

AI Technical Summary

Technical Problem

目前,离子/空位迁移的动力学过程缺乏可控性,迁移行为随机性大,影响了最终器件的性能,尤其是操作电压及其一致性,继而限制了阻变存储器的商业化应用

Benefits of technology

[0032]1.本发明二维卤族钙钛矿阻变介质材料为离子/空位移动提供了低能垒、高重复性的迁移通道,从而同时降低器件操作电压及其离散性;

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a two-dimensional halide perovskite resistive switching memory and a preparation method thereof. The resistive switching memory is a device based on a two-dimensional halide perovskite MIM structure. A two-dimensional halide perovskite resistive switching medium layer with controllable microstructure is prepared on a substrate through liquid phase coating and post-processing. The two-dimensional halide perovskite resistive switching medium layer can provide a fast ion migration channel and reduce migration randomness, thereby effectively reducing the operating voltage of the resistive switching memory and the discreteness thereof, and obtaining a resistive switching device with an operating voltage lower than 0.2 V and a discreteness coefficient less than 10%. The two-dimensional halide perovskite resistive switching medium material provides a low-energy barrier and a high-repetitive migration channel for ion / vacancy movement, thereby simultaneously reducing the operating voltage of the device and the discreteness thereof. The two-dimensional halide perovskite thin film is prepared by a liquid phase film forming method, and has the advantages of simple preparation, low cost and good repeatability.
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Description

Technical Field

[0001] This invention relates to resistive random access memory (RRAM), specifically to a two-dimensional halide perovskite RRAM and its fabrication method. The two-dimensional halide perovskite RRAM of this invention offers advantages such as low operating voltage and high consistency. This discovery belongs to the field of performance optimization and manufacturing technology of non-volatile memory in semiconductor technology. Background Technology

[0002] In the era of information globalization and big data, the emergence and development of new technologies such as cloud computing and artificial intelligence have led to an explosive growth in the amount of stored data, resulting in an ever-increasing demand for semiconductor memory. Non-volatile semiconductor memory is a device used in modern information technology to store information. It can store data for a long time without an external voltage and occupies a large market share in the integrated circuit industry. Currently, the mainstream commercial non-volatile memory is Flash memory, which uses a floating gate structure. However, it has problems such as high operating voltage, slow read and write speed, and feature size approaching physical limits.

[0003] Resistive switched memory (RSM) is a novel type of non-volatile memory that stores information based on the resistance switching effect. It boasts advantages such as simple structure, fast read / write speeds, excellent device robustness, long data retention time, and high miniaturization. The International Technology Roadmap for Semiconductors (ITRS) considers it one of the two new types of memory that require focused attention and accelerated industrialization. Electrochemical metallization is the most important working mechanism of RSM: under the influence of an electric field, ions (electrochemically active metal ions) / vacancies (such as halide vacancies) migrate through the resistive switching medium, depositing conductive filaments on the bottom electrode. The presence of this strongly conductive channel in a localized region keeps the device in a low-resistance state "1". Under the influence of a reverse electric field, the conductive filaments connecting the upper and lower electrodes break, and the device returns to a high-resistance state "0". Currently, the kinetics of ion / vacancy migration lack controllability, and the migration behavior is highly random, affecting the final device performance, especially the operating voltage and its consistency, thus limiting the commercial application of RSM. As an important component of resistive switching memory, resistive switching dielectrics provide migration channels for ions / vacancies. Effective control of resistive switching dielectric materials and their structures is an effective way to solve this problem. Summary of the Invention

[0004] To address the problems of existing technologies, the present invention aims to overcome the shortcomings of existing technologies and provide a two-dimensional halide perovskite resistive switching memory and its fabrication method. The two-dimensional halide perovskite resistive switching memory of the present invention has the advantages of low operating voltage and high consistency. The present invention achieves a resistive switching memory with low operating voltage and low dispersion by controlling the microstructure of the two-dimensional halide perovskite resistive switching dielectric material, providing a migration barrier and highly consistent migration channel for ion / vacancy movement through energy transfer, thereby controlling the microstructure. The fabrication method is simple and highly reproducible.

[0005] To achieve the above-mentioned objectives, the present invention adopts the following technical solution:

[0006] A method for fabricating a two-dimensional halide perovskite resistive switching memory (HS-SSM) is disclosed. The fabricated device structure is a bottom electrode / resistive switching dielectric layer / top electrode MIM structure, or a bottom electrode / resistive switching dielectric layer / dielectric layer / top electrode MIM structure. The fabrication process of the two-dimensional halide perovskite H-SSM is as follows:

[0007] (1) Preparation of bottom electrode:

[0008] A rigid or flexible substrate is ultrasonically cleaned in at least one solvent, including deionized water, acetone, isopropanol, and ethanol. It is then dried with nitrogen and subjected to plasma cleaning to obtain a clean and dry substrate. Metal or graphite is then deposited directly on the clean and dry substrate to obtain a conductive substrate, which is used as a bottom electrode.

[0009] (2) Fabrication of resistive switching dielectric layer:

[0010] The crystal structure is (A′)2(A). n-1 B n X 3n+1 Two-dimensional halo perovskite material is liquid-phase coated on a conductive substrate serving as the bottom electrode. After the resistive switching dielectric layer is liquid-phase film-formed, a thermal curing post-treatment is performed to cure the resistive switching dielectric layer, resulting in a bottom electrode / resistive switching dielectric layer local layer structure.

[0011] (3) Dielectric layer fabrication:

[0012] A liquid phase dielectric layer is prepared on a resistive switching dielectric layer. After the dielectric layer is formed into a liquid phase film, a curing post-treatment is performed to cure the dielectric layer, resulting in a bottom electrode / resistive switching dielectric layer / dielectric layer local layer structure.

[0013] (4) Top electrode fabrication:

[0014] Electrochemically active metals are deposited on the resistive switching dielectric layer prepared in step (2) to obtain a bottom electrode / resistive switching dielectric layer / top electrode MIM structure;

[0015] Alternatively, an electrochemically active metal can be deposited on the dielectric layer prepared in step (3) to obtain a bottom electrode / resistive switching dielectric layer / dielectric layer / top electrode MIM structure.

[0016] Preferably, in step (1), the rigid substrate is a glass sheet, a silicon wafer, an indium tin oxide substrate, or a fluorine-doped tin oxide substrate;

[0017] Preferably, in step (1), the flexible substrate is at least one of polyvinyl alcohol, polyester, polyimide, polyethylene naphthalate, paper, and textile material;

[0018] Preferably, in step (1), the cleaning time of the substrate in each solvent is 20 to 40 minutes; the plasma cleaning time is 5 to 10 minutes; and the cleaning atmosphere is at least one of nitrogen and oxygen.

[0019] Preferably, in step (1), the deposited metal is gold, platinum or tungsten.

[0020] Preferably, in step (2), the A′ position of the two-dimensional halide perovskite material is an aliphatic alkyl or aromatic alkylammonium cation (RNH3); the A position is a cesium ion (Cs). + ), methylamine ions (CH3NH3) + ), formamidinium ion (HC(NH2)2) + The B position is any one or more of the following: lead ions or tin ions; the X position is any one or more of the following: iodine ions, bromine ions, and chloride ions.

[0021] Preferably, in step (2), the liquid phase coating method of the two-dimensional halide perovskite material is any one or more of the following: liquid phase spin coating, liquid phase spraying, scraping coating, and screen printing.

[0022] Preferably, in step (2), the preparation method of the liquid phase of the two-dimensional halide perovskite material is as follows:

[0023] Two-dimensional halide perovskite materials are dissolved in N,N-dimethylformamide solvent, or a mixed solvent of N,N-dimethylformamide and dimethyl sulfoxide in a volume ratio of 10-30:1 is used to dissolve the two-dimensional halide perovskite materials in the mixed solvent to obtain a perovskite solution; the concentration of the obtained perovskite solution is 0.5-1.0 mol / L;

[0024] Preferably, in step (2), after liquid phase film formation, a heat curing post-treatment is performed at 100-160°C for at least 10 minutes.

[0025] Preferably, in step (3), the dielectric material includes at least one of polymethyl methacrylate, polyethylene terephthalate, polycarbonate, polytetrafluoroethylene, polyvinylidene fluoride, trifluoroethylene copolymer, polyethylene, polystyrene, polyvinyl chloride, polypropylene, polyimide, polycaprolactam, polyaryl ether, perfluorocyclobutane, nylon, phenolic resin, acrylonitrile-butadiene-styrene copolymer, polybenzoxazole, and polyetheretherketone.

[0026] Preferably, in step (3), when preparing the liquid phase dielectric layer, the coating method is any one or more of liquid phase spin coating, liquid phase spraying, and blade coating;

[0027] Preferably, in step (3), after liquid phase film formation, a room temperature curing post-treatment is performed to cure the dielectric layer.

[0028] Preferably, in step (4), the top electrode material is at least one of silver, copper, aluminum, iron, zinc, titanium, nickel and mercury, which are easily oxidized into metal ions, and the thickness of the top electrode is 50-100 nm.

[0029] A two-dimensional halide perovskite resistive switching memory is prepared using the preparation method of the two-dimensional halide perovskite resistive switching memory described in this invention, wherein the operating voltage of the two-dimensional halide perovskite resistive switching memory is not higher than 0.2V.

[0030] Preferably, the two-dimensional halide perovskite resistive switching memory of the present invention has an operating voltage not higher than 0.12V, and the multi-device and multi-cycle dispersion coefficients of the operating voltage are both not greater than 10%; the device tolerance is not less than 1×10⁻⁶. 3 Each time, the data retention time is no less than 1×10. 5 s.

[0031] Compared with the prior art, the present invention has the following obvious and prominent substantive features and significant advantages:

[0032] 1. The two-dimensional halide perovskite resistive switching dielectric material of the present invention provides a low-barrier, highly repeatable migration channel for ion / vacancy movement, thereby simultaneously reducing the device operating voltage and its dispersion;

[0033] 2. The two-dimensional halide perovskite thin film of this invention is prepared using a liquid-phase film formation method, which is simple, low-cost, and has good reproducibility. The raw materials, electrode materials, and dielectric materials used are numerous, readily available, and inexpensive. The required solvents are all commercially available products that require no further processing.

[0034] 3. This invention utilizes a microstructure control method for two-dimensional halo perovskite materials to provide a migration channel with low migration energy barrier and high repeatability for ion / vacancy migration. The two-dimensional halo perovskite resistive switching memory prepared based on this method has an operating voltage of no higher than 0.2V, or even no higher than 0.12V, and can be as low as 0.09V. The multi-device and multi-cycle dispersion coefficients of the operating voltage are no greater than 10%, which provides progress for the further modularization and commercialization of resistive switching memory.

[0035] 4. The method of the present invention is simple, easy to implement, and low in cost, making it suitable for widespread use. Attached Figure Description

[0036] Figure 1 This is a schematic diagram of the device structure of the two-dimensional halide perovskite resistive switching memory prepared in Example 1.

[0037] Figure 2 These are the XRD patterns of various two-dimensional halide perovskite thin films prepared in Example 1.

[0038] Figure 3 These are the XRD patterns of the two-dimensional halide perovskite thin film prepared in Example 1 before and after the deposition of a silver electrode.

[0039] Figure 4 This is a SEM image of the two-dimensional halide perovskite thin film prepared in Example 1.

[0040] Figure 5 These are the SEM images and corresponding EDX images of the two-dimensional halide perovskite resistive switching memory prepared in Example 1 after the formation of conductive filaments.

[0041] Figure 6 This is the current-voltage characteristic diagram of the two-dimensional halide perovskite resistive switching memory prepared in Example 1.

[0042] Figure 7 This is a diagram showing the operating voltage dispersion of the two-dimensional halide perovskite resistive switching memory prepared in Example 1.

[0043] Figure 8 This is a high- and low-resistivity current distribution diagram of the two-dimensional halide perovskite resistive switching memory prepared in Example 1.

[0044] Figure 9 This is a graph showing the cycle tolerance and data retention time characteristics of the two-dimensional halide perovskite resistive switching memory prepared in Example 1.

[0045] Figure 10 The diagram shows the current-voltage characteristics of the two-dimensional halide perovskite resistive switching memory prepared in Example 1 under different limiting currents.

[0046] Figure 11These are the current-voltage characteristic diagram and the operating voltage dispersion diagram of the two-dimensional halide perovskite resistive switching memory prepared in Example 2. Detailed Implementation

[0047] The preferred embodiments of the present invention will be described in detail below with reference to specific examples. However, it should be understood that those skilled in the art can make reasonable changes, improvements and combinations to these embodiments without departing from the scope defined by the claims, thereby obtaining new specific implementation methods. These new specific implementation methods obtained through changes, improvements and combinations are also included within the protection scope of the present invention.

[0048] The above solution will be further described below with reference to specific embodiments. The preferred embodiments of the present invention are described in detail below:

[0049] Example 1

[0050] In this embodiment, see Figure 1 , Figure 1 This is a schematic diagram of the device structure of the two-dimensional halide perovskite resistive switching memory according to this embodiment. It includes a top silver electrode 1, a two-dimensional halide perovskite thin film 2, and a bottom FTO substrate 3. The steps of the fabrication method of the two-dimensional halide perovskite resistive switching memory in this embodiment are as follows:

[0051] (1) The conductive FTO substrate was cleaned in deionized water, acetone, isopropanol and ethanol for 30 min each, then dried with nitrogen, and finally cleaned in oxygen plasma atmosphere for 10 min to be used as the bottom electrode.

[0052] (2) At room temperature, weigh 348.74 mg of phenylethylamine iodide and 323.12 mg of lead iodide powder and dissolve them in 1 mL of N,N-dimethylformamide solvent. Then stir for 8 to 12 h to form a two-dimensional halo perovskite precursor solution. Filter the solution with a filter head and set it aside. Place the clean and dry FTO substrate in a spin coater. Take 100 μL of the two-dimensional halo perovskite precursor solution and drop it onto the substrate. Spin coat the film at 4000 rpm for 60 s. Then transfer it to a hot plate for heat treatment at 120 to 160 °C for 10 min. The two-dimensional halo perovskite material film cools and solidifies to form a resistive switching dielectric layer, and a local layer structure of bottom electrode / resistive switching dielectric layer is obtained.

[0053] (3) After cooling and solidifying the two-dimensional halide perovskite material film, a silver electrode with a thickness of 50 nm is deposited by vapor deposition to form a MIM structure of bottom electrode / resistive switching dielectric layer / top electrode, thereby assembling a two-dimensional halide perovskite resistive switching memory.

[0054] Experimental test analysis:

[0055] (I) Microscopic observation and analysis of the functional layer of the two-dimensional halide perovskite resistive switching memory prepared in this embodiment:

[0056] Figure 2 The X-ray diffraction patterns of the two-dimensional halide perovskite films prepared at different heat treatment temperatures in this embodiment are shown. All films exhibit periodically repeating diffraction peaks, proving that their crystal orientation along the

[001] direction is parallel to the substrate.

[0057] Figure 3 The image shows the X-ray diffraction patterns of the two-dimensional halide perovskite thin film before and after the deposition of the silver electrode in this embodiment. As can be seen from the image, the diffraction peaks of the two-dimensional halide perovskite remain unchanged before and after electrode deposition, and no diffraction peaks such as silver iodide are observed, proving that the thin film does not chemically react with the silver electrode and has chemical stability.

[0058] Figure 4 The image shows a scanning electron microscope (SEM) image of the two-dimensional halide perovskite thin film prepared in this embodiment. The scale bar for the image is 10 μm. As can be seen from the image, the two-dimensional halide perovskite thin film has excellent film-forming properties, with distinct grain boundaries, large crystal size, and high film coverage.

[0059] Figure 5 The images show scanning electron microscope (SEM) images and corresponding X-ray energy dispersive spectroscopy (EDS) spectra of the two-dimensional halide perovskite resistive switching memory (SSM) fabricated in this embodiment after the top electrode has been peeled off in a low-resistivity state. The scale bar of the SEM images is 5 μm. The images show that the migrating ions, i.e., silver ions, are mainly concentrated at the grain boundaries of the two-dimensional halide perovskite film, while the perovskite components are uniformly distributed throughout the film.

[0060] (II) Performance characterization tests were performed on the two-dimensional halide perovskite resistive switching memory prepared in this embodiment:

[0061] The electrical properties of the two-dimensional halide perovskite resistive switching memory prepared in this embodiment were tested, with an effective area of ​​1 mm². 2 .

[0062] Figure 6 These are performance graphs of the two-dimensional halide perovskite prepared in this embodiment and the resistive switching memory prepared from the comparative sample. It can be seen that, due to the low-barrier migration path provided by the two-dimensional halide perovskite, its operating voltage is significantly reduced to 0.12V, while also exhibiting a larger on / off ratio.

[0063] Figure 7 This is a statistical graph showing the operating voltage dispersion of the two-dimensional halide perovskite resistive switching memory prepared in this embodiment. It can be seen that the coefficient of variation (IV) of the IV curve for a single device over 50 performance cycles is 6.7%, and the coefficient of variation of the IV curve for a single device over 50 performance cycles is 8.8%, both less than 10%.

[0064] Figure 8This is a high- and low-resistivity current distribution diagram of the two-dimensional halide perovskite resistive switching memory prepared in this embodiment. It can be seen that the high- and low-voltage fluctuations of the 50 different devices in this memory are small, and the switching ratio can be maintained at a large level.

[0065] Figure 9 This diagram shows the cycle tolerance and data retention time characteristics of the two-dimensional halide perovskite resistive switching memory fabricated in this embodiment. It can be seen that the device tolerance of this memory exceeds 10... 3 And the data retention time exceeds 10 times. 5 s.

[0066] Figure 10 This is a current-voltage characteristic graph of the two-dimensional halide perovskite resistive switching memory prepared in this embodiment under different limiting currents. It can be seen that the limiting current has no significant effect on the operating voltage, which also indicates that the device has activation-free characteristics.

[0067] The (C6H5C2H4NH3)2PbI4 resistive switching memory prepared by the method in this embodiment has an operating voltage no higher than 0.12V, and a minimum of 0.09V. The multi-device and multi-cycle dispersion coefficients of the operating voltage are both less than 10%. Furthermore, the device tolerance exceeds 10... 3 Times, data retention time exceeds 10 5 s.

[0068] Example 2

[0069] This embodiment is basically the same as Embodiment 1, except that:

[0070] In this embodiment, the steps of the fabrication method of the two-dimensional halide perovskite resistive switching memory are as follows:

[0071] (1) This step is the same as in Example 1;

[0072] (2) This step is the same as in Example 1;

[0073] (3) After cooling and solidifying the two-dimensional halo perovskite material film, a polymethyl methacrylate film is prepared on the resistive switching dielectric layer by liquid phase spin coating. Then, after room temperature curing, the dielectric layer is cured to obtain a bottom electrode / resistive switching dielectric layer / dielectric layer local layer structure. Then, a silver electrode with a thickness of 50 nm is deposited on the dielectric layer to form a bottom electrode / resistive switching dielectric layer / dielectric layer / top electrode MIM structure, thereby assembling a two-dimensional halo perovskite resistive switching memory.

[0074] Experimental test analysis:

[0075] (I) Performance characterization tests were performed on the two-dimensional halide perovskite resistive switching memory prepared in this embodiment:

[0076] Figure 11 This document presents the performance graph and operating voltage dispersion statistics of the two-dimensional halide perovskite resistive switching memory prepared in this embodiment. It can be seen that the operating voltage of this device is 0.15V. Furthermore, the coefficient of variation (COP) of the IV curve for 50 performance cycles of a single device is 6.8%, and the COP of the IV curve for 50 individual devices is 8.6%, both less than 10%.

[0077] The operating voltage of the two-dimensional halide perovskite resistive switching memory described in this embodiment is no higher than 0.15V, and the multi-device and multi-cycle dispersion coefficients of the operating voltage are no greater than 10%.

[0078] In summary, the two-dimensional halide perovskite resistive switching memory and its fabrication method described above fabricate a microstructure-controllable two-dimensional halide perovskite resistive switching dielectric layer on a substrate through liquid phase coating and post-treatment. This layer provides a fast ion migration channel and reduces migration randomness, thereby effectively reducing the operating voltage and dispersion of the resistive switching memory, resulting in a resistive switching memory device with an operating voltage below 0.2V and a dispersion coefficient of less than 10%. The method described above, through microstructure control of the two-dimensional halide perovskite resistive switching dielectric material, provides a migration channel with a high-uniformity migration barrier for ion / vacancy movement, thus achieving a resistive switching memory with low operating voltage and low dispersion. This fabrication method is simple and highly reproducible, providing technical support for the further modularization and commercialization of resistive switching memory.

[0079] The embodiments of the present invention have been described above in conjunction with the accompanying drawings. However, the present invention is not limited to the above embodiments. Various changes can be made according to the purpose of the invention. Any changes, modifications, substitutions, combinations or simplifications made based on the spirit and principle of the technical solution of the present invention shall be equivalent substitutions. As long as they meet the purpose of the invention and do not deviate from the technical principle and inventive concept of the present invention, they shall fall within the protection scope of the present invention.

Claims

1. A method for fabricating a two-dimensional halide perovskite resistive switching memory, characterized in that: The fabricated device structure is a bottom electrode / resistive switching dielectric layer / top electrode MIM structure, or a bottom electrode / resistive switching dielectric layer / dielectric layer / top electrode MIM structure. As a two-dimensional halide perovskite resistive switching memory, the fabrication process is as follows: (1) Preparation of bottom electrode: A rigid or flexible substrate is ultrasonically cleaned in at least one solvent, including deionized water, acetone, isopropanol, and ethanol. It is then dried with nitrogen and subjected to plasma cleaning to obtain a clean and dry substrate. Metal or graphite is then deposited directly on the clean and dry substrate to obtain a conductive substrate, which is used as a bottom electrode. The bottom electrode obtained by depositing metal on the clean and dry substrate is FTO. (2) Fabrication of resistive switching dielectric layer: The crystal structure is (A′)2(A). n−1 B n X 3n+1 Two-dimensional halide perovskite materials are liquid-phase coated onto a conductive substrate serving as the bottom electrode. After liquid-phase film formation of the resistive switching dielectric layer, a thermal curing post-treatment is performed to solidify the resistive switching dielectric layer, resulting in a local layer structure of the bottom electrode / resistive switching dielectric layer. The A′ position of the two-dimensional halide perovskite material is an aliphatic alkyl or aromatic alkylammonium cation (RNH3); the A site is a cesium ion (Cs). + ), methylamine ions (CH3NH3) + ), formamidinium ion (HC(NH2)2) + The B position is any one or more of the following: lead ion or tin ion; the X position is any one or more of the following: iodine ion, bromide ion, or chloride ion. (3) Dielectric layer fabrication: A liquid-phase dielectric layer is prepared on a resistive switching dielectric layer. After the dielectric layer is formed in liquid phase, a curing post-treatment is performed to solidify the dielectric layer, resulting in a bottom electrode / resistive switching dielectric layer / dielectric layer local layer structure; the dielectric layer is a polymethyl methacrylate film. (4) Top electrode preparation: Electrochemically active metals are deposited on the resistive switching dielectric layer prepared in step (2) to obtain a bottom electrode / resistive switching dielectric layer / top electrode MIM structure; Alternatively, an electrochemically active metal can be deposited on the dielectric layer prepared in step (3) to obtain a bottom electrode / resistive switching dielectric layer / dielectric layer / top electrode MIM structure; The top electrode material is at least one of silver, copper, and nickel, which are easily oxidized into metal ions.

2. The method for fabricating a two-dimensional halide perovskite resistive switching memory according to claim 1, characterized in that: In step (1), the rigid substrate is a glass sheet, a silicon wafer, an indium tin oxide substrate, or a fluorine-doped tin oxide substrate; In step (1), the flexible substrate is at least one of polyvinyl alcohol, polyester, polyimide, polyethylene naphthalate, paper, and textile material; In step (1), the cleaning time of the substrate in each solvent is 20-40 min; the plasma cleaning time is 5-10 min; and the cleaning atmosphere is at least one of nitrogen and oxygen.

3. The method for fabricating a two-dimensional halide perovskite resistive switching memory according to claim 1, characterized in that: In step (1), the deposited metal is gold, platinum or tungsten.

4. The method for fabricating a two-dimensional halide perovskite resistive switching memory according to claim 1, characterized in that: In step (2), the A′ site of the two-dimensional halide perovskite material is an aromatic alkylammonium cation (RNH3); the A site is a cesium ion (Cs). + ), methylamine ions (CH3NH3) + ), formamidinium ion (HC(NH2)2) + Any one or more of the following: B-position is a divalent lead ion; X-position is iodine.

5. The method for fabricating a two-dimensional halide perovskite resistive switching memory according to claim 1, characterized in that: In step (2), the liquid phase coating method of the two-dimensional halide perovskite material is any one or more of the following: liquid phase spin coating, liquid phase spraying, scraping coating, and screen printing.

6. The method for fabricating a two-dimensional halide perovskite resistive switching memory according to claim 1, characterized in that: In step (2), the preparation method of the liquid phase of the two-dimensional halide perovskite material is as follows: Two-dimensional halide perovskite materials are dissolved in N,N-dimethylformamide solvent, or a mixed solvent of N,N-dimethylformamide and dimethyl sulfoxide in a volume ratio of 10~30:1 is used to dissolve the two-dimensional halide perovskite materials in the mixed solvent to obtain a perovskite solution; the concentration of the obtained perovskite solution is 0.5~1.0 mol / L; In step (2), after liquid phase film formation, a heat curing posttreatment is performed at 100~160℃ for at least 10 min.

7. The method for fabricating a two-dimensional halide perovskite resistive switching memory according to claim 1, characterized in that: In step (3), when preparing the liquid phase dielectric layer, the coating method is any one or more of the following: liquid phase spin coating, liquid phase spraying, and blade coating. In step (3), after liquid phase film formation, room temperature curing post-treatment is performed to cure the dielectric layer.

8. The method for fabricating the two-dimensional halide perovskite resistive switching memory according to claim 1, characterized in that: In step (4), the top electrode material is silver, which is easily oxidized into metal ions; the thickness of the top electrode is 50~100 nm.

9. A two-dimensional halide perovskite resistive switching memory, characterized in that: The two-dimensional halide perovskite resistive switching memory is prepared using the preparation method of claim 1, wherein the operating voltage of the two-dimensional halide perovskite resistive switching memory is not higher than 0.2 V.

10. The two-dimensional halide perovskite resistive switching memory according to claim 9, characterized in that: The multi-device and multi-cycle dispersion coefficients of the operating voltage are both no greater than 10%; the device tolerance is no less than 1×10⁻⁶. 3 Each time, the data retention time is no less than 1×10. 5 s.

Citation Information

Patent Citations

  • Inorganic halogen perovskite resistive random access memory and preparation method

    CN105720195A

  • Hybrid perovskite-based write-once read-many memory and preparation method thereof

    CN111341912A