Information processing apparatus, information processing method, and recording medium

Abstract

An information processing apparatus has an analysis section that performs syntax analysis on a program assigned to a task that is executed periodically, and an output section. The analysis section classifies one or more variables used in execution of the task into a first group that initially performs read processing of reading a value from a memory, and a second group that initially performs write processing of writing a value to the memory. The analysis section determines that a necessity of a soft error countermeasure for the variables belonging to the first group is greater than a necessity of the soft error countermeasure for the variables belonging to the second group. The output section outputs the determination result. Thus, it is possible to determine the variables for which the soft error countermeasure is needed.

Description

Technical Field

[0001] This disclosure relates to information processing apparatus, information processing methods, and procedures. Background Technology

[0002] With the increasing integration and miniaturization of semiconductor devices, transient bit errors (soft errors) in memory have increased dramatically. Soft errors can occur, for example, due to collisions with alpha particles or neutrons from cosmic rays. If memory that is prone to soft errors is used in a system, temporary system shutdowns caused by soft errors may occur.

[0003] Against this backdrop, Japanese Patent Application Publication No. 2007-18414 (Patent Document 1) discloses a control device that, when rewriting variable data in RAM (Random Access Memory), writes the same data to each of three or more different addresses within the RAM. Furthermore, the ITU-T (International Telecommunication Union - Telecommunication Standardization Sector) has approved recommendations for soft error countermeasures that define design, evaluation, and quality standards related to soft error countermeasures.

[0004] Existing technical documents

[0005] Patent documents

[0006] Patent Document 1: Japanese Patent Application Publication No. 2007-18414

[0007] Non-patent literature

[0008] Non-Patent Document 1: International Telecommunication Union, "K.131: Design methodologies for telecommunication systems applying soft error measures", [online], January 13, 2018, [retrieved April 13, 2020], Internet <URL: https: / / www.itu.int / rec / T-REC-K.131-201801-I / en> Summary of the Invention

[0009] The problem that the invention aims to solve

[0010] If the soft error countermeasures described in Patent Document 1 are applied to all variables, a large memory capacity is required, which is costly. Therefore, it is preferable to implement soft error countermeasures, such as those in Patent Document 1, only on variables where the necessity of soft error countermeasures is high. However, while Non-Patent Document 1 suggests extracting the parts of memory that require soft error countermeasures, it does not disclose its specific method.

[0011] This disclosure was made in view of the above-mentioned problems, and its purpose is to provide an information processing apparatus, information processing method and program capable of determining variables that require soft error countermeasures.

[0012] Methods for solving problems

[0013] According to one example of this disclosure, the information processing apparatus includes: an analysis unit that performs syntactic analysis on a program assigned to a task that is periodically executed in a task execution device; and an output unit that outputs the analysis results of the analysis unit. The analysis unit includes an extraction unit, a classification unit, and a determination unit. The extraction unit extracts one or more variables used in the execution of the task. The classification unit classifies the one or more variables into a first group, which is the first group to be processed by reading values ​​from memory during the execution of the task, and a second group, which is the first group to be processed by writing values ​​to memory during the execution of the task. The determination unit determines that the necessity of a soft error countermeasure for variables belonging to the first group is greater than the necessity of a soft error countermeasure for variables belonging to the second group. The output unit outputs the determination result of the determination unit.

[0014] According to this disclosure, one or more variables are classified into either Group 1 or Group 2. Variables classified into Group 2 are initially written to memory during the execution of the task. Therefore, even if a soft error occurs in memory between the end of the task and the start of the task in the next cycle, the soft error will not have any effect because the value is written in the next cycle.

[0015] On the other hand, variables classified as Group 1 initially read their values ​​from memory during task execution. Therefore, if a soft error occurs in memory between the end of the task and the start of the next cycle, a garbled value is read and used to perform calculations. As a result, the control system may malfunction.

[0016] Therefore, the necessity of soft error countermeasures for variables belonging to Group 1 is determined to be higher than that for variables belonging to Group 2, and the determination result is output. Thus, the user can identify variables belonging to Group 1 as those requiring soft error countermeasures.

[0017] In the above disclosure, one or more variables include a first variable and a second variable belonging to the second group. Corresponding to the program including the following first, second, third, fourth, fifth, and sixth commands, the determination unit determines that the necessity of a soft error countermeasure for the first variable is greater than the necessity of a soft error countermeasure for the second variable. Specifically, the first command initially writes the value of the first variable into memory; the second command is a command that waits for a first predetermined time after the first command; the third command reads the value of the first variable from memory after the second command; the fourth command initially writes the value of the second variable into memory; the fifth command is a command that waits for a second predetermined time shorter than the first predetermined time after the fourth command; and the sixth command reads the value of the second variable from memory after the fifth command.

[0018] According to this disclosure, the longer the specified time between the command to initially write the value to memory and the command to read the value from memory, the greater the necessity to determine a soft error countermeasure.

[0019] In the above disclosure, one or more variables include a first variable and a second variable belonging to the second group. Corresponding to a program that includes a first command, a second command, a third command, a fourth command, and a fifth command, but does not include a command that waits for a predetermined time between the fourth and fifth commands, the determination unit determines that the necessity of a soft error countermeasure for the first variable is greater than the necessity of a soft error countermeasure for the second variable. Specifically, the first command initially writes the value of the first variable into memory; the second command is a command that waits for a first predetermined time after the first command; the third command reads the value of the first variable from memory after the second command; the fourth command initially writes the value of the second variable into memory; and the fifth command reads the value of the second variable from memory after the fourth command.

[0020] According to this disclosure, among the variables belonging to Group 1, variables for which a predetermined time is waited between the command to write a value to memory and the command to read a value from memory are determined to have a higher degree of necessity for soft error countermeasures than other variables. Therefore, for variables belonging to Group 1, the necessity of soft error countermeasures can be determined more precisely.

[0021] According to one example of this disclosure, an information processing method in an information processing apparatus includes the following steps: performing syntactic analysis on a program assigned to a task that is periodically executed in a task execution device; and outputting the syntactic analysis result. The syntactic analysis step includes the following steps: (i) extracting one or more variables used in the execution of the task; (ii) classifying the one or more variables into a first group that is initially read from memory during the execution of the task, and a second group that is initially written to memory during the execution of the task; and (iii) determining that the necessity of a soft error countermeasure for variables belonging to the first group is greater than the necessity of a soft error countermeasure for variables belonging to the second group. The output step includes the following step: outputting the determination result of the determination step.

[0022] According to one example of this disclosure, the program causes a computer to perform the information processing method described above. These disclosures also enable the identification of variables requiring soft error countermeasures.

[0023] The effects of the invention

[0024] According to this disclosure, it is possible to identify the variables that require soft error countermeasures. Attached Figure Description

[0025] Figure 1 This is a schematic diagram illustrating an application example of the information processing apparatus of this embodiment.

[0026] Figure 2 This is a schematic diagram illustrating an example of the overall structure of the control system in this embodiment.

[0027] Figure 3 This is a block diagram illustrating an example of the hardware structure of the control device in this embodiment.

[0028] Figure 4 This is a diagram representing an example of task information.

[0029] Figure 5 It means according to Figure 4 The graph shows the task execution status of the task information.

[0030] Figure 6 This is a block diagram illustrating an example of the hardware structure of the information processing apparatus in this embodiment.

[0031] Figure 7 This is a block diagram illustrating a functional structure example of the information processing apparatus in this embodiment.

[0032] Figure 8 This is a diagram representing an example of a program assigned to a task.

[0033] Figure 9 This is a graph representing an example of the classification results of a variable.

[0034] Figure 10 This is a diagram showing an example of the judgment result displayed on the monitor.

[0035] Figure 11 This is another example of a program assigned to a task.

[0036] Figure 12 This is a diagram representing one example of the determination result in a variation. Detailed Implementation

[0037] Embodiments of this disclosure will be described in detail with reference to the accompanying drawings. Furthermore, identical or corresponding parts in the drawings will be labeled with the same reference numerals and their descriptions will not be repeated.

[0038] §1 Application Examples

[0039] In various fields such as aerospace systems, automotive, medical devices, communication equipment, and industrial equipment, it is desirable to suppress temporary system crashes caused by soft errors in memory. This disclosure can be applied to systems in such diverse fields. The following description, as an example of application of this disclosure, illustrates a control system used in the field of factory automation (FA), but the application of this disclosure is not limited to this control system.

[0040] Control systems used in the field of computer vision (FA) include, for example, PLCs (Programmable Logic Controllers). A PLC executes one or more tasks at predetermined intervals.

[0041] A PLC consists of a processor, memory, and storage. The processor executes one or more tasks corresponding to the controlled object by executing various programs stored in the memory. Programs are pre-assigned to each task. The processor executes the programs assigned to each task at predetermined cycles.

[0042] The values ​​of more than one variable used in the execution of each task are held in memory. The processor reads the values ​​of the variables from memory or writes the values ​​of the variables to memory according to the instructions contained in the program assigned to the task.

[0043] If a soft error occurs in the memory contained in the PLC, the values ​​of variables become corrupted. Due to this corruption, the control system may malfunction. Therefore, as described in Patent Document 1, a countermeasure is considered: writing the same data representing the value of the variable to three or more different addresses in the memory. However, writing the same data to three or more different addresses in the memory for all variables would require a large memory capacity, incurring high costs. Therefore, it is preferable to implement the countermeasure, as in Patent Document 1, only for variables where the necessity of soft error countermeasures is high. Therefore, the control system of this embodiment includes an information processing device for determining the necessity of soft error countermeasures.

[0044] Figure 1 This is a schematic diagram illustrating an application example of the information processing apparatus of this embodiment. Figure 1 The flowchart of an information processing method in an information processing device is shown.

[0045] like Figure 1 As shown, the information processing method includes: step S1, performing syntactic analysis on the program assigned to each task executed in the PLC; and step S2, outputting the analysis results.

[0046] Step S1 includes steps S11 to S13. Step S11 is the step of extracting more than one variable used in the execution of the task. Figure 1 In the middle, extract variables a to c.

[0047] Step S12 consists of the following steps: classifying the extracted one or more variables into a first group that is initially read from memory during the execution of the task, and a second group that is initially written to memory during the execution of the task.

[0048] exist Figure 1 In this context, "R" indicates read processing, and "W" indicates write processing. For example... Figure 1 As shown, variables a and c initially perform read operations to retrieve values ​​from memory during task execution. Variable b initially performs write operations to memory during task execution. Therefore, variables a and c are classified into group 1, and variable b is classified into group 2.

[0049] Step S13 is the following steps: determining that the necessity of soft error countermeasures for variables a and c belonging to group 1 is higher than the necessity of soft error countermeasures for variable b belonging to group 2.

[0050] Step S2 includes step S21. Step S21 is the step of outputting the determination result of step S13. For example, the determination result is displayed on a display.

[0051] Based on the information processing method described above, one or more variables are classified into either Group 1 or Group 2. Variables classified into Group 2 have their values ​​initially written to memory during task execution. Therefore, even if a soft error occurs in memory between the end of the task and the start of the next cycle, the soft error will not have any effect because the value is written in the next cycle.

[0052] On the other hand, variables classified as Group 1 initially read their values ​​from memory during task execution. Therefore, if a soft error occurs in memory between the end of the task and the start of the next cycle, a garbled value is read and used to perform calculations. As a result, the control system may malfunction.

[0053] Therefore, the necessity of soft error countermeasures for variables belonging to Group 1 is determined to be higher than that for variables belonging to Group 2, and the determination result is output. Thus, the user can identify variables belonging to Group 1 as those requiring soft error countermeasures.

[0054] §2 Specific examples

[0055] <Overall Structure of the Control System>

[0056] First, an example of the overall structure of the control system 1, which includes the information processing device 200 of this embodiment, will be described. Figure 2 This is a schematic diagram illustrating an example of the overall structure of the control system 1 in this embodiment.

[0057] Reference Figure 2 The control system 1 includes a control device 100, an information processing device 200, and field equipment 500.

[0058] The control device 100 is equivalent to an industrial controller that controls various equipment, devices, and other controlled objects. The control device 100 is a computer that performs the control operations described later; typically, it can also be embodied as a PLC (Programmable Logic Controller). The control device 100 is a task execution device that periodically performs one or more tasks for controlling the controlled object.

[0059] The control device 100 can also be connected to various field devices 500 via the field network 2. The control device 100 exchanges data with one or more field devices 500 via the field network 2, etc. Generally speaking, "field network" is also called "fieldbus", but for the sake of simplicity, it will be referred to as "field network" in the following description. That is, the "field network" in this specification can include the concept of "fieldbus" in addition to "field network" in the narrow sense.

[0060] The field network 2 preferably employs a bus or network capable of constant-cycle communication. Examples of buses or networks capable of such constant-cycle communication include EtherCAT (registered trademark), EtherNet / IP (registered trademark), DeviceNet (registered trademark), and CompoNet (registered trademark).

[0061] Field network 2 can connect any field device 500. Field device 500 includes actuators that provide some physical action to manufacturing equipment or production lines (hereinafter, also collectively referred to as "field"), as well as input / output devices that exchange information with the field.

[0062] Data is exchanged between the control device 100 and the field device 500 via the field network 2. This exchanged data is updated at extremely short cycles ranging from hundreds of μsec to tens of msec. Such data exchange includes the processing of sending data collected or generated in the field device 500 (hereinafter also referred to as "input data") to the control device 100, and the processing of sending control commands to the field device 500 from the control device 100 (hereinafter also referred to as "output data"). The updating process of such exchanged data is also called input / output refresh processing.

[0063] exist Figure 2 In the illustrated structural example, the field device 500 includes a remote I / O (Input / Output) device 510, a robot 520 and a robot controller 522, a CNC machine tool 530, a servo driver 538, and a servo motor 532.

[0064] Servo motor 532 drives conveyor 534 to transport workpiece W to worktable 536 positioned in front of CNC machine tool 530. Robot 520 places unprocessed workpiece W from worktable 536 into CNC machine tool 530 and removes processed workpiece W from CNC machine tool 530 and places it onto worktable 536.

[0065] As a field device 500, it is not limited to these, and can be any device that collects input data (such as a vision sensor) and any device that provides certain functions based on the output data (such as an inverter device).

[0066] The remote I / O device 510 typically includes a communication coupler that communicates via the field network 2, and an input / output unit (hereinafter also referred to as "I / O unit") for acquiring input data and outputting output data.

[0067] The remote I / O device 510 is connected to input relays, various sensors (such as analog sensors, temperature sensors, vibration sensors, etc.) to collect input data, and output relays, contactors, servo drives and other arbitrary actuators to apply some action to the field.

[0068] The robot controller 522 performs trajectory calculations and angle calculations for each axis according to control instructions (position instructions or speed instructions, etc.) from the control device 100, and drives the servo motors that constitute the robot 520 according to the calculation results.

[0069] The CNC machine tool 530 controls a machining center or similar device according to a program specifying a position or speed, thereby machining any object. The CNC machine tool 530 typically includes machining devices for lathe machining, milling, electrical discharge machining, etc.

[0070] The servo driver 538 drives the servo motor 532 according to control commands (such as position commands or speed commands) from the control device 100.

[0071] The control device 100 can also be connected to other devices via a host network. The host network can also use Ethernet (registered trademark) or EtherNet / IP (registered trademark) as the common network protocol. More specifically, the control device 100 can also be connected to one or more server devices and one or more display devices via the host network.

[0072] The control device 100 can be connected to the information processing device 200. The information processing device 200 provides the following functions: performing syntactic analysis on programs assigned to tasks periodically executed in the control device 100 and outputting the analysis results. Furthermore, the information processing device 200 can also provide a development environment (program creation and editing tools, analyzer, compiler, etc.) for programs executed in the control device 100, a setting environment for configuring parameters (configurations) of the control device 100 and various devices connected to the control device 100, the function of outputting the generated program to the control device 100, and the function of online modification / modification of programs executed on the control device 100, etc.

[0073] <Example of hardware structure for a control device>

[0074] Next, an example of the hardware structure of the control device 100 in this embodiment will be described. Figure 3 This is a block diagram illustrating an example of the hardware structure of the control device 100 in this embodiment.

[0075] Reference Figure 3 The control device 100 is an arithmetic processing unit called the CPU unit, which includes a processor 102, a chipset 104, a main memory 106, a storage device 108, a host network controller 110, a USB (Universal Serial Bus) controller 112, a memory card interface 114, an internal bus controller 120, and a field network controller 130.

[0076] The processor 102 comprises a CPU (Central Processing Unit), an MPU (Microprocessor Unit), and a GPU (Graphics Processing Unit). The processor 102 can have a multi-core architecture, or multiple processors 102 can be configured. That is, the control device 100 has one or more processors 102 and / or processors 102 with one or more cores. The chipset 104 controls the processor 102 and peripheral components to achieve overall processing of the control device 100.

[0077] The main memory 106 is composed of volatile storage devices such as DRAM (Dynamic Random Access Memory) or SRAM (Static Random Access Memory). SRAM uses flip-flops as its storage unit, which has the advantage of not requiring refresh operations and being able to operate at a higher speed than DRAM. Therefore, SRAM is preferably used as the main memory 106.

[0078] In DRAM with a stack-type structure, soft error tolerance is high. On the other hand, in SRAM with a flip-flop structure, soft error tolerance decreases due to miniaturization. Therefore, when using main memory 106 composed of SRAM, soft errors are easily generated in main memory 106. Hereinafter, it will be explained assuming that main memory 106 is SRAM.

[0079] Storage 108 may be composed of non-volatile storage devices such as HDD (Hard Disk Drive) or SSD (Solid State Drive).

[0080] The processor 102 reads various programs 30 stored in the memory 108 and executes them in the main memory 106, thereby realizing control corresponding to the controlled object and various processes as described later. In addition to the system program 34 used to implement basic functions, the memory 108 also stores task information 36. The task information 36 contains information related to one or more tasks executed in the control device 100.

[0081] The host network controller 110 controls data exchange with other devices via a host network. The USB controller 112 controls data exchange with the information processing device 200 via a USB connection.

[0082] The memory card interface 114 is configured to be able to load and unload the memory card 116, write data to the memory card 116, and read various data (user programs, trace data, etc.) from the memory card 116.

[0083] The internal bus controller 120 controls data exchange with the I / O unit 122 installed in the control device 100. The field network controller 130 controls data exchange with field devices via the field network 2.

[0084] Figure 4 This is a diagram representing an example of task information 36. (For example...) Figure 4 As shown, task information 36, for one or more tasks executed in the control device 100, displays the task name, priority, execution cycle, and assigned program for each task. Figure 4 In the example shown, the smaller the priority value, the higher the priority.

[0085] Processor 102 prioritizes executing tasks with higher priority. In addition, processor 102 uses a pre-set time interval (e.g., 1ms) as a common cycle for the entire processing.

[0086] exist Figure 4 In the example shown, processor 102 executes programs 30_1 and 30_2 assigned to task A at a period of 1ms (the same period as the control cycle). When task A overlaps with tasks B and C, processor 102 prioritizes task A over tasks B and C.

[0087] Processor 102 executes program 30_3 assigned to task B at a cycle of 2ms (twice the control cycle). When task B overlaps with task C, processor 102 executes task B before task C.

[0088] Processor 102 executes programs 30_4 and 30_5 assigned to task C at a cycle of 4ms (4 times the control cycle). When task C overlaps with other tasks whose priority value is higher than task C, processor 102 executes task C first, prioritizing those other tasks.

[0089] Figure 5 It means according to Figure 4 The graph shows the execution status of task information 36. (See example...) Figure 5 As shown, task A executes with the same cycle as the control cycle. Since task A has the highest priority, its execution begins synchronously with the start of the control cycle.

[0090] Task B executes at twice the control cycle interval. However, at the start of the control cycle, Task A, which has a higher priority than Task B, begins execution. Therefore, the execution of Task B begins after Task A has finished.

[0091] Task C executes at a cycle four times the control cycle. However, at the start of the control cycle, task A, which has a higher priority than task C, begins execution. Additionally, after task A, task B, which also has a higher priority than task C, sometimes begins execution. Therefore, the execution of task C begins only after the tasks with higher priority than task C have finished.

[0092] <Example of Hardware Structure of Information Processing Device>

[0093] Next, an example of the hardware structure of the information processing apparatus 200 of this embodiment will be described. Figure 6 This is a block diagram illustrating an example of the hardware structure of the information processing apparatus 200 in this embodiment.

[0094] Reference Figure 6 The information processing device 200 is typically implemented by executing an analysis program 32 on a personal computer with a general-purpose architecture. More specifically, see reference... Figure 6 The information processing device 200 includes a processor 202, a display 204, a main memory 206, a storage device 208, a USB controller 212, and an input device 214. These components are connected via an internal bus 210.

[0095] The processor 202, consisting of a CPU, MPU, GPU, etc., reads various programs stored in memory 208, including OS 216 and analysis program 32, expands and executes them in main memory 206, thereby realizing the various functions described later. Main memory 206 is composed of volatile storage devices such as DRAM and SRAM. Memory 208 is composed of non-volatile storage devices such as HDD or SSD.

[0096] In addition, such as Figure 6 As shown, the storage 208 of the information processing device 200 may also store a support program 218 for providing a development environment for programs that are executed in the control device 100.

[0097] The display 204 is a device that displays the calculation results of the processor 202, etc., and is composed of, for example, an LCD (Liquid Crystal Display).

[0098] USB controller 212 exchanges data with control device 100 via USB connection.

[0099] The input device 214 is a device that accepts user operations, such as a keyboard, memory, etc.

[0100] <Example of the functional structure of an information processing device>

[0101] Next, an example of the functional structure of the information processing apparatus 200 of this embodiment will be described. Figure 7 This is a block diagram illustrating a functional structure example of the information processing apparatus 200 in this embodiment. Figure 7 The modules shown are typically implemented by the processor 202 of the information processing device 200 executing the analysis program 32.

[0102] like Figure 7 As shown, the information processing apparatus 200 includes: an analysis unit 20 that performs syntactic analysis on programs assigned to each task; and an output unit 25 that outputs the analysis results of the analysis unit 20. The analysis unit 20 includes an extraction unit 21, a classification unit 22, and a determination unit 23.

[0103] The extraction unit 21 extracts one or more variables used in the execution of each task by performing syntactic analysis on the program assigned to each task. Specifically, the extraction unit 21 determines from the program commands used to write the values ​​of variables to memory and commands used to read the values ​​of variables from memory. The extraction unit 21 extracts the variables that are the objects of the determined commands.

[0104] The classification unit 22 categorizes the one or more variables extracted by the extraction unit 21 into two groups: a first group where a read operation is initially performed to retrieve a value from memory during task execution, and a second group where a write operation is initially performed to write a value to memory during task execution. Specifically, the classification unit 22 determines the execution order of multiple commands contained in the program by performing syntactic analysis on the program assigned to each task. For each of the extracted one or more variables, the classification unit 22 categorizes it into the first group or the second group based on whether the first executed command among the one or more commands containing that variable is a read command or a write command. That is, the classification unit 22 categorizes variables that initially become the object of a read command from memory into the first group, and variables that initially become the object of a write command to memory into the second group.

[0105] The determination unit 23 determines that the necessity of soft error countermeasures for variables belonging to Group 1 is greater than the necessity of soft error countermeasures for variables belonging to Group 2.

[0106] The output unit 25 outputs the determination result of the determination unit 23. For example, the output unit 25 causes the display 204 to display the determination result.

[0107] <Action Example>

[0108] Reference Figures 8-10 An example of the operation of the information processing device 200 will be explained. Figure 8This is a diagram representing an example of a program assigned to a task. Figure 9 This is a graph representing an example of the classification results of a variable. Figure 10 This is a diagram showing an example of the judgment result displayed on the monitor.

[0109] Figure 8 The text shows the allocation to... Figure 4 The program 30_2 for task A is shown. Processor 202 analyzes multiple commands contained in program 30_2. These multiple commands may include commands to read functions. In this case, processor 202 also analyzes the commands contained in the read functions. Figure 8 The illustrated program 30_2 contains formula 301 for calling function F1.

[0110] Processor 202 determines from program 30_2 the commands for writing the value of a variable to memory and the commands for reading the value of a variable from memory. Figure 8 In the example shown, processor 202 determines equation 302 for writing the value to memory and equation 303 for reading the value from memory for the variable "tx_buf".

[0111] Processor 202 determines the execution order of multiple commands through syntactic analysis of program 30_2. Thus, processor 202 identifies that the execution order of equation 303 is later than that of equation 302. That is, processor 202 identifies that equation 302, which is used to write the value to memory, is initially executed for the variable "tx_buf". As a result, processor 202 classifies the variable "tx_buf" into group 2.

[0112] Thus, as Figure 9 As shown, processor 202 categorizes one or more variables used to execute task A into either group 1 or group 2. Specifically, processor 202 categorizes variables like variable "tx_buf" that initially execute the expression for writing values ​​to memory into group 2. Group 2 includes: i) variables that execute both the expression for writing values ​​to memory and the expression for reading values ​​from memory, and those that initially execute the expression for writing values ​​to memory; and ii) variables that only execute the expression for writing values ​​to memory. Conversely, processor 202 categorizes variables that initially execute the expression for reading values ​​from memory into group 1. Group 1 includes: i) variables that execute both the expression for writing values ​​to memory and the expression for reading values ​​from memory, and those that initially execute the expression for reading values ​​from memory; and ii) variables that only execute the expression for reading values ​​from memory.

[0113] Based on the classification results, processor 202 determines the necessity of soft error countermeasures for the variables and displays the determination result on display 204. Figure 10As shown, processor 202 displays the necessity of soft error countermeasures for variables belonging to group 1 as "high" and the necessity of soft error countermeasures for variables belonging to group 2 as "low". Therefore, the user can prioritize implementing soft error countermeasures for variables with a "high" necessity.

[0114] Furthermore, the processor 202 can also include data representing the values ​​of each variable in the determination result. For example, when implementing the soft error countermeasures disclosed in Patent Document 1 on the variables, the user can refer to the data capacity included in the determination result to determine the specifications of the main memory 206.

[0115] <Variation Example>

[0116] In a task, the time from executing the command to write the value of a variable to memory to executing the command to read the value of that variable from memory is generally short. Therefore, the probability of the variable's value becoming garbled due to a soft error during this period is low. Therefore, in the above implementation, the necessity of soft error countermeasures for variables belonging to Group 2 is always determined to be "low".

[0117] However, between the command to write the value of a variable to memory and the command to read the value of that variable from memory, there may be a program that includes a command to wait for a specified time (hereinafter also referred to as a "wait command"). In tasks assigned such a program, the probability of the variable's value becoming garbled due to a soft error during the execution of the wait command increases. Therefore, the processor 202 can also adjust the necessity of soft error countermeasures for variables belonging to the second group based on the length of the specified wait command.

[0118] Figure 11 This is another example of a program assigned to a task. Figure 11 The illustrated program 30_2 includes commands (hereinafter referred to as "write commands") 304-307 to initially write the values ​​of variables d to g to memory, and commands (hereinafter referred to as "read commands") 308-311 to initially read the values ​​of variables d to g from memory, respectively. Furthermore, program 30_2 includes wait commands 312, 313, and 314 to wait for specified times TA, TB, and TC, respectively. The specified time TA is shorter than the specified time TB, and the specified time TB is shorter than the specified time TC. Figure 11 As shown, the commands are executed in the following order: write command 304, wait command 312, read command 308, write command 305, write command 306, wait command 313, read command 309, wait command 314, read command 310, write command 307, and read command 311.

[0119] Program 30_2 includes a write command 305 for the value of variable e, a read command 309 for the value of variable e, and a wait command 313 for a specified waiting time TB executed between the write command 305 and the read command 309. Furthermore, program 30_2 includes a write command 304 for the value of variable d, a read command 308 for the value of variable d, and a wait command 312 for a specified waiting time TA (<TB) executed between the write command 304 and the read command 308. Based on these commands, processor 202 determines that the necessity of a soft error countermeasure for variable e is greater than the necessity of a soft error countermeasure for variable d.

[0120] Program 30_2 includes a write command 306 for the value of variable f, a read command 310 for the value of variable f, and wait commands 313 and 314 executed between the write command 306 and the read command 310, respectively waiting for specified times TB and TC. Furthermore, program 30_2 includes a write command 304 for the value of variable d, a read command 308 for the value of variable d, and a wait command 312 executed between the write command 304 and the read command 308, waiting for a specified time TA (<TB+TC). Based on these commands, processor 202 determines that the necessity of a soft error countermeasure for variable f is greater than the necessity of a soft error countermeasure for variable d.

[0121] Program 30_2 includes a write command 306 for the value of variable f, a read command 310 for the value of variable f, and wait commands 313 and 314 executed between the write command 306 and the read command 310, respectively waiting for specified times TB and TC. Furthermore, program 30_2 includes a write command 305 for the value of variable e, a read command 309 for the value of variable e, and a wait command 313 executed between the write command 305 and the read command 309, waiting for a specified time TB (<TB+TC). Based on these commands, processor 202 determines that the necessity of a soft error countermeasure for variable f is greater than the necessity of a soft error countermeasure for variable e.

[0122] Furthermore, program 30_2 includes a write command 304 for the value of variable d, a read command 308 for the value of variable d, and a wait command 312 that executes between the write command 304 and the read command 308 for a specified waiting time TA (<TB). Also, program 30_2 includes a write command 307 for the value of variable g and a read command 311 for the value of variable g, but there is no wait command between the write command 307 and the read command 311. Based on these commands, processor 202 determines that the necessity of a soft error countermeasure for variable d is greater than the necessity of a soft error countermeasure for variable g.

[0123] Similarly, processor 202 determines that the necessity of soft error countermeasures for variables e and f is greater than the necessity of soft error countermeasures for variable g.

[0124] Figure 12 This is a diagram representing one example of the determination result in a variation. For example... Figure 12 As shown, processor 202 determines the necessity of soft error countermeasures for variables belonging to the first group that do not execute a wait command between a write command and a read command as "low". On the other hand, processor 202 determines the necessity of soft error countermeasures for variables belonging to the first group that execute a wait command between a write command and a read command as "medium".

[0125] Furthermore, the processor 202 appends a grade value to the necessity "medium" that indicates a higher level, based on the total length of the specified waiting time between the write and read commands. A higher grade value indicates a greater necessity for soft error countermeasures. Thus, by checking the grade value, the user can determine the necessity of soft error countermeasures.

[0126] §3 Postscript

[0127] As described above, this embodiment includes the following disclosures.

[0128] (Structure 1)

[0129] An information processing apparatus (200) comprising: Analysis unit (20), which performs syntactic analysis on programs assigned to tasks that are periodically executed in the task execution device; and The output unit (25) outputs the analysis results of the analysis unit (20). The analysis unit (20) includes: Extraction unit (21) extracts one or more variables used in the execution of the task; The classification department (22) classifies the one or more variables into a first group that initially performs read operations on values ​​from memory during the execution of the task, and a second group that initially performs write operations on values ​​to memory during the execution of the task; and The determination unit (23) determines that the necessity of a soft error countermeasure for the variables belonging to the first group is greater than the necessity of a soft error countermeasure for the variables belonging to the second group. The output unit (25) outputs the determination result of the determination unit.

[0130] (Structure 2)

[0131] In the information processing device (200) described in structure 1, The more than one variable includes the first variable and the second variable belonging to the second group. Corresponding to the program including the following first command, second command, third command, fourth command, fifth command, and sixth command, the determination unit (23) determines that the necessity of a soft error countermeasure for the first variable is greater than the necessity of a soft error countermeasure for the second variable, wherein the first command initially writes the value of the first variable into memory; the second command is a command that waits for a first predetermined time after the first command; the third command reads the value of the first variable from memory after the second command; the fourth command initially writes the value of the second variable into memory; the fifth command is a command that waits for a second predetermined time shorter than the first predetermined time after the fourth command; and the sixth command reads the value of the second variable from memory after the fifth command.

[0132] (Structure 3)

[0133] In the information processing device (200) described in structure 1, The more than one variable includes the first variable and the second variable belonging to the second group. Corresponding to the program including the following first command, second command, third command, fourth command and fifth command, but not including a command that waits for a predetermined time between the fourth command and the fifth command, the determination unit (23) determines that the necessity of a soft error countermeasure for the first variable is greater than the necessity of a soft error countermeasure for the second variable, wherein the first command initially writes the value of the first variable into memory; the second command is a command that waits for a first predetermined time after the first command; the third command reads the value of the first variable from memory after the second command; the fourth command initially writes the value of the second variable into memory; and the fifth command reads the value of the second variable from memory after the fourth command.

[0134] (Structure 4)

[0135] An information processing method, which is an information processing method in an information processing apparatus (200), comprises the following steps: Syntactic analysis is performed on programs assigned to tasks that are periodically executed in a task execution device; and Output the syntactic analysis results. The steps for performing the syntactic analysis include the following: Extract more than one variable used in the execution of the task; The one or more variables are respectively classified into a first group, which is the first to perform read operations during the execution of the task, and a second group, which is the first to perform write operations during the execution of the task, and a third group, which is the first to perform write operations during the execution of the task, and a fourth group, which is the first to perform write operations during the execution of the task, and a fifth group, which is the first to perform write operations during the execution of the task, and a sixth group, which is the first to perform write operations during the execution of the task, and a fifth ... The necessity of soft error countermeasures for variables belonging to the first group is determined to be greater than the necessity of soft error countermeasures for variables belonging to the second group. The output process includes the following steps: outputting the determination result of the determination process.

[0136] (Structure 5)

[0137] A program that causes a computer to execute the information processing method described in structure 4.

[0138] Embodiments of the present invention have been described, but should be considered illustrative rather than limiting in all respects. The scope of the invention is defined by the claims and is intended to include all modifications equivalent to or within the scope of the claims.

[0139] Label Explanation

[0140] 1: Control system; 2: Field network; 20: Analysis unit; 21: Extraction unit; 22: Classification unit; 23: Judgment unit; 25: Output unit; 30: Program; 32: Analysis program; 34: System program; 36: Task information; 100: Control device; 102, 202: Processor; 104: Chipset; 106, 206: Main memory; 108, 208: Storage; 110: Upper-level network controller; 112, 212: USB controller; 114: Memory card interface; 116: Memory card; 120: Internal bus controller; 122: I / O unit 130: Field network controller; 200: Information processing device; 204: Display; 210: Internal bus; 214: Input device; 218: Support program; 301, 302, 303: Formula; 304~307: Write command; 308~311: Read command; 312~314: Wait for command; 500: Field device; 510: Remote I / O device; 520: Robot; 522: Robot controller; 530: CNC machine tool; 532: Servo motor; 534: Conveyor; 536: Workpiece table; 538: Servo driver.

Claims

1. An information processing apparatus that provides a development environment for programs assigned to tasks periodically executed in a task execution device, wherein, The information processing device has: The analysis unit performs syntactic analysis on the program; and The output unit outputs the analysis results from the analysis unit. The analysis unit includes: The extraction unit extracts one or more variables used in the execution of the task. The classification department categorizes the one or more variables into a first group, which is the first to perform read operations during the execution of the task (reading values ​​from memory), and a second group, which is the first to perform write operations during the execution of the task (writing values ​​to memory); and The determination unit determines that the necessity of a soft error countermeasure for variables belonging to the first group is greater than the necessity of a soft error countermeasure for variables belonging to the second group. The output unit outputs the determination result of the determination unit.

2. The information processing apparatus according to claim 1, wherein, The more than one variable includes the first variable and the second variable belonging to the second group. Corresponding to the program including the following first, second, third, fourth, fifth, and sixth commands, the determination unit determines that the necessity of a soft error countermeasure for the first variable is greater than the necessity of a soft error countermeasure for the second variable, wherein the first command initially writes the value of the first variable into memory; the second command is a command that waits for a first predetermined time after the first command; the third command reads the value of the first variable from memory after the second command; the fourth command initially writes the value of the second variable into memory; the fifth command is a command that waits for a second predetermined time shorter than the first predetermined time after the fourth command; and the sixth command reads the value of the second variable from memory after the fifth command.

3. The information processing apparatus according to claim 1, wherein, The more than one variable includes the first variable and the second variable belonging to the second group. Corresponding to the program including the following first command, second command, third command, fourth command, and fifth command, but not including a command that waits for a predetermined time between the fourth command and the fifth command, the determination unit determines that the necessity of a soft error countermeasure for the first variable is greater than the necessity of a soft error countermeasure for the second variable, wherein the first command initially writes the value of the first variable into memory; the second command is a command that waits for a first predetermined time after the first command; the third command reads the value of the first variable from memory after the second command; the fourth command initially writes the value of the second variable into memory; and the fifth command reads the value of the second variable from memory after the fourth command.

4. An information processing method, comprising the steps of: providing a development environment for a program assigned to a task periodically executed in a task execution device, in an information processing apparatus, an information processing method in which the following steps are included: Perform syntactic analysis on the program; and Output the syntactic analysis results. The steps for performing the syntactic analysis include the following: Extract more than one variable used in the execution of the task; The one or more variables are respectively classified into a first group, which is the first to perform read operations during the execution of the task, and a second group, which is the first to perform write operations during the execution of the task, and a third group, which is the first to perform write operations during the execution of the task. The necessity of soft error countermeasures for variables belonging to the first group is determined to be greater than the necessity of soft error countermeasures for variables belonging to the second group. The output step includes the following steps: outputting the determination result of the determination step.

5. A recording medium having a program recorded thereon, wherein, The program causes the computer to execute the information processing method of claim 4.

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