A dual data card loader and unloader

Abstract

The application belongs to the field of avionics, and particularly relates to a double data card loader and unloader working in parallel, which comprises a power management module, a double data card read-write management module, an interface protection module, a USB conversion module, a state monitoring module and an external connector. The application realizes miniaturization and modularization of the data card loader and unloader by using integrated design, and realizes parallel reading and writing of data transmission cards and maintenance data cards through cooperation of an embedded multi-core processor and a real-time operating system, so as to effectively improve the use efficiency and realize high-speed transcription of data.

Description

Technical Field

[0001] This invention belongs to the field of avionics technology, specifically relating to a dual data card loading / unloading device that operates in parallel. Background Technology

[0002] Aircraft data management and recording systems typically employ two cards—a data transmission card and a maintenance data card—to meet the different needs of ground and air crew. The information recorded on the data card must be transferred to the ground station for processing via auxiliary equipment. The ability of the ground to quickly and accurately unload and process the data on the airborne data card is directly related to the timely and effective detection of faults, the reduction of aircraft redeployment time, the guarantee of flight safety, and the improvement of combat effectiveness.

[0003] As a commonly used support equipment in military aircraft, data loading and unloading devices play an important role in ground maintenance, flight accident prevention and investigation and analysis, and flight quality assessment. With the increase in the amount of flight data and the higher requirements for data use, higher demands are being placed on the performance of the corresponding support equipment. Summary of the Invention

[0004] In view of this, the present invention provides a dual data card adder / unloader that operates in parallel. It utilizes an integrated design approach to achieve miniaturization and modularity of the data card adder / unloader. Through the cooperation of an embedded multi-core processor and a real-time operating system, it enables parallel reading and writing operations on the data transmission card and the maintenance data card, effectively improving efficiency and achieving high-speed data transfer.

[0005] To achieve the above-mentioned technical objectives, the specific technical solution adopted by the present invention is as follows:

[0006] A dual data card unloader / unloader that operates in parallel includes:

[0007] The power management module is used for voltage conversion to provide power to the loader;

[0008] The dual data card read / write management module is used to read or write stored data from the data transmission card and maintenance data card of the data management and recording system in parallel.

[0009] The interface protection module is used for hot-swapping protection of the data transmission card and the maintenance data card;

[0010] The USB conversion module is used to enable data communication between the dual data card read / write management module and the host computer.

[0011] The status monitoring module is used to monitor the working status of the loader / unloader, the data transmission card that communicates with the dual data card read / write management module, and the maintenance data card that communicates with the dual data card read / write management module.

[0012] The external connector serves as the physical interface between the loader / unloader and the data transmission card, maintenance data card, and host computer.

[0013] Among them, the dual data card read / write management module communicates with the transmission card and the maintenance data card respectively based on two X4 RapidIO buses.

[0014] Furthermore, the power management module is externally connected to AC220V and is equipped with an AC / DC converter, a DC / DC power chip, and a power control module.

[0015] The AC / DC converter is used to convert the external AC220V to +12V in one step;

[0016] The DC / DC power chip converts the +12V after one conversion into the required voltage for each module in the loader;

[0017] The power control module is used to manage the required voltages;

[0018] The AC / DC converter is equipped with over-temperature protection, over-voltage protection, and over-current protection functions.

[0019] Furthermore, the dual data card read / write management module enables parallel operation of the data transmission card and maintenance data card based on the multi-core SOC and the multi-tasking operation of the embedded real-time operating system.

[0020] The dual data card read / write management module is equipped with an FPGA, which is connected to two DDR3 chips based on a DDR IP controller; the two DDR3 chips form a cache space for reading / writing data from the data transmission card and the maintenance data card.

[0021] The DDR3 chip has a capacity of 1Gbit x16 and a maximum read / write speed of 800MB / s or greater.

[0022] Furthermore, the interface protection module uses the FPGA's power enable function to control the power supply interface of the adder / unloader to the data transmission card and maintenance data card. When the data transmission card and maintenance data card are inserted, the power is turned on only after the data card is in place. When the data card is removed, the power is turned off first, and then the data card is removed.

[0023] Furthermore, the external connector communicates with the FPGA via a switching chip; the FPGA controls the enable signal of the switching chip to make the interface between the switching chip and the external connector a high-impedance state, thereby realizing hot-swappable protection for the data transmission card and the maintenance data card.

[0024] Furthermore, the interface protection module is an AC coupling capacitor, which is connected in series with the RapidIO signal transceiver at the slot end of the external connector.

[0025] Furthermore, the interface protection module is an ESD electrostatic protection device.

[0026] Furthermore, the external connector communicates with the host computer via a USB interface; the USB interface uses a USB converter to communicate with the FPGA and is equipped with an electrostatic discharge protection circuit.

[0027] Furthermore, the status monitoring module is used to periodically collect the working status information of the FPGA's peripherals after the FPGA is powered on and started working, and then package the working status information and send it to the USB conversion module.

[0028] The operating status information includes: DDR3 operating status, USB control operating status and operating voltage, LED status, data transmission card presence status, and maintenance data card presence status.

[0029] Furthermore, the external connector has metal pins of varying lengths on its slot, which are used to ensure that when inserting a card, the signal is connected to the power supply first, and when removing a card, the power supply is disconnected first, and the signal is disconnected later.

[0030] By adopting the above technical solution, the present invention can bring the following beneficial effects:

[0031] The adder / unloader enables parallel read / write functionality for two data cards, improving data transmission efficiency and reducing ground maintenance time. Through interface protection and connector pin length / short pin design, it utilizes multiple measures to achieve hot-swapping functionality for the two data cards. Internal optimization design resolves signal instability issues caused by USB multi-connector adapters and cable length limitations. These measures enhance product reliability, versatility, and maintainability, while also improving data conversion efficiency. Attached Figure Description

[0032] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0033] Figure 1 This is a module architecture diagram of a dual data card adder / unloader that operates in parallel according to a specific embodiment of the present invention. Detailed Implementation

[0034] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0035] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that, in the absence of conflict, the following embodiments and features in the embodiments can be combined with each other. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0036] It should be noted that various aspects of embodiments within the scope of the appended claims are described below. It will be apparent that the aspects described herein can be embodied in a wide variety of forms, and any particular structure and / or function described herein is merely illustrative. Based on this invention, those skilled in the art will understand that one aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number of aspects set forth herein can be used to implement the device and / or practice the method. Additionally, this device and / or method can be implemented using other structures and / or functionalities besides one or more of the aspects set forth herein.

[0037] It should also be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of the present invention. The illustrations only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0038] Furthermore, specific details are provided in the following description to facilitate a thorough understanding of the examples. However, those skilled in the art will understand that the described aspects can be practiced without these specific details.

[0039] In one embodiment of the present invention, a dual data card adder / unloader that operates in parallel is provided, such as... Figure 1 As shown, it includes:

[0040] The power management module is used for voltage conversion to provide power to the loader / unloader;

[0041] The dual data card read / write management module is used to read or write stored data from the data transmission card and maintenance data card of the data management and recording system in parallel.

[0042] The interface protection module is used for hot-swapping protection of the data transmission card and the maintenance data card;

[0043] The USB conversion module is used to enable data communication between the dual data card read / write management module and the host computer.

[0044] The status monitoring module is used to monitor the working status of the adder / unloader, the data transmission card that communicates with the dual data card read / write management module, and the maintenance data card that communicates with the dual data card read / write management module.

[0045] The external connector serves as the physical interface between the loader / unloader and the data transmission card, maintenance data card, and host computer.

[0046] Among them, the dual data card read / write management module communicates with the transmission card and the maintenance data card respectively based on two X4 RapidIO buses.

[0047] In this embodiment, the power management module is externally connected to AC220V and is equipped with an AC / DC converter, a DC / DC power chip, and a power control module.

[0048] An AC / DC converter is used to convert an external AC220V to +12V in one step.

[0049] The DC / DC power chip converts the +12V after one conversion into the required voltage for each module in the loader;

[0050] The power control module is used to manage the required voltages;

[0051] The AC / DC converter is equipped with over-temperature protection, over-voltage protection, and over-current protection.

[0052] In this embodiment, the dual data card read / write management module realizes parallel operation of the data transmission card and the maintenance data card based on the multi-core of the SOC and the multi-task operation of the embedded real-time operating system.

[0053] The dual data card read / write management module is equipped with an FPGA, which is connected to two DDR3 chips based on a DDR IP controller; the two DDR3 chips form a buffer space for reading / writing data from the data transmission card and the maintenance data card.

[0054] The DDR3 chip has a capacity of 1Gbit x16 and a maximum read / write speed of 800MB / s or higher.

[0055] In this embodiment, the interface protection module uses the FPGA's power enable function to control the power supply interface of the data transmission card and maintenance data card to the adder / unloader. When the data transmission card and maintenance data card are inserted, the power is turned on only after the data card is in place. When the data card is removed, the power is turned off first, and then the data card is removed.

[0056] In this embodiment, the external connector communicates with the FPGA based on a switching chip; the FPGA controls the enable signal of the switching chip to make the interface between the switching chip and the external connector a high-impedance state, thereby realizing hot-swappable protection for the data transmission card and the maintenance data card.

[0057] In this embodiment, the interface protection module is an AC coupling capacitor, which is connected in series with the transmit and receive terminals of the RapidIO signal at the slot end of the external connector.

[0058] In this embodiment, the interface protection module is an ESD electrostatic protection device.

[0059] In this embodiment, the external connector communicates with the host computer via a USB interface; the USB interface uses a USB converter to communicate with the FPGA and is equipped with an electrostatic discharge protection circuit.

[0060] In this embodiment, the status monitoring module is used to periodically collect the working status information of the FPGA peripherals after the FPGA is powered on and started working, and then package the working status information and send it to the USB conversion module.

[0061] The operating status information includes: DDR3 operating status, USB control operating status and operating voltage, LED status, data transfer card status, and maintenance data card status.

[0062] In this embodiment, the slot of the external connector is provided with metal pins of different lengths to ensure that when inserting the card, the signal is connected to the power supply first, and when removing the card, the power supply is disconnected first, and the signal is disconnected later.

[0063] The dual data card adder / unloader operating in parallel in this embodiment mainly includes a power management module, a data card read / write management module, an interface protection module, a USB conversion module, a status monitoring module, and an external connector.

[0064] The following provides further explanation.

[0065] 1. Power Management Module

[0066] The external power supply is AC220V, so an AC / DC power module is used internally to perform the first power conversion, converting AC220V to +12V. Then, a DC / DC power chip performs the second power conversion from +12V to +5V, while enabling the +5V power supply to power the various functional modules inside the loader. The selected power module has over-temperature protection, over-voltage protection, and over-current protection functions.

[0067] 2. Data Card Read / Write Management Module

[0068] Two data cards communicate via two X4 RapidIO buses, enabling read and write operations on the data transmission card and maintenance data card. Parallel operation of the data transmission card and maintenance data card is achieved through the multi-core SOC and the multi-tasking operation of the embedded real-time operating system.

[0069] To ensure normal reading of large amounts of data, a circuit design using two DDR3 chips is employed. The FPGA connects to the DDR3 chips via a DDRIP controller, and external memory increases the cache space for reading / writing data. For capacity, a 1Gbit x 16-bit memory chip is selected, with a maximum read / write speed exceeding 800MB / s.

[0070] 3. Interface protection module

[0071] To enable hot-swapping, multiple circuit protection measures were designed.

[0072] One approach is to use the FPGA's power enable module to control the power supply interfaces on the two data card connectors to achieve hot-swapping. When a data card is inserted, power is turned on only after the data card is in place; when a data card is removed, power is turned off first, and then the data card is removed, thus protecting the data card signal interface.

[0073] Secondly, the hot-swap module is ensured by adding a RapidIO switching chip between the FPGA's GTX (RapidIO) interface and the data card slot connector. Each data card has one switching chip. The FPGA controls the enable signal of the switching chip to set its RapidIO interface at the card slot end to a high-impedance state, protecting the interface. When there is no data loading / unloading operation, the RapidIO interface at the card slot end is set to a high-impedance state; during data loading / unloading operations, the RapidIO interface at the card slot end is set to normal communication state. When the RapidIO interface at the card slot end is in a high-impedance state, the data card can be hot-swapped at any time.

[0074] Thirdly, in order to further protect the RapidIO interface of the adder / unloader during multiple hot-swapping of the data card, the transmit and receive ends of the RapidIO signal at the data card slot end of the core board are designed with AC coupling capacitors in series after the revision.

[0075] Fourth, each pair of differential lines at the transmitting and receiving ends of the RapidIO signal at the card slot end is connected in parallel with an ESD electrostatic protection device. Using ESD electrostatic protection devices can meet the test requirements of ±8kV for contact discharge and ±15kV for air discharge. The ESD device ground is connected to the internal digital ground of the loader / unloader.

[0076] 4. USB conversion module

[0077] The USB interface design uses a USB controller connected to the FPGA, and the USB external interface is designed with an electrostatic discharge protection circuit to ensure the safety and reliability of the device.

[0078] To address issues such as unstable USB data transfer and dropped connections on some computers when using USB 3.0 cables longer than a certain distance due to insufficient drive capability of the USB 3.0 interface, the USB 3.0 signal is directly led out to the rear panel of the adder / unloader via a USB 3.0 female connector soldered to the core board. This solves the problem of signal impedance mismatch caused by multiple connector transitions from the core board to the backplane, and then through the backplane connector to the rear panel, which affects signal integrity and leads to unreliable communication.

[0079] 5. Status monitoring module

[0080] It has a status monitoring function. After the FPGA is powered on, it periodically collects the working status information of peripherals, such as DDR3 working status, USB control working status and working voltage, LED status, disk in position status, door opening and closing status, etc. Then, it packages the collected information and sends it to the USB controller, which then reports it to the host computer through the USB interface.

[0081] 6. External connectors

[0082] The card slot connector that interacts with the data card is equipped with metal pins of varying lengths. The long pins serve as the communication signal carrier, while the short pins serve as the power transmission carrier. This allows for signal connection before power connection when inserting the card, and power disconnection before signal disconnection when removing the card, further enhancing hot-swap protection. The data card is also connected to the internal digital ground of the adder / unloader, achieving a shared ground design between the data card and the adder / unloader.

[0083] The interface for interacting with the host computer uses a standard USB 3.0, which meets the requirement of an unloading speed of no less than 200MB / s.

[0084] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A dual data card adder / unloader operating in parallel, characterized in that, include: The power management module is used for voltage conversion to provide power to the loader. It is connected to an external AC220V and is used to convert AC220V to +12V via AC / DC, and then to the operating voltage of each module via DC / DC. It also has over-temperature, over-voltage and over-current protection functions. The dual data card read / write management module is used to read or write the stored data of the data transmission card and maintenance data card of the data management and recording system in parallel. It communicates with the airborne data transmission card and maintenance data card respectively based on two independent X4 RapidIO buses. The parallel read / write of the two data cards is realized through SOC multi-core and embedded real-time operating system multi-tasking. The built-in FPGA and two DDR3 chips form a high-speed cache. The interface protection module is used for hot-plug protection of the data transmission card and the maintenance data card. The FPGA-based power enable function controls the power supply interface of the data transmission card and the maintenance data card to the adder / unloader. When the data transmission card and the maintenance data card are inserted, the power is turned on after the data card is in place. When the data card is removed, the power is turned off first and then the data card is removed. The USB conversion module is used to enable data communication between the dual data card read / write management module and the host computer. The status monitoring module is used to monitor the working status of the loader, the data transmission card that communicates with the dual data card read / write management module, and the maintenance data card that communicates with the dual data card read / write management module. It is used to periodically collect the working status information of the FPGA peripherals after the FPGA is powered on and start working, and send the working status information to the USB conversion module after packaging it. The operational status information includes: DDR3 operational status, USB control operational status and operating voltage, LED status, data transfer card presence status, and maintenance data card presence status. The external connector serves as the physical interface between the loader / unloader and the data transmission card, maintenance data card, and host computer.

2. The dual data card adder / unloader operating in parallel according to claim 1, characterized in that, The external connector communicates with the FPGA via a switching chip; the FPGA controls the enable signal of the switching chip to make the interface between the switching chip and the external connector a high-impedance state, thereby realizing hot-swappable protection for the data transmission card and the maintenance data card.

3. The dual data card loading / unloading device operating in parallel according to claim 1, characterized in that, The interface protection module is an AC coupling capacitor, which is connected in series with the external connector. The card slot is the transceiver for RapidIO signals.

4. The dual data card adder / unloader operating in parallel according to claim 1, characterized in that, The interface protection module is an ESD electrostatic protection device.

5. The dual data card loading / unloading device operating in parallel according to claim 4, characterized in that, The external connector communicates with the host computer via a USB interface; the USB interface uses a USB converter to communicate with the FPGA and is equipped with an electrostatic discharge protection circuit.

6. The dual data card loading / unloading device operating in parallel according to claim 5, characterized in that, The external connector has metal pins of varying lengths in its slot, which are used to ensure that when inserting a card, the signal is connected to the power supply first, and when removing a card, the power supply is disconnected first, and the signal is disconnected later.

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