Chip mounting position adjustment method, device, medium and electronic equipment

Abstract

Embodiments of the present application provide a chip mounting position adjustment method, device, medium and electronic equipment, the adjustment method comprising: obtaining the offset of the actual mounting position of each chip in a first group of chips; obtaining the average offset of the actual mounting position of each chip in the first group of chips according to the offset of the actual mounting position of each chip in the first group of chips; and adjusting the mounting position of the chip according to the average offset of the actual mounting position of each chip in the first group of chips. The present application can improve the mounting accuracy of the chip mounting position.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and more specifically, to a method, apparatus, computer-readable storage medium, and electronic device for adjusting the chip mounting position. Background Technology

[0002] With the trend towards miniaturization and thinning of chip products, and the increasing prevalence of chip misalignment and iteration structures, the chip misalignment size is approaching the limits of equipment capabilities. Furthermore, during continuous operation of the pick-and-place machine, the center value of the placement position deviation continues to shift.

[0003] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of the present invention, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0004] The purpose of this invention is to provide a method, apparatus, computer-readable storage medium, and electronic device for adjusting the chip mounting position.

[0005] Other features and advantages of the invention will become apparent from the following detailed description, or may be learned in part by practice of the invention.

[0006] According to a first aspect of the present invention, a method for adjusting the chip mounting position is provided, comprising:

[0007] Obtain the offset of the actual installation position of each chip in the first group of chips;

[0008] The average offset of the actual installation position of each chip in the first group of chips is obtained based on the offset of the actual installation position of each chip in the first group of chips.

[0009] The chip mounting positions are adjusted based on the average offset of the actual mounting positions of each chip in the first group of chips.

[0010] In one embodiment, the adjustment method further includes:

[0011] Obtain the offset of the actual installation position of each chip in the second group of chips;

[0012] The average offset of the actual installation position of each chip in the second group of chips is obtained based on the offset of the actual installation position of each chip in the second group of chips.

[0013] The chip mounting positions are adjusted based on the average offset of the actual mounting positions of each chip in the second group of chips.

[0014] In one embodiment, obtaining the offset of the actual installation position of each chip in the first group of chips includes:

[0015] Obtain the initial calibration position of each chip in the first group of chips;

[0016] Obtain the actual installation location of each chip in the first group of chips;

[0017] The offset of the actual installation position of each chip in the first group of chips is obtained based on the initial calibration position of each chip in the first group of chips and the actual installation position of each chip in the first group of chips.

[0018] In one embodiment, adjusting the mounting position of the chips based on the average offset of the actual mounting positions of each chip in the first group of chips includes:

[0019] The mounting elements for mounting the chips are adjusted according to a first proportion of the average offset of the actual mounting positions of each chip in the first group of chips.

[0020] In one embodiment, adjusting the mounting element for mounting the chips according to a first proportion of the average offset of the actual mounting positions of each chip in the first group of chips includes:

[0021] The mounting elements for mounting the chips are adjusted based on half of the average offset of the actual mounting positions of each chip in the first group of chips.

[0022] In one embodiment, adjusting the mounting element for mounting the chips according to a first proportion of the average offset of the actual mounting positions of each chip in the first group of chips includes:

[0023] The nozzle or robotic arm for mounting the chips is adjusted according to a first proportion of the average offset of the actual mounting positions of each chip in the first group of chips.

[0024] In one embodiment, the offset of the actual mounting position of each chip in the first group of chips includes displacement offset and angular offset. Adjusting the mounting position of the chips based on the average offset of the actual mounting positions of each chip in the first group of chips includes:

[0025] The mounting positions of the chips are adjusted based on the average displacement and average angle offset of the actual mounting positions of each chip in the first group of chips.

[0026] In one embodiment, adjusting the mounting position of the chips based on the average displacement and average angular offset of the actual mounting positions of each chip in the first group of chips includes:

[0027] The mounting elements for mounting the chips are adjusted according to a first ratio of the average displacement offset and the average angular offset of the actual mounting positions of each chip in the first group of chips.

[0028] In one embodiment, adjusting the mounting element for mounting the chips based on a first ratio of the average displacement offset to the average angular offset of the actual mounting positions of each chip in the first group of chips includes:

[0029] The adjustment amounts corresponding to the displacement adjustment motor and the angle adjustment motor of the mounting element are obtained based on the average displacement offset and average angle offset of the actual installation positions of each chip in the first group of chips.

[0030] The mounting element is adjusted according to the adjustment amount corresponding to the displacement adjustment motor and the angle adjustment motor of the mounting element.

[0031] In one embodiment, adjusting the mounting element according to the adjustment amount corresponding to the displacement adjustment motor and the adjustment amount corresponding to the angle adjustment motor includes:

[0032] The number of pulses of the displacement adjustment motor and the number of pulses of the angle adjustment motor of the mounting element are obtained according to the corresponding adjustment amount of the displacement adjustment motor and the corresponding adjustment amount of the angle adjustment motor of the mounting element, respectively.

[0033] The mounting element is adjusted according to the displacement adjustment motor pulse count and the angle adjustment motor pulse count.

[0034] In one embodiment, the displacement offset includes a first direction displacement offset and a second direction displacement offset. Adjusting the chip mounting position based on the average displacement offset and average angular offset of the actual mounting positions of each chip in the first group of chips includes:

[0035] The mounting positions of the chips are adjusted based on the average first-direction displacement, average second-direction displacement, and average angular displacement of the actual mounting positions of each chip in the first group of chips.

[0036] In one embodiment, the adjustment method further includes:

[0037] An alarm is triggered when the offset of one of the chips in the first group exceeds the control limit.

[0038] According to a second aspect of the present invention, a chip mounting apparatus is provided, comprising:

[0039] The first acquisition module is configured to acquire the offset of the actual installation position of each chip in the first group of chips;

[0040] The second acquisition module is configured to acquire the average offset of the actual installation position of each chip in the first group of chips based on the offset of the actual installation position of each chip in the first group of chips.

[0041] The adjustment module is configured to adjust the installation position of the chips based on the average offset of the actual installation position of each chip in the first group of chips.

[0042] According to a third aspect of the present invention, an electronic device is provided, comprising:

[0043] One or more processors;

[0044] A storage device configured to store one or more programs, which, when executed by one or more processors, cause the one or more processors to perform the method as described in any of the above embodiments.

[0045] According to a fourth aspect of the present invention, a computer-readable storage medium is provided, the computer-readable storage medium storing a computer program that, when executed by a processor, implements the method as described in any of the above embodiments.

[0046] The technical solutions provided by the embodiments of the present invention may include the following beneficial effects:

[0047] In some embodiments of the present invention, the mounting position of the chips is adjusted according to the average offset of the actual mounting position of each chip in the first group of chips, thereby improving the mounting accuracy of the chip mounting position and further improving the product yield.

[0048] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit the invention. Attached Figure Description

[0049] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention. It is obvious that the drawings described below are merely some embodiments of the invention, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort. In the drawings:

[0050] Figure 1 This illustration schematically depicts a method for adjusting the chip mounting position according to an exemplary embodiment of the present invention;

[0051] Figure 2 This is a schematic diagram of the chip calibration position according to an embodiment of this disclosure;

[0052] Figure 3 This is a schematic diagram of the chip calibration position and actual position according to an embodiment of this disclosure;

[0053] Figure 4 A schematic diagram of the chip mounting process according to an embodiment of the present disclosure is shown;

[0054] Figure 5 A schematic flowchart of a chip mounting position adjustment method according to an embodiment of the present disclosure is shown;

[0055] Figure 6 This diagram illustrates the adjustment principle of the servo motor of the mounting element in a chip mounting position adjustment method according to an embodiment of the present disclosure.

[0056] Figure 7 This diagram illustrates the statistical results of adjusting the chip mounting position using the average offset of multiple chip groups in one embodiment of the present disclosure.

[0057] Figure 8 An adjustment device for chip mounting position according to an embodiment of the present invention is shown;

[0058] Figure 9 A schematic diagram of a computer system suitable for implementing embodiments of the present invention is shown. Detailed Implementation

[0059] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that the invention will be more comprehensive and complete, and will fully convey the concept of exemplary embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and therefore their detailed description will be omitted.

[0060] Although this specification uses relative terms such as "up" and "down" to describe the relative relationship of one component of an icon to another, these terms are used only for convenience, such as the orientation of the examples shown in the accompanying drawings. It is understood that if the modules of the icon are flipped so that they are upside down, the component described as "up" will become the component described as "down." Other relative terms, such as "high," "low," "top," "bottom," "left," and "right," have similar meanings. When a structure is "up" of another structure, it may mean that the structure is integrally formed on the other structure, or that the structure is "directly" placed on the other structure, or that the structure is "indirectly" placed on the other structure through another structure.

[0061] The terms “a,” “one,” and “the” are used to indicate the existence of one or more elements / components / etc.; the terms “including” and “having” are used to indicate an open-ended meaning of inclusion and that there may be other elements / components / etc. in addition to the listed elements / components / etc.

[0062] Current die-bonding equipment has the ability to detect the deviation of each die's position from its initial set position during die placement. However, this equipment can only monitor the positional deviation in real time and cannot automatically correct the placement accuracy. When the die-bonding equipment's 3σ capability is significantly higher than the set deviation, it can effectively ensure stable process quality; however, when the 3σ capability is close to the set deviation, it can easily lead to poor process quality and substandard Cpk (process capability) performance. As products become increasingly complex, the placement accuracy requirements for die-bonding equipment such as pick-and-place machines are also increasing. During continuous operation, the center value of the die placement position deviation continuously shifts.

[0063] Cpk refers to the capability index of a process to meet processing quality requirements. It measures the inherent consistency of a process and represents the minimum fluctuation under the most stable state. When the process is in a steady state, 99.73% of the product's quality characteristic values ​​are distributed within the interval [μ-3σ, μ+3σ] (where μ is the population mean of the product characteristic values ​​and σ is the population standard deviation of the product characteristic values). In other words, almost all product characteristic values ​​fall within the range of 6σ. Therefore, 6σ (also known as 3σ) is commonly used to represent process capability, and a smaller value is better.

[0064] To address the above problems, this invention provides a method for adjusting the chip mounting position, which improves the accuracy of the chip mounting position and thus increases the product yield.

[0065] Figure 1 This illustration schematically depicts a method for adjusting the chip mounting position according to an exemplary embodiment of the present invention. The method provided by this embodiment can be executed by any electronic device with computer processing capabilities, such as a terminal device and / or a server. Reference Figure 1 This method for adjusting the chip mounting position is applicable to chip mounting and may include the following steps:

[0066] Step S102: Obtain the offset of the actual installation position of each chip in the first group of chips;

[0067] Step S104: Obtain the average offset of the actual installation position of each chip in the first group of chips based on the offset of the actual installation position of each chip in the first group of chips.

[0068] Step S106: Adjust the mounting position of the chips according to the average offset of the actual mounting positions of each chip in the first group of chips.

[0069] In the technical solution of this invention embodiment, the average offset of the actual installation position of each chip in the first group of chips is obtained based on the offset of the actual installation position of each chip in the first group of chips, and the installation position of the chips is adjusted based on the average offset of the actual installation position of each chip in the first group of chips, thereby improving the installation accuracy of the chip installation position and further improving the product yield.

[0070] In step S102, the offset of the actual installation position of each chip in the first group of chips is obtained.

[0071] In this step, the terminal device and / or server obtain the offset of the actual installation position of each chip in the first group of chips. In one embodiment, obtaining the offset of the actual installation position of each chip in the first group of chips includes:

[0072] Obtain the initial calibration position of each chip in the first group of chips;

[0073] Obtain the actual installation location of each chip in the first group of chips;

[0074] The offset of the actual installation position of each chip in the first group of chips is obtained based on the initial calibration position of each chip in the first group of chips and the actual installation position of each chip in the first group of chips.

[0075] In one embodiment, the number of chips in the first group is, for example, 20, but this disclosure is not limited thereto; the number of chips in the first group may be, for example, more than one.

[0076] In step S104, the average offset of the actual installation position of each chip in the first group of chips is obtained based on the offset of the actual installation position of each chip in the first group of chips.

[0077] In this step, the terminal device and / or server obtain the average offset of the actual installation positions of each chip in the first group of chips based on the offset of the actual installation positions of each chip in the first group of chips. In one embodiment, after obtaining the offset of the actual installation positions of each chip in the first group of chips, the offsets of the actual installation positions of each chip in the first group of chips can be added together and then divided by the number of chips in the first group of chips to obtain the average offset of each chip in the first group of chips. However, this disclosure is not limited to this, and other methods can be used to obtain the average offset of each chip in the first group of chips.

[0078] In step S106, the mounting position of the chips is adjusted according to the average offset of the actual mounting position of each chip in the first group of chips.

[0079] In this step, the terminal device and / or server adjust the mounting position of the chips based on the average offset of the actual mounting positions of each chip in the first group of chips. In one embodiment, adjusting the mounting position of the chips based on the average offset of the actual mounting positions of each chip in the first group of chips includes:

[0080] The mounting elements for mounting the chips are adjusted according to a first proportion of the average offset of the actual mounting positions of each chip in the first group of chips.

[0081] In one embodiment, adjusting the mounting element for mounting the chips according to a first proportion of the average offset of the actual mounting positions of each chip in the first group of chips includes:

[0082] The mounting elements for mounting the chips are adjusted based on half (50%) of the average offset of the actual mounting positions of each chip in the first group of chips. In this embodiment, the first ratio is 50%, but this disclosure is not limited thereto. In other embodiments, the first ratio can be other percentages such as 10%, 20%, 30%, 40%, etc.

[0083] In one embodiment, adjusting the mounting element for mounting the chips according to a first proportion of the average offset of the actual mounting positions of each chip in the first group of chips includes:

[0084] The nozzle or robotic arm for mounting the chips is adjusted according to a first proportion of the average offset of the actual mounting positions of each chip in the first group of chips. In this embodiment, the mounting element is, for example, a nozzle or a robotic arm, but this disclosure is not limited thereto, and the mounting element may also be other devices besides a nozzle or a robotic arm.

[0085] In one embodiment, the offset of the actual mounting position of each chip in the first group of chips includes displacement offset and angular offset. Adjusting the mounting position of the chips based on the average offset of the actual mounting positions of each chip in the first group of chips includes:

[0086] The mounting positions of the chips are adjusted based on the average displacement and average angle offset of the actual mounting positions of each chip in the first group of chips.

[0087] Figure 2 This is a schematic diagram of the chip calibration position according to an embodiment of the present disclosure.

[0088] Figure 3This is a schematic diagram of the chip calibration position and actual position according to an embodiment of this disclosure.

[0089] refer to Figure 2 and Figure 3 The chip offset includes two aspects:

[0090] Displacement offset along the horizontal (X) axis and the vertical (Y) axis;

[0091] Angular offset – Angular offset will cause additional displacement in the horizontal and vertical axes;

[0092]

[0093]

[0094] Xt is the 3σ offset in the X direction;

[0095] Yt is the 3σ offset in the Y direction;

[0096] L - The distance from the center of the chip to the opposite corner;

[0097] θ - Rotation angle 3σ offset;

[0098] The angle between the chip's diagonal and the horizontal axis.

[0099] in, Figure 2 and Figure 3 The offset in the diagram is the offset of one of the four vertices of the chip represented by the quadrilateral.

[0100] In one embodiment, adjusting the mounting position of the chips based on the average displacement and average angular offset of the actual mounting positions of each chip in the first group of chips includes:

[0101] The mounting elements for mounting the chips are adjusted according to a first ratio of the average displacement offset and the average angular offset of the actual mounting positions of each chip in the first group of chips.

[0102] In one embodiment, adjusting the mounting element for mounting the chips based on a first ratio of the average displacement offset to the average angular offset of the actual mounting positions of each chip in the first group of chips includes:

[0103] The adjustment amounts corresponding to the displacement adjustment motor and the angle adjustment motor of the mounting element are obtained based on the average displacement offset and average angle offset of the actual installation positions of each chip in the first group of chips.

[0104] The mounting element is adjusted according to the adjustment amount corresponding to the displacement adjustment motor and the angle adjustment motor of the mounting element.

[0105] Figure 4 A schematic diagram of the chip installation process according to an embodiment of the present disclosure is shown.

[0106] refer to Figure 4 The surface mount technology (SMT) process includes:

[0107] 1. The chip mounter's loading mechanism picks up a new magazine, and the unloading mechanism picks up a new empty magazine;

[0108] 2. After the mounting components such as the nozzle pick up the chip from the wafer, the chip is sequentially mounted onto the substrate;

[0109] 3. The substrates covered with chips are conveyed to the empty magazine of the unloading mechanism until all the substrates in the magazine of the loading mechanism are covered, and then unloading is performed.

[0110] Figure 5 A schematic flowchart of a chip mounting position adjustment method according to an embodiment of the present disclosure is shown.

[0111] refer to Figure 5 The initial position is determined by the marked patch position.

[0112] At the start of a new magazine, measure the offset of each chip patch;

[0113] Based on data from multiple previous chips (e.g., the first 20), the average array deviation is calculated;

[0114] The adjustment value is set to half of the average deviation (using the bisection method to achieve stability). The adjustment value is then fed back to the control device of the mounting components, such as the pick-up nozzle, which adjusts the angle and horizontal displacement of the nozzle.

[0115] After adjustment, the patch deviation was recalculated and the average deviation level was recalculated.

[0116] When the magazine is being fed, the adjustment value is reset to zero.

[0117] Figure 6 This diagram illustrates the adjustment principle of the servo motor of the mounting element in a chip mounting position adjustment method according to an embodiment of the present disclosure.

[0118] refer to Figure 5 and Figure 6 In one embodiment, adjusting the mounting element according to the adjustment amount corresponding to the displacement adjustment motor and the adjustment amount corresponding to the angle adjustment motor includes:

[0119] The number of pulses of the displacement adjustment motor and the number of pulses of the angle adjustment motor of the mounting element are obtained according to the corresponding adjustment amount of the displacement adjustment motor and the corresponding adjustment amount of the angle adjustment motor of the mounting element, respectively.

[0120] The mounting element is adjusted according to the displacement adjustment motor pulse count and the angle adjustment motor pulse count.

[0121] In one embodiment, the displacement offset includes a first direction displacement offset and a second direction displacement offset. Adjusting the chip mounting position based on the average displacement offset and average angular offset of the actual mounting positions of each chip in the first group of chips includes:

[0122] The mounting positions of the chips in the first group are adjusted based on the average displacement offset in the first direction, the average displacement offset in the second direction, and the average angular offset of the actual mounting positions of each chip. The first direction is, for example,... Figure 2 The X-axis direction in the middle, the second direction is, for example, the X-axis direction. Figure 2 The Y-axis direction in the diagram.

[0123] refer to Figure 5 In one embodiment, an alarm is triggered when the offset of one of the chips in the first group of chips exceeds the control limit.

[0124] In one embodiment, the method for adjusting the chip mounting position of this application further includes:

[0125] Obtain the offset of the actual installation position of each chip in the second group of chips;

[0126] The average offset of the actual installation position of each chip in the second group of chips is obtained based on the offset of the actual installation position of each chip in the second group of chips.

[0127] The chip mounting positions are adjusted based on the average offset of the actual mounting positions of each chip in the second group of chips.

[0128] In addition, the chip mounting position adjustment method of this application also uses the average offset of the actual mounting position of each chip in the second group of chips to adjust the chip mounting position. By adopting the idea of ​​continuous iteration, the mounting accuracy of the chip mounting position can be continuously improved, thereby improving the product yield.

[0129] Figure 7 This diagram illustrates the statistical results of adjusting the chip mounting position using the average offset of multiple chip groups in one embodiment of this disclosure. According to... Figure 7 The statistical results clearly show that the method in this application can effectively improve the chip mounting accuracy.

[0130] The following describes an embodiment of the apparatus of the present invention, which can be used to perform the wafer position measurement method described above.

[0131] Figure 8An adjustment device 800 for adjusting the chip mounting position according to an embodiment of the present invention is shown.

[0132] like Figure 8 As shown, a chip mounting position adjustment device 800 provided according to an embodiment of the present invention may include:

[0133] The first acquisition module 810 is configured to acquire the offset of the actual installation position of each chip in the first group of chips;

[0134] The second acquisition module 820 is configured to acquire the average offset of the actual installation position of each chip in the first group of chips based on the offset of the actual installation position of each chip in the first group of chips.

[0135] The adjustment module 830 is configured to adjust the installation position of the chips based on the average offset of the actual installation position of each chip in the first group of chips.

[0136] Since the functional modules of the chip mounting position adjustment device in the example embodiment of the present invention correspond to the steps of the chip mounting position adjustment method in the example embodiment described above, for details not disclosed in the device embodiment of the present invention, please refer to the embodiment of the chip mounting position adjustment method described above.

[0137] In the chip mounting position adjustment device provided in this embodiment of the invention, the mounting position of the chip can be adjusted according to the average offset of the actual mounting position of each chip in the first group of chips, thereby improving the mounting accuracy of the chip mounting position.

[0138] The following is for reference. Figure 9 It shows a schematic diagram of the structure of a computer system 900 suitable for implementing an electronic device according to embodiments of the present invention. Figure 9 The computer system 900 of the electronic device shown is merely an example and should not impose any limitation on the functionality and scope of use of the embodiments of the present invention.

[0139] like Figure 9 As shown, the computer system 900 includes a central processing unit (CPU) 901, which can perform various appropriate actions and processes based on programs stored in read-only memory (ROM) 902 or programs loaded from storage section 908 into random access memory (RAM) 903. The RAM 903 also stores various programs and data required for system operation. The CPU 901, ROM 902, and RAM 903 are interconnected via a bus 904. An input / output (I / O) interface 905 is also connected to the bus 904.

[0140] The following components are connected to I / O interface 905: an input section 906 including a keyboard, mouse, etc.; an output section 907 including a cathode ray tube (CRT), liquid crystal display (LCD), etc., and speakers, etc.; a storage section 908 including a hard disk, etc.; and a communication section 909 including a network interface card such as a LAN card, modem, etc. The communication section 909 performs communication processing via a network such as the Internet. A drive 910 is also connected to I / O interface 905 as needed. A removable medium 911, such as a disk, optical disk, magneto-optical disk, semiconductor memory, etc., is installed on drive 910 as needed so that computer programs read from it can be installed into storage section 908 as needed.

[0141] In particular, according to embodiments of the present invention, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments of the present invention include a computer program product comprising a computer program carried on a computer-readable storage medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via communication section 909, and / or installed from removable medium 911. When the computer program is executed by central processing unit (CPU) 901, it performs the functions defined above in the system of this application.

[0142] It should be noted that the computer-readable storage medium shown in this invention can be a computer-readable signal medium, a computer-readable storage medium, or any combination thereof. The computer-readable storage medium can be, for example,—but not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of a computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this invention, the computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. In this invention, a computer-readable signal medium can include a data signal propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals can take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. Computer-readable signal media can also be any computer-readable storage medium other than a computer-readable storage medium, which can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the computer-readable storage medium can be transmitted using any suitable medium, including but not limited to: wireless, wire, optical fiber, RF, etc., or any suitable combination thereof.

[0143] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram or flowchart, and combinations of blocks in a block diagram or flowchart, may be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0144] The units described in the embodiments of the present invention can be implemented in software or hardware, and the described units can also be located in a processor. The names of these units do not necessarily limit the specific unit itself.

[0145] In another aspect, this application also provides a computer-readable storage medium, which may be included in the electronic device described in the above embodiments; or it may exist independently and not assembled into the electronic device. The computer-readable storage medium carries one or more programs that, when executed by the electronic device, cause the electronic device to implement the chip mounting position adjustment method as described in the above embodiments.

[0146] For example, the electronic device described above can achieve the following: Figure 1 The steps shown are as follows.

[0147] It should be noted that although several modules or units of the device for performing actions have been mentioned in the detailed description above, this division is not mandatory. In fact, according to embodiments of the present invention, the features and functions of two or more modules or units described above can be embodied in one module or unit. Conversely, the features and functions of one module or unit described above can be further divided and embodied by multiple modules or units.

[0148] Through the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments described herein can be implemented by software or by combining software with necessary hardware. Therefore, the technical solutions according to the embodiments of the present invention can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (such as a CD-ROM, USB flash drive, portable hard drive, etc.) or on a network, including several instructions to cause a computing device (such as a personal computer, server, touch terminal, or network device, etc.) to execute the method according to the embodiments of the present invention.

[0149] Other embodiments of the invention will readily occur to those skilled in the art upon consideration of the specification and practice of the disclosure herein. This application is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of the invention are indicated by the following claims.

[0150] It should be understood that the present invention is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of the invention is limited only by the appended claims.

Claims

1. A method for adjusting the chip mounting position, characterized in that, include: Obtain the offset of the actual installation position of each chip in the first group of chips; The average offset of the actual installation position of each chip in the first group of chips is obtained based on the offset of the actual installation position of each chip in the first group of chips. The chip mounting positions are adjusted based on the average offset of the actual mounting positions of each chip in the first group of chips; The adjustment of the chip mounting positions based on the average offset of the actual mounting positions of each chip in the first group of chips includes: The mounting elements for mounting the chips are adjusted according to a first proportion of the average offset of the actual mounting positions of each chip in the first group of chips.

2. The method according to claim 1, characterized in that, Also includes: Obtain the offset of the actual installation position of each chip in the second group of chips; The average offset of the actual installation position of each chip in the second group of chips is obtained based on the offset of the actual installation position of each chip in the second group of chips. The chip mounting positions are adjusted based on the average offset of the actual mounting positions of each chip in the second group of chips.

3. The method according to claim 1, characterized in that, Obtaining the offset of the actual installation position of each chip in the first group of chips includes: Obtain the initial calibration position of each chip in the first group of chips; Obtain the actual installation location of each chip in the first group of chips; The offset of the actual installation position of each chip in the first group of chips is obtained based on the initial calibration position of each chip in the first group of chips and the actual installation position of each chip in the first group of chips.

4. The method according to claim 1, characterized in that, Adjusting the mounting elements for mounting the chips based on a first proportion of the average offset of the actual mounting positions of each chip in the first group of chips includes: The mounting elements for mounting the chips are adjusted based on half of the average offset of the actual mounting positions of each chip in the first group of chips.

5. The method according to claim 1, characterized in that, Adjusting the mounting elements for mounting the chips based on a first proportion of the average offset of the actual mounting positions of each chip in the first group of chips includes: The nozzle or robotic arm for mounting the chips is adjusted according to a first proportion of the average offset of the actual mounting positions of each chip in the first group of chips.

6. The method according to claim 1, characterized in that, The actual installation position offset of each chip in the first group of chips includes displacement offset and angular offset. Adjusting the chip installation position based on the average actual installation position offset of each chip in the first group of chips includes: The mounting positions of the chips are adjusted based on the average displacement and average angle offset of the actual mounting positions of each chip in the first group of chips.

7. The method according to claim 6, characterized in that, The chip mounting positions are adjusted based on the average displacement and average angular offset of the actual mounting positions of each chip in the first group of chips, including: The mounting elements for mounting the chips are adjusted according to a first ratio of the average displacement offset and the average angular offset of the actual mounting positions of each chip in the first group of chips.

8. The method according to claim 7, characterized in that, The adjustment of the mounting elements for mounting the chips is based on a first ratio of the average displacement offset and the average angular offset of the actual mounting positions of each chip in the first group of chips, including: The adjustment amounts corresponding to the displacement adjustment motor and the angle adjustment motor of the mounting element are obtained based on the average displacement offset and average angle offset of the actual installation positions of each chip in the first group of chips. The mounting element is adjusted according to the adjustment amount corresponding to the displacement adjustment motor and the angle adjustment motor of the mounting element.

9. The method according to claim 8, characterized in that, Adjusting the mounting element according to the adjustment amount corresponding to the displacement adjustment motor and the angle adjustment motor of the mounting element includes: The number of pulses of the displacement adjustment motor and the number of pulses of the angle adjustment motor of the mounting element are obtained according to the corresponding adjustment amount of the displacement adjustment motor and the corresponding adjustment amount of the angle adjustment motor of the mounting element, respectively. The mounting element is adjusted according to the displacement adjustment motor pulse count and the angle adjustment motor pulse count.

10. The method according to claim 6, characterized in that, The displacement offset includes a first direction displacement offset and a second direction displacement offset. Adjusting the chip mounting position based on the average displacement offset and average angular offset of the actual mounting positions of each chip in the first group of chips includes: The mounting positions of the chips are adjusted based on the average first-direction displacement, average second-direction displacement, and average angular displacement of the actual mounting positions of each chip in the first group of chips.

11. The method according to claim 1, characterized in that, Also includes: An alarm is triggered when the offset of one of the chips in the first group exceeds the control limit.

12. A chip mounting device, characterized in that, include: The first acquisition module is configured to acquire the offset of the actual installation position of each chip in the first group of chips; The second acquisition module is configured to acquire the average offset of the actual installation position of each chip in the first group of chips based on the offset of the actual installation position of each chip in the first group of chips. The adjustment module is configured to adjust the mounting position of the chips based on the average offset of the actual mounting positions of each chip in the first group of chips. This adjustment includes: The mounting elements for mounting the chips are adjusted according to a first proportion of the average offset of the actual mounting positions of each chip in the first group of chips.

13. An electronic device, characterized in that, include: One or more processors; A storage device configured to store one or more programs, which, when executed by one or more processors, cause the one or more processors to implement the method as described in any one of claims 1 to 11.

14. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by a processor, it implements the method as described in any one of claims 1 to 11.

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