High heat dissipation three-dimensional fan-out packaging structure and molding method

Abstract

The present invention relates to a high heat dissipation three-dimensional fan-out packaging structure and a molding method. It comprises a plastic-encapsulated first substrate and a plastic-encapsulated second substrate, wherein the plastic-encapsulated second substrate is aligned and assembled with the plastic-encapsulated first substrate to configure and form a desired package, wherein, in the package, an upper interconnected chip unit and a lower interconnected chip unit are aligned and contacted and then adapted and interconnected to configure and form a desired chip unit-to-chip unit interconnection, and the formed chip unit-to-chip unit interconnection is required to be interconnected with the plastic-encapsulated body base through a front transfer lead-out unit; the plastic-encapsulated second substrate heat dissipation unit is conductively connected with the plastic-encapsulated first substrate heat dissipation unit to configure and form a desired heat dissipation channel; the package lead-out unit on the back of the plastic-encapsulated body base is used to lead out the package formed by the alignment and assembly. The present invention can effectively improve the packaging density and realize efficient heat dissipation under high packaging density, is compatible with existing processes, and is safe and reliable.

Description

Technical Field

[0001] The invention relates to a packaging structure and a molding method, in particular to a high heat dissipation three-dimensional fan-out packaging structure and a molding method. Background Art

[0002] With the continuous advancement of microelectronics technology, the characteristic size of integrated circuits continues to shrink, the interconnection density continues to increase, and the size requirements of the package body are becoming more and more stringent. How to integrate and package a variety of different chips with high density in a module as small as possible is undoubtedly a major direction in the current miniaturization trend in the field of chip packaging.

[0003] At present, the mainstream fan-out packaging technology in the industry is to first reconstruct the chip into a wafer, and then rewire the wafer to achieve the fan-out packaging of the chip (such as eWLB); of course, the integrated packaging of multiple different chips can also be carried out in this way.

[0004] The above-mentioned mainstream fan-out packaging solutions still have the following problems: 1) Various chips are laid flat on the carrier in 2D form, which makes relatively insufficient use of the three-dimensional direction. The packaging area in two dimensions is bound to be large, which is not conducive to the requirements of smaller size; 2) The use of organic plastic packaging materials is not conducive to the heat dissipation requirements of high-power modules. Summary of the invention

[0005] The purpose of the present invention is to overcome the deficiencies in the prior art and provide a high heat dissipation three-dimensional fan-out packaging structure and a molding method, which can effectively improve the packaging density and achieve efficient heat dissipation under high packaging density, is compatible with existing processes, and is safe and reliable.

[0006] According to the technical solution provided by the present invention, a high heat dissipation three-dimensional fan-out packaging structure includes:

[0007] The first plastic-encapsulated substrate comprises a plastic-encapsulated substrate base, a package lead-out unit arranged on the back of the plastic-encapsulated substrate base, a plastic-encapsulated first substrate chip unit plastic-encapsulated on the front of the plastic-encapsulated substrate base, and a plastic-encapsulated first substrate heat dissipation unit for dissipating heat from the plastic-encapsulated first substrate chip unit, wherein:

[0008] The plastic-encapsulated first substrate chip unit includes a direct-connected chip unit directly interconnected with the plastic-encapsulated base layer, a lower interconnected chip unit distributed above the direct-connected chip unit, and a front-side transfer lead-out unit for transfer connection;

[0009] The plastic-encapsulated second substrate comprises an upper interconnected chip unit adapted to be interconnected with the lower interconnected chip unit, a plastic-encapsulated second substrate heat dissipation unit for dissipating heat from the upper interconnected chip unit, and a plastic-encapsulated second substrate plastic-encapsulation layer for plastic-encapsulating the upper interconnected chip unit and the plastic-encapsulated second substrate heat dissipation unit into one body;

[0010] The second plastic-encapsulated substrate is aligned and assembled with the first plastic-encapsulated substrate to form a desired package, wherein in the package, the upper interconnected chip unit and the lower interconnected chip unit are aligned and contacted and then adapted to form a desired chip unit interconnection, and the formed chip unit interconnection is interconnected with the plastic-encapsulated substrate through the front transfer lead-out unit;

[0011] The plastic-encapsulated second substrate heat dissipation unit is conductively connected to the plastic-encapsulated first substrate heat dissipation unit to form a required heat dissipation channel;

[0012] The package body formed by the alignment and assembly is led out through the package lead-out unit on the back side of the plastic package base layer.

[0013] In the first plastic-encapsulated substrate, the first plastic-encapsulated substrate chip unit and the first plastic-encapsulated substrate heat dissipation unit are plastic-encapsulated on the front side of the plastic-encapsulated substrate base through the first plastic-encapsulated substrate plastic-encapsulation layer, wherein the first plastic-encapsulated substrate chip unit and the first plastic-encapsulated substrate heat dissipation unit are both located in the first plastic-encapsulated substrate plastic-encapsulation layer;

[0014] The front transfer lead-out unit includes a plurality of front transfer lead-out connecting columns, the lower ends of which are electrically connected to the plastic package base layer, and the front transfer lead-out connecting columns are electrically connected to the interconnected chip unit on the plastic package second base body.

[0015] The direct-connected chip unit is electrically connected to the front soldering pad of the base layer on the front side of the plastic package body, and a bottom filling material layer for supporting and protecting is filled between the direct-connected chip unit and the front side of the plastic package body base layer.

[0016] The plastic-sealed first substrate heat dissipation unit and the lower interconnection chip unit are bonded to the back side of the direct-connection chip unit.

[0017] The package lead-out unit comprises a plurality of package lead-out solder balls prepared on the back side of the plastic package base layer, and the package lead-out solder balls are connected to the back side solder pads on the back side of the plastic package base layer in a one-to-one correspondence.

[0018] A molding method of a high heat dissipation three-dimensional fan-out packaging structure, used for a three-dimensional fan-out packaging structure, the molding method comprising:

[0019] A first plastic-encapsulated substrate and a second plastic-encapsulated substrate used for aligning with the first plastic-encapsulated substrate to form a package are provided, wherein:

[0020] The first plastic-encapsulated substrate comprises a plastic-encapsulated substrate base, a package lead-out unit arranged on the back of the plastic-encapsulated substrate base, a plastic-encapsulated first substrate chip unit plastic-encapsulated on the front of the plastic-encapsulated substrate base, and a plastic-encapsulated first substrate heat dissipation unit for dissipating heat from the plastic-encapsulated first substrate chip unit, wherein:

[0021] The plastic-encapsulated first substrate chip unit includes a direct-connected chip unit directly interconnected with the plastic-encapsulated base layer, a lower interconnected chip unit distributed above the direct-connected chip unit, and a front-side transfer lead-out unit for transfer connection;

[0022] The plastic-encapsulated second substrate comprises an upper interconnected chip unit adapted to be interconnected with the lower interconnected chip unit, a plastic-encapsulated second substrate heat dissipation unit for dissipating heat from the upper interconnected chip unit, and a plastic-encapsulated second substrate plastic-encapsulation layer for plastic-encapsulating the upper interconnected chip unit and the plastic-encapsulated second substrate heat dissipation unit into one body;

[0023] The second plastic-encapsulated substrate is aligned and assembled with the first plastic-encapsulated substrate to form a desired package, wherein in the package, the upper interconnected chip unit and the lower interconnected chip unit are aligned and contacted and then adapted to form a desired chip unit interconnection, and the formed chip unit interconnection is interconnected with the plastic-encapsulated substrate through the front transfer lead-out unit;

[0024] The plastic-encapsulated second substrate heat dissipation unit is conductively connected to the plastic-encapsulated first substrate heat dissipation unit to form a required heat dissipation channel;

[0025] The package body formed by the alignment and assembly is led out through the package lead-out unit on the back side of the plastic package base layer.

[0026] For the provided plastic-encapsulated first substrate, a method for preparing the plastic-encapsulated first substrate includes:

[0027] Providing a first carrier sheet and a plastic package base layer prepared on the first carrier sheet;

[0028] A plurality of front transfer lead-out connection posts and a plurality of front base plate soldering pads are prepared on the front side of the plastic package base layer, wherein the front transfer lead-out connection posts, the front base plate soldering pads and the plastic package base layer are adapted to be electrically connected;

[0029] Aligning and connecting the direct-connected chip unit with the front solder pad of the front side of the plastic package base layer, so that the direct-connected chip unit is interconnected with the plastic package base layer;

[0030] The lower interconnect chip unit and the plastic-encapsulated first substrate heat dissipation unit are arranged on the direct-connect chip unit;

[0031] A first plastic-encapsulated substrate plastic-encapsulation layer is prepared, and the front transfer lead-out connection column, the direct-connection chip unit, the lower interconnection chip unit and the first plastic-encapsulated substrate heat dissipation unit are plastic-encapsulated on the front side of the plastic-encapsulated body base layer by using the prepared first plastic-encapsulated substrate plastic-encapsulation layer, wherein the upper end of the front transfer lead-out connection column, the first plastic-encapsulated substrate heat dissipation unit and the corresponding component surfaces of the lower interconnection chip unit are in an exposed state;

[0032] A first substrate rewiring layer is prepared on the first substrate rewiring layer, wherein the first substrate rewiring layer includes a connection column rewiring metal line electrically connected to the front transfer lead-out connection column, a first substrate heat dissipation unit metal line electrically connected to the first substrate heat dissipation unit, and a lower interconnect chip unit metal line electrically connected to the component surface corresponding to the lower interconnect chip unit;

[0033] The first carrier sheet is removed to prepare the required first plastic-encapsulated substrate.

[0034] A temporary bonding layer is prepared on the first carrier sheet, and a required plastic package base layer is prepared on the temporary bonding layer through a rewiring process.

[0035] For the provided plastic-encapsulated second substrate, a method for preparing the plastic-encapsulated second substrate includes:

[0036] Providing a second carrier, an upper interconnect chip unit and a plastic-sealed second substrate heat dissipation unit, and placing the upper interconnect chip unit and the plastic-sealed second substrate heat dissipation unit on the second carrier, wherein the corresponding component surface of the upper interconnect chip unit corresponds to the second carrier;

[0037] Prepare a second plastic-encapsulated substrate plastic-encapsulated body, and use the second plastic-encapsulated substrate plastic-encapsulated body to plastic-encapsulate the upper interconnection chip unit and the second plastic-encapsulated substrate heat dissipation unit on the second carrier;

[0038] Removing the second slide;

[0039] A plastic-encapsulated second substrate rewiring layer is prepared, the plastic-encapsulated second substrate rewiring layer corresponds to the component surface of the upper interconnected chip unit, and the plastic-encapsulated second substrate rewiring layer includes an upper interconnected chip unit metal line electrically connected to the corresponding component surface of the upper interconnected chip unit, an upper interconnected chip unit lead-out metal line for leading out the corresponding component surface of the upper interconnected chip unit, and a plastic-encapsulated second substrate heat dissipation unit metal line electrically connected to the plastic-encapsulated second substrate heat dissipation unit;

[0040] The required plastic-encapsulated second substrate solder balls are prepared on the plastic-encapsulated second substrate rewiring layer, and the plastic-encapsulated second substrate solder balls are electrically connected to the upper interconnect chip unit metal circuit, the upper interconnect chip unit lead-out metal circuit, and the plastic-encapsulated second substrate heat dissipation unit metal circuit;

[0041] The above-mentioned second plastic-encapsulated substrate is thinned to prepare the required second plastic-encapsulated substrate plastic-encapsulated layer; after the second plastic-encapsulated substrate plastic-encapsulated layer is prepared, the back side of the upper interconnect chip unit and the corresponding surface of the second plastic-encapsulated substrate heat dissipation unit are exposed.

[0042] When the plastic-encapsulated second substrate is aligned and assembled with the plastic-encapsulated first substrate, the plastic-encapsulated second substrate solder balls on the plastic-encapsulated second substrate rewiring layer are aligned with the above-mentioned plastic-encapsulated first substrate rewiring layer, so as to utilize the plastic-encapsulated second substrate solder balls to be adapted and welded to the corresponding metal circuits in the plastic-encapsulated first substrate rewiring layer to form the required package;

[0043] A package lead-out unit is prepared on the back side of the plastic package base layer, so as to lead out the package body formed by the alignment and assembly mentioned above through the package lead-out unit.

[0044] The advantages of the present invention are as follows: a package is prepared by aligning and assembling a first plastic-encapsulated substrate and a second plastic-encapsulated substrate; within the package, a lower interconnected chip unit cooperates with an upper interconnected chip unit to form an interconnection between chip units; a front-side transfer lead-out unit is used to interconnect the interconnection between chip units and the base layer of the plastic-encapsulated body; and finally the package is led out through the package lead-out unit; and the integration density can be significantly improved through the three-dimensional multi-chip interconnection fan-out cooperation.

[0045] In the fan-out stage, the first plastic-encapsulated substrate heat dissipation unit is buried in the first plastic-encapsulated substrate, and the second plastic-encapsulated substrate heat dissipation unit is buried in the second plastic-encapsulated substrate. During alignment and assembly, the first plastic-encapsulated substrate heat dissipation unit and the second plastic-encapsulated substrate heat dissipation unit are conductively connected to form a heat dissipation channel for efficient heat dissipation, thereby improving the efficiency of heat dissipation, being compatible with existing processes, and being safe and reliable. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Figure 1 to Figure 7 This is a specific process diagram of the present invention for preparing the first plastic-encapsulated substrate, wherein:

[0047] Figure 1 It is a schematic diagram of the method of preparing the plastic encapsulation base layer in the present invention.

[0048] Figure 2 The present invention is a schematic diagram of the front transfer lead-out connection column and the front solder pad of the base layer prepared by the present invention.

[0049] Figure 3 It is a schematic diagram of the direct-connected chip unit of the present invention after being aligned and connected with the front pad of the base layer.

[0050] Figure 4 It is a schematic diagram of the present invention after the lower interconnect chip unit and the plastic-encapsulated first substrate heat dissipation unit are configured on the direct-connect chip unit.

[0051] Figure 5 This is a schematic diagram of the method of preparing a first plastic-sealed substrate plastic-sealed layer according to the present invention.

[0052] Figure 6 This is a schematic diagram of the present invention after preparing the plastic-encapsulated first substrate rewiring layer.

[0053] Figure 7 It is a schematic diagram of forming a plastic-sealed first substrate after removing the first carrier sheet and the temporary adhesive layer according to the present invention.

[0054] Figure 8~Figure 12 This is a specific process diagram of the present invention for preparing the second plastic-sealed substrate, wherein:

[0055] Figure 8 This is a schematic diagram of placing the upper interconnect chip unit and the plastic-sealed second substrate heat dissipation unit on the second carrier according to the present invention.

[0056] Fig. 9 It is a schematic diagram of the plastic-sealed second substrate after the plastic-sealed body is prepared in the present invention.

[0057] Fig.10 This is a schematic diagram of the present invention after the second carrier is removed.

[0058] Fig.11 This is a schematic diagram of the second substrate rewiring layer after being plastic-sealed in the present invention.

[0059] Fig.12 This is a schematic diagram of the second substrate solder ball after being plastic-sealed in the present invention.

[0060] Figure 13~Figure 14 This is a specific process step diagram of aligning and assembling the first plastic-encapsulated substrate and the second plastic-encapsulated substrate according to the present invention, wherein:

[0061] Fig.13 It is a schematic diagram of the present invention after the first plastic-encapsulated substrate and the second plastic-encapsulated substrate are aligned and assembled to form a packaging body.

[0062] Fig.14 The figure is a schematic diagram of a package lead-out unit prepared according to the present invention.

[0063] Explanation of the accompanying drawings: 1-first carrier, 2-temporary bonding layer, 3-plastic encapsulation base layer, 4-front transfer lead-out connecting column, 5-base front pad, 6-bottom filling material layer, 7-direct connection chip, 8-direct connection back bonding layer, 9-plastic encapsulation first base heat sink, 10-lower interconnect chip, 11-plastic encapsulation first base plastic encapsulation layer, 12-plastic encapsulation first base rewiring layer, 13-second carrier, 14-temporary bonding layer, 15-plastic encapsulation second base heat sink, 16-upper interconnect chip, 17-plastic encapsulation second base plastic encapsulation body, 18-plastic encapsulation second base rewiring layer, 19-upper interconnect Chip unit metal layer solder ball, 20-package lead-out solder ball, 21-first heat dissipation gap, 22-connecting column rewiring metal line, 23-plastic encapsulation first substrate heat dissipation unit metal line, 24-lower interconnected chip unit metal line, 25-back pad, 26-heat dissipation second gap, 27-plastic encapsulation second substrate heat dissipation unit metal line, 28-upper interconnected chip unit metal line, 29-plastic encapsulation second substrate plastic encapsulation layer, 30-upper interconnected chip unit lead-out metal line, 31-plastic encapsulation second substrate heat dissipation unit metal layer solder ball and 32-upper interconnected chip unit lead-out metal layer solder ball. DETAILED DESCRIPTION

[0064] The present invention will be further described below in conjunction with specific drawings and embodiments.

[0065] In order to achieve efficient heat dissipation of a three-dimensional fan-out package under high density, the high heat dissipation three-dimensional fan-out package structure of the present invention specifically includes:

[0066] The first plastic-encapsulated substrate comprises a plastic-encapsulated substrate 3, a package lead-out unit arranged on the back of the plastic-encapsulated substrate 3, a plastic-encapsulated first substrate chip unit plastic-encapsulated on the front of the plastic-encapsulated substrate 3, and a plastic-encapsulated first substrate heat dissipation unit for dissipating heat from the plastic-encapsulated first substrate chip unit, wherein:

[0067] The plastic-encapsulated first substrate chip unit includes a direct-connected chip unit directly interconnected with the plastic-encapsulated base layer 3, a lower interconnected chip unit distributed above the direct-connected chip unit, and a front-side transfer lead-out unit for transfer connection;

[0068] The second plastic-encapsulated substrate includes an upper interconnected chip unit adapted to interconnect with the lower interconnected chip unit, a second plastic-encapsulated substrate heat dissipation unit for dissipating heat from the upper interconnected chip unit, and a second plastic-encapsulated substrate plastic-encapsulation layer 29 for plastic-encapsulating the upper interconnected chip unit and the second plastic-encapsulated substrate heat dissipation unit into one body;

[0069] The second plastic-encapsulated substrate is aligned and assembled with the first plastic-encapsulated substrate to form a desired package, wherein in the package, the upper interconnected chip unit and the lower interconnected chip unit are aligned and contacted and then adapted to form a desired chip unit interconnection, and the formed chip unit interconnection is interconnected with the plastic-encapsulated substrate through the front transfer lead-out unit;

[0070] The plastic-encapsulated second substrate heat dissipation unit is conductively connected to the plastic-encapsulated first substrate heat dissipation unit to form a required heat dissipation channel;

[0071] The package body formed by the alignment and assembly is led out through the package lead-out unit on the back side of the plastic package base layer.

[0072] In one embodiment of the present invention, the three-dimensional fan-out packaging structure to be formed includes at least a plastic-encapsulated first substrate and a plastic-encapsulated second substrate that can be aligned and assembled with the plastic-encapsulated first substrate to form a packaging body; of course, the required number of plastic-encapsulated first substrates and plastic-encapsulated second substrates can also be selected according to actual application requirements, so as to be able to configure the required packaging body.

[0073] The plastic-encapsulated first substrate includes a plastic-encapsulated body base layer 3, on the front side of which is plastic-encapsulated a plastic-encapsulated first substrate chip unit and a plastic-encapsulated first substrate heat dissipation unit for dissipating heat from the plastic-encapsulated first substrate chip unit; in addition, in order to be able to lead out the aligned and assembled package body, it is also necessary to set a package lead-out unit on the back side of the plastic-encapsulated body base layer 3, and the package lead-out unit is electrically connected to the plastic-encapsulated body base layer 3.

[0074] In one embodiment of the present invention, the first plastic-encapsulated substrate chip unit includes a direct-connected chip unit, a lower interconnected chip unit, and a front transfer lead-out unit, wherein the direct-connected chip unit is a chip unit that can be interconnected with the plastic-encapsulated substrate 3, the lower interconnected chip unit is a chip unit form that cooperates with the upper interconnected chip unit in the second plastic-encapsulated substrate to form an interconnection between chip units, and the front transfer lead-out unit is a connection form that can transfer the formed interconnection between chip units to the plastic-encapsulated substrate 3 for the required interconnection. In addition, when the lower interconnected chip unit and the front transfer lead-out unit are plastic-encapsulated on the front of the plastic-encapsulated substrate 3, it is subject to not affecting the connection and cooperation with the second plastic-encapsulated substrate.

[0075] In specific implementation, the direct-connected chip unit includes at least one direct-connected chip 7, and the number of direct-connected chips 7 in the direct-connected chip unit can be selected as needed to meet the actual application requirements. The lower interconnected chip unit includes at least one lower interconnected chip 10, and the number of lower interconnected chips 10 in the lower interconnected chip unit is also selected according to actual needs. In addition, the specific chip types of the direct-connected chip 7 and the lower interconnected chip 10 can also be selected according to actual needs, such as amplification type chips, conversion type chips, etc., and the specific type is based on whether it can meet the actual application requirements.

[0076] For the above-mentioned first plastic-encapsulated substrate, in order to be aligned and assembled into a package body, the second plastic-encapsulated substrate generally needs to include an upper interconnect chip unit, a second plastic-encapsulated substrate heat dissipation unit, and a second plastic-encapsulated substrate plastic layer 29. The second plastic-encapsulated substrate is supported on the first plastic-encapsulated substrate, that is, when aligned and assembled, the upper interconnect chip unit is located above the lower interconnect chip unit. The upper interconnect chip unit includes a number of upper interconnect chips 16. The number and type of the upper interconnect chips 16 can be selected as needed to meet the required interconnection with the upper interconnect chip 10. The interconnection between the upper interconnect chip 16 and the upper interconnect chip 10 specifically refers to an interactive connection form that can meet the required requirements.

[0077] The plastic-encapsulated second substrate heat dissipation unit is adapted to be conductively connected with the plastic-encapsulated first substrate heat dissipation unit below to form a heat dissipation channel. The heat dissipation channel formed by the configuration is used to achieve efficient heat dissipation of the entire package, thereby improving heat dissipation efficiency.

[0078] In specific implementation, according to the corresponding conditions of the upper interconnected chip unit and the lower interconnected chip unit, one or more chip unit interconnections can be interconnected and coordinated to form the chip unit interconnections, and the formed chip unit interconnections are connected to the plastic package base layer 3 through the front transfer lead-out unit, that is, the direct-connected chip unit and the chip unit interconnections are interconnected to the plastic package base layer 3, and finally led out through the package lead-out unit on the back of the plastic package base layer 3. The lead-out through the package lead-out unit specifically refers to connecting and cooperating the formed package with an external circuit or the like.

[0079] Furthermore, the direct-connected chip unit is electrically connected to the front pad 5 of the plastic package base layer 3 , and a bottom filling material layer 6 for support and protection is filled between the direct-connected chip unit and the front of the plastic package base layer 5 .

[0080] During specific implementation, the direct-connected chip unit is adapted to be electrically connected with the base front pad 5 on the front side of the plastic package base. Specifically, the direct-connected chip 7 in the direct-connected chip unit is aligned with the base front pad 5 and then welded, and the required electrical connection is achieved after the alignment and welding, that is, the direct interconnection between the direct-connected chip 7 and the plastic package base 3 is achieved, and the direct interconnection is to satisfy the signal interaction between the direct-connected chip 7 and the plastic package base 3.

[0081] In order to support the direct-connected chip 7 and protect the connection between the component surface of the direct-connected chip 7 and the front solder pad 5 of the base layer, an underfill material layer 6 is filled between the direct-connected chip 7 and the plastic package base layer 3. The underfill material layer 6 can be made of existing commonly used materials that can achieve insulating support protection, and the specific material can be selected according to needs.

[0082] Furthermore, the plastic-encapsulated first substrate heat dissipation unit and the lower interconnection chip unit are bonded to the back side of the direct-connection chip unit.

[0083] As can be seen from the above description, the direct-connected chip 7 is welded and electrically connected to the front solder pad 5 of the front side of the plastic-encapsulated body base 3, so the component surface of the direct-connected chip 7 is led into the front side of the plastic-encapsulated body base 3. In order to realize the plastic encapsulation between the plastic-encapsulated first base heat dissipation unit and the lower interconnected chip unit, it is necessary to use the direct-connected chip 7 in the direct-connected chip unit to support the plastic-encapsulated first base heat dissipation unit and the lower interconnected chip unit. In order to improve the stability and reliability of the supporting connection, in one embodiment of the present invention, the plastic-encapsulated first base heat dissipation unit and the lower interconnected chip unit are bonded to the back side of the direct-connected chip unit. Specifically, the direct-connected back side bonding layer 8 is used to realize the bonding of the plastic-encapsulated first base heat dissipation unit and the lower interconnected chip unit to the back side of the direct-connected chip unit.

[0084] Fig.14 An implementation of aligning and assembling to form a package is shown in the figure, wherein, in the first plastic-encapsulated substrate, the first plastic-encapsulated substrate chip unit and the first plastic-encapsulated substrate heat dissipation unit are plastic-encapsulated on the front surface of the plastic-encapsulated substrate 3 by the first plastic-encapsulated substrate plastic-encapsulation layer 11, wherein the first plastic-encapsulated substrate chip unit and the first plastic-encapsulated substrate heat dissipation unit are both located in the first plastic-encapsulated substrate plastic-encapsulation layer 11;

[0085] The front transfer lead-out unit includes a plurality of front transfer lead-out connecting posts 4, the lower ends of the front transfer lead-out connecting posts 4 are electrically connected to the plastic package base layer 3, and the front transfer lead-out connecting posts 4 are electrically connected to the interconnected chip unit on the plastic package second base body.

[0086] It can be seen from the above description that during plastic encapsulation, a plastic encapsulation first base plastic encapsulation layer 11 is arranged on the front side of the plastic encapsulation body base layer 3 , that is, the plastic encapsulation first base plastic encapsulation layer 11 is used to plastic encapsulate the plastic encapsulation first base chip unit and the plastic encapsulation first base heat dissipation unit on the front side of the plastic encapsulation body base layer 3 . Fig.14 , it is shown that the direct-connected chip unit includes a direct-connected chip 7 , and at the same time, the lower interconnected chip unit includes a lower interconnected chip 10 , and the upper interconnected chip unit includes an upper interconnected chip 16 .

[0087] Fig.14 In the figure, the front transfer lead-out unit includes a plurality of front transfer lead-out connecting posts 4. The front transfer lead-out connecting posts 4 can be copper posts. Of course, other connecting posts that can realize transfer lead-out can also be used. The material type and quantity of the front transfer lead-out connecting posts 4 can be selected as needed to meet the actual transfer lead-out. The front transfer lead-out connecting posts 4 are perpendicular to the plastic encapsulation base layer 3. The front transfer lead-out connecting posts 4 are distributed on the outside of the direct connection chip 7. The front transfer lead-out connecting posts 4 penetrate the plastic encapsulation first substrate plastic encapsulation layer 11, so that the end of the front transfer lead-out connecting posts 4 adjacent to the plastic encapsulation second substrate is exposed from the surface of the plastic encapsulation first substrate plastic encapsulation layer 11.

[0088] The upper interconnect chip 16 is bonded and fixed to the back side of the direct connection chip 7 through the direct connection back side adhesive layer 8 . Fig.14 In the figure, the plastic-sealed first substrate heat dissipation unit includes a plastic-sealed first substrate heat sink 9, and the plastic-sealed second substrate heat sink 15 includes a plastic-sealed second substrate heat sink 15. The plastic-sealed first substrate heat sink 9 and the plastic-sealed second substrate heat sink 15 can specifically adopt the existing commonly used metal heat dissipation form. The shapes of the plastic-sealed first substrate heat sink 9 and the plastic-sealed second substrate heat sink 15 can be selected as needed, such as a ring-shaped or multi-block matching form, which is based on the need to effectively achieve heat dissipation. Fig.14 In the embodiment, the plastic-encapsulated first base heat sink 9 can form a ring-shaped enclosure for the lower interconnection chip 10 , and the plastic-encapsulated second base heat sink 15 can realize a ring-shaped enclosure for the upper interconnection chip 16 .

[0089] The plastic-encapsulated first substrate heat sink 9 is bonded and fixed to the back side of the direct-connected chip 7, and the component surface of the lower interconnected chip 10 and the surface of the plastic-encapsulated first substrate heat sink 9 corresponding to the component surface of the lower interconnected chip 10 are exposed from the surface of the plastic-encapsulated first substrate plastic-encapsulated layer 11 to achieve alignment and assembly with the plastic-encapsulated second substrate.

[0090] During alignment and assembly, the upper interconnection chip 16 is located directly above the lower interconnection chip 10, that is, the component surface of the upper interconnection chip 16 corresponds to the component surface of the lower interconnection chip 10, so as to achieve alignment and interconnection between the upper interconnection chip 16 and the lower interconnection chip 10. At the same time, the first plastic-encapsulated substrate heat sink 9 is aligned with the second plastic-encapsulated substrate heat sink 15 and is conductively connected to form a heat dissipation channel, and the heat dissipation channel formed can simultaneously achieve heat dissipation of the direct-connection chip 7, the lower interconnection chip 10 and the upper interconnection chip 16.

[0091] After the front-side transfer lead-out connecting column 4 is exposed from the surface of the first plastic encapsulation substrate plastic encapsulation layer 11, the end of the front-side transfer lead-out connecting column 4 can be adapted to electrically connect with the chip unit interconnection formed by the upper interconnection chip 16 and the lower interconnection chip 10, and the chip unit interconnection and the plastic encapsulation body base layer 3 can be interconnected by the transfer lead-out of the front-side transfer lead-out connecting column 4.

[0092] In specific implementation, when the plastic-encapsulated first substrate chip unit and the upper interconnect chip unit adopt other specific implementations, please refer to Fig.14 The description of the above specific circumstances will not be repeated here.

[0093] Furthermore, the package lead-out unit includes a plurality of package lead-out solder balls 20 prepared on the back side of the plastic package base layer 3 , and the package lead-out solder balls 20 are connected to the back side solder pads 25 on the back side of the plastic package base layer 3 in a one-to-one correspondence.

[0094] In one embodiment of the present invention, the package lead-out unit includes a plurality of package lead-out solder balls 20, and the package lead-out solder balls 20 are welded and connected to the back pads 25 on the back of the plastic package body base layer 3 in a one-to-one correspondence. The package lead-out solder balls 20 can be used to realize the package lead-out so as to cooperate with the connection of the external connection. In specific implementation, in order to form the required package lead-out, it is necessary to prepare the required back pads 25 on the back of the plastic package body base layer 3 in advance, and then prepare the package lead-out solder balls 20 based on the prepared back pads 25.

[0095] It can be seen from the above description that the above three-dimensional fan-out packaging structure can be prepared by the following process. Specifically, the molding method includes:

[0096] A first plastic-encapsulated substrate and a second plastic-encapsulated substrate used for aligning with the first plastic-encapsulated substrate to form a package are provided, wherein:

[0097] The first plastic-encapsulated substrate comprises a plastic-encapsulated substrate 3, a package lead-out unit arranged on the back of the plastic-encapsulated substrate 3, a plastic-encapsulated first substrate chip unit plastic-encapsulated on the front of the plastic-encapsulated substrate 3, and a plastic-encapsulated first substrate heat dissipation unit for dissipating heat from the plastic-encapsulated first substrate chip unit, wherein:

[0098] The plastic-encapsulated first substrate chip unit includes a direct-connected chip unit directly interconnected with the plastic-encapsulated base layer 3, a lower interconnected chip unit distributed above the direct-connected chip unit, and a front-side transfer lead-out unit for transfer connection;

[0099] The second plastic-encapsulated substrate includes an upper interconnected chip unit adapted to interconnect with the lower interconnected chip unit, a second plastic-encapsulated substrate heat dissipation unit for dissipating heat from the upper interconnected chip unit, and a second plastic-encapsulated substrate plastic-encapsulation layer 29 for plastic-encapsulating the upper interconnected chip unit and the second plastic-encapsulated substrate heat dissipation unit into one body;

[0100] The second plastic-encapsulated substrate is aligned and assembled with the first plastic-encapsulated substrate to form a desired package, wherein in the package, the upper interconnected chip unit and the lower interconnected chip unit are aligned and contacted and then adapted to form a desired chip unit interconnection, and the formed chip unit interconnection is interconnected with the plastic-encapsulated substrate through the front transfer lead-out unit;

[0101] The package body formed by the alignment and assembly is led out through the package lead-out unit on the back side of the plastic package base layer.

[0102] In one embodiment of the present invention, the specific conditions of the first plastic-encapsulated substrate, the second plastic-encapsulated substrate, and the alignment and assembly of the first plastic-encapsulated substrate and the second plastic-encapsulated substrate to obtain the package body can all refer to the above description. The following is a specific explanation of the process of the first plastic-encapsulated substrate, the second plastic-encapsulated substrate, and the specific alignment and assembly to form the package body.

[0103] Furthermore, for the provided plastic-encapsulated first substrate, a method for preparing the plastic-encapsulated first substrate includes:

[0104] Providing a first carrier sheet 1 and a plastic packaging body base layer 3 prepared on the first carrier sheet 1;

[0105] A plurality of front transfer lead-out connection posts 4 and a plurality of front base plate front pads 5 are prepared on the front side of the plastic package base layer 3, and the front transfer lead-out connection posts 4 and the front base plate front pads 5 are adapted to be electrically connected with the plastic package base layer 3;

[0106] Align and connect the direct-connect chip unit with the front solder pad 5 of the front side of the plastic package base layer 3, so that the direct-connect chip unit is interconnected with the plastic package base layer 3;

[0107] The lower interconnect chip unit and the plastic-encapsulated first substrate heat dissipation unit are arranged on the direct-connect chip unit;

[0108] A first plastic-encapsulated substrate plastic-encapsulation layer 11 is prepared, and the front transfer lead-out connection column 4, the direct-connection chip unit, the lower interconnection chip unit and the first plastic-encapsulated substrate heat dissipation unit are plastic-encapsulated on the front side of the plastic-encapsulated body base layer 3 by using the prepared first plastic-encapsulated substrate plastic-encapsulation layer 11, wherein the upper end of the front transfer lead-out connection column 4, the first plastic-encapsulated substrate heat dissipation unit and the corresponding component surfaces of the lower interconnection chip unit are in an exposed state;

[0109] A first substrate rewiring layer 12 is prepared on the first substrate plastic layer 11, and the prepared first substrate rewiring layer 12 includes a connection column rewiring metal line 22 electrically connected to the front transfer lead-out connection column 4, a first substrate heat dissipation unit metal line 23 electrically connected to the first substrate heat dissipation unit, and a lower interconnect chip unit metal line 24 electrically connected to the component surface corresponding to the lower interconnect chip unit;

[0110] The first carrier sheet 1 is removed to prepare the required first plastic-encapsulated substrate.

[0111] like Figure 1 to Figure 7 As shown, a process for preparing a plastic-encapsulated first substrate is shown. Figure 1 to Figure 7 The process of preparing the above-mentioned first plastic-encapsulated substrate is explained.

[0112] Figure 1 In the invention, a first carrier sheet 1 is provided. The first carrier sheet 1 can be in the form of a commonly used existing form, such as a silicon substrate, etc., and can be selected specifically according to needs. A temporary bonding layer 2 is prepared on the provided first carrier sheet 1, and then a required plastic package base layer 3 is prepared on the temporary bonding layer 2 through a re-distributed layer process. The temporary bonding layer 2 can be in the form of an existing temporary bonding, and can be prepared through a re-distributed layer process commonly used in the technical field.

[0113] Figure 1 In the embodiment, the prepared plastic encapsulation body base layer 3 is located on the temporary adhesive layer 2, the surface where the plastic encapsulation body base layer 3 is combined with the temporary adhesive layer 2 forms the back side of the plastic encapsulation body base layer 3, and the surface corresponding to the back side forms the front side of the plastic encapsulation body base layer 3. It can be seen from the above description that a plurality of back side pads 25 are arranged on the back side of the plastic encapsulation body base layer 3, and the back side pads 25 are generally exposed from the back side of the plastic encapsulation body base layer 3. Of course, the circuit layer on the front side of the plastic encapsulation body base layer 3 is electrically connected to the back side pads 25 on the back side of the plastic encapsulation body base layer 3, and the specific state of the electrical connection can be selected according to the needs, so as to meet the actual needs.

[0114] Figure 2 In the process, a front transfer lead-out connecting column 4 and several base layer front side pads 5 are prepared on the above-mentioned plastic package base layer 3. The base layer front side pads 5 and the front transfer lead-out connecting column 4 are electrically connected to the circuit layer on the front side of the plastic package base layer 3. The front transfer lead-out connecting column 4 is vertically distributed on the plastic package base layer 3, and the front transfer lead-out connecting column 4 is located on the outer side of the base layer front side pads 5.

[0115] Figure 3 In the embodiment, the required direct connection chip 7 is provided. Generally, the component surface of the provided direct connection chip 7 is provided with a surface solder ball. The direct connection chip 7 is aligned with the front solder pad 5 of the upper base layer of the plastic encapsulation body base layer 3 by the surface solder ball and then welded to realize the interconnection between the direct connection chip 7 and the plastic encapsulation body base layer 3. In order to realize support and protection, an underfill material layer 6 is prepared between the direct connection chip 7 and the plastic encapsulation body base layer 3. Generally, the contact area between the underfill material layer 6 and the front surface of the plastic encapsulation body base layer 3 is larger than the size of the direct connection chip 7.

[0116] Figure 3 Only the case where the direct-connected chip unit includes one direct-connected chip 7 is shown. When the direct-connected chip unit includes multiple direct-connected chips 7, the specific preparation process can refer to the above description.

[0117] Figure 4 In, yes Figure 3 In the case of the embodiment of the present invention, a lower interconnection chip 10 and a plastic-encapsulated first substrate heat sink 9 are provided, that is, the lower interconnection chip unit only includes the lower interconnection chip 10, and the plastic-encapsulated first substrate heat sink 9 is used to form a plastic-encapsulated first substrate heat sink unit. The plastic-encapsulated first substrate heat sink 9 and the lower interconnection chip 10 are bonded and fixed to the back of the direct-connection chip 7 through the direct-connection back bonding layer 8. The plastic-encapsulated first substrate heat sink 9 is located on the outer side of the lower interconnection chip 10, and the component surface of the lower interconnection chip 10 corresponds to the back of the direct-connection chip 7.

[0118] It can be seen from the above description that the first plastic-encapsulated base heat sink 9 adopts the form of metal heat dissipation. Therefore, it is necessary to avoid contact between the first plastic-encapsulated base heat sink 9 and the lower interconnect chip 10, that is, a first heat dissipation gap 21 is formed between the first plastic-encapsulated base heat sink 9 and the lower interconnect chip 10.

[0119] Figure 5 In the process, a plastic encapsulation process is performed on the front side of the plastic encapsulation body base layer 3 to obtain a plastic encapsulation first base plastic encapsulation layer 11 after the plastic encapsulation process. The front side transfer lead-out connection column 4, the direct connection chip 7, the plastic encapsulation first base heat sink 9 and the lower interconnection chip 10 are plastic encapsulated on the front side of the plastic encapsulation body base layer 3 by using the plastic encapsulation first base plastic encapsulation layer 11, and the plastic encapsulation first base plastic encapsulation layer 11 fills the first heat dissipation gap 21. For subsequent alignment and assembly, the upper end of the front side transfer lead-out connection column 4, the component surface of the lower interconnection chip 10 and the corresponding surface of the plastic encapsulation first base heat sink 9 are all exposed from the surface of the plastic encapsulation first base plastic encapsulation layer 11.

[0120] Figure 6 In the process, a rewiring process is performed on the above-mentioned plastic-encapsulated first substrate plastic-encapsulated layer 11 to prepare a plastic-encapsulated first substrate rewiring layer 12. The prepared plastic-encapsulated first substrate rewiring layer 12 includes a connection column rewiring metal line 22 electrically connected to the front-side transfer lead-out connection column 4, a plastic-encapsulated first substrate heat dissipation unit metal line 23 electrically connected to the plastic-encapsulated first substrate heat dissipation body 9, and a lower interconnection chip unit metal line 24 electrically connected to the component surface of the lower interconnection chip 10.

[0121] Of course, the prepared plastic-encapsulated first substrate rewiring layer 12 also includes an insulating isolation protection dielectric body for insulating isolation protection. The specific rewiring process used to prepare the plastic-encapsulated first substrate rewiring layer 12 can be selected according to needs to meet the alignment and assembly requirements.

[0122] Figure 7 In the process, the first carrier sheet 1 and the temporary adhesive layer 2 are separated from the plastic package base layer 3 by using the commonly used technical means in the technical field. At this time, the back side of the plastic package base layer 3 is exposed.

[0123] according to Figure 1 to Figure 7 As can be seen from the above description, the desired plastic-encapsulated first substrate can be prepared; the specific preparation of the plastic-encapsulated first substrate can refer to Figure 7 And the above instructions.

[0124] Furthermore, for the provided plastic-encapsulated second substrate, a method for preparing the plastic-encapsulated second substrate includes:

[0125] Providing a second carrier 13, an upper interconnect chip unit and a plastic-sealed second substrate heat dissipation unit, and placing the upper interconnect chip unit and the plastic-sealed second substrate heat dissipation unit on the second carrier 13, wherein the corresponding component surface of the upper interconnect chip unit corresponds to the second carrier 13;

[0126] Prepare a second plastic-encapsulated substrate plastic-encapsulated body 17, and use the second plastic-encapsulated substrate plastic-encapsulated body 17 to plastic-encapsulate the upper interconnection chip unit and the second plastic-encapsulated substrate heat dissipation unit on the second carrier 13;

[0127] Remove the second carrier 13;

[0128] Prepare a plastic-encapsulated second substrate rewiring layer 18, the plastic-encapsulated second substrate rewiring layer 18 corresponds to the component surface of the upper interconnected chip unit, the plastic-encapsulated second substrate rewiring layer 18 includes an upper interconnected chip unit metal line 28 electrically connected to the corresponding component surface of the upper interconnected chip unit, an upper interconnected chip unit lead-out metal line 30 for leading out the corresponding component surface of the upper interconnected chip unit, and a plastic-encapsulated second substrate heat dissipation unit metal line 27 electrically connected to the plastic-encapsulated second substrate heat dissipation unit;

[0129] The required plastic-encapsulated second substrate solder balls are prepared on the above-mentioned plastic-encapsulated second substrate rewiring layer 18, and the plastic-encapsulated second substrate solder balls are electrically connected to the upper interconnect chip unit metal line 28, the upper interconnect chip unit lead-out metal line 30 and the plastic-encapsulated second substrate heat dissipation unit metal line 27;

[0130] The above-mentioned second substrate plastic encapsulation body 17 is thinned to prepare the required second substrate plastic encapsulation layer 29; after the second substrate plastic encapsulation layer 29 is prepared, the back side of the upper interconnect chip unit and the corresponding surface of the second substrate heat dissipation unit are exposed.

[0131] Figure 8~Figure 12 The following is an example of the method for preparing the second plastic-encapsulated substrate according to the present invention. Figure 8~Figure 12 The preparation of the plastic-sealed second substrate is described in detail.

[0132] Figure 8 In the process, a second carrier sheet 13 and a temporary bonding layer 14 prepared on the second carrier sheet 13 are provided. The second carrier sheet 13 and the temporary bonding layer 14 provided can be specifically described with reference to the above-mentioned description of the first carrier sheet 1 and the temporary bonding layer 2.

[0133] Figure 8, the upper interconnect chip unit includes only one upper interconnect chip 16. In this case, the plastic-encapsulated second substrate heat sink unit adopts a plastic-encapsulated second substrate heat sink 15. The upper interconnect chip 16 and the plastic-encapsulated second substrate heat sink 15 are fixed on the temporary bonding layer 14. The plastic-encapsulated second substrate heat sink 15 is located outside the upper interconnect chip 16. The component surface of the upper interconnect chip 16 is in contact with the temporary bonding layer 14. As can be seen from the above description, there is a heat dissipation second gap 26 between the plastic-encapsulated second substrate heat sink 15 and the upper interconnect chip 16.

[0134] Fig. 9 In the process, a plastic encapsulation process commonly used in this technical field is adopted to prepare a plastic encapsulation second substrate plastic encapsulation body 17, and the plastic encapsulation second substrate plastic encapsulation body 17 plastic encapsulates the plastic encapsulation second substrate heat sink 15 and the upper interconnection chip 16 on the temporary bonding layer 14. At this time, the plastic encapsulation second substrate plastic encapsulation body 17 fills the second heat dissipation gap 26.

[0135] Fig.10 In the process, the second carrier 13 and the temporary bonding layer 14 are removed by using the commonly used technical means in the technical field. After the removal, the component surface of the upper interconnection chip 16 is exposed.

[0136] Fig.11 In the process, a plastic-encapsulated second substrate rewiring layer 18 is prepared, and the plastic-encapsulated second substrate rewiring layer 18 corresponds to the component surface of the upper interconnected chip 16. The plastic-encapsulated second substrate rewiring layer 18 includes an upper interconnected chip unit metal line 28 electrically connected to the corresponding component surface of the upper interconnected chip 16, an upper interconnected chip unit lead-out metal line 30 for leading out the corresponding component surface of the upper interconnected chip unit, and a plastic-encapsulated second substrate heat dissipation unit metal line 27 electrically connected to the plastic-encapsulated second substrate heat dissipation body 15.

[0137] It can be seen from the above description that the prepared plastic-encapsulated second substrate rewiring layer 18 also includes an insulating isolation protection dielectric body for insulating isolation protection. The specific situation of preparing the plastic-encapsulated second substrate rewiring layer 18 by the rewiring process can be selected according to needs, so as to meet the alignment and assembly requirements. During specific implementation, the upper interconnect chip unit metal line 28 corresponds to the corresponding component surface of the upper interconnect chip 16, and corresponds to the component surface of the corresponding upper interconnect chip 16. The upper interconnect chip unit lead-out metal line 30 is used to lead out the corresponding component surface of the upper interconnect chip 16, and the upper interconnect chip unit lead-out metal line 30 corresponds to the plastic-encapsulated second substrate heat sink 15, but is insulated and isolated from the plastic-encapsulated second substrate heat sink 15. The plastic-encapsulated second substrate heat sink unit metal line 27 corresponds to the plastic-encapsulated second substrate heat sink 15, and is electrically connected to the plastic-encapsulated second substrate heat sink 15.

[0138] Fig.11In one embodiment shown, the plastic-encapsulated second substrate heat dissipation unit metal circuit 27 is located between the upper interconnect chip unit lead-out metal circuit 30 and the upper interconnect chip unit metal circuit 28, and the upper interconnect chip unit lead-out metal circuit 30 is located outside the plastic-encapsulated second substrate heat dissipation unit metal circuit 27.

[0139] Fig.12 In the process, the required plastic-encapsulated second substrate solder balls are prepared on the above-mentioned plastic-encapsulated second substrate rewiring layer 18, and the plastic-encapsulated second substrate solder balls are electrically connected to the upper interconnect chip unit metal line 28, the upper interconnect chip unit lead-out metal line 30, and the plastic-encapsulated second substrate heat dissipation unit metal line 27. After the plastic-encapsulated second substrate solder balls are prepared, the plastic-encapsulated second substrate solder balls can be used to facilitate the subsequent alignment and assembly.

[0140] Fig.12 In the embodiment, the plastic-encapsulated second substrate solder balls specifically include: the plastic-encapsulated second substrate solder balls electrically connected to the upper interconnected chip unit metal line 28 are the upper interconnected chip unit metal layer solder balls 19, the plastic-encapsulated second substrate solder balls electrically connected to the upper interconnected chip unit lead-out metal line 30 are the upper interconnected chip unit lead-out metal layer solder balls 32, and the plastic-encapsulated second substrate solder balls electrically connected to the plastic-encapsulated second substrate heat dissipation unit metal line 27 are the plastic-encapsulated second substrate heat dissipation unit metal layer solder balls 31.

[0141] Depend on Figure 9~Figure 11 It can be seen that the prepared plastic-encapsulated second substrate plastic-encapsulated body 17 covers the surface of the second substrate heat sink 15, which is not conducive to the heat dissipation of the plastic-encapsulated second substrate heat sink 15. Therefore, it is necessary to thin the plastic-encapsulated second substrate plastic-encapsulated body 17 to obtain a plastic-encapsulated second substrate plastic-encapsulated layer 29 after thinning; at this time, the back side of the upper interconnect chip 16 and the corresponding surface of the plastic-encapsulated second substrate heat sink 15 are exposed.

[0142] The above shows an implementation of the preparation process of the first plastic-encapsulated substrate and the second plastic-encapsulated substrate. After the first plastic-encapsulated substrate and the second plastic-encapsulated substrate are prepared, the second plastic-encapsulated substrate needs to be aligned and assembled with the first plastic-encapsulated substrate.

[0143] Furthermore, when the second plastic-encapsulated substrate is aligned and assembled with the first plastic-encapsulated substrate, the second plastic-encapsulated substrate solder balls on the second plastic-encapsulated substrate rewiring layer 18 are aligned with the first plastic-encapsulated substrate rewiring layer 12, so that the second plastic-encapsulated substrate solder balls are adapted to be welded and connected with the corresponding metal circuits in the first plastic-encapsulated substrate rewiring layer 12, and the desired package is configured;

[0144] A package lead-out unit is prepared on the back side of the plastic package base layer, so as to lead out the package body formed by the alignment and assembly mentioned above through the package lead-out unit.

[0145] like Figure 13~Figure 14In the figure, a step diagram of an implementation of alignment assembly is shown. Fig.13 as well as Fig.14 The schematic diagram is used to specifically illustrate the alignment and assembly situation.

[0146] Fig.13 During the alignment and assembly, the plastic-encapsulated second substrate is located directly above the plastic-encapsulated first substrate. During the alignment, the plastic-encapsulated second substrate solder balls on the plastic-encapsulated second substrate are aligned with the plastic-encapsulated first substrate rewiring layer 12, wherein the upper interconnect chip unit metal layer solder balls 19 correspond to the lower interconnect chip unit metal lines 24, the upper interconnect chip unit lead-out metal layer solder balls 32 correspond to the connecting column rewiring metal lines 22, and the plastic-encapsulated second substrate heat dissipation unit metal layer solder balls 31 correspond to the plastic-encapsulated first substrate heat dissipation unit metal lines 23.

[0147] After alignment, the solder balls of the second plastic-encapsulated substrate are respectively welded and connected to the corresponding metal layers in the heavy wiring layer 12 of the first plastic-encapsulated substrate. At this time, the first plastic-encapsulated substrate and the second plastic-encapsulated substrate are assembled into a desired package.

[0148] During specific implementation, according to the alignment and assembly area positions, the plastic-encapsulated second substrate solder balls on the plastic-encapsulated second substrate rewiring layer 18 respectively form the upper interconnected chip unit metal layer solder balls 19, the plastic-encapsulated second substrate heat dissipation unit metal layer solder balls 31 and the upper interconnected chip unit lead-out metal layer solder balls 32. At this time, the plastic-encapsulated second substrate heat dissipation unit metal layer solder balls 31 are electrically connected to the plastic-encapsulated second substrate heat dissipation unit metal lines 27 electrically connected to the plastic-encapsulated second substrate heat dissipation body 15 to achieve electrical connection with the plastic-encapsulated second substrate heat dissipation body 15.

[0149] When the solder balls of the second plastic-encapsulated substrate are respectively welded and connected to the corresponding metal layers in the heavy wiring layer 12 of the first plastic-encapsulated substrate, the upper interconnection chip 16 uses the upper interconnection chip unit metal layer solder balls 19 to be correspondingly welded and connected to the lower interconnection chip unit metal lines 24 to achieve the interconnection between the upper interconnection chip 16 and the lower interconnection chip 10 to form an interconnection between chip units.

[0150] When the metal layer solder balls 31 of the second plastic-encapsulated heat dissipation unit are correspondingly welded and connected to the metal lines 23 of the first plastic-encapsulated heat dissipation unit, the conductive connection between the second plastic-encapsulated heat dissipation body 15 and the first plastic-encapsulated heat dissipation body 9 is realized, that is, a heat dissipation channel is configured. Therefore, the second plastic-encapsulated heat dissipation body 15 is electrically connected to the first plastic-encapsulated heat dissipation body 9 through the metal layer solder balls 31 of the second plastic-encapsulated heat dissipation unit, the metal lines 27 of the second plastic-encapsulated heat dissipation unit, and the metal lines 23 of the first plastic-encapsulated heat dissipation unit, so as to configure a heat dissipation channel.

[0151] When the upper interconnect chip unit lead-out metal layer solder ball 32 is correspondingly welded and connected to the corresponding connection column rewiring metal line 22, the interconnection between the chip units is realized through the front transfer lead-out connection column 4 and the plastic package base layer 3.

[0152] Therefore, it can be seen from the above description that the front-side transfer lead-out unit includes not only the front-side transfer lead-out connecting column 4, but also the connecting column rewiring metal line 22, the upper interconnection chip unit lead-out metal layer solder ball 32 and the upper interconnection chip unit lead-out metal line 30. The specific situation of the front-side transfer lead-out unit is based on whether it can be electrically connected with the upper interconnection chip 16 to achieve electrical connection with the interconnection body formed between the chip units.

[0153] After the above alignment and assembly, the package is obtained. On the back of the plastic package base 3, package lead-out solder balls 20 for forming package lead-out units are prepared, wherein the package lead-out solder balls 20 are connected to the back pads 25 on the back of the plastic package base 3 in a one-to-one correspondence. The specific method of using the package lead-out solder balls 20 and the back pads 25 to achieve package lead-out can refer to the above description, which will not be repeated here.

[0154] In specific implementation, the package lead solder balls 20 can also be prepared when preparing the first plastic-encapsulated substrate; Figure 7 After the process, the required package lead solder balls 20 are prepared on the back of the plastic package base layer 3. The specific process sequence of preparing the package lead solder balls 20 to form a package lead unit can be selected according to actual application requirements to meet the actual requirements.

[0155] In summary, the package is prepared by aligning and assembling the first plastic-encapsulated substrate and the second plastic-encapsulated substrate. In the package, the lower interconnected chip unit is coordinated with the upper interconnected chip unit to form an interconnection between chip units. The front-side transfer lead-out unit is used to realize the interconnection between the chip units and the plastic-encapsulated base layer 3, and finally the package is led out through the package lead-out unit. The integration density can be significantly improved by the three-dimensional multi-chip interconnection fan-out coordination.

[0156] It can be seen from the above description that in the fan-out stage, the plastic-encapsulated first substrate heat dissipation unit is buried in the plastic-encapsulated first substrate, and the plastic-encapsulated second substrate heat dissipation unit is buried in the plastic-encapsulated second substrate. During alignment and assembly, the plastic-encapsulated first substrate heat dissipation unit and the plastic-encapsulated second substrate heat dissipation unit are conductively connected to form a heat dissipation channel for efficient heat dissipation, thereby improving the efficiency of heat dissipation, being compatible with existing processes, and being safe and reliable.

Claims

1. A high heat dissipation three-dimensional fan-out packaging structure, characterized in that: include: The first plastic-encapsulated substrate comprises a plastic-encapsulated substrate base, a package lead-out unit arranged on the back of the plastic-encapsulated substrate base, a plastic-encapsulated first substrate chip unit plastic-encapsulated on the front of the plastic-encapsulated substrate base, and a plastic-encapsulated first substrate heat dissipation unit for dissipating heat from the plastic-encapsulated first substrate chip unit, wherein: The plastic-encapsulated first substrate chip unit includes a direct-connected chip unit directly interconnected with the plastic-encapsulated base layer, a lower interconnected chip unit distributed above the direct-connected chip unit, and a front-side transfer lead-out unit for transfer connection; The plastic-encapsulated second substrate comprises an upper interconnected chip unit adapted to be interconnected with the lower interconnected chip unit, a plastic-encapsulated second substrate heat dissipation unit for dissipating heat from the upper interconnected chip unit, and a plastic-encapsulated second substrate plastic-encapsulation layer for plastic-encapsulating the upper interconnected chip unit and the plastic-encapsulated second substrate heat dissipation unit into one body; The second plastic-encapsulated substrate is aligned and assembled with the first plastic-encapsulated substrate to form a desired package, wherein in the package, the upper interconnected chip unit and the lower interconnected chip unit are aligned and contacted and then adapted to form a desired chip unit interconnection, and the formed chip unit interconnection is interconnected with the plastic-encapsulated substrate through the front transfer lead-out unit; The plastic-encapsulated second substrate heat dissipation unit is conductively connected to the plastic-encapsulated first substrate heat dissipation unit to form a required heat dissipation channel; The package body formed by the alignment and assembly is led out through the package lead-out unit on the back side of the plastic package base layer.

2. The high heat dissipation three-dimensional fan-out packaging structure according to claim 1 is characterized in that: In the first plastic-encapsulated substrate, the first plastic-encapsulated substrate chip unit and the first plastic-encapsulated substrate heat dissipation unit are plastic-encapsulated on the front side of the plastic-encapsulated substrate base through the first plastic-encapsulated substrate plastic-encapsulation layer, wherein the first plastic-encapsulated substrate chip unit and the first plastic-encapsulated substrate heat dissipation unit are both located in the first plastic-encapsulated substrate plastic-encapsulation layer; The front transfer lead-out unit includes a plurality of front transfer lead-out connecting columns, the lower ends of which are electrically connected to the plastic package base layer, and the front transfer lead-out connecting columns are electrically connected to the interconnected chip unit on the plastic package second base body.

3. The high heat dissipation three-dimensional fan-out packaging structure according to claim 1 is characterized in that: The direct-connected chip unit is electrically connected to the front soldering pad of the base layer on the front side of the plastic package body, and a bottom filling material layer for supporting and protecting is filled between the direct-connected chip unit and the front side of the plastic package body base layer.

4. The high heat dissipation three-dimensional fan-out packaging structure according to claim 1 is characterized in that: The plastic-sealed first substrate heat dissipation unit and the lower interconnection chip unit are bonded to the back side of the direct-connection chip unit.

5. The high heat dissipation three-dimensional fan-out packaging structure according to any one of claims 1 to 4, characterized in that: The package lead-out unit comprises a plurality of package lead-out solder balls prepared on the back side of the plastic package base layer, and the package lead-out solder balls are connected to the back side solder pads on the back side of the plastic package base layer in a one-to-one correspondence.

6. A method for forming a high heat dissipation three-dimensional fan-out packaging structure, characterized in that: For preparing the three-dimensional fan-out packaging structure according to claim 1, the molding method comprises: A first plastic-encapsulated substrate and a second plastic-encapsulated substrate used for aligning with the first plastic-encapsulated substrate to form a package are provided, wherein: The first plastic-encapsulated substrate comprises a plastic-encapsulated substrate base, a package lead-out unit arranged on the back of the plastic-encapsulated substrate base, a plastic-encapsulated first substrate chip unit plastic-encapsulated on the front of the plastic-encapsulated substrate base, and a plastic-encapsulated first substrate heat dissipation unit for dissipating heat from the plastic-encapsulated first substrate chip unit, wherein: The plastic-encapsulated first substrate chip unit includes a direct-connected chip unit directly interconnected with the plastic-encapsulated base layer, a lower interconnected chip unit distributed above the direct-connected chip unit, and a front-side transfer lead-out unit for transfer connection; The plastic-encapsulated second substrate comprises an upper interconnected chip unit adapted to be interconnected with the lower interconnected chip unit, a plastic-encapsulated second substrate heat dissipation unit for dissipating heat from the upper interconnected chip unit, and a plastic-encapsulated second substrate plastic-encapsulation layer for plastic-encapsulating the upper interconnected chip unit and the plastic-encapsulated second substrate heat dissipation unit into one body; The second plastic-encapsulated substrate is aligned and assembled with the first plastic-encapsulated substrate to form a desired package, wherein in the package, the upper interconnected chip unit and the lower interconnected chip unit are aligned and contacted and then adapted to form a desired chip unit interconnection, and the formed chip unit interconnection is interconnected with the plastic-encapsulated substrate through the front transfer lead-out unit; The plastic-encapsulated second substrate heat dissipation unit is conductively connected to the plastic-encapsulated first substrate heat dissipation unit to form a required heat dissipation channel; The package body formed by the alignment and assembly is led out through the package lead-out unit on the back side of the plastic package base layer.

7. The method for forming a high heat dissipation three-dimensional fan-out packaging structure according to claim 6 is characterized in that: For the provided plastic-encapsulated first substrate, a method for preparing the plastic-encapsulated first substrate includes: Providing a first carrier sheet and a plastic package base layer prepared on the first carrier sheet; A plurality of front transfer lead-out connection posts and a plurality of front base plate soldering pads are prepared on the front side of the plastic package base layer, wherein the front transfer lead-out connection posts, the front base plate soldering pads and the plastic package base layer are adapted to be electrically connected; Aligning and connecting the direct-connected chip unit with the front pad of the base layer on the front side of the plastic package base layer, so that the direct-connected chip unit is interconnected with the plastic package base layer; The lower interconnect chip unit and the plastic-encapsulated first substrate heat dissipation unit are arranged on the direct-connect chip unit; A first plastic-encapsulated substrate plastic-encapsulation layer is prepared, and the front transfer lead-out connection column, the direct-connection chip unit, the lower interconnection chip unit and the first plastic-encapsulated substrate heat dissipation unit are plastic-encapsulated on the front side of the plastic-encapsulated body base layer by using the prepared first plastic-encapsulated substrate plastic-encapsulation layer, wherein the upper end of the front transfer lead-out connection column, the first plastic-encapsulated substrate heat dissipation unit and the corresponding component surfaces of the lower interconnection chip unit are in an exposed state; A first substrate rewiring layer is prepared on the first substrate rewiring layer, wherein the first substrate rewiring layer includes a connection column rewiring metal line electrically connected to the front transfer lead-out connection column, a first substrate heat dissipation unit metal line electrically connected to the first substrate heat dissipation unit, and a lower interconnect chip unit metal line electrically connected to the component surface corresponding to the lower interconnect chip unit; The first carrier sheet is removed to prepare the required first plastic-encapsulated substrate.

8. The method for forming a high heat dissipation three-dimensional fan-out packaging structure according to claim 7, characterized in that: A temporary bonding layer is prepared on the first carrier sheet, and a required plastic package base layer is prepared on the temporary bonding layer through a rewiring process.

9. The molding method of the high heat dissipation three-dimensional fan-out packaging structure according to claim 7 or 8, characterized in that: For the provided plastic-encapsulated second substrate, a method for preparing the plastic-encapsulated second substrate includes: Providing a second carrier, an upper interconnect chip unit and a plastic-sealed second substrate heat dissipation unit, and placing the upper interconnect chip unit and the plastic-sealed second substrate heat dissipation unit on the second carrier, wherein the corresponding component surface of the upper interconnect chip unit corresponds to the second carrier; Prepare a second plastic-encapsulated substrate plastic-encapsulated body, and use the second plastic-encapsulated substrate plastic-encapsulated body to plastic-encapsulate the upper interconnection chip unit and the second plastic-encapsulated substrate heat dissipation unit on the second carrier; Removing the second slide; A plastic-encapsulated second substrate rewiring layer is prepared, the plastic-encapsulated second substrate rewiring layer corresponds to the component surface of the upper interconnected chip unit, and the plastic-encapsulated second substrate rewiring layer includes an upper interconnected chip unit metal line electrically connected to the corresponding component surface of the upper interconnected chip unit, an upper interconnected chip unit lead-out metal line for leading out the corresponding component surface of the upper interconnected chip unit, and a plastic-encapsulated second substrate heat dissipation unit metal line electrically connected to the plastic-encapsulated second substrate heat dissipation unit; The required plastic-encapsulated second substrate solder balls are prepared on the plastic-encapsulated second substrate rewiring layer, and the plastic-encapsulated second substrate solder balls are electrically connected to the upper interconnect chip unit metal circuit, the upper interconnect chip unit lead-out metal circuit, and the plastic-encapsulated second substrate heat dissipation unit metal circuit; The above-mentioned second plastic-encapsulated substrate is thinned to prepare the required second plastic-encapsulated substrate plastic-encapsulated layer; after the second plastic-encapsulated substrate plastic-encapsulated layer is prepared, the back side of the upper interconnect chip unit and the corresponding surface of the second plastic-encapsulated substrate heat dissipation unit are exposed.

10. The molding method of the high heat dissipation three-dimensional fan-out packaging structure according to claim 9 is characterized in that: When the plastic-encapsulated second substrate is aligned and assembled with the plastic-encapsulated first substrate, the plastic-encapsulated second substrate solder balls on the plastic-encapsulated second substrate rewiring layer are aligned with the above-mentioned plastic-encapsulated first substrate rewiring layer, so as to utilize the plastic-encapsulated second substrate solder balls to be adapted and welded to the corresponding metal circuits in the plastic-encapsulated first substrate rewiring layer to form the required package; A package lead-out unit is prepared on the back side of the plastic package base layer, so as to lead out the package body formed by the alignment and assembly mentioned above through the package lead-out unit.

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