A PCIE data processing method under a Kylin system

Abstract

The application provides a PCIE data processing method under a China Star Kirin system, comprising the following steps: S1, obtaining driving device information and operation data information; the operation data information comprises opening device instruction information, driving operation address information and driving operation instruction information; S2, calling an "opening device" driving operation function in a preset PCIE driving module according to the driving device information and the opening device instruction information to open a target driving device; S3, calling a target driving operation function corresponding to the driving operation instruction information in the preset PCIE driving module according to the driving operation address information and the driving operation instruction information, and performing corresponding target driving operation on the target driving device. The method realizes PCIE driving operation at least comprising reading and writing functions, and solves the PCIE driving problem under the China Star Kirin system.

Description

Technical Field

[0001] This application relates to the field of bus driver technology, and in particular to a PCIE data processing method under the NeoKylin system. Background Technology

[0002] The NeoKylin operating system uses an enhanced Linux kernel to meet the requirements of different customers and has been widely used in industries such as energy, finance, transportation, government, and central state-owned enterprises. NeoKylin supports modular implementation of security policies and provides a unified platform for various access control policies.

[0003] Although domestically developed operating systems have been widely used in fields such as communications, industrial control, consumer electronics, aviation / aerospace, and marine, the short research cycle of the ecosystem has led to poor compatibility with other bus drivers.

[0004] To address the aforementioned issues, this invention presents a PCIE data processing method for the NeoKylin system. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides a PCIE data processing method for the NeoKylin system.

[0006] On one hand, embodiments of the present invention provide a PCIE data processing method under the NeoKylin system, including:

[0007] S1. Obtain driver device information and operation data information; the operation data information includes device opening instruction information, driver operation address information, and driver operation instruction information.

[0008] S2. Based on the driver device information and the open device instruction information, call the "open device" driver operation function in the preset PCIE driver module to open the target driver device;

[0009] S3. Based on the driver operation address information and the driver operation instruction information, call the target driver operation function in the preset PCIE driver module that corresponds to the driver operation instruction information, and perform the corresponding target driver operation on the target driver device.

[0010] Based on the above embodiments, the method further includes, before performing step S1:

[0011] S0' Initialize the preset PCIE driver module.

[0012] Based on the above embodiments, the method further includes, before performing step S1:

[0013] S0. Create the preset PCIE driver module.

[0014] Based on the above embodiments, the step of creating and constructing the preset PCIE driver module further includes:

[0015] S01. Register the PCIe driver;

[0016] S02, Construct the PCIE driver interface;

[0017] S03. Compile the PCIE driver module;

[0018] S04. Load the PCIe driver module.

[0019] Based on the above embodiments, further, S01, registering the PCIE driver, includes:

[0020] Define the device data structure and create a device data instantiation object; wherein, the parameters of the device data instantiation object include driver device information cdev, memory space address menBase, and semaphore address semAddr;

[0021] Define the driver data structure and create a driver data instantiation object; wherein, the parameters of the driver data instantiation object include a list of driver device IDs;

[0022] Based on the driver device information cdev and the driver device ID table, obtain the I / O space address length LEN1, the first starting address baseAddr1, and the semaphore address length LEN2 of the PCIE driver module;

[0023] Based on the first starting address baseAddr1 and the I / O space address length LEN1 corresponding to the I / O space region of the PCIE driver module, the I / O space address corresponding to the PCIE driver module is mapped to the kernel space of the bus system to obtain the kernel I / O space address.

[0024] Based on the first address baseAddr1 and I / O space address length LEN1 corresponding to the I / O space region of the PCIE driver module, the second address baseAddr2 corresponding to the semaphore region is determined. Based on the second address baseAddr2 and the semaphore address length LEN2, the semaphore address corresponding to the PCIE driver module is mapped to the kernel space of the bus system to obtain the kernel semaphore address.

[0025] The kernel I / O space address is filled back into the memory space address menBase to obtain the PCIE memory space address, and the kernel semaphore address is filled back into the semaphore address semAddr to obtain the PCIE semaphore address.

[0026] Based on the above embodiments, further, step S02, constructing the PCIE driver interface, includes:

[0027] Define the operation data structure and create an operation data instantiation object; wherein, the parameters of the operation data instantiation object include the driver operation address and the driver operation instruction;

[0028] Accordingly, the compiled PCIE driver module includes:

[0029] Create a list of relationships between the drive operation instructions and drive operation functions;

[0030] Generate the executable file of the driver operation function.

[0031] Based on the above embodiments, the acquisition of drive device information and operation data information further includes:

[0032] Call the device data instantiation object to find the driver device information;

[0033] The operation data instantiated object is invoked to find the driver operation address and driver operation instructions.

[0034] Based on the above embodiments, the drive operation address information further includes reading area address information and first traffic light address information, and the drive operation instruction information includes reading data instruction, acquiring traffic light instruction, and releasing traffic light instruction;

[0035] Accordingly, the step of calling the target driver operation function corresponding to the driver operation instruction information in the preset PCIE driver module according to the driver operation address information and the driver operation instruction information, and performing the corresponding target driver operation on the target driver device, includes:

[0036] The target read region address is obtained based on the PCIe memory space address and the read region address information;

[0037] The first target semaphore address is obtained based on the PCIe memory space address and the first semaphore address information;

[0038] Based on the address of the first target traffic light, the function to obtain traffic light instruction is called to apply for permission to the first target traffic light. If successful, the reading area corresponding to the target reading area address is determined to be in a readable state.

[0039] Based on the target reading area address, the data reading instruction function is invoked to read the first target data;

[0040] Determine if the first target data is correct. If it is, display the first target data and release the permission for the first target semaphore.

[0041] Based on the above embodiments, the read area address information further includes the read data pointer position; correspondingly, determining whether the first target data is correct includes:

[0042] Read data at a position offset by 1 from the data pointer position as the initial data;

[0043] Invert the labeled data to obtain the new labeled data;

[0044] If the marked data is equal to the first target data, then the first target data is determined to be correct; otherwise, the first target data is determined to be incorrect.

[0045] Based on the above embodiments, the drive operation address information further includes write area address information and second traffic light address information, and the drive operation instruction information includes write data instruction, acquire traffic light instruction and release traffic light instruction;

[0046] Accordingly, the step of calling the target driver operation function corresponding to the driver operation instruction information in the preset PCIE driver module based on the driver operation address information and the driver operation instruction information includes:

[0047] The target write region address is obtained based on the PCIe memory space address and the write region address information;

[0048] The second target semaphore address is obtained based on the PCIE memory space address and the second semaphore address information;

[0049] Based on the address of the second target traffic light, the function to obtain traffic light instruction is called to apply for permission for the second target traffic light. If successful, the write area corresponding to the address of the target write area is determined to be writable.

[0050] Based on the target write area address, the write data instruction function is called to write the second target data, and the permission of the second target semaphore is released.

[0051] The beneficial effects of this application are as follows: The PCIE data processing method under the NeoKylin system provided in this application firstly acquires driver device information and operation data information; the operation data information includes open device instruction information, driver operation address information, and driver operation instruction information; then, according to the driver device information and the open device instruction information, the "open device" driver operation function in the preset PCIE driver module is called to open the target driver device; furthermore, according to the driver operation address information and the driver operation instruction information, the target driver operation function corresponding to the driver operation instruction information in the preset PCIE driver module is called to perform the corresponding target driver operation on the target driver device.

[0052] In summary, this method creates a preset PCIe driver module and loads it into the bus system kernel. Based on this preset PCIe driver module, it adaptively establishes a driver relationship between the driver device and the bus system. Then, according to the driver device information, it calls the "Open Device" driver operation function in the preset PCIe driver module to open the target driver device. Based on the operation data information, it calls the target driver operation function in the preset PCIe driver module corresponding to the driver operation instruction information to perform corresponding target driver operations on the target driver device. This achieves PCIe driver operations including at least read and write functions, solving the PCIe driver problem under the NeoKylin system. Attached Figure Description

[0053] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0054] Figure 1 This is a flowchart illustrating a PCIE data processing method under the NeoKylin system, provided as an embodiment of the present invention.

[0055] Figure 2 This is a schematic diagram of the process for creating a preset PCIE driver module according to an embodiment of the present invention;

[0056] Figure 3 A schematic diagram of the hardware structure of a computer device provided in an embodiment of the present invention. Detailed Implementation

[0057] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0058] Figure 1 This invention provides a flowchart illustrating a PCIE data processing method under the NeoKylin system, as shown below. Figure 1 As shown, the PCIE data processing method under the NeoKylin system provided by the present invention includes:

[0059] S1. Obtain driver device information and operation data information; the operation data information includes device opening instruction information, driver operation address information, and driver operation instruction information.

[0060] Specifically, before performing step S1 of this application, it is necessary to create the preset PCIE driver module: register the PCIE driver; build the PCIE driver interface; compile the PCIE driver module; and load the PCIE driver module.

[0061] The process includes registering a PCIe driver: defining a device data structure and creating a device data instance object; wherein the parameters of the device data instance object include driver device information cdev, memory space address menBase, and semaphore address semAddr; defining a driver data structure and creating a driver data instance object; wherein the parameters of the driver data instance object include a list of driver device IDs; obtaining the I / O space address length LEN1, the first address baseAddr1, and the semaphore address length LEN2 of the PCIe driver module based on the driver device information cdev and the driver device ID table; and configuring the PCIe driver module according to the first address baseAddr1 and I / O space address length LEN1 corresponding to the I / O space region of the PCIe driver module. The I / O space address corresponding to the PCIe driver module is mapped to the kernel space of the bus system to obtain the kernel I / O space address. Based on the first address baseAddr1 and I / O space address length LEN1 corresponding to the I / O space region of the PCIe driver module, the second address baseAddr2 corresponding to the semaphore region is determined. Based on the second address baseAddr2 and the semaphore address length LEN2, the semaphore address corresponding to the PCIe driver module is mapped to the kernel space of the bus system to obtain the kernel semaphore address. The kernel I / O space address is filled back into the memory space address menBase to obtain the PCIe memory space address, and the kernel semaphore address is filled back into the semaphore address semAddr to obtain the PCIe semaphore address. The PCIe driver interface is constructed by defining the operation data structure and creating an operation data instantiation object. The parameters of the operation data instantiation object include the driver operation address and the driver operation instruction. The PCIe driver module is compiled by creating a list of relationships between the driver operation instructions and driver operation functions, and generating the driver operation function executable file. Loading the PCIe driver module: Use the insmod command to connect the PCIe driver module to the kernel, which allows access to the bus system kernel and thus enables the operation of the PCIe driver module.

[0062] After the pre-built PCIE driver module is created, the bus system receives the driver instructions issued by the upper-layer application. Based on the driver instructions, it obtains the driver device information and operation data information. The driver device information can be a pre-stored device name or device number. For example, a pre-stored device ID table: instantiate the ID table array pcie_tbl, where the fields include: PCIE vendor, device ID, sub-vendor (can be filled with PCI_ANY_ID), sub-device ID (can be filled with PCI_ANY_ID), type (0), type mask (0), device information (0); it can also be other identification information used to distinguish devices. The specific settings and adjustments can be made according to the actual situation, and no specific limitation is made here. The operation data information can include driver operation address information, driver operation instruction information, and other information. The specific settings and adjustments can be made according to the actual situation, and no specific limitation is made here.

[0063] The device opening instruction information is used to open the target driver device; the driver operation address information includes the PCIe memory space address and the pointer position information corresponding to the driver operation address, and may also include other information, which can be set and adjusted according to the actual situation, and is not specifically limited here; the driver operation instruction information may include read data instructions, write data instructions, acquire semaphore instructions and release semaphore instructions, and may also include board detection instruction functions, semaphore status acquisition instruction functions, board working mode setting instruction functions, board working mode acquisition instruction functions, and other instruction information, which can be set and adjusted according to the actual situation, and is not specifically limited here.

[0064] S2. Based on the driver device information and the open device instruction information, call the "open device" driver operation function in the preset PCIE driver module to open the target driver device;

[0065] Specifically, based on the driver device ID, the "Open Device" driver operation function in the preset PCIE driver module is invoked to open the target driver device corresponding to the driver device ID. The "Open Device" driver operation function (open) implementation steps may include: setting input parameters: device name and operable permissions; using the bus system function container_of to obtain the current device; and returning the device's operation handle and a successful opening flag.

[0066] S3. Based on the driver operation address information and the driver operation instruction information, call the target driver operation function in the preset PCIE driver module that corresponds to the driver operation instruction information, and perform the corresponding target driver operation on the target driver device.

[0067] Specifically, the driver operation address information includes the PCIe memory space address and the pointer position information corresponding to the driver operation address. It may also include other information, which can be set and adjusted according to actual conditions; no specific limitations are made here. The driver operation address is determined based on the PCIe memory space address and the pointer position information corresponding to the driver operation address. Then, based on the driver operation instruction information, the relationship list between driver operation instructions and driver operation functions in the preset PCIe driver module is searched. The driver operation function corresponding to the driver operation instruction information is determined as the target driver operation function. The driver operation function execution file corresponding to the target driver operation function is called to perform the corresponding target driver operation on the target driver device.

[0068] The PCIE data processing method under the NeoKylin system provided in this application firstly acquires driver device information and operation data information; the operation data information includes open device instruction information, driver operation address information, and driver operation instruction information; then, based on the driver device information and the open device instruction information, the "open device" driver operation function in the preset PCIE driver module is called to open the target driver device; furthermore, based on the driver operation address information and the driver operation instruction information, the target driver operation function corresponding to the driver operation instruction information in the preset PCIE driver module is called to perform the corresponding target driver operation on the target driver device.

[0069] This method creates a preset PCIe driver module and loads it into the bus system kernel. Based on this preset PCIe driver module, it adaptively establishes a driver relationship between the driver device and the bus system. Then, based on the driver device information, it calls the "open device" driver operation function in the preset PCIe driver module to open the target driver device, and based on the operation data information, it calls the target driver operation function in the preset PCIe driver module corresponding to the driver operation instruction information to perform the corresponding target driver operation on the target driver device. This achieves PCIe driver operation including at least read and write functions, and solves the PCIe driver problem under the NeoKylin system.

[0070] Based on the above embodiments, the method further includes, before performing step S1:

[0071] S0' Initialize the preset PCIE driver module.

[0072] Specifically, a. Create a device tree and obtain the device serial number; b. Using the device serial number as a parameter, request a device number from the bus system using the bus system function register_chrdev_region. If the request fails, dynamically request a device number using the bus system function alloc_chrdev_region. If the request succeeds, proceed to the next step; otherwise, report an error and exit; c. Allocate memory space for the instance object pcieTest_dev_obj. If the allocation fails, unregister the requested device number using the system function unregister_chrdev_region and report an error and exit; d. Initialize all fields of the device instance object pcieTest_dev_obj to 0; e. Use the character device cdev in the instance object pcieTest_dev_obj. The process begins by initializing the driver device using the system function `cdev_init` with pointers to the driver and the device operation pointer as parameters. The next steps are: f) Setting the owner and operation methods for the driver device; g) Adding the driver device to the bus system using the system function `cdev_add`. If adding fails, the system function `unregister_chrdev_region` is used to unregister the requested device number and exit with an error message; otherwise, the process continues; h) Registering the driver to the PCIe kernel using the system function `pci_register_driver` with the driver instance object `pcieTest_pci_driver` as a parameter. If registration fails, the system function `pci_unregister_driver` is used to unregister the driver and return an error message; otherwise, a success message is returned. Loading the PCIe driver module involves using the `insmod` command to load the module functions into the module and link it to the kernel. This allows access to kernel public symbols, enabling module operations.

[0073] Based on the above embodiments, the method further includes, before performing step S1:

[0074] S0. Create the preset PCIE driver module.

[0075] The creation of the preset PCIE driver module includes:

[0076] S01. Register the PCIe driver;

[0077] S02, Construct the PCIE driver interface;

[0078] S03. Compile the PCIE driver module;

[0079] S04. Load the PCIe driver module.

[0080] Specifically, registering a PCIe driver includes: defining a device data structure and creating a device data instantiation object; wherein the parameters of the device data instantiation object include driver device information cdev, memory space address menBase, and semaphore address semAddr; defining a driver data structure and creating a driver data instantiation object; wherein the parameters of the driver data instantiation object include a list of driver device IDs; mapping the I / O space address corresponding to the PCIe driver module to the kernel space of the bus system according to the driver device information cdev and the driver device ID, to obtain the kernel I / O space address; mapping the semaphore address corresponding to the PCIe driver module to the kernel space of the bus system according to the I / O space region of the PCIe driver module and the semaphore address semAddr, to obtain the kernel semaphore address; filling the kernel I / O space address back into the memory space address menBase to obtain the PCIe memory space address, and filling the kernel semaphore address back into the semaphore address semAddr to obtain the PCIe semaphore address.

[0081] Constructing a PCIe driver interface includes: defining an operation data structure and creating an operation data instantiation object; wherein, the parameters of the operation data instantiation object include the driver operation address and the driver operation instruction.

[0082] The process of compiling the PCIE driver module includes: creating a new makefile, creating a list of relationships between the driver operation instructions and driver operation functions, and storing it in the makefile; and compiling the makefile under Kylin OS to generate the executable file of the driver operation functions.

[0083] Loading the PCIE driver module involves using the insmod command to connect the PCIE driver module to the kernel, which allows access to the bus system kernel and thus enables the operation of the PCIE driver module.

[0084] Based on the above embodiments, the registration of the PCIE driver further includes:

[0085] Define the device data structure and create a device data instantiation object; wherein, the parameters of the device data instantiation object include driver device information cdev, memory space address menBase, and semaphore address semAddr;

[0086] Specifically, a PCIe device data structure pcieTest_dev is defined, and an instantiated object is pcieTest_dev_obj. The parameters of the device data instantiated object include driver device information cdev, memory space address menBase, and semaphore address semAddr. It may also include semaphore sem, device pointer pci_devp, and other parameters. These can be set and adjusted according to the actual situation, and no specific limitation is made here.

[0087] Define the driver data structure and create a driver data instantiation object; wherein, the parameters of the driver data instantiation object include a list of driver device IDs;

[0088] Specifically, a PCIE driver data structure `pcieTest_pci_driver` is defined, and an instantiated object is `pcieTest_driver`. The parameters of this instantiated driver data object include a list of driver device IDs, which includes the correspondence between driver device names or driver device IDs and their operating address information. The operating address information includes the I / O space address length LEN1 and the first address `baseAddr1` of the PCIE driver module, as well as the semaphore address length LEN2. Additionally, the parameters may include probe function pointers, remove function pointers, device ID table pointers, suspended function pointers, and resume function pointers. Other parameters may also be included, and can be set and adjusted according to actual needs; no specific limitations are made here.

[0089] Based on the driver device information cdev and the driver device ID table, obtain the I / O space address length LEN1, the first starting address baseAddr1, and the semaphore address length LEN2 of the PCIE driver module;

[0090] Specifically, based on the driver device information cdev, the I / O space address length LEN1, the first address baseAddr1, and the semaphore address length LEN2 of the PCIE driver module corresponding to the driver device information cdev are searched in the driver device ID table.

[0091] Based on the first starting address baseAddr1 and the I / O space address length LEN1 corresponding to the I / O space region of the PCIE driver module, the I / O space address corresponding to the PCIE driver module is mapped to the kernel space of the bus system to obtain the kernel I / O space address.

[0092] Specifically, the first starting address baseAddr1 is located in the I / O space region of the PCIE driver module. The I / O space address length LEN1 is started from the first starting address baseAddr1 to determine the address of the I / O space region. This address is then mapped to the kernel space of the linear system to obtain the kernel I / O space address.

[0093] Based on the first address baseAddr1 and I / O space address length LEN1 corresponding to the I / O space region of the PCIE driver module, the second address baseAddr2 corresponding to the semaphore region is determined. Based on the second address baseAddr2 and the semaphore address length LEN2, the semaphore address corresponding to the PCIE driver module is mapped to the kernel space of the bus system to obtain the kernel semaphore address.

[0094] Specifically, the first position after adding the I / O space address length LEN1 to the first address baseAddr1 corresponding to the I / O space region of the PCIE driver module is used as the second address baseAddr2 corresponding to the semaphore region. Based on the second address baseAddr2 and the semaphore address length LEN2, the semaphore address corresponding to the PCIE driver module is determined. Then, the semaphore address corresponding to the PCIE driver module is mapped to the kernel space of the bus system to obtain the kernel semaphore address.

[0095] The kernel I / O space address is filled back into the memory space address menBase to obtain the PCIE memory space address, and the kernel semaphore address is filled back into the semaphore address semAddr to obtain the PCIE semaphore address.

[0096] Specifically, the kernel I / O space address is filled back into the memory space address menBase to obtain the PCIE memory space address, and the kernel semaphore address is filled back into the semaphore address semAddr to obtain the PCIE semaphore address. In this way, the correspondence between the driver device, memory space address and semaphore address is established, and a connection is established with the bus kernel, laying the foundation for the execution of subsequent driver operation instructions.

[0097] Based on the above embodiments, the construction of the PCIE driver interface further includes:

[0098] Define the operation data structure and create an operation data instantiation object; wherein, the parameters of the operation data instantiation object include the driver operation address and the driver operation instruction;

[0099] Accordingly, the compiled PCIE driver module includes:

[0100] Create a list of relationships between the drive operation instructions and drive operation functions;

[0101] Generate the executable file of the driver operation function.

[0102] Specifically, an operation data structure is defined, and the instantiated object is pcie_fops. The parameters of the operation data instantiated object include the driver operation address and the driver operation instructions. The driver operation instructions may include read data operation instructions (read) and write data operation instructions (write). Correspondingly, the driver operation address includes the current read / write position (llseek). Of course, the driver operation instructions may also include send specific command operation instructions (iotcl), release file operation instructions (release), etc. The specific settings can be configured according to the actual situation, and no specific limitation is made here.

[0103] Accordingly, specifically, a new Makefile is created, containing a list of relationships between the driver operation instructions and driver operation functions, and stored in this Makefile. Under the Kylin operating system, the Makefile is compiled to generate the executable files of the driver operation functions, completing the compilation of the PCIE driver module. Then, the `insmod` command is used to connect the PCIE driver module to the kernel, allowing access to the bus system kernel to perform operations on the PCIE driver module, thus completing the loading of the PCIE driver module. The driver operation functions also include functions for detecting the board, releasing semaphores, acquiring semaphores, acquiring semaphore status, viewing detection results, setting the board's operating mode, acquiring the board's operating mode, reading data, writing data, and setting the I / O operation debouncing interval. Each driver operation function has corresponding driver operation instructions. It is understood that other driver operation functions may also be included; the specific settings and adjustments can be made according to actual needs, and no specific limitations are made here.

[0104] The board detection function implements the following steps: 1) Use the bus system function ioread8 to read the data in the memory space address memBase; 2) Compare the data with the initially defined board characters. If they match, the board version is correct and a success is returned; otherwise, an error is returned.

[0105] The steps of the function to release traffic lights are as follows: 1) Determine whether the traffic light number is within the defined range {1, 8}. If it is, proceed to the next step; otherwise, return an error and exit the function.

[0106] 2) Use the system function iowrite16 to write 0xffff to the semaphore address semAddr, and then use the function ioread16 to read back the value of that address. If the read data is 0xffff, it means that the release was successful and a success flag is returned; otherwise, an error is returned.

[0107] The steps for implementing the function to obtain traffic lights are as follows: 1) Determine whether the traffic light number is within the defined range {1, 8}. If it is, proceed to the next step; otherwise, return an error and exit the function.

[0108] 2) Write 0x0 to the semaphore address semAddr in a loop, then read back to see if it is zero. At the same time, count the number of times it is written. If it is not zero, delay for 1ms and continue. If it is zero, exit the loop. 3) If the number of times the loop writes exceeds 1000, release the semaphore and return an error. Otherwise, return success.

[0109] The steps for implementing the function to obtain the traffic light status are as follows: 1) Determine whether the traffic light number is within the defined range {1, 8}. If it is, proceed to the next step; otherwise, return an error and exit the function. 2) Use the function ioread16 to read back the value of the traffic light number address and return the value.

[0110] The function to view the detection results is implemented as follows: Use the system function ioread16 to read the memory address (i.e., ioread16(memBase+ResultLen)) containing the memory address at the length specified by the offset protocol of memBase, and return the value.

[0111] The steps for setting the board's working mode are as follows: Use the system function iowrite16 to write the address of the memory address memBase offset protocol-specified length workLen to the passed parameter value, and then check whether the written value is the exit working mode value. If it is correct, write zero value to the address of the memory address memBase offset protocol-specified length exitLen, and return a success flag.

[0112] The steps to obtain the board's working mode function are as follows: Use the system function ioread16 to read the content of the address where the memory address memBase offset protocol specifies the length workLen (i.e., ioread16(memBase+workLen)) is located, and return the value.

[0113] The steps to set the I / O operation debouncing interval function are as follows: Use the bus system function iowrite16 to write the address location specified by the protocol to the debouncing time, and then use the function ioread16 to read back the value written to that address and return the value.

[0114] Based on the above embodiments, the acquisition of drive device information and operation data information further includes:

[0115] Call the device data instantiation object to find the driver device information;

[0116] The operation data instantiated object is invoked to find the driver operation address and driver operation instructions.

[0117] Specifically, the device data instantiation object `pcieTest_dev_obj` is invoked to find the driver device information; whereby the driver device information can be a pre-stored device name or device number. The operation data instantiation object `pcie_fops` is invoked to find the driver operation address and driver operation instructions. The driver operation instructions can include read data operation instructions (`read`) and write data operation instructions (`write`). Correspondingly, the driver operation address includes the current read / write position (`llseek`). Of course, the driver operation instructions can also include send specific command operation instructions (`iotcl`), release file operation instructions (`release`), etc., which can be set according to the actual situation and are not specifically limited here.

[0118] The following sections will use reading and writing data as examples to illustrate the specific process of the PCIE data processing method provided in this application.

[0119] Based on the above embodiments, the drive operation address information further includes reading area address information and first traffic light address information, and the drive operation instruction information includes reading data instruction, acquiring traffic light instruction, and releasing traffic light instruction;

[0120] Specifically, the drive operation instructions include a read data instruction, a acquire semaphore instruction, and a release semaphore instruction. The acquire semaphore instruction acquires semaphore permission corresponding to a specific drive operation address of the drive device. If the semaphore permission is successfully acquired, the corresponding drive operation address in the memory space of the drive device becomes operable. After acquiring the semaphore permission, a success flag is returned, indicating that the drive device's card is in a working state and that the corresponding drive operation address is in operation. Correspondingly, the release semaphore instruction releases the semaphore permission of the corresponding drive operation address after completing the read data drive operation on the drive device, indicating that the drive device's card is in a non-working state and that the corresponding drive operation address is in a free state.

[0121] Accordingly, the step of calling the target driver operation function corresponding to the driver operation instruction information in the preset PCIE driver module according to the driver operation address information and the driver operation instruction information, and performing the corresponding target driver operation on the target driver device, includes:

[0122] The target read region address is obtained based on the PCIe memory space address and the read region address information;

[0123] The first target semaphore address is obtained based on the PCIe memory space address and the first semaphore address information;

[0124] Based on the address of the first target traffic light, the function to obtain traffic light instruction is called to apply for permission to the first target traffic light. If successful, the reading area corresponding to the target reading area address is determined to be in a readable state.

[0125] Based on the target reading area address, the data reading instruction function is invoked to read the first target data;

[0126] Determine if the target data is correct. If it is, display the target data and release the target traffic light permission.

[0127] Specifically, the read driver address information is the read data pointer position. Based on the read data pointer position, the target read region address is determined in the PCIe memory space address. The first semaphore is the semaphore corresponding to the read data driver operation address (i.e., the target read region address) of the driver device. Based on the first semaphore address information, the first semaphore pointer position is determined. Based on the first semaphore pointer position, the first target semaphore address is determined in the PCIe memory space address. Based on the first target semaphore address, the semaphore acquisition instruction function is called to request the first target semaphore permission. If successful, the read region corresponding to the target read region address is determined to be in a readable state. Based on the target read region address, the read data instruction function is called to read the first target data. It is determined whether the target data is correct. If so, the target data is displayed and the target semaphore permission is released.

[0128] Based on the above embodiments, the read area address information further includes the read data pointer position; correspondingly, determining whether the first target data is correct includes:

[0129] Read data at a position offset by 1 from the data pointer position as the initial data;

[0130] Invert the labeled data to obtain the new labeled data;

[0131] If the marked data is equal to the first target data, then the target data is determined to be correct; otherwise, the first target data is determined to be incorrect.

[0132] Based on the above embodiments, the drive operation address information further includes write area address information and second traffic light address information, and the drive operation instruction information includes write data instruction, acquire traffic light instruction function and release traffic light instruction function;

[0133] Specifically, the drive operation instructions include a write data instruction, a acquire semaphore instruction, and a release semaphore instruction. The acquire semaphore instruction acquires semaphore permission corresponding to a specific drive operation address of the drive device. If the semaphore permission is successfully acquired, the corresponding drive operation address in the memory space of the drive device becomes operable. After acquiring the semaphore permission, a success flag is returned, indicating that the drive device's card is in a working state and that the corresponding drive operation address is in operation. Correspondingly, the release semaphore instruction releases the semaphore permission of the corresponding drive operation address after completing the drive operation of reading data from the drive device, indicating that the drive device's card is in a non-working state and that the corresponding drive operation address is in a free state.

[0134] Accordingly, the step of calling the target driver operation function corresponding to the driver operation instruction information in the preset PCIE driver module based on the driver operation address information and the driver operation instruction information includes:

[0135] The target write region address is obtained based on the PCIe memory space address and the write region address information;

[0136] The second target semaphore address is obtained based on the PCIE memory space address and the second semaphore address information;

[0137] Based on the address of the second target traffic light, the function to obtain traffic light instruction is called to apply for permission for the second target traffic light. If successful, the write area corresponding to the address of the target write area is determined to be writable.

[0138] Based on the target write area address, the write data instruction function is called to write the second target data, and the permission of the second target semaphore is released.

[0139] Specifically, the write driver address information is the write data pointer position. Based on the write data pointer position, the target write region address is determined in the PCIe memory space address. The first semaphore is the semaphore corresponding to the write data driver operation address (i.e., the target write region address) of the driver device. Based on the second semaphore address information, the second semaphore pointer position is determined in the PCIe memory space address. Based on the second target semaphore address, the semaphore acquisition instruction function is called to request the second target semaphore permission. If successful, the write region corresponding to the target write region address is determined to be writable. Based on the target write region address, the write data instruction function is called to write the second target data. The target write region address `writePtr` is obtained, and the second target data is written to the address where `(writePtr+1)` is located. Simultaneously, the written data is inverted and then written to the address where `(writePtr+2)` is located. The `writePtr` address is then set to indicate that the writing is complete. Finally, the second target semaphore permission is released.

[0140] The PCIE data processing method under the NeoKylin system provided in this application firstly acquires driver device information and operation data information; the operation data information includes open device instruction information, driver operation address information, and driver operation instruction information; then, based on the driver device information and the open device instruction information, the "open device" driver operation function in the preset PCIE driver module is called to open the target driver device; furthermore, based on the driver operation address information and the driver operation instruction information, the target driver operation function corresponding to the driver operation instruction information in the preset PCIE driver module is called to perform the corresponding target driver operation on the target driver device.

[0141] This method creates a preset PCIe driver module and loads it into the bus system kernel. Based on this preset PCIe driver module, it adaptively establishes a driver relationship between the driver device and the bus system. Then, based on the driver device information, it calls the "open device" driver operation function in the preset PCIe driver module to open the target driver device, and based on the operation data information, it calls the target driver operation function in the preset PCIe driver module corresponding to the driver operation instruction information to perform the corresponding target driver operation on the target driver device. This achieves PCIe driver operation including at least read and write functions, and solves the PCIe driver problem under the NeoKylin system.

[0142] This application also provides a computer device, the device comprising: a memory for storing executable program code; and one or more processors for reading the executable program code stored in the memory to execute the PCIE data processing method under the NeoKylin system as described above. Please refer to... Figure 3 A schematic diagram of the hardware structure of a computer device is provided.

[0143] The computer system includes a central processing unit (CPU) 301, which can perform various appropriate actions and processes based on programs stored in read-only memory (ROM) 302 or programs loaded from storage into random access memory (RAM) 303. RAM 303 also stores various programs and data required for system operation. The CPU 301, ROM 302, and RAM 303 are interconnected via a bus 304. An input / output (I / O) interface 305 is also connected to the bus 304.

[0144] The following components are connected to I / O interface 305: an input section 306 including a keyboard, mouse, etc.; an output section including a cathode ray tube (CRT), liquid crystal display (LCD), etc., and speakers, etc.; a storage section 308 including a hard disk, etc.; and a communication section 309 including a network interface card such as a LAN card, modem, etc. The communication section 309 performs communication processing via a network such as the Internet. A drive is also connected to I / O interface 305 as needed. A removable medium 311, such as a disk, optical disk, magneto-optical disk, semiconductor memory, etc., is installed on drive 310 as needed so that computer programs read from it can be installed into storage section 308 as needed.

[0145] Specifically, according to embodiments of the present invention, the process described above in the PCIE data processing method under the NeoKylin system can be implemented as a computer software program. For example, an embodiment of the present invention relating to the PCIE data processing method under the NeoKylin system includes a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network via a communication component, and / or installed from a removable medium. When the computer program is executed by the central processing unit (CPU) 301, it performs the functions defined above in the system of this application.

[0146] It should be noted that the computer-readable medium shown in this invention can be a computer-readable signal medium or a computer-readable storage medium, or any combination thereof. A computer-readable storage medium can be, for example,—but not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of a computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this invention, a computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. In this invention, a computer-readable signal medium can include a data signal propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals can take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. Computer-readable signal media can also be any computer-readable medium other than computer-readable storage media, which can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the computer-readable medium can be transmitted using any suitable medium, including but not limited to: wireless, wire, optical fiber, RF, etc., or any suitable combination thereof.

[0147] The flowcharts and block diagrams in the accompanying drawings illustrate the possible architecture, functions, and operations of the PCIE data processing method, apparatus, and computer program product under the Kylin system according to the present invention. In this regard, each block in the flowchart or block diagram may represent a module, program segment, or part of code, which contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than those shown in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagram or flowchart, and combinations of blocks in the block diagram or flowchart, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0148] The units described in the embodiments of the present invention can be implemented in software or hardware, and the described units can also be located in a processor. The names of these units do not necessarily limit the specific unit itself. The described units or modules can also be located in a processor; for example, a processor can be described as including an acquisition module, a first invocation module, and a second invocation module. Again, the names of these units or modules do not necessarily limit the specific unit or module itself.

[0149] In another aspect, this application also provides a computer-readable medium, which may be included in the electronic device described in the above embodiments; or it may exist independently and not assembled into the electronic device. The computer-readable medium carries one or more programs, which, when executed by the electronic device, cause the electronic device to implement the PCIE data processing method under the Kylin system as described in the above embodiments.

[0150] It should be noted that although several modules or units for the device used to perform actions have been mentioned in the detailed description above, this division is not mandatory. In fact, according to embodiments of this disclosure, the features and functions of two or more modules or units described above can be embodied in one module or unit. Conversely, the features and functions of one module or unit described above can be further divided and embodied by multiple modules or units.

[0151] Furthermore, although the steps of the method in this disclosure are described in a specific order in the accompanying drawings, this does not require or imply that the steps must be performed in that specific order, or that all the steps shown must be performed to achieve the desired result. Additionally or alternatively, certain steps may be omitted, multiple steps may be combined into one step, and / or a step may be broken down into multiple steps.

[0152] From the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments described herein can be implemented by software or by combining software with necessary hardware.

[0153] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A PCIE data processing method under the NeoKylin system, characterized in that, include: S1. Obtain drive device information and operation data; The operation data information includes device opening instruction information, driver operation address information, and driver operation instruction information; S2. Based on the driver device information and the open device instruction information, call the "open device" driver operation function in the preset PCIE driver module to open the target driver device; S3. Based on the driver operation address information and the driver operation instruction information, call the target driver operation function in the preset PCIE driver module that corresponds to the driver operation instruction information, and perform the corresponding target driver operation on the target driver device. Before performing step S1, the method further includes: S0. Create the preset PCIE driver module; The creation of the preset PCIE driver module includes: S01. Register the PCIe driver; S02, Construct the PCIE driver interface; S03. Compile the PCIE driver module; S04. Install the PCIe driver module; Registering a PCIe driver includes: defining a device data structure and creating a device data instantiation object; wherein the parameters of the device data instantiation object include driver device information cdev, memory space address menBase, and semaphore address semAddr; defining a driver data structure and creating a driver data instantiation object; wherein the parameters of the driver data instantiation object include a list of driver device IDs; mapping the I / O space address corresponding to the PCIe driver module to the kernel space of the bus system according to the driver device information cdev and the driver device ID, to obtain the kernel I / O space address; mapping the semaphore address corresponding to the PCIe driver module to the kernel space of the bus system according to the I / O space region of the PCIe driver module and the semaphore address semAddr, to obtain the kernel semaphore address; filling the kernel I / O space address back into the memory space address menBase to obtain the PCIe memory space address, and filling the kernel semaphore address back into the semaphore address semAddr to obtain the PCIe semaphore address; Constructing a PCIe driver interface includes: defining an operation data structure and creating an operation data instantiation object; wherein, the parameters of the operation data instantiation object include the driver operation address and the driver operation instruction; The compilation of the PCIE driver module includes: creating a new makefile, creating a list of relationships between the driver operation instructions and driver operation functions, and storing it in the makefile; compiling the makefile under Kylin OS to generate the executable file of the driver operation functions; Loading the PCIE driver module involves using the insmod command to connect the PCIE driver module to the kernel and accessing the bus system kernel to enable the operation of the PCIE driver module.

2. The PCIe data processing method according to claim 1, characterized in that, Before performing step S1, the method further includes: S0' Initialize the preset PCIE driver module.

3. The PCIE data processing method according to claim 1, characterized in that, The S01 step of registering the PCIE driver includes: Define the device data structure and create a device data instantiation object; wherein, the parameters of the device data instantiation object include driver device information cdev, memory space address menBase, and semaphore address semAddr; Define the driver data structure and create a driver data instantiation object; wherein, the parameters of the driver data instantiation object include a list of driver device IDs; Based on the driver device information cdev and the driver device ID table, obtain the I / O space address length LEN1, the first starting address baseAddr1, and the semaphore address length LEN2 of the PCIE driver module; Based on the first starting address baseAddr1 and the I / O space address length LEN1 corresponding to the I / O space region of the PCIE driver module, the I / O space address corresponding to the PCIE driver module is mapped to the kernel space of the bus system to obtain the kernel I / O space address. Based on the first address baseAddr1 and I / O space address length LEN1 corresponding to the I / O space region of the PCIE driver module, the second address baseAddr2 corresponding to the semaphore region is determined. Based on the second address baseAddr2 and the semaphore address length LEN2, the semaphore address corresponding to the PCIE driver module is mapped to the kernel space of the bus system to obtain the kernel semaphore address. The kernel I / O space address is filled back into the memory space address menBase to obtain the PCIE memory space address, and the kernel semaphore address is filled back into the semaphore address semAddr to obtain the PCIE semaphore address.

4. The PCIe data processing method according to claim 3, characterized in that, S02, constructing the PCIE driver interface includes: Define the operation data structure and create an operation data instantiation object; wherein, the parameters of the operation data instantiation object include the driver operation address and the driver operation instruction; Accordingly, the compiled PCIE driver module includes: Create a list of relationships between the drive operation instructions and drive operation functions; Generate the executable file of the driver operation function.

5. The PCIE data processing method according to claim 4, characterized in that, The acquisition of drive device information and operation data information includes: Call the device data instantiation object to find the driver device information; The operation data instantiated object is invoked to find the driver operation address and driver operation instructions.

6. The PCIe data processing method according to claim 5, characterized in that, The drive operation address information includes read area address information and first traffic light address information, and the drive operation instruction information includes read data instruction, acquire traffic light instruction and release traffic light instruction; Accordingly, the step of calling the target driver operation function corresponding to the driver operation instruction information in the preset PCIE driver module according to the driver operation address information and the driver operation instruction information, and performing the corresponding target driver operation on the target driver device, includes: The target read region address is obtained based on the PCIe memory space address and the read region address information; The first target semaphore address is obtained based on the PCIe memory space address and the first semaphore address information; Based on the address of the first target traffic light, the function to obtain traffic light instruction is called to apply for permission to the first target traffic light. If successful, the reading area corresponding to the target reading area address is determined to be in a readable state. Based on the target reading area address, the data reading instruction function is invoked to read the first target data; Determine if the first target data is correct. If it is, display the first target data and release the permission for the first target semaphore.

7. The PCIe data processing method according to claim 6, characterized in that, The read area address information includes the read data pointer position; correspondingly, determining whether the first target data is correct includes: Read data at a position offset by 1 from the data pointer position as the initial data; The initial data is inverted to obtain the labeled data; If the marked data is equal to the first target data, then the first target data is determined to be correct; otherwise, the first target data is determined to be incorrect.

8. The PCIE data processing method according to claim 7, characterized in that, The drive operation address information includes write area address information and second traffic light address information, and the drive operation instruction information includes write data instruction, acquire traffic light instruction and release traffic light instruction; Accordingly, the step of calling the target driver operation function corresponding to the driver operation instruction information in the preset PCIE driver module based on the driver operation address information and the driver operation instruction information includes: The target write region address is obtained based on the PCIe memory space address and the write region address information; The second target semaphore address is obtained based on the PCIE memory space address and the second semaphore address information; Based on the address of the second target traffic light, the function to obtain traffic light instruction is called to apply for permission for the second target traffic light. If successful, the write area corresponding to the address of the target write area is determined to be writable. Based on the target write area address, the write data instruction function is called to write the second target data, and the permission of the second target semaphore is released.

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