Display device and method for driving display device

Abstract

A display device and a method for driving the display device are provided. The display device includes a sensor, a timing controller, and a data driver. The sensor senses characteristic values ​​of circuit elements included in pixels of the display device using an input initialization voltage and an input data voltage during a sensing period of one frame. The timing controller calculates a compensation data voltage using multiple characteristic values ​​and calculates an adjusted initialization voltage and a data voltage using the compensation data voltage. The data driver outputs the adjusted initialization voltage and data voltage to the pixels during the sensing period in response to a control signal output from the timing controller.

Description

[0001] Cross-references to related applications

[0002] This patent application claims priority to Korean Patent Application No. 10-2021-0065092, filed on May 20, 2021, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] This disclosure relates to a display device and a method for driving the display device. Background Technology

[0004] A flat panel display (FPD) is an electronic display device used to display various content. FPDs are much lighter and thinner than traditional cathode ray tube displays. Examples of FPDs include display devices such as liquid crystal displays (LCDs) and organic light-emitting diode (OLED) displays.

[0005] Organic light-emitting display devices (OLEDs) offer fast response times, efficient light emission, and high-brightness image display. However, the circuitry within each pixel of an OLED can degrade over time. Furthermore, the inherent characteristics of these circuitry elements may change when this degradation occurs. Summary of the Invention

[0006] At least one embodiment of this disclosure provides a display device for determining an initialization voltage and a data voltage that take into account the black data voltage (e.g., the maximum black data voltage) for each sensing mode, and a method for driving the display device.

[0007] According to embodiments of the present disclosure, a display device includes a sensor, a timing controller, and a data driver. The sensor is configured to sense characteristic values ​​of circuit elements included in a pixel of the display device using an input initialization voltage and an input data voltage supplied to the pixel during a sensing period of one frame. The timing controller is configured to calculate a compensation data voltage using a plurality of characteristic values, and to calculate an adjusted initialization voltage and an adjusted data voltage using the compensation data voltage. The data driver is configured to output the adjusted initialization voltage and the adjusted data voltage to the pixel during the sensing period in response to a control signal output from the timing controller.

[0008] In one implementation, the timing controller includes a first logic circuit configured to calculate a compensation data voltage using a maximum threshold voltage compensation value for a driving transistor, a maximum mobility compensation value for a driving transistor, and a maximum characteristic value compensation value for a light-emitting diode, determined based on a plurality of sensed characteristic values.

[0009] In the implementation, the timing controller supports multiple sensing modes, including a threshold voltage sensing mode, a mobility sensing mode, and a characteristic value sensing mode of a light-emitting diode. The timing controller also stores in advance a margin value for the initial voltage of each sensing mode and a gate-source voltage setting value for the gate-source voltage of the driving transistor for each sensing mode.

[0010] In one embodiment, the timing controller further includes a second logic circuit and a third logic circuit. The second logic circuit is configured to calculate an adjusted initialization voltage for each sensing mode using a compensation data voltage and a margin value of the initialization voltage for each sensing mode. The third logic circuit is configured to calculate the adjusted data voltage for each sensing mode using a compensation data voltage and a gate-source voltage setting value of the driving transistor for each sensing mode.

[0011] In an implementation, the data driver further includes an initialization voltage generator and a data voltage generator. When a threshold voltage sensing enable signal corresponding to a first control signal is applied, the initialization voltage generator outputs a first initialization voltage during the sensing period. When a mobility sensing enable signal corresponding to a second control signal is applied, the initialization voltage generator outputs a second initialization voltage during the sensing period. When a characteristic value sensing enable signal corresponding to a third control signal is applied, the initialization voltage generator outputs a third initialization voltage during the sensing period.

[0012] In the implementation, when a threshold voltage sensing enable signal is applied, the data voltage generator outputs a first data voltage during the sensing period; when a mobility sensing enable signal is applied, the data voltage generator outputs a second data voltage during the sensing period; and when a characteristic value sensing enable signal is applied, the data voltage generator outputs a third data voltage during the sensing period.

[0013] In this embodiment, the maximum threshold voltage compensation value corresponds to the maximum value among the maximum value of the multiple threshold voltage values ​​of the multiple driving transistors of the multiple pixels of the display device and the maximum value among the differences between the threshold voltage values ​​other than the maximum value; the maximum mobility compensation value corresponds to the maximum value among the maximum mobility values ​​of the multiple driving transistors and the maximum value among the differences between the mobility values ​​other than the maximum value; and the maximum characteristic value compensation value corresponds to the maximum value among the maximum value of the multiple characteristic values ​​of the multiple light-emitting diodes of the multiple pixels and the maximum value among the differences between the characteristic values ​​of the light-emitting diodes other than the maximum value.

[0014] In one implementation, when the gate-source voltage is constant, the third logic circuit calculates an adjusted data voltage for each sensing mode, which is increased based on the compensation data voltage.

[0015] In the implementation, when the gate-source voltage is not constant, the third logic circuit outputs a constant data voltage for each sensing mode, regardless of the compensation data voltage.

[0016] In this implementation, an adjusted initialization voltage is supplied to the pixel during the blanking period of a frame.

[0017] In this implementation, the adjusted initialization voltage is also supplied to the pixel during the active period of a frame.

[0018] According to embodiments of the present disclosure, a display device includes a sensor. The sensor is configured to sense characteristic values ​​of circuit elements included in a pixel of the display device using an initialization voltage and a data voltage supplied to a pixel during a sensing period of one frame. After a first time interval, the initialization voltage supplied to the pixel during the sensing period is set to a first voltage value, and after a second time interval different from the first time interval, the initialization voltage supplied to the pixel is set to a second voltage value different from the first voltage value. After the first time interval, the data voltage supplied to the pixel during the sensing period is set to a third voltage value, and after the second time interval, the data voltage supplied to the pixel is set to a fourth voltage value different from the third voltage value. The first voltage value is lower than the second voltage value, and the third voltage value is higher than the fourth voltage value.

[0019] According to embodiments of this disclosure, a method for driving a display device is provided, the display device including a sensor, a timing controller, and a data driver. The method includes: sensing characteristic values ​​of circuit elements included in a pixel of the display device by the sensor using an input initialization voltage and an input data voltage supplied to the pixel during a sensing period of one frame time. The method further includes: calculating a compensation data voltage by the timing controller using a plurality of characteristic values, and calculating an adjusted initialization voltage and an adjusted data voltage by the timing controller using the compensation data voltage. The method further includes: outputting the adjusted initialization voltage and the adjusted data voltage to the pixel during the sensing period by the data driver in response to a control signal output from the timing controller.

[0020] In this implementation, calculating the compensation data voltage includes: calculating the compensation data voltage by using the maximum threshold voltage compensation value of the driving transistor, the maximum mobility compensation value of the driving transistor, and the maximum characteristic value compensation value of the light-emitting diode, which are determined based on multiple characteristic values.

[0021] In one embodiment, calculating the adjusted initialization voltage includes: calculating the adjusted initialization voltage from the compensation data voltage of the timing controller and a margin value associated with the mode. In another embodiment, calculating the adjusted data voltage includes: calculating the adjusted data voltage from the compensation data voltage and a gate-source voltage setting value of the gate-source voltage of the driving transistor for the same mode.

[0022] In an implementation, the method further includes: when the mode is a first mode, outputting a first initialization voltage generated from a compensation data voltage and a margin value associated with a threshold voltage of a driving transistor during a sensing period; when the mode is a second mode, outputting a second initialization voltage generated from a compensation data voltage and a margin value associated with the mobility of a driving transistor during a sensing period; and when the mode is a third mode, outputting a third initialization voltage generated from a compensation data voltage and a margin value associated with a characteristic value of a light-emitting diode during a sensing period.

[0023] In an implementation, the method further includes: when the mode is a first mode, outputting a first data voltage generated from a compensation data voltage and a gate-source voltage setting value associated with a threshold voltage of a driving transistor during a sensing period; when the mode is a second mode, outputting a second data voltage generated from a compensation data voltage and a gate-source voltage setting value associated with the mobility of a driving transistor during a sensing period; and when the mode is a third mode, outputting a third data voltage generated from a compensation data voltage and a gate-source voltage setting value associated with a characteristic value of a light-emitting diode during a sensing period.

[0024] In one implementation, when the gate-source voltage of the driving transistor is constant, the adjusted data voltage increases according to the compensation data voltage.

[0025] In this implementation, when the gate-source voltage of the driving transistor is not constant, the adjusted data voltage remains constant, regardless of the compensation data voltage.

[0026] At least one embodiment of the display device and the method of driving the display device according to the present disclosure can reduce the sensing period by using an initialization voltage and a data voltage that take into account the black data voltage (e.g., the maximum black data voltage) for each sensing mode.

[0027] Furthermore, at least one embodiment of the display device and the method of driving the display device according to this disclosure can prevent the degradation of circuit elements included in the pixel by using an initialization voltage and a data voltage that take into account the black data voltage (e.g., the maximum black data voltage) for each sensing period. Attached Figure Description

[0028] The above and other features of this disclosure will become more apparent from the accompanying drawings, which describe embodiments of the present disclosure in a further detailed manner:

[0029] Figure 1 This is a diagram illustrating a display device according to an embodiment of the present disclosure;

[0030] Figure 2 This is a diagram showing the pixels of a display device according to an embodiment of the present disclosure;

[0031] Figure 3 This is a diagram illustrating a sensing operation that senses the inherent characteristic values ​​of the driving transistors of a pixel according to an embodiment of the present disclosure.

[0032] Figure 4 This is a diagram illustrating a method for determining the initialization voltage and data voltage for each characteristic value according to an embodiment of the present disclosure;

[0033] Figure 5 This is a diagram illustrating the process of output initialization voltage and data voltage according to an embodiment of the present disclosure;

[0034] Figures 6A to 6C This is a graph showing the variation of the initialization voltage and data voltage with respect to the maximum black data voltage when the gate-source voltage is constant, according to an embodiment of the present disclosure;

[0035] Figures 7A to 7C This is a graph showing the changes in initialization voltage and data voltage as the gate-source voltage decreases according to the maximum black data voltage, based on an embodiment of the present disclosure;

[0036] Figure 8 This is a diagram illustrating the process of reducing the sensing period using a determined initialization voltage and a determined data voltage according to an embodiment of the present disclosure;

[0037] Figure 9 This is a diagram illustrating the initialization voltage and data voltage in a frame according to an embodiment of the present disclosure, based on the maximum black data voltage; and

[0038] Figure 10 This is a diagram illustrating the initialization voltage and data voltage in a frame according to an embodiment of the present disclosure, based on the maximum black data voltage. Detailed Implementation

[0039] In the following, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. The features of the embodiments and the methods for achieving these features will become apparent from the embodiments described in detail later in conjunction with the accompanying drawings. However, the present disclosure is not limited to the embodiments disclosed below, but can be implemented in various different forms. Throughout this specification, the same reference numerals refer to the same elements.

[0040] In this specification, unless the context clearly indicates otherwise, the singular form also includes the plural form.

[0041] In the following text, reference will be made to Figure 1 A display device according to an embodiment of the present disclosure will be described.

[0042] Figure 1 This is a diagram illustrating a display device according to an embodiment of the present disclosure.

[0043] The display device 100 according to an embodiment of the present disclosure includes a display panel 110, a data driver 120 (e.g., a driver circuit), a gate driver 130 (e.g., a scan driver or scan driver circuit), a timing controller 140 (e.g., a control circuit), a host system 150, and a sensing unit 160 (e.g., a sensor or sensor circuit).

[0044] In the display panel 110, multiple data lines DL1 to DLm (where m is a natural number greater than or equal to 2) and multiple sensing lines I1 to Ip (where p is a natural number greater than or equal to 2) are arranged in a first direction, and multiple gate lines GL1 to GLn (where n is a natural number greater than or equal to 2) are arranged in a second direction intersecting the first direction. Gate lines may also be referred to as scan lines. Additionally, multiple pixels PX may be arranged at the intersections of the multiple data lines DL1 to DLm, the multiple sensing lines I1 to Ip, and the multiple gate lines GL1 to GLn.

[0045] The data driver 120 can supply data voltage to the pixels PX included in the display panel 110 via multiple data lines DL1 to DLm to drive the pixels PX included in the display panel 110.

[0046] Specifically, the data driver 120 can convert the image data Data' received from the timing controller 140 into a data voltage Vdata (refer to...). Figure 2 The data voltage Vdata is supplied through multiple data lines DL1 to DLm.

[0047] Additionally, the data driver 120 may include multiple source driver integrated circuits (ICs) or multiple data driver integrated circuits (ICs). These multiple source driver integrated circuits (ICs) or multiple data driver integrated circuits (ICs) may be connected to the display panel 110, may be directly disposed on the display panel 110, or in some cases may be integrated and disposed on the display panel 110.

[0048] The gate driver 130 can sequentially supply scan signals to the pixels PX included in the display panel 110 through multiple gate lines GL1 to GLn, so as to sequentially drive the pixels PX included in the display panel 110.

[0049] Specifically, under the control of the timing controller 140, the gate driver 130 can sequentially supply scan signals (or gate signals) of turn-on voltage or turn-off voltage to a plurality of gate lines GL1 to GLn. For example, the turn-on voltage can cause pixel PX to receive data voltage, and the turn-off voltage can prevent pixel PX from receiving data voltage.

[0050] Additionally, depending on the driving method, such as Figure 1 As shown, the gate driver 130 may be arranged on one side of the display panel 110, or in some cases, the gate driver 130 may be arranged on both sides of the display panel 110. For example, the gate driver 130 may be implemented by a first gate driving circuit arranged on the left side of the display panel 110 and a second gate driving circuit arranged on the right side of the display panel 110.

[0051] Additionally, the gate driver 130 may include a plurality of gate driver integrated circuits (ICs). These multiple gate driver integrated circuits (ICs) may be connected to the display panel 110, may be directly disposed on the display panel 110, or in some cases may be integrated and disposed on the display panel 110. In one embodiment, the multiple gate driver integrated circuits (ICs) include shift registers.

[0052] The timing controller 140 can supply the data control signal DCS to the data driver 120 and the gate control signal GCS to the gate driver 130 to control the operation of the data driver 120 and the gate driver 130.

[0053] Specifically, the timing controller 140 can receive timing signals such as vertical synchronization signals, horizontal synchronization signals, input data enable (DE) signals, and clock signals, generate various control signals (e.g., data control signal DCS and gate control signal GCS), and output the data control signal DCS to the data driver 120 and the gate control signal GCS to the gate driver 130.

[0054] In one embodiment, the timing controller 140 outputs a gate control signal GCS, which includes a gate start pulse, a gate shift clock signal, and a gate output enable signal, to the gate driver 130 to control the gate driver 130.

[0055] The gate start pulse controls the start timing of the operation of the gate driver integrated circuit (IC) that constitutes the gate driver 130. The gate shift clock signal is the clock signal normally input to the gate driver integrated circuit (IC) and controls the shift timing of the scan signal. The gate output enable signal specifies the timing information of the gate driver integrated circuit (IC).

[0056] Additionally, the timing controller 140 can start scanning according to the timing implemented in each frame (or frame period), convert the input image data Data input from the host system 150 so that the input image data Data has a suitable data signal format used by the data driver 120, and output the converted image data Data' to the data driver 120.

[0057] In one implementation, the timing controller 140 outputs a data control signal DCS, which includes a source start pulse, a source sampling clock signal, and a source output enable (SOE) signal, to the data driver 120 to control the data driver 120.

[0058] The source start pulse controls the data sampling start timing of the source driver integrated circuit (IC) constituting the data driver 120. The source sampling clock signal corresponds to the clock signal that controls the data sampling timing in each of the plurality of source driver integrated circuits (ICs). The source output enable signal controls the output timing of the data driver 120.

[0059] The host system 150 can transmit timing signals, including vertical synchronization signals, horizontal synchronization signals, input data enable signals, and clock signals, along with the input image data Data, to the timing controller 140.

[0060] The sensing unit 160 may include multiple sensing channels connected to sensing lines I1 to Ip (where p is a natural number greater than or equal to 2). In an embodiment, sensing lines I1 to Ip correspond one-to-one with the multiple sensing channels. The sensing unit 160 can operate within a frame (or frame time period) P (refer to...) Figure 9 The sensing period includes sensing characteristic values ​​(e.g., inherent characteristic values) of circuit elements in each pixel PX. In the implementation, sensing lines I1 to Ip do not correspond one-to-one with multiple sensing channels. For example, a sensing channel may include more than one sensing line.

[0061] In the following text, refer to Figure 2 A pixel PX according to an embodiment of the present disclosure will be described.

[0062] Figure 2 This is a diagram illustrating pixels according to an embodiment of the present disclosure.

[0063] Each pixel PX arranged in the display panel 110 according to the embodiment includes a light-emitting diode LD, a driving transistor DRT, a first transistor T1, a second transistor T2, and a storage capacitor Cstg.

[0064] According to embodiments of the present disclosure, the driving transistor DRT drives the light-emitting diode LD by supplying driving current to the light-emitting diode LD.

[0065] The first non-gate electrode of the driving transistor DRT is electrically connected to the first electrode of the light-emitting diode LD through a first node N1. The gate electrode of the driving transistor DRT is connected to a second node N2, and the second non-gate electrode of the driving transistor DRT is electrically connected to the driving voltage line DVL through a third node N3. The second electrode of the light-emitting diode LD can be connected to the common power supply ELVSS.

[0066] The first transistor T1 is controlled by the sensing signal SENSE, which is a scan signal applied to the gate node of the first transistor T1 through the corresponding gate line GL'. The first transistor T1 is electrically connected between the first non-gate electrode of the driving transistor DRT and the initialization voltage line IVL.

[0067] Additionally, the first transistor T1 can be turned on by the sensing signal SENSE applied to the gate node to apply the initialization voltage VINT supplied through the initialization voltage line IVL to the first non-gate electrode of the driving transistor DRT.

[0068] The second transistor T2 is controlled by a scan signal SCAN applied to the gate node of the second transistor T2 through the corresponding gate line GL, and is electrically connected between the gate electrode of the driving transistor DRT and the data line DL.

[0069] For example, a light-emitting diode (LD) can be implemented using an organic light-emitting diode (OLED) or an inorganic light-emitting diode such as a micro LED or a quantum dot LED. Alternatively, the LD can be a light-emitting element combining organic and inorganic materials. Furthermore, each pixel (PX) may include a single light-emitting element. Alternatively, in another embodiment, each of the plurality of pixels (PX) may include multiple light-emitting elements, and the multiple light-emitting elements may be connected in series, in parallel, or in a combination of series and parallel.

[0070] When digital data is converted into a data voltage Vdata by a digital-to-analog converter (DAC) included in the data driver 120 and the data voltage Vdata is output to the data line DL, the output data voltage Vdata is applied to the second transistor T2 through the data line DL.

[0071] When the second transistor T2 is turned on by the scan signal SCAN, the data voltage Vdata supplied through the data line DL is applied to the second node N2 corresponding to the gate node of the driving transistor DRT. For example, the second transistor T2 can be turned on by the on-state voltage of the scan signal SCAN.

[0072] The storage capacitor Cstg can be electrically connected to the driving transistor DRT through the first node N1 and the second node N2, and can maintain a constant voltage during a frame (or a frame period).

[0073] The display device 100 according to an embodiment may further include an analog-to-digital converter (ADC) electrically connected to an initialization voltage line IVL via a switch S1 (e.g., a switching circuit) to sense the voltage of the initialization voltage line IVL. One or more ADCs may be included in the sensing unit 160. In an embodiment, the switch S1 is implemented using a transistor that is turned on and off according to a control signal applied to the gate of a transistor.

[0074] Depending on the operation of switch S1, the initialization voltage line IVL can be connected to or disconnected from node 210, which is connected to the analog-to-digital converter (ADC). Additionally, depending on the operation of switch S2, the initialization voltage line IVL can be connected to or disconnected from node 220, which is supplied with the initialization voltage VINT.

[0075] Meanwhile, the driving transistor DRT in each pixel PX has inherent characteristic values, such as threshold voltage Vth and mobility u. As the driving time of the driving transistor DRT increases, degradation occurs, and therefore, the inherent characteristic values ​​change. Mobility u can be the electron mobility, hole mobility, or carrier mobility of the driving transistor DRT.

[0076] Furthermore, the degree of degradation of the driving transistors (DRTs) in pixels PX may differ from one another. Consequently, inherent characteristic deviations (threshold voltage deviations and mobility deviations) may occur between the driving transistors (DRTs) in pixels PX. These inherent characteristic deviations may cause brightness deviations or differences between pixels PX. Therefore, the brightness uniformity of the display panel 110 may be reduced, and the image quality may be degraded. Accordingly, the display device 100 according to embodiments of the present disclosure may include an analog-to-digital converter (ADC) and switches S1 and S2 in each pixel PX to compensate for the inherent characteristic deviations of the driving transistors (DRT). See below. Figure 3 The process of sensing deviation (threshold voltage deviation and mobility deviation) information of the driving transistor DRT by the sensing unit 160 is described.

[0077] Additionally, when the driving transistor DRT is off and the first transistor T1 is on, a reference voltage can be applied to the first node N1 via the initialization voltage line IVL. In this embodiment, current can flow through the initialization voltage line IVL, the first transistor T1, and the light-emitting diode LD, and the current can be converted into data by the analog-to-digital converter ADC and then supplied to the timing controller 140. The data may correspond to a characteristic (e.g., a characteristic value) of the light-emitting diode LD included in each pixel PX, or the characteristic may be inferred from the data.

[0078] The timing controller 140 can measure the characteristic value el of the light-emitting diode LD based on received data, and use the characteristic value el to calculate the characteristic value deviation Δel between the light-emitting diodes LD included in the pixel PX. In an embodiment, the timing controller 140 designates the maximum value of the difference between the maximum value of the measured characteristic value el of the light-emitting diode LD and the remaining characteristic values ​​el excluding the maximum value of characteristic value el as the maximum characteristic value compensation value ΔV_el_Comp (see reference). Figure 4 ).

[0079] In the following text, reference will be made to Figure 3 A sensing operation for sensing the inherent characteristic values ​​of a driving transistor according to an embodiment of the present disclosure will be described.

[0080] Figure 3 This is a diagram illustrating a sensing operation for sensing the inherent characteristic values ​​of a driving transistor according to an embodiment of the present disclosure.

[0081] The second transistor T2 is turned on by the scan signal SCAN applied to the gate node, and the first transistor T1 is turned on by the sensing signal SENSE applied to the gate node. Additionally, switch S2 is in the state where the initialization voltage line IVL is connected to node 220. Switch S1 is in the off state.

[0082] At this time, the initialization voltage VINT (e.g., input initialization voltage) and the data voltage Vdata (e.g., input data voltage) are applied to the first non-gate electrode and the gate electrode of the driving transistor DRT, respectively.

[0083] Specifically, the data voltage Vdata output from the data driver 120 to the data line DL is applied to the gate electrode of the driving transistor DRT via the second transistor T2. Additionally, the initialization voltage VINT is applied to the first non-gate electrode of the driving transistor DRT via the first transistor T1 through node 220. At this time, the storage capacitor Cstg stores the voltage corresponding to the difference (e.g., the difference value) between the data voltage Vdata and the initialization voltage VINT.

[0084] Subsequently, when the second transistor T2 is off and the switch S1 is on, node 210 connected to the analog-to-digital converter (ADC) is connected to the initialization voltage line IVL. When the second transistor T2 is off, the second node N2 is set to a floating state, and thus the storage capacitor Cstg retains the previously stored voltage.

[0085] Furthermore, when switch S2 is in the off state, the driving transistor DRT supplies a current corresponding to the voltage stored in the storage capacitor Cstg to the initialization voltage line IVL. At this time, capacitor Crvl is charged with voltage Vsense by the current supplied to the initialization voltage line IVL. The voltage Vsense charged in capacitor Crvl increases at a predetermined slope in response to the current from the driving transistor DRT.

[0086] The analog-to-digital converter (ADC) can sense the voltage Vsense, which is the voltage across capacitor Crvl, by initializing the voltage line IVL, and transmit the sensed data to the timing controller 140, which obtains the sensed data by converting the sensed voltage into a digital value.

[0087] The timing controller 140 can measure the threshold voltage Vth of the driving transistor DRT in each pixel PX based on the received sensing data, and can use the threshold voltage Vth to calculate the threshold voltage deviation ΔVth between the driving transistors DRT included in the pixel PX. At this time, the timing controller 140 can specify the maximum value of the difference between the maximum value of the measured threshold voltages Vth of the driving transistors DRT and the maximum value of the remaining threshold voltages Vth excluding the maximum value of the threshold voltages Vth as the maximum threshold voltage compensation value ΔV_vth_Comp (see reference). Figure 4 ).

[0088] The timing controller 140 can measure the mobility u of the driving transistor DRT in each pixel PX based on the received sensing data, and can use the mobility u to calculate the mobility deviation Δu between the driving transistors DRT included in the pixel PX. At this time, the timing controller 140 can specify the maximum value of the difference between the maximum value of the measured mobility u of the driving transistors DRT and the remaining mobility u excluding the maximum value of the mobility u as the maximum mobility compensation value ΔV_u_Comp (see reference). Figure 4 ).

[0089] To compensate for the calculated threshold voltage deviation ΔVth, mobility deviation Δu, and characteristic value deviation Δel, the timing controller 140 may modify the data to be applied to pixel PX, and based on the maximum threshold voltage compensation value ΔV_vth_Comp for pixel PX (refer to...). Figure 4), Maximum mobility compensation value ΔV_u_Comp (refer to) Figure 4 ) and the maximum characteristic value compensation value ΔV_el_Comp (refer to Figure 4 This will transfer the modified data to data drive 120.

[0090] In the following text, reference will be made to Figure 4 The method for determining the initialization voltage and data voltage for each characteristic value according to embodiments of the present disclosure is described.

[0091] Figure 4 This is a diagram illustrating a method for determining the initialization voltage and data voltage for each characteristic value according to an embodiment of the present disclosure.

[0092] The timing controller 140 according to an embodiment of the present disclosure includes a black data arithmetic unit 141 (e.g., a first logic circuit), an initialization voltage arithmetic unit 142 (e.g., a second logic circuit), and a data voltage arithmetic unit 143 (e.g., a third logic circuit).

[0093] The black data processor 141 can receive the maximum threshold voltage compensation value ΔV_vth_Comp, the maximum mobility compensation value ΔV_u_Comp, and the maximum characteristic value compensation value ΔV_el_Comp of the light-emitting diode (LD). In an embodiment, the timing controller 140 receives the maximum threshold voltage compensation value ΔV_vth_Comp, the maximum mobility compensation value ΔV_u_Comp, and the maximum characteristic value compensation value ΔV_el_Comp from the sensing unit 160, and the timing controller 140 provides the maximum threshold voltage compensation value ΔV_vth_Comp, the maximum mobility compensation value ΔV_u_Comp, and the maximum characteristic value compensation value ΔV_el_Comp to the black data processor 141.

[0094] In one embodiment, the maximum threshold voltage compensation value ΔV_vth_Comp corresponds to the maximum value of the deviation between the maximum value of the threshold voltage Vth of the driving transistor DRT in pixel PX received by the timing controller 140 and the remaining threshold voltage Vth. In another embodiment, the maximum mobility compensation value ΔV_u_Comp corresponds to the maximum value of the deviation between the maximum mobility u of the driving transistor DRT in pixel PX received by the timing controller 140 and the remaining mobility u. In yet another embodiment, the maximum characteristic value compensation value ΔV_el_Comp of the light-emitting diode LD corresponds to the maximum value of the deviation between the maximum characteristic value e1 of the light-emitting diode LD in pixel PX received by the timing controller 140 and the remaining characteristic value e1.

[0095] The black data processor 141 can calculate the compensated data voltage using the received maximum threshold voltage compensation value ΔV_vth_Comp, maximum mobility compensation value ΔV_u_Comp, and maximum characteristic value compensation value ΔV_el_Comp.

[0096] In the following text, the compensation data voltage is referred to as the maximum black data voltage Vmaxblack.

[0097] In the implementation, the maximum black data voltage Vmaxblack is calculated by adding the maximum threshold voltage compensation value ΔV_vth_Comp, the maximum mobility compensation value ΔV_u_Comp, and the maximum characteristic value compensation value ΔV_el_Comp, and can be expressed according to Equation 1.

[0098] Vmaxblack=ΔV_vth_Comp+ΔV_u_Comp+ΔV_el_Comp [Equation 1]

[0099] Specifically, the maximum black data voltage Vmaxblack can be set by reflecting the threshold voltage Vth, mobility u, and degradation information of the light-emitting diode (LD) of pixel PX. Accordingly, even if pixel PX degrades, pixel PX can be driven stably. In this embodiment, when the maximum black data voltage Vmaxblack is reset, the data voltage corresponding to a predetermined grayscale can also be reset.

[0100] Meanwhile, when the initialization voltage VINT and data voltage Vdata supplied during sensing are kept constant and independent of changes in the maximum black data voltage Vmaxblack, the sensing time may increase. Accordingly, in this disclosure, the initialization voltage VINT and data voltage Vdata supplied during sensing can be reset taking into account the maximum black data voltage Vmaxblack.

[0101] The initialization voltage calculator 142 can receive the maximum black data voltage Vmaxblack from the black data calculator 141 and calculate the initialization voltage VINT (e.g., an adjusted initialization voltage) for each sensing mode based on a limit (e.g., margin) value for the initialization voltage VINT for each sensing mode. The margin value may be different for multiple sensing modes.

[0102] In an implementation, the multiple sensing modes include a mode for measuring the threshold voltage Vth of the driving transistor DRT in each pixel PX, a mode for measuring the mobility u of the driving transistor DRT in each pixel PX, and a mode for measuring the characteristic value el of the light-emitting diode LD in each pixel PX.

[0103] In other words, the initialization voltage calculator 142 can calculate the initialization voltage VINT applied to the driving transistor DRT at each of the threshold voltage Vth and mobility u of the driving transistor DRT. Additionally, the initialization voltage calculator 142 can calculate the applied initialization voltage VINT (or reference voltage) when measuring the characteristic value el of the light-emitting diode LD.

[0104] When the threshold voltage Vth of the driving transistor DRT is sensed, the initialization voltage VINT applied to the driving transistor DRT, calculated by the initialization voltage arithmetic unit 142, can be represented by the following equation 2.

[0105] VINT = Vmaxblack + margin T [Equation 2],

[0106] Among them, margin T This is the margin value when measuring the threshold voltage Vth.

[0107] Furthermore, when measuring the mobility u of the driving transistor DRT, the initialization voltage VINT applied to the driving transistor DRT, calculated by the initialization voltage arithmetic unit 142, can be represented by the following equation 3.

[0108] VINT = Vmaxblack + margin U [Equation 3],

[0109] Among them, margin U This is the margin value when measuring mobility u.

[0110] In addition, when measuring the characteristic value el of the light-emitting diode LD, the initialization voltage VINT (or reference voltage) applied to the driving transistor DRT calculated by the initialization voltage arithmetic unit 142 can be represented by the following equation 4.

[0111] VINT = Vmaxblack + margin EL [Equation 4],

[0112] Among them, margin EL This is the margin value when measuring the characteristic value el of a light-emitting diode (LD).

[0113] margin value when measuring threshold voltage Vth T Margin value when measuring mobility u U and the margin value when measuring the characteristic value el of a light-emitting diode (LD). EL The characteristics of the display panel 110 can be considered for the preset.

[0114] The data voltage calculator 143 receives the maximum black data voltage Vmaxblack from the black data calculator 141 and calculates the data voltage Vdata (e.g., the regulated data voltage) for each sensing mode based on the pre-stored gate-source voltage (VGS) setting value of the driving transistor DRT for each sensing mode.

[0115] In other words, when measuring each of the threshold voltage Vth and mobility u of the driving transistor DRT, the data voltage arithmetic unit 143 can calculate the data voltage Vdata applied to the driving transistor DRT.

[0116] When the threshold voltage Vth of the driving transistor DRT is measured, the data voltage Vdata applied to the driving transistor DRT, calculated by the data voltage arithmetic unit 143, can be represented by the following equation 5.

[0117] Vdata = Vmaxblack + VGS T [Equation 5],

[0118] Among them, VGS T Set the gate-source voltage value when measuring the threshold voltage Vth.

[0119] Furthermore, when measuring the mobility u of the driving transistor DRT, the data voltage Vdata applied to the driving transistor DRT, calculated by the data voltage arithmetic unit 143, can be represented by the following equation 6.

[0120] Vdata = Vmaxblack + VGS U [Equation 6],

[0121] Among them, VGS U This is the setting value for the gate-source voltage when measuring mobility u.

[0122] Furthermore, when measuring the characteristic value el of the light-emitting diode LD, the data voltage Vdata applied to the driving transistor DRT, calculated by the data voltage arithmetic unit 143, can be represented by the following equation 7.

[0123] Vdata = Vmaxblack + VGS EL [Equation 7],

[0124] Among them, VGS EL This is the setting value for the gate-source voltage when measuring the characteristic value el.

[0125] According to embodiments of this disclosure, the maximum black data voltage Vmaxblack can be calculated using the maximum threshold voltage compensation value ΔV_vth_Comp and the maximum mobility compensation value ΔV_u_Comp between the driving transistors DRT in the pixel PX, and the maximum characteristic value compensation value ΔV_el_Comp of the light-emitting diode LD. Furthermore, the optimal initialization voltage VINT and data voltage Vdata for each sensing mode can be based on a margin value (e.g., margin) of the initialization voltage VINT for each sensing mode. T margin U margin EL ) and the gate-source voltage (VGS) setting value of the drive transistor DRT for each sensing mode (e.g., VGS T VGS U VGS EL ) to calculate.

[0126] Additionally, when the gate-source voltage (VGS) needs to be kept constant in sensing mode, as described above, the data voltage calculator 143 can calculate different data voltages Vdata for different sensing modes. However, when the gate-source voltage (VGS) does not need to be kept constant in sensing mode, the data voltage calculator 143 can output a constant value of data voltage Vdata regardless of the sensing mode.

[0127] In the following text, reference will be made to Figure 5 The process of output initialization voltage and data voltage according to embodiments of the present disclosure is described.

[0128] Figure 5 This is a diagram illustrating the process of output initialization voltage and data voltage according to an embodiment of the present disclosure.

[0129] The initialization voltage generator 121 receives the optimal initialization voltage VINT for each sensing mode calculated by the initialization voltage arithmetic unit 142. In this embodiment, the initialization voltage generator 121 is located within the data driver 120.

[0130] Specifically, the initialization voltage generator 121 receives the initialization voltage VINT calculated by the initialization voltage arithmetic unit 142 when sensing the threshold voltage Vth of the driving transistor DRT, when sensing the mobility u of the driving transistor DRT, or when measuring the characteristic value el of the light-emitting diode LD.

[0131] When the initialization voltage generator 121 receives the threshold voltage sensing enable signal Vth Sensing En corresponding to the first control signal from the timing controller 140, the initialization voltage generator 121 can output the first initialization voltage, which is the initialization voltage VINT received from the initialization voltage arithmetic unit 142 and calculated when sensing the threshold voltage Vth of the driving transistor DRT.

[0132] Additionally, when the initialization voltage generator 121 receives the mobility sensing enable signal u Sensing En corresponding to the second control signal from the timing controller 140, the initialization voltage generator 121 can output a second initialization voltage, which is the initialization voltage VINT received from the initialization voltage arithmetic unit 142 and calculated when sensing the mobility u of the driving transistor DRT.

[0133] Additionally, when the initialization voltage generator 121 receives the characteristic value sensing enable signal el Sensing En of the light-emitting diode LD corresponding to the third control signal from the timing controller 140, the initialization voltage generator 121 can output the third initialization voltage, which is the initialization voltage VINT received from the initialization voltage arithmetic unit 142 and calculated when measuring the characteristic value el of the light-emitting diode LD.

[0134] The data voltage generator 122 receives the optimal data voltage Vdata for each sensing mode calculated by the data voltage arithmetic unit 143. In this embodiment, the data voltage generator 122 is located within the data driver 120.

[0135] Specifically, the data voltage generator 122 receives the data voltage Vdata calculated by the data voltage arithmetic unit 143 when sensing the threshold voltage Vth of the driving transistor DRT, when sensing the mobility u of the driving transistor DRT, or when measuring the characteristic value el of the light-emitting diode LD.

[0136] When the data voltage generator 122 receives the threshold voltage sensing enable signal Vth Sensing En corresponding to the first control signal from the timing controller 140, the data voltage generator 122 outputs the first data voltage, which is the data voltage Vdata received from the data voltage arithmetic unit 143 and calculated when sensing the threshold voltage Vth of the driving transistor DRT.

[0137] Additionally, when the data voltage generator 122 receives the mobility sensing enable signal u Sensing En corresponding to the second control signal from the timing controller 140, the data voltage generator 122 outputs the second data voltage, which is the data voltage Vdata received from the data voltage arithmetic unit 143 and calculated when sensing the mobility u of the driving transistor DRT.

[0138] Additionally, when the data voltage generator 122 receives the characteristic value sensing enable signal el Sensing En of the light-emitting diode LD corresponding to the third control signal from the timing controller 140, the data voltage generator 122 outputs the third data voltage, which is the data voltage Vdata received from the data voltage arithmetic unit 143 and calculated when measuring the characteristic value el of the light-emitting diode LD.

[0139] In the following text, reference will be made to Figures 6A to 6C The initialization voltage and data voltage, when the gate-source voltage (VGS) is constant, according to embodiments of the present disclosure, are described based on the variation of the maximum black data voltage.

[0140] Figures 6A to 6C This is a graph showing the variation of the initialization voltage and data voltage with respect to the maximum black data voltage when the gate-source voltage (VGS) is constant, according to an embodiment of the present disclosure.

[0141] Figure 6A This is a graph showing the change of the initialization voltage VINT according to an embodiment of the present disclosure based on the maximum black data voltage Vmaxblack. Figure 6B This is a graph showing the variation of the data voltage Vdata according to an embodiment of the present disclosure based on the maximum black data voltage Vmaxblack. Figure 6C This is a graph showing the variation of the gate-source voltage (VGS) according to an embodiment of the present disclosure based on the maximum black data voltage Vmaxblack.

[0142] Figure 6A ① shows a comparative example, and corresponds to the initialization voltage VINT applied to the driving transistor DRT, without considering... Figure 5 A graph showing the maximum black data voltage Vmaxblack for each sensing mode, corresponding to the optimal initialization voltage VINT. ② The initialization voltage VINT corresponding to the driving transistor DRT is determined based on... Figure 5 The graph shows the variation of the maximum black data voltage Vmaxblack based on the optimal initialization voltage VINT for each sensing mode.

[0143] Reference Figure 6A① The initialization voltage VINT applied to the driving transistor DRT is constant and independent of the maximum black data voltage Vmaxblack. (See reference...) Figure 6A ② As the maximum black data voltage Vmaxblack increases, the initialization voltage VINT applied to the driving transistor DRT increases, but is less than the initialization voltage VINT in ①.

[0144] Figure 6B ① shows a comparative example, and corresponds to the data voltage Vdata applied to the driving transistor DRT according to the case where the following is not considered. Figure 5 The graph shows the optimal data voltage Vdata for each sensing mode and the maximum black data voltage Vmaxblack. ② The data voltage Vdata corresponding to the driving transistor DRT is determined based on... Figure 5 The graph shows the variation of the maximum black data voltage Vmaxblack for each sensing mode, based on the optimal data voltage Vdata.

[0145] Figure 6B Example ① shows a comparative example, where the data voltage Vdata applied to the driving transistor DRT is constant and independent of the maximum black data voltage Vmaxblack. (See reference...) Figure 6B ② As the maximum black data voltage Vmaxblack increases, the data voltage Vdata applied to the driving transistor DRT increases, but is less than the data voltage Vdata in ①.

[0146] Reference Figure 2 and Figures 6A to 6C Compared to the case where the optimal initialization voltage VINT and data voltage Vdata for each sensing mode are not considered, the initialization voltage VINT and data voltage Vdata of the driving transistor DRT can be reduced when the optimal initialization voltage VINT and data voltage Vdata for each sensing mode are considered. In response, the gate-source voltage (VGS) of the driving transistor DRT can be constant and independent of the maximum black data voltage Vmaxblack (e.g., ...). Figure 6C (as shown in ②).

[0147] In other words, when a constant gate-source voltage (VGS) is required to drive the transistor DRT, the initialization voltage VINT can be reduced by changing the data voltage Vdata.

[0148] Furthermore, according to the embodiments of this disclosure, the voltage level of the initialization voltage VINT can be reduced when considering the optimal initialization voltage VINT and data voltage Vdata for each sensing mode, compared to the case where the optimal initialization voltage VINT and data voltage Vdata for each sensing mode are not considered. Therefore, the voltage difference between the first node N1 and node 220 of the parasitic capacitor Cel can be large.

[0149] In other words, because the voltage level of the initialization voltage VINT is reduced, the amount of current flowing through the first node N1 can increase when the initialization voltage VINT is applied to node 220.

[0150] Therefore, due to the reduction in the initialization voltage VINT, the amount of current flowing from the drive power supply ELVDD to the first node N1 can be increased, and thus the parasitic capacitor Cel can be charged to the desired voltage in a short time. Accordingly, the sensing period can be shortened.

[0151] In the following text, reference will be made to Figures 7A to 7C The initialization voltage and data voltage as the gate-source voltage (VGS) decreases according to embodiments of the present disclosure are described based on the change in the maximum black data voltage.

[0152] Figures 7A to 7C This is a graph showing the changes in initialization voltage and data voltage as the gate-source voltage (VGS) decreases according to an embodiment of the present disclosure, based on the maximum black data voltage.

[0153] Figure 7A This is a graph showing the change of the initialization voltage VINT according to an embodiment of the present disclosure based on the maximum black data voltage Vmaxblack. Figure 7B This is a graph showing the variation of the data voltage Vdata according to an embodiment of the present disclosure based on the maximum black data voltage Vmaxblack. Figure 7C This is a graph showing the variation of the gate-source voltage (VGS) according to an embodiment of the present disclosure based on the maximum black data voltage Vmaxblack.

[0154] Figure 7A ① shows a comparative example, and corresponds to the initialization voltage VINT applied to the driving transistor DRT, without considering... Figure 5 The graph shows the maximum black data voltage Vmaxblack for each sensing mode, corresponding to the optimal initialization voltage VINT. ② The initialization voltage VINT corresponding to the driving transistor DRT is determined based on... Figure 5 The graph shows the variation of the maximum black data voltage Vmaxblack based on the optimal initialization voltage VINT for each sensing mode.

[0155] Reference Figure 7A① The initialization voltage VINT applied to the driving transistor DRT is constant and independent of the maximum black data voltage Vmaxblack. (See reference...) Figure 7A ② As the maximum black data voltage Vmaxblack increases, the initialization voltage VINT applied to the driving transistor DRT increases, but is less than the initialization voltage VINT in ①.

[0156] Figure 7B ① shows a comparative example, and corresponds to the data voltage Vdata applied to the driving transistor DRT according to the case where the following is not considered. Figure 5 The graph shows the optimal data voltage Vdata for each sensing mode and the maximum black data voltage Vmaxblack. ② The data voltage Vdata corresponding to the driving transistor DRT is determined based on... Figure 5 The graph shows the variation of the maximum black data voltage Vmaxblack for each sensing mode, based on the optimal data voltage Vdata.

[0157] Reference Figure 7B ① The data voltage Vdata applied to the driving transistor DRT is constant and independent of the maximum black data voltage Vmaxblack. (See reference...) Figure 7B ② The data voltage Vdata applied to the driving transistor DRT is constant and independent of the maximum black data voltage Vmaxblack, and is the same voltage level as the data voltage Vdata in ①.

[0158] Reference Figure 2 and Figures 7A to 7C Compared to the case where the optimal initialization voltage VINT for each sensing mode is not considered, the initialization voltage VINT of the driving transistor DRT can be reduced when the optimal initialization voltage VINT for each sensing mode is considered, and the data voltage Vdata applied to the driving transistor DRT remains constant, independent of the maximum black data voltage Vmaxblack. In response, the gate-source voltage (VGS) of the driving transistor DRT considering the optimal initialization voltage VINT for each sensing mode is larger than that without considering it.

[0159] In other words, when it is necessary to change the gate-source voltage (VGS) of the transistor DRT, the initialization voltage VINT can be reduced by keeping the data voltage Vdata constant.

[0160] Therefore, as the initial voltage VINT decreases, the voltage charging in the parasitic capacitor Cel can discharge rapidly. When the initial voltage VINT decreases, the current flowing from the first node N1 to the initial voltage line IVL increases. In this case, since the capacitor Crvl charges to the desired voltage at a high speed, the sensing time (actual sensing time), which is the time required to sense the characteristic value of the driving transistor DRT, can be reduced. Furthermore, since the sensing time (actual sensing time) is reduced, the sensing period can be shortened, and therefore the characteristic value of the driving transistor DRT can be sensed quickly.

[0161] In the following text, reference will be made to Figure 8 The process of reducing the sensing period using determined initialization voltage and data voltage according to embodiments of the present disclosure is described.

[0162] Figure 8 This is a diagram illustrating the process of reducing the sensing period using a determined initialization voltage and a determined data voltage according to an embodiment of the present disclosure.

[0163] Figure 8 ① indicates that it is not considered Figure 5 A graph showing the optimal initialization voltage VINT and data voltage Vdata for each sensing mode during the sensing period. Figure 8 ② is to show consideration Figure 5 A graph showing the optimal initialization voltage VINT and data voltage Vdata for each sensing mode during the sensing period.

[0164] Reference Figure 2 , Figures 6A to 6C , Figures 7A to 7C and Figure 8 The initial voltage VINT is set higher when the maximum black data voltage Vmaxblack is not considered, compared to the case where the maximum black data voltage Vmaxblack is considered.

[0165] Specifically, when the second transistor T2 is turned on due to the scan signal SCAN applied to the gate electrode, the first transistor T1 is turned on due to the sensing signal SENSE applied to the gate node, the switch S1 is turned off and the switch S2 is turned on, the voltage charged in the parasitic capacitor Cel can be discharged through the first transistor T1 to node 220 of the initialization voltage VINT.

[0166] At this time, due to... Figure 8Compared to ①, considering ② the maximum black data voltage Vmaxblack, the initial voltage VINT level is reduced, thus increasing the voltage difference between the first node N1 and node 220. Therefore, since the amount of current flowing from the first node N1 through the first transistor T1 to node 220 with initial voltage VINT increases, the sensing period can be reduced as the actual sensing time decreases. Consequently, the period during which the scan signal SCAN is applied to the gate electrode of the second transistor T2 and the sensing signal SENSE is applied to the gate electrode of the first transistor T1 can be reduced.

[0167] In addition, when the second transistor T2 is in the off state, the first transistor T1 is in the on state due to the sensing signal SENSE applied to the gate node, and when switches S2 and S1 are in the on state, current can flow to nodes 220 and 210 due to the voltage charging in the parasitic capacitor Cel.

[0168] In other words, current can flow through the first transistor T1 to node 220, which is the initialization voltage VINT, and node 210, which is connected to the analog-to-digital converter (ADC).

[0169] At this time, since the amount of current flowing from the first node N1 through the first transistor T1 to the initialization voltage line IVL increases due to the reduced initialization voltage VINT, the time period during which each of the switches S1 and S2 is turned on or off can be shortened (i.e., the sensing time period can be reduced).

[0170] Furthermore, when the second transistor T2 is off, the first transistor T1 is on due to the sensing signal SENSE applied to the gate node, switch S2 is off, and switch S1 is on, the amount of current flowing through node 210 to capacitor Crvl increases. That is, the voltage can be rapidly charged in capacitor Crvl, and the slope of the voltage Vsense across capacitor Crvl can be increased. Therefore, compared to ①, the overall actual sensing time in case ②, considering the maximum black data voltage Vmaxblack, can be reduced.

[0171] In the following text, refer to Figure 9 The initialization voltage and data voltage based on the maximum black data voltage in a frame (or frame period) according to embodiments of the present disclosure are described.

[0172] Figure 9 This is a diagram illustrating the initialization voltage and data voltage based on the maximum black data voltage in a frame (or frame period) according to an embodiment of the present disclosure.

[0173] A frame (or frame period) P may include an active period A and a blanking period B. The blanking period B may be the remaining period after the data driver 120 has completed supplying the data voltage during the active period A for each frame (or frame period) P. In this embodiment, the pixel receives the data voltage during the active period A, and the pixel does not receive the data voltage during the blanking period B.

[0174] In the implementation, during the blanking period B, the initialization voltage VINT and data voltage Vdata determined by the initialization voltage arithmetic unit 142 and the data voltage arithmetic unit 143 are supplied to the driving transistor DRT in the pixel PX.

[0175] In one embodiment, during the blanking period B, a voltage having a level equal to the sum of the maximum black data voltage according to Equation 2 and the margin value when measuring the threshold voltage Vth is supplied as an initialization voltage VINT to the drive transistor DRT in the pixel PX. In another embodiment, a voltage having a level equal to the sum of the maximum black data voltage according to Equation 5 and the gate-source voltage (VGS) setting value when measuring the threshold voltage Vth is supplied as a data voltage Vdata to the drive transistor DRT in the pixel PX.

[0176] In this implementation, during the blanking period B, a voltage having a level equal to the sum of the maximum black data voltage according to Equation 3 and the margin value when measuring mobility u is supplied as an initialization voltage VINT to the drive transistor DRT in the pixel PX. Additionally, a voltage having a level equal to the sum of the maximum black data voltage according to Equation 6 and the gate-source voltage (VGS) setting value when measuring mobility u can be supplied as a data voltage Vdata to the drive transistor DRT in the pixel PX.

[0177] Additionally, during blanking period B, a voltage having the level of the sum of the maximum black data voltage according to Equation 4 and the margin value when measuring characteristic value el can be supplied as the initialization voltage VINT to the drive transistor DRT in pixel PX. Furthermore, a voltage having the level of the sum of the maximum black data voltage according to Equation 7 and the gate-source voltage (VGS) setting value when measuring characteristic value el can be supplied as the data voltage Vdata to the drive transistor DRT in pixel PX.

[0178] According to embodiments of this disclosure, the initialization voltage VINT and data voltage Vdata for each sensing mode can be calculated considering the maximum black data voltage, and the initialization voltage VINT and data voltage Vdata can be supplied to the driving transistor DRT in the pixel PX during the blanking period B. As described above, since the initialization voltage VINT is reduced, the measurement period of the threshold voltage Vth of the driving transistor DRT, the measurement period of the mobility u, and the entire sensing period can be reduced. In addition, since the sensing period is reduced, the sensing period is shortened, and the degradation of circuit elements included in each pixel PX can be quickly prevented.

[0179] In other words, after the first time period (at the start of blanking period B), the initialization voltage VINT supplied to pixel PX can be set to a first voltage value, and after the second time period (at the start of activation period A), the initialization voltage VINT supplied to pixel PX can be set to a second voltage value different from the first voltage value. At this time, the first voltage value is lower than the second voltage value.

[0180] Furthermore, after the first time period (at the start of blanking period B), the data voltage Vdata supplied to pixel PX can be set to a third voltage value, and after the second time period (at the start of activation period A), the data voltage Vdata supplied to pixel PX can be set to a fourth voltage value different from the third voltage value. At this time, the third voltage value is higher than the fourth voltage value.

[0181] In the following text, reference will be made to Figure 10 The initialization voltage and data voltage based on the maximum black data voltage in a frame according to embodiments of the present disclosure are described.

[0182] Figure 10 This is a diagram illustrating the initialization voltage and data voltage based on the maximum black data voltage in a frame (or frame period) according to an embodiment of the present disclosure.

[0183] and Figure 9 In different ways, Figure 10 In the process, during the active period A and blanking period B included in a frame period P, an initialization voltage VINT determined for each characteristic value is supplied to the drive transistor DRT in pixel PX. Additionally, during the blanking period B included in a frame period P, a data voltage Vdata determined for each characteristic value is supplied to the drive transistor DRT in pixel PX.

[0184] In this implementation, during the blanking period B and the activation period A, a voltage having a level equal to the sum of the maximum black data voltage according to Equation 2 and the margin value when measuring the threshold voltage Vth is supplied as an initialization voltage VINT to the drive transistor DRT in the pixel PX. Additionally, during the blanking period B, a voltage having a level equal to the sum of the maximum black data voltage according to Equation 5 and the gate-source voltage (VGS) setting value when measuring the threshold voltage Vth is supplied as a data voltage Vdata to the drive transistor DRT in the pixel PX.

[0185] In one embodiment, during blanking period B and activation period A, a voltage having a level equal to the sum of the maximum black data voltage according to Equation 3 and the margin value when measuring mobility u is supplied as an initialization voltage VINT to the drive transistor DRT in pixel PX. In another embodiment, during blanking period B, a voltage having a level equal to the sum of the maximum black data voltage according to Equation 6 and the gate-source voltage (VGS) setting value when measuring mobility u is supplied as a data voltage Vdata to the drive transistor DRT in pixel PX.

[0186] In this implementation, during the blanking period B and the activation period A, a voltage having a level equal to the sum of the maximum black data voltage according to Equation 4 and the margin value when measuring the characteristic value el is supplied as an initialization voltage VINT to the drive transistor DRT in the pixel PX. Additionally, a voltage having a level equal to the sum of the maximum black data voltage according to Equation 7 and the gate-source voltage (VGS) setting value when measuring the characteristic value el can be supplied as a data voltage Vdata to the drive transistor DRT in the pixel PX.

[0187] According to embodiments of this disclosure, the initialization voltage VINT and data voltage Vdata for each sensing mode can be calculated considering the maximum black data voltage, and the calculated initialization voltage VINT can be supplied to the driving transistor DRT in the pixel PX during blanking period B and activation period A. Additionally, during blanking period B, the calculated data voltage Vdata can be supplied to the driving transistor DRT in the pixel PX.

[0188] With respect to embodiments according to this disclosure Figure 9In contrast, the initialization voltage VINT for each sensing mode is supplied not only during the blanking period B but also during the activation period A. As described above, since the initialization voltage VINT decreases not only during the blanking period B but also during the activation period A, the measurement period of the threshold voltage Vth of the driving transistor DRT, the measurement period of the mobility u, and the entire sensing period can be further reduced during the sensing period in both the blanking period B and the activation period A. Furthermore, since the sensing period is further reduced, the sensing period is further shortened, and the degradation of circuit elements included in each pixel PX can be quickly prevented.

[0189] According to embodiments of this disclosure, a display device includes a sensor, a timing controller, and a data driver. The sensor is configured to sense characteristic values ​​of circuit elements included in the pixels of the display device using an input initialization voltage and an input data voltage supplied to the pixels. The timing controller is configured to calculate a compensation data voltage using the characteristic values, and to calculate an adjusted initialization voltage and an adjusted data voltage using the compensation data voltage. The data driver is configured to output the adjusted initialization voltage and the adjusted data voltage to the pixels.

[0190] At least one embodiment of this disclosure provides a display device configured to sense the threshold voltage of the driving transistor of a pixel of the display device, sense the mobility of the driving transistor, sense the characteristics of the light-emitting diode of the pixel, generate a compensation voltage using these three different types of sensing data, adjust an initialization voltage and adjust a data voltage based on the compensation voltage, and apply the adjusted voltage to the pixel.

[0191] Although embodiments have been described with reference to the accompanying drawings, it will be understood by those skilled in the art that various modifications and changes may be made to the embodiments without departing from the spirit of the appended claims.

Claims

1. A display device, comprising: A sensor configured to sense characteristic values ​​of circuit elements included in the pixel of the display device using an input initialization voltage and an input data voltage supplied to the pixel during a sensing period of a frame; A timing controller configured to use a plurality of the aforementioned characteristic values ​​to calculate a compensation data voltage, and to use the compensation data voltage to calculate an regulated initialization voltage and a regulated data voltage; as well as A data driver configured to output the adjusted initialization voltage and the adjusted data voltage to the pixel during the sensing period in response to a control signal output from the timing controller. The characteristic values ​​include the threshold voltage of the driving transistor, the mobility of the driving transistor, and the characteristic values ​​of the light-emitting diode. The timing controller includes: A first logic circuit is configured to calculate the compensation data voltage by using a maximum threshold voltage compensation value of the driving transistor, a maximum mobility compensation value of the driving transistor, and a maximum characteristic value compensation value of the light-emitting diode, determined based on a plurality of sensed characteristic values. A second logic circuit, configured to receive the compensated data voltage and calculate the adjusted initialization voltage using the compensated data voltage; and A third logic circuit is configured to receive the compensation data voltage, which is the same as the compensation data voltage received by the second logic circuit, and to calculate the adjusted data voltage using the compensation data voltage.

2. The display device according to claim 1, wherein, The timing controller supports multiple sensing modes, including a threshold voltage sensing mode, a mobility sensing mode, and a characteristic value sensing mode of the light-emitting diode. The timing controller pre-stores the initialization voltage margin value for each sensing mode and the gate-source voltage setting value of the driving transistor for each sensing mode.

3. The display device according to claim 2, wherein, The timing controller further includes: A second logic circuit, configured to calculate the adjusted initialization voltage for each sensing mode using the compensated data voltage and the margin value of the initialization voltage for each sensing mode; and A third logic circuit is configured to calculate the adjusted data voltage for each sensing mode by using the compensated data voltage and the gate-source voltage setting value of the driving transistor for each sensing mode.

4. The display device according to claim 3, wherein, The data driver also includes an initialization voltage generator and a data voltage generator, and When a threshold voltage sensing enable signal corresponding to the first control signal is applied, the initialization voltage generator outputs a first initialization voltage during the sensing period. When a mobility sensing enable signal corresponding to the second control signal is applied, the initialization voltage generator outputs a second initialization voltage during the sensing period. And when a characteristic value sensing enable signal corresponding to the third control signal is applied, the initialization voltage generator outputs a third initialization voltage during the sensing period.

5. The display device according to claim 4, wherein, When the threshold voltage sensing enable signal is applied, the data voltage generator outputs a first data voltage during the sensing period; when the mobility sensing enable signal is applied, the data voltage generator outputs a second data voltage during the sensing period; and when the characteristic value sensing enable signal is applied, the data voltage generator outputs a third data voltage during the sensing period.

6. The display device according to claim 2, wherein, The maximum threshold voltage compensation value corresponds to the maximum value among the maximum of the multiple threshold voltage values ​​of multiple driving transistors of multiple pixels of the display device and the maximum value among the differences between the threshold voltage values ​​other than the maximum value. The maximum mobility compensation value corresponds to the maximum value among the maximum mobility values ​​of the plurality of driving transistors and the maximum value among the differences between the mobility values ​​other than the maximum value. The maximum characteristic value compensation value corresponds to the maximum value among the multiple characteristic values ​​of the multiple light-emitting diodes of the multiple pixels and the maximum value among the differences between the characteristic values ​​of the light-emitting diodes other than the maximum value.

7. The display device according to claim 3, wherein, When the gate-source voltage is constant, the third logic circuit calculates the adjusted data voltage for each sensing mode, which is increased according to the compensated data voltage.

8. The display device according to claim 3, wherein, When the gate-source voltage is not constant, the third logic circuit outputs a constant data voltage for each sensing mode, regardless of the compensation data voltage.

9. The display device according to claim 1, wherein, The adjusted initialization voltage is supplied to the pixel during the blanking period of the frame.

10. The display device according to claim 9, wherein, The adjusted initialization voltage is also supplied to the pixel during the active period of the frame time.

11. A method for driving a display device, the display device comprising a sensor, a timing controller, and a data driver, the method comprising: The sensor uses the input initialization voltage and input data voltage supplied to the pixel during a sensing period of one frame to sense the characteristic values ​​of the circuit elements included in the pixel of the display device. The timing controller uses a plurality of the aforementioned characteristic values ​​to calculate the compensation data voltage, and the timing controller uses the compensation data voltage to calculate the regulated initialization voltage and the regulated data voltage; as well as The data driver, in response to a control signal output from the timing controller, outputs the adjusted initialization voltage and the adjusted data voltage to the pixel during the sensing period. The characteristic values ​​include the threshold voltage of the driving transistor, the mobility of the driving transistor, and the characteristic values ​​of the light-emitting diode. Calculating the compensated data voltage includes: The compensation data voltage is calculated using the maximum threshold voltage compensation value of the driving transistor, the maximum mobility compensation value of the driving transistor, and the maximum characteristic value compensation value of the light-emitting diode, all determined based on the sensed multiple characteristic values. The calculation of the adjusted initial voltage includes: calculating the adjusted initial voltage using the compensation data voltage. The calculation of the adjusted data voltage includes: calculating the adjusted data voltage using the compensated data voltage.

12. The method according to claim 11, wherein, Calculating the adjusted initial voltage includes: The adjusted initialization voltage is calculated from the compensated data voltage and the margin value associated with the mode of the timing controller.

13. The method according to claim 12, wherein, Calculating the adjusted data voltage includes: The adjusted data voltage is calculated from the compensated data voltage and the gate-source voltage setting value of the drive transistor for the same mode.

14. The method of claim 12, further comprising: When the mode is the first mode, a first initialization voltage generated from the compensation data voltage and the margin value associated with the threshold voltage of the driving transistor is output during the sensing period; When the mode is the second mode, a second initialization voltage generated from the compensation data voltage and the margin value associated with the mobility of the driving transistor is output during the sensing period; as well as When the mode is the third mode, a third initialization voltage generated from the compensation data voltage and the margin value associated with the characteristic value of the light-emitting diode is output during the sensing period.

15. The method of claim 13, further comprising: When the mode is the first mode, a first data voltage generated from the compensated data voltage and the gate-source voltage setting value associated with the threshold voltage of the driving transistor is output during the sensing period; When the mode is the second mode, a second data voltage generated from the compensation data voltage and the gate-source voltage setting value associated with the mobility of the driving transistor is output during the sensing period; as well as When the mode is the third mode, a third data voltage generated from the compensation data voltage and the gate-source voltage setting value associated with the characteristic value of the light-emitting diode is output during the sensing period.

16. The method according to claim 11, wherein, When the gate-source voltage of the driving transistor is constant, the adjusted data voltage increases according to the compensated data voltage.

17. The method according to claim 11, wherein, When the gate-source voltage of the driving transistor is not constant, the adjusted data voltage remains constant and is independent of the compensation data voltage.

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