Dynamic simulation method, device and platform for chip signal integrity

Abstract

The application discloses a chip signal integrity dynamic simulation method, device and platform. The method comprises the following steps: obtaining a plurality of drivers according to a preset driver quantity, connecting each driver to a driving accumulation node through a driver switch, and constructing a simulation model; determining the volt-ampere characteristic curve of each driver according to a preset chip parameter range, and combining the volt-ampere characteristic curve of each driver with the preset chip parameter range to randomly generate a driver switch control timing file; controlling the opening and closing of each driver switch in the simulation model according to the driver switch control timing file, making the chip parameters of the simulation model jump within the preset chip parameter range, and obtaining a simulation result. The application can dynamically adjust the internal parameters of a chip by timing controlling the opening and closing of the chip driver, and realize the simulation of the internal parameter jump process of the chip.

Description

Technical Field

[0001] This invention relates to the field of chip simulation and testing technology, and in particular to a dynamic simulation method, apparatus, and platform for chip signal integrity. Background Technology

[0002] As the performance of digital systems continues to improve, the digital signal rate is also constantly increasing. During the hardware design phase of a chip, it is necessary to simulate signal integrity to ensure the signal quality of the chip.

[0003] Currently, the main simulation models for chip signal integrity are the IBIS model and the SPICE model. The IBIS (Input / Output Buffer Information Specification) model is a method for quickly and accurately modeling I / O buffers based on V / I curves. It is an international standard reflecting the electrical characteristics of chip drivers and receivers, providing a standard file format to record parameters such as driver output impedance, rise / fall time, and output load. The SPICE (Simulation Program with Integrated Circuit Emphasis) model is used for PCB-level signal integrity analysis, describing the actual electrical connections inside the device. However, both the IBIS and SPICE models can only achieve static simulation, meaning that the simulated internal chip driving capability, impedance, and other parameters are fixed at any given time. They cannot simulate special cases such as jumps in internal chip driving capability and impedance parameters, making it difficult to detect signal integrity problems caused by fluctuations in internal chip parameters in advance. Summary of the Invention

[0004] To overcome the shortcomings of the prior art, the present invention provides a dynamic simulation method, apparatus and platform for chip signal integrity, which can dynamically adjust the internal parameters of the chip by controlling the switching of the chip driver in a timing manner, thereby simulating the jump process of the internal parameters of the chip.

[0005] To address the aforementioned technical problems, in a first aspect, an embodiment of the present invention provides a dynamic simulation method for chip signal integrity, comprising:

[0006] A number of drivers are obtained according to a preset number of drivers, and each driver is connected to a driver accumulation node through a driver switch to build a simulation model.

[0007] The current-voltage characteristic curves of each driver are determined according to the preset chip parameter range, and the driver switching control timing file is randomly generated by combining the preset chip parameter range and the current-voltage characteristic curves of each driver.

[0008] According to the driver switch control timing file, the opening and closing of each driver switch in the simulation model is controlled, so that the chip parameters of the simulation model change within the preset chip parameter range, and the simulation results are obtained.

[0009] Furthermore, the step of obtaining several drivers according to a preset number of drivers, and connecting each driver to a driver accumulation node through a driver switch to construct a simulation model, specifically involves:

[0010] When the preset number of drivers is 3, the first driver, the second driver, and the third driver are obtained. The first driver is connected to the driver accumulation node through the first driver switch, the second driver is connected to the driver accumulation node through the second driver switch, and the third driver is connected to the driver accumulation node through the third driver switch to construct the simulation model.

[0011] Further, determining the current-voltage characteristic curve of each driver according to a preset chip parameter range includes:

[0012] When the preset chip parameter range is a preset current range, the current-voltage characteristic curve of the first driver is determined to be a standard current-voltage characteristic curve with the current limited to the preset current range;

[0013] Take any current value within the preset current range as the first current value, and determine the volt-ampere characteristic curve of the second driver as the pull-down volt-ampere characteristic curve with the current constant at the first current value;

[0014] Take any current value within the preset current range as the second current value, and determine the current-voltage characteristic curve of the third driver as the pull-up current-voltage characteristic curve with the current constant at the second current value.

[0015] Further, determining the current-voltage characteristic curve of each driver according to a preset chip parameter range includes:

[0016] When the preset chip parameter range is a preset impedance range, the current-voltage characteristic curve of the first driver is determined to be a standard current-voltage characteristic curve with impedance limited to the preset impedance range;

[0017] Take any impedance value within the preset impedance range as the first impedance value, and determine the volt-ampere characteristic curve of the second driver as a pull-down volt-ampere characteristic curve with the impedance constant at the first impedance value;

[0018] Take any impedance value within the preset impedance range as the second current value, and determine the current-voltage characteristic curve of the third driver as the pull-up current-voltage characteristic curve with the impedance constant at the second impedance value.

[0019] Furthermore, the step of randomly generating a driver switching control timing file by combining the preset chip parameter range and the current-voltage characteristic curves of each driver is specifically as follows:

[0020] Based on the preset switching period and preset switching time, combined with the preset chip parameter range and the volt-ampere characteristic curves of each driver, the driver switching control timing file is randomly generated.

[0021] Secondly, an embodiment of the present invention provides a dynamic simulation device for chip signal integrity, comprising:

[0022] The simulation model construction module is used to obtain several drivers according to a preset number of drivers, and connect each driver to a driver accumulation node through a driver switch to construct a simulation model.

[0023] The timing file generation module is used to determine the current-voltage characteristic curve of each driver according to the preset chip parameter range, and to randomly generate a driver switching control timing file by combining the preset chip parameter range and the current-voltage characteristic curve of each driver.

[0024] The simulation result acquisition module is used to control the opening and closing of each driver switch in the simulation model according to the driver switch control timing file, so that the chip parameters of the simulation model change within the preset chip parameter range, and obtain the simulation results.

[0025] Furthermore, the simulation model construction module is specifically used to acquire a first driver, a second driver, and a third driver when the preset number of drivers is 3, connect the first driver to the driver accumulation node through a first driver switch, connect the second driver to the driver accumulation node through a second driver switch, and connect the third driver to the driver accumulation node through a third driver switch to construct the simulation model.

[0026] Furthermore, the time-series file generation module is specifically used for:

[0027] When the preset chip parameter range is a preset current range, the current-voltage characteristic curve of the first driver is determined to be a standard current-voltage characteristic curve with the current limited to the preset current range;

[0028] Take any current value within the preset current range as the first current value, and determine the volt-ampere characteristic curve of the second driver as the pull-down volt-ampere characteristic curve with the current constant at the first current value;

[0029] Take any current value within the preset current range as the second current value, and determine the current-voltage characteristic curve of the third driver as the pull-up current-voltage characteristic curve with the current constant at the second current value.

[0030] Furthermore, the time-series file generation module is specifically used for:

[0031] When the preset chip parameter range is a preset impedance range, the current-voltage characteristic curve of the first driver is determined to be a standard current-voltage characteristic curve with impedance limited to the preset impedance range;

[0032] Take any impedance value within the preset impedance range as the first impedance value, and determine the volt-ampere characteristic curve of the second driver as a pull-down volt-ampere characteristic curve with the impedance constant at the first impedance value;

[0033] Take any impedance value within the preset impedance range as the second current value, and determine the current-voltage characteristic curve of the third driver as the pull-up current-voltage characteristic curve with the impedance constant at the second impedance value.

[0034] Thirdly, one embodiment of the present invention provides a dynamic simulation platform for chip signal integrity, the dynamic simulation platform for chip signal integrity including the dynamic simulation device for chip signal integrity as described above.

[0035] Compared with the prior art, the embodiments of the present invention have the following beneficial effects:

[0036] A simulation model is constructed by acquiring several drivers according to a preset number of drivers and connecting each driver to a driver accumulation node through a driver switch. The current-voltage characteristic curve of each driver is determined according to a preset chip parameter range. Based on the preset chip parameter range and the current-voltage characteristic curve of each driver, a driver switch control timing file is randomly generated. According to the driver switch control timing file, the opening and closing of each driver switch in the simulation model is controlled, so that the chip parameters of the simulation model change within the preset chip parameter range. The simulation results are obtained, and the chip signal integrity simulation is completed. Thus, the internal parameters of the chip can be dynamically adjusted by controlling the switching of the chip drivers through timing, thereby simulating the process of changing internal parameters of the chip. Attached Figure Description

[0037] Figure 1 This is a flowchart illustrating a dynamic simulation method for chip signal integrity according to the first embodiment of the present invention.

[0038] Figure 2 This is a schematic diagram of the structure of the simulation model exemplified in the first embodiment of the present invention;

[0039] Figure 3 This is a schematic diagram of the current-voltage characteristic curves of three drivers exemplified in the first embodiment of the present invention;

[0040] Figure 4This is a schematic diagram illustrating the formation of four current-voltage characteristic curves—pull-down, pull-down + pull-down current boost, pull-up, and pull-up current boost—in the first embodiment of the present invention.

[0041] Figure 5 This is a schematic diagram of a driver switch control timing file as exemplified in the first embodiment of the present invention;

[0042] Figure 6 This is a schematic diagram illustrating the timing control flow in the first embodiment of the present invention;

[0043] Figure 7 This is a schematic diagram of the simulation results exemplified in the first embodiment of the present invention;

[0044] Figure 8 This is a schematic diagram of the structure of a dynamic simulation device for chip signal integrity according to the second embodiment of the present invention. Detailed Implementation

[0045] The technical solutions of this invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this invention, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0046] It should be noted that the step numbers in this document are only for the convenience of explaining the specific embodiments and are not intended to limit the order in which the steps are executed. The method provided in this embodiment can be executed by relevant terminal devices, and the following description uses a server as the execution subject.

[0047] like Figure 1 As shown, the first embodiment provides a dynamic simulation method for chip signal integrity, including steps S11 to S13:

[0048] S11. Obtain several drivers according to the preset number of drivers, and connect each driver to the driver accumulation node through a driver switch to build a simulation model;

[0049] S12. Determine the current-voltage characteristic curve of each driver according to the preset chip parameter range, and randomly generate the driver switching control timing file by combining the preset chip parameter range and the current-voltage characteristic curve of each driver.

[0050] S13. According to the driver switch control timing file, control the opening and closing of each driver switch in the simulation model, so that the chip parameters of the simulation model change within the preset chip parameter range, and obtain the simulation results.

[0051] It should be noted that signal integrity refers to all signal quality and delay issues caused by interconnects, power supplies, and devices. A driver refers to the drive output interface of a chip in an electronic system. The volt-ampere characteristic curve (VI cruve) is an I-V graph plotted with current (I) on the vertical axis and voltage (V) on the horizontal axis. The volt-ampere characteristic curve is for conductors, i.e., power-consuming components, and the graph is often used to study the changing resistance of conductors; it is one of the commonly used graphical methods in physics.

[0052] As an example, in step S11, in response to the simulation request initiated by the user terminal, the preset number of drivers input by the user is extracted from the simulation request, several drivers are obtained according to the preset number of drivers, and each driver is connected to the driver accumulation node through a driver switch, so that one driver corresponds to one driver switch, and a simulation model is constructed.

[0053] It is understandable that user terminals include terminal devices such as mobile phones, tablets, and computers held by users that can communicate with the server.

[0054] In step S12, the preset chip parameters input by the user are extracted from the simulation request. The preset chip parameters include a preset current range and a preset impedance range. The current-voltage characteristic curve of each driver is determined according to the preset chip parameter range. The driver switching control timing file is randomly generated by combining the preset chip parameter range and the current-voltage characteristic curve of each driver.

[0055] In step S13, according to the driver switch control timing file, the opening and closing of each driver switch in the simulation model is controlled at each time node, so that the chip parameters of the simulation model change within the preset chip parameter range, and the simulation results are obtained, thus completing the chip signal integrity simulation.

[0056] This embodiment can dynamically adjust the internal parameters of the chip by controlling the switching of the timing control chip driver, thereby simulating the jump process of the chip's internal parameters.

[0057] In a preferred embodiment, the step of obtaining several drivers according to a preset number of drivers and connecting each driver to a driver accumulation node through a driver switch to construct a simulation model is as follows: when the preset number of drivers is 3, a first driver, a second driver, and a third driver are obtained, the first driver is connected to the driver accumulation node through a first driver switch, the second driver is connected to the driver accumulation node through a second driver switch, and the third driver is connected to the driver accumulation node through a third driver switch to construct a simulation model.

[0058] As an example, when the preset number of drivers is 3, three drivers, namely the first driver D1, the second driver D2, and the third driver D3, are acquired. The first driver D1 is connected to the driver accumulation node J1 through the first driver switch S1, the second driver D2 is connected to the driver accumulation node J1 through the second driver switch S2, and the third driver D3 is connected to the driver accumulation node J1 through the third driver switch S3. A simulation model is then constructed. The simulation model constructed in this case is a three-level model, and its structural diagram is shown below. Figure 2 As shown.

[0059] In a preferred embodiment, determining the volt-ampere characteristic curves of each driver based on a preset chip parameter range includes: when the preset chip parameter range is a preset current range, determining the volt-ampere characteristic curve of the first driver as a standard volt-ampere characteristic curve with the current limited within the preset current range; taking any current value within the preset current range as the first current value, determining the volt-ampere characteristic curve of the second driver as a pull-down volt-ampere characteristic curve with the current constantly at the first current value; taking any current value within the preset current range as the second current value, determining the volt-ampere characteristic curve of the third driver as an pull-up volt-ampere characteristic curve with the current constantly at the second current value.

[0060] It should be noted that the standard current-voltage characteristic curve can be obtained based on the predefined initial current range and initial impedance value.

[0061] As an example, when the preset chip parameter range is a preset current range, the volt-ampere characteristic curve of the first driver D1 is determined to be a standard volt-ampere characteristic curve with the current limited within the preset current range. That is, both the outflow current range (positive current) and the inflow current range (negative current) of the volt-ampere characteristic curve of the first driver D1 are within the preset current range. Taking any current value within the preset current range as the first current value, the volt-ampere characteristic curve of the second driver D2 is determined to be a pull-down volt-ampere characteristic curve with the current constantly at the first current value. That is, the outflow current (positive current) of the volt-ampere characteristic curve of the second driver D2 is constantly at the first current value. Taking any current value within the preset current range as the second current value, the volt-ampere characteristic curve of the third driver D3 is determined to be an pull-up volt-ampere characteristic curve with the current constantly at the second current value. That is, the inflow current (negative current) of the volt-ampere characteristic curve of the third driver D3 is constantly at the second current value.

[0062] Understandably, a normal driver will have two sets of volt-ampere characteristic curves: a pull-down volt-ampere characteristic curve and a pull-up volt-ampere characteristic curve. Assuming the first driver D1 is a normal driver, it will have both pull-down and pull-up volt-ampere characteristic curves. During the pull-down and pull-up processes, the pull-down current flows out of the driver, which is a positive current, while the pull-up current flows into the driver, which is a negative current. When the first driver D1 outputs a high level (pull-up), the pull-up volt-ampere characteristic curve takes effect. The magnitude of the current on the pull-up volt-ampere characteristic curve represents the driving capability, and the slope of the pull-up volt-ampere characteristic curve represents the output impedance.

[0063] To enhance the pull-down and pull-up currents, the second driver D2 needs to be set as the pull-down pre-emphasis current driver, and the third driver D3 needs to be set as the pull-up pre-emphasis current driver.

[0064] For the second driver D2, the pull-up current characteristic curve is missing. The pull-down current boost curve is used to represent the pull-down current boost. It can be superimposed with the first driver D1 to take effect. When the output of the first driver D1 is low (pull-down) and the second driver D2 is turned on, the pull-down current boost curve of the first driver D1 and the pull-down current boost curve of the second driver D2 are added together. In this way, the current will be larger under the same voltage, thereby increasing the drive current.

[0065] For the third driver D3, the pull-down volt-ampere characteristic curve is missing. The pull-up volt-ampere characteristic curve is used to represent the pull-up current increase. It can be superimposed with the first driver D1 to take effect. When the output of the first driver D1 is high (pull-up), the pull-up volt-ampere characteristic curve of the first driver D1 and the pull-up current increase of the third driver D3 are added together. In this way, the current will be greater under the same voltage, thereby increasing the drive current.

[0066] The current-voltage characteristic curves of the first driver D1, the second driver D2, and the third driver D3 are as follows: Figure 3 As shown.

[0067] This embodiment determines the volt-ampere characteristic curves of each driver according to a preset current range. In the process of dynamically adjusting the internal parameters of the chip by controlling the switching of the chip driver in the subsequent timing control chip, the volt-ampere characteristic curves of each driver are superimposed to achieve the behavioral-level pre-emphasis current function. This does not reveal the chip's pre-emphasis algorithm and effectively shortens the simulation running time.

[0068] In a preferred embodiment, determining the current-voltage characteristic curve of each driver based on a preset chip parameter range includes: when the preset chip parameter range is a preset impedance range, determining the current-voltage characteristic curve of the first driver as a standard current-voltage characteristic curve with impedance limited within the preset impedance range; taking any impedance value within the preset impedance range as a first impedance value, determining the current-voltage characteristic curve of the second driver as a pull-down current-voltage characteristic curve with impedance constantly equal to the first impedance value; taking any impedance value within the preset impedance range as a second current value, determining the current-voltage characteristic curve of the third driver as a pull-up current-voltage characteristic curve with impedance constantly equal to the second impedance value.

[0069] It should be noted that the standard current-voltage characteristic curve can be obtained based on the predefined initial current value and initial impedance range.

[0070] As an example, when the preset chip parameter range is a preset impedance range, the volt-ampere characteristic curve of the first driver D1 is determined to be a standard volt-ampere characteristic curve with impedance limited within the preset impedance range, that is, the slopes of both the pull-down and pull-up volt-ampere characteristic curves of the first driver D1 are within the preset impedance range. Taking any impedance value within the preset impedance range as the first impedance value, the volt-ampere characteristic curve of the second driver D2 is determined to be a pull-down volt-ampere characteristic curve with impedance constantly equal to the first impedance value, that is, the slope of the volt-ampere characteristic curve of the second driver D2 is constantly equal to the first impedance value. Taking any impedance value within the preset impedance range as the second impedance value, the volt-ampere characteristic curve of the third driver D3 is determined to be a pull-up volt-ampere characteristic curve with impedance constantly equal to the second impedance value, that is, the slope of the volt-ampere characteristic curve of the third driver D3 is constantly equal to the second impedance value.

[0071] Understandably, a normal driver will have two sets of volt-ampere characteristic curves: a pull-down volt-ampere characteristic curve and a pull-up volt-ampere characteristic curve. Assuming the first driver D1 is a normal driver, it will have both pull-down and pull-up volt-ampere characteristic curves. During the pull-down and pull-up processes, the pull-down current flows out of the driver, which is a positive current, while the pull-up current flows into the driver, which is a negative current. When the first driver D1 outputs a high level (pull-up), the pull-up volt-ampere characteristic curve takes effect. The magnitude of the current on the pull-up volt-ampere characteristic curve represents the driving capability, and the slope of the pull-up volt-ampere characteristic curve represents the output impedance.

[0072] To enhance the pull-down and pull-up impedances, the second driver D2 needs to be set as the pull-down pre-emphasis impedance driver, and the third driver D3 needs to be set as the pull-up pre-emphasis impedance driver.

[0073] For the second driver D2, the pull-up current-voltage characteristic curve is left blank, and the slope of the pull-down current-voltage characteristic curve is adjusted. This slope represents the internal resistance value of the second driver D2 itself, which can be superimposed with the first driver D1. When the output of the first driver D1 is low (pull-down), and the second driver D2 is turned on, the pull-down current-voltage characteristic curve of the first driver D1 and the pull-down current-voltage characteristic curve of the second driver D2 are added together. In this way, the change in voltage and current forms a change in impedance.

[0074] For the third driver D3, the pull-down volt-ampere characteristic curve is left blank, and the slope of the pull-up volt-ampere characteristic curve is adjusted. This slope represents the internal resistance value of the third driver D3 itself, which can be superimposed with the first driver D1. When the output of the first driver D1 is high (pull-up), and the third driver D3 is turned on, the pull-up volt-ampere characteristic curves of the first driver D1 and the third driver D3 are added together. In this way, the change in voltage and current creates a change in impedance.

[0075] This embodiment determines the current-voltage characteristic curves of each driver according to a preset impedance range. In the process of dynamically adjusting the internal parameters of the chip by controlling the switching of the driver in the subsequent timing control chip, the current-voltage characteristic curves of each driver are superimposed to achieve the behavioral-level pre-emphasis impedance function. This does not reveal the chip's pre-emphasis algorithm and effectively shortens the simulation running time.

[0076] In a preferred embodiment, the step of randomly generating a driver switching control timing file by combining a preset chip parameter range and the volt-ampere characteristic curves of each driver specifically involves: randomly generating a driver switching control timing file based on a preset switching period and a preset switching time, combined with a preset chip parameter range and the volt-ampere characteristic curves of each driver.

[0077] As an example, assuming a preset switching period of 6ns and a preset switching time of 1ns, combined with preset chip parameter ranges, such as a preset current range and the volt-ampere characteristic curves of each driver, a result is formed as follows: Figure 4 The four current-voltage characteristic curves shown are: pull-down, pull-down + pull-down current boost, pull-up, and pull-up current boost. These curves are randomly generated as follows: Figure 5 The driver switch control timing file is shown. In this timing file, only one preset switching period needs to be specified for the switching points. For example, if the preset switching period is 6ns, then: 0ns: pull-up + pull-up current increase; 1ns: pull-up; 3ns: pull-down + pull-down current increase; 4ns: pull-down; 6ns. After one preset switching period ends, the system returns to the 0ns state.

[0078] Once the driver switch control timing file is obtained, the opening and closing of each driver switch in the simulation model is controlled according to the timing file at each corresponding time node. For example, within 0-1us, the first driver switch S1, the second driver switch S2, and the third driver switch S3 are all opened, turning off the first driver D1, the second driver D2, and the third driver D3. Within 1us-2us, the first driver switch S1 is closed, turning on only the first driver D1. Within 2us-3us, the second driver switch S2 is closed, turning on only the first driver D1 and the second driver D2. Within 3us-5us, the third driver switch S3 is closed, turning on the first driver D1, the second driver D2, and the third driver D3. Within 5us-6us, the third driver switch S3 is opened, turning off only the third driver D3. The timing control flow is as follows: Figure 6 As shown, by controlling the opening and closing of the first driver D1, the second driver D2, and the third driver in a timing sequence, the internal driving capability, impedance, and other parameters of the chip can be dynamically adjusted, causing the chip parameters in the simulation model to change within a preset chip parameter range, resulting in... Figure 7 The simulation results shown demonstrate the completion of chip signal integrity simulation.

[0079] The simulation results obtained are a dynamic simulation result range, which can be used to evaluate the upper and lower limits of the chip's performance. By analyzing the simulation results, the maximum fluctuation range that the chip can tolerate in terms of driving capability and impedance transitions, as well as the adaptive optimal pre-emphasis parameters, can be deduced, which is beneficial for comprehensive and accurate simulation of chip signal integrity.

[0080] Based on the same inventive concept as the first embodiment, the second embodiment provides as follows: Figure 8 The device for dynamic simulation of chip signal integrity includes: a simulation model construction module 21, used to acquire several drivers according to a preset number of drivers, and connect each driver to a driver accumulation node through a driver switch to construct a simulation model; a timing file generation module 22, used to determine the volt-ampere characteristic curve of each driver according to a preset chip parameter range, and randomly generate a driver switch control timing file by combining the preset chip parameter range and the volt-ampere characteristic curve of each driver; and a simulation result acquisition module 23, used to control the opening and closing of each driver switch in the simulation model according to the driver switch control timing file, so that the chip parameters of the simulation model change within the preset chip parameter range, and obtain the simulation result.

[0081] In a preferred embodiment, the simulation model construction module 21 is specifically used to acquire a first driver, a second driver, and a third driver when the preset number of drivers is 3, connect the first driver to the driver accumulation node through a first driver switch, connect the second driver to the driver accumulation node through a second driver switch, and connect the third driver to the driver accumulation node through a third driver switch to construct a simulation model.

[0082] In a preferred embodiment, the timing file generation module 22 is specifically used to: when the preset chip parameter range is a preset current range, determine that the volt-ampere characteristic curve of the first driver is a standard volt-ampere characteristic curve with the current limited within the preset current range; take any current value within the preset current range as the first current value, and determine that the volt-ampere characteristic curve of the second driver is a pull-down volt-ampere characteristic curve with the current constant at the first current value; take any current value within the preset current range as the second current value, and determine that the volt-ampere characteristic curve of the third driver is a pull-up volt-ampere characteristic curve with the current constant at the second current value.

[0083] In a preferred embodiment, the timing file generation module 22 is specifically used to: when the preset chip parameter range is a preset impedance range, determine that the current-voltage characteristic curve of the first driver is a standard current-voltage characteristic curve with impedance limited within the preset impedance range; take any impedance value within the preset impedance range as the first impedance value, and determine that the current-voltage characteristic curve of the second driver is a pull-down current-voltage characteristic curve with impedance constant at the first impedance value; take any impedance value within the preset impedance range as the second current value, and determine that the current-voltage characteristic curve of the third driver is a pull-up current-voltage characteristic curve with impedance constant at the second impedance value.

[0084] In a preferred embodiment, the timing file generation module 22 is specifically used to: randomly generate a driver switching control timing file based on a preset switching period and a preset switching time, combined with a preset chip parameter range and the volt-ampere characteristic curves of each driver.

[0085] Based on the same inventive concept as the second embodiment, the third embodiment provides a dynamic simulation platform for chip signal integrity. The dynamic simulation platform for chip signal integrity includes the dynamic simulation device for chip signal integrity as described in the second embodiment, and can achieve the same beneficial effects.

[0086] In summary, implementing the embodiments of the present invention has the following beneficial effects:

[0087] A simulation model is constructed by acquiring several drivers according to a preset number of drivers and connecting each driver to a driver accumulation node through a driver switch. The current-voltage characteristic curve of each driver is determined according to a preset chip parameter range. Based on the preset chip parameter range and the current-voltage characteristic curve of each driver, a driver switch control timing file is randomly generated. According to the driver switch control timing file, the opening and closing of each driver switch in the simulation model is controlled, so that the chip parameters of the simulation model change within the preset chip parameter range. The simulation results are obtained, and the chip signal integrity simulation is completed. Thus, the internal parameters of the chip can be dynamically adjusted by controlling the switching of the chip drivers through timing, thereby simulating the process of changing internal parameters of the chip.

[0088] The above description represents the preferred embodiments of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of the present invention, and these improvements and modifications are also considered to be within the scope of protection of the present invention.

[0089] Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, it can include the processes described in the above embodiments. The storage medium can be a magnetic disk, optical disk, read-only memory (ROM), or random access memory (RAM), etc.

Claims

1. A dynamic simulation method for chip signal integrity, characterized in that, include: A number of drivers are obtained according to a preset number of drivers, and each driver is connected to a driver accumulation node through a driver switch to build a simulation model. The current-voltage characteristic curves of each driver are determined according to the preset chip parameter range, and the driver switching control timing file is randomly generated by combining the preset chip parameter range and the current-voltage characteristic curves of each driver. According to the driver switch control timing file, the opening and closing of each driver switch in the simulation model is controlled, so that the chip parameters of the simulation model change within the preset chip parameter range, and the simulation results are obtained.

2. The dynamic simulation method for chip signal integrity as described in claim 1, characterized in that, The step involves obtaining several drivers based on a preset number of drivers, connecting each driver to a driver accumulation node via a driver switch, and constructing a simulation model. Specifically: When the preset number of drivers is 3, the first driver, the second driver, and the third driver are obtained. The first driver is connected to the driver accumulation node through the first driver switch, the second driver is connected to the driver accumulation node through the second driver switch, and the third driver is connected to the driver accumulation node through the third driver switch to construct the simulation model.

3. The dynamic simulation method for chip signal integrity as described in claim 2, characterized in that, The step of determining the current-voltage characteristic curve of each driver according to a preset chip parameter range includes: When the preset chip parameter range is a preset current range, the current-voltage characteristic curve of the first driver is determined to be a standard current-voltage characteristic curve with the current limited to the preset current range; Take any current value within the preset current range as the first current value, and determine the volt-ampere characteristic curve of the second driver as the pull-down volt-ampere characteristic curve with the current constant at the first current value; Take any current value within the preset current range as the second current value, and determine the current-voltage characteristic curve of the third driver as the pull-up current-voltage characteristic curve with the current constant at the second current value.

4. The dynamic simulation method for chip signal integrity as described in claim 2, characterized in that, The step of determining the current-voltage characteristic curve of each driver according to a preset chip parameter range includes: When the preset chip parameter range is a preset impedance range, the current-voltage characteristic curve of the first driver is determined to be a standard current-voltage characteristic curve with impedance limited to the preset impedance range; Take any impedance value within the preset impedance range as the first impedance value, and determine the volt-ampere characteristic curve of the second driver as a pull-down volt-ampere characteristic curve with the impedance constant at the first impedance value; Take any impedance value within the preset impedance range as the second impedance value, and determine the current-voltage characteristic curve of the third driver as the pull-up current-voltage characteristic curve with the impedance constant at the second impedance value.

5. The dynamic simulation method for chip signal integrity as described in claim 1, characterized in that, The step of randomly generating a driver switching control timing file by combining the preset chip parameter range and the current-voltage characteristic curves of each driver is as follows: Based on the preset switching period and preset switching time, combined with the preset chip parameter range and the volt-ampere characteristic curves of each driver, the driver switching control timing file is randomly generated.

6. A dynamic simulation device for chip signal integrity, characterized in that, include: The simulation model construction module is used to obtain several drivers according to a preset number of drivers, and connect each driver to a driver accumulation node through a driver switch to construct a simulation model. The timing file generation module is used to determine the current-voltage characteristic curve of each driver according to the preset chip parameter range, and to randomly generate a driver switching control timing file by combining the preset chip parameter range and the current-voltage characteristic curve of each driver. The simulation result acquisition module is used to control the opening and closing of each driver switch in the simulation model according to the driver switch control timing file, so that the chip parameters of the simulation model change within the preset chip parameter range, and obtain the simulation results.

7. The dynamic simulation device for chip signal integrity as described in claim 6, characterized in that, The simulation model construction module is specifically used to acquire a first driver, a second driver, and a third driver when the preset number of drivers is 3, connect the first driver to the driver accumulation node through a first driver switch, connect the second driver to the driver accumulation node through a second driver switch, and connect the third driver to the driver accumulation node through a third driver switch to construct the simulation model.

8. The dynamic simulation device for chip signal integrity as described in claim 7, characterized in that, The time-series file generation module is specifically used for: When the preset chip parameter range is a preset current range, the current-voltage characteristic curve of the first driver is determined to be a standard current-voltage characteristic curve with the current limited to the preset current range; Take any current value within the preset current range as the first current value, and determine the volt-ampere characteristic curve of the second driver as the pull-down volt-ampere characteristic curve with the current constant at the first current value; Take any current value within the preset current range as the second current value, and determine the current-voltage characteristic curve of the third driver as the pull-up current-voltage characteristic curve with the current constant at the second current value.

9. The dynamic simulation device for chip signal integrity as described in claim 7, characterized in that, The time-series file generation module is specifically used for: When the preset chip parameter range is a preset impedance range, the current-voltage characteristic curve of the first driver is determined to be a standard current-voltage characteristic curve with impedance limited to the preset impedance range; Take any impedance value within the preset impedance range as the first impedance value, and determine the volt-ampere characteristic curve of the second driver as a pull-down volt-ampere characteristic curve with the impedance constant at the first impedance value; Take any impedance value within the preset impedance range as the second impedance value, and determine the current-voltage characteristic curve of the third driver as the pull-up current-voltage characteristic curve with the impedance constant at the second impedance value.

10. A dynamic simulation platform for chip signal integrity, characterized in that, The dynamic simulation platform for chip signal integrity includes the dynamic simulation device for chip signal integrity as described in any one of claims 6 to 9.

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