Chip parameter trimming method and device

Abstract

The application discloses a chip parameter trimming method and device, wherein the method comprises the following steps: trimming a plurality of first chips respectively; inputting a plurality of first trimming codes into the first chips respectively to obtain a plurality of first trimming values through testing; comparing all the first trimming values with target trimming values of the first chips respectively; taking the first trimming code corresponding to the closest first trimming value as a first optimal trimming code; calculating a first index value according to initial values of chip parameters of the first chips, the plurality of first trimming values, a maximum trimming value and an average value calculation formula, recording the first index value and the first optimal trimming code; inputting the first trimming codes into second chips respectively to obtain a plurality of second trimming values through testing; calculating an average value of the plurality of second trimming values to obtain a second index value; finding the closest first index value and taking the corresponding first optimal trimming code as a second optimal trimming code, so that the trimming time of the second chips is effectively shortened, and the efficiency of trimming chip parameters is improved.

Description

Technical Field

[0001] This invention relates to the field of chip parameter tuning technology, and more particularly to a chip parameter tuning method and apparatus. Background Technology

[0002] Semiconductor manufacturing technology and equipment are becoming increasingly advanced, but defects still occur during the manufacturing process. Therefore, most chips with reference parameters such as reference voltage and reference current are designed with adjustment circuits embedded in them so that process changes affecting device parameters can be corrected by changing these circuits during wafer probe testing and packaging testing.

[0003] Trimming techniques include fuse burn-out trimming, laser trimming, electronic fuse trimming, Zener diode short-circuit trimming, and non-volatile memory cell trimming. Among these, non-volatile memory cell trimming offers advantages such as repeatable trimming and high trimming accuracy. A non-volatile memory cell chip parameter trimming circuit is shown below. Figure 1 The diagram shows how K0, K1, and K are controlled via storage units. N N+1 switches are used to adjust the resistance between points A and B, thereby adjusting the parameters (voltage, current, etc.) between points A and B. Currently, for non-volatile memory cells with irregular chip parameter adjustment steps, the only adjustment method is the full search method. This requires inputting all adjustment codes and then comparing the target adjustment value with the tested adjustment value until the optimal adjustment code is found. The full search method has the highest accuracy, but the n-bit adjustment circuit needs to write at least 2... n Next, Test 2 n Furthermore, a single wafer contains over two thousand chips, and adjusting chip parameters is time-consuming and inefficient. Summary of the Invention

[0004] The purpose of this invention is to provide a chip parameter adjustment method and apparatus that can reduce adjustment time and effectively improve chip parameter adjustment efficiency.

[0005] To achieve the above objectives, the present invention discloses a chip parameter adjustment method, which includes:

[0006] Several first chips were individually adjusted:

[0007] Several first trimming codes are respectively input into the first chip to test and obtain the corresponding several first trimming values;

[0008] Compare each of the first adjustment values ​​with the target adjustment value of the first chip;

[0009] The first chip trimming code corresponding to the first trimming value that is closest to the first chip target trimming value is taken as the first optimal trimming code.

[0010] Calculate the average value of the first trimming value to obtain the first index value, and record the first index value and the first optimal trimming code of several first chips.

[0011] The first adjustment code corresponding to the first adjustment value of this part is respectively input into the second chip to test and obtain multiple corresponding second adjustment values. The second chip and the first chip are chips on the same type of wafer.

[0012] Calculate the average of the plurality of second adjustment values ​​to obtain a second index value;

[0013] Find the first index value that is closest to the second index value, and use the first best modifier code corresponding to the closest first index value as the second best modifier code of the second chip.

[0014] Optionally, the plurality of second trimming values ​​include an initial value, a maximum trimming value, and a plurality of numerical trimming values ​​between the initial value and the maximum trimming value of the chip parameters of the second chip, wherein the initial value is a chip parameter value obtained by testing the second chip without trimming code input, and the maximum trimming value is a chip parameter value obtained by testing the second chip with the maximum trimming code input.

[0015] The phrase "inputting the first adjustment code corresponding to the first adjustment value of this portion into the second chip to test and obtain the corresponding multiple second adjustment values" includes:

[0016] The initial values ​​of the chip parameters of the second chip were obtained through testing;

[0017] Compare the initial value with the set range;

[0018] If the initial value is within the set range, the test obtains the plurality of second adjustment values.

[0019] Optionally, the first trim value includes an initial value, a maximum trim value, and a plurality of numerical trim values ​​between the initial value and the maximum trim value of the first chip, wherein the initial value is a chip parameter value obtained by testing the first chip without trim code input, and the maximum trim value is a chip parameter value obtained by testing the first chip with the maximum trim code input.

[0020] Optionally, the plurality of numerical adjustment values ​​are chip parameter adjustment values ​​obtained from the input weight adjustment code test.

[0021] Optionally, after "taking the first best modifier code corresponding to the closest first index value as the second best modifier code of the second chip", the method further includes:

[0022] The second optimal modulating code is burned and tested to obtain a second modulating value;

[0023] Determine whether the second adjustment value is within the target adjustment range;

[0024] If the chip is within the target adjustment range, the adjustment of the second chip is successful; otherwise, the adjustment of the second chip fails.

[0025] Optionally, the first chip is a chip on a first wafer, the second chip is a chip on a second wafer, and the first wafer and the second wafer are from the same batch of wafers.

[0026] To achieve the above objectives, the present invention also discloses a chip parameter adjustment device, comprising:

[0027] The adjustment module is used to adjust several first chips individually.

[0028] Several first trimming codes are respectively input into the first chip to test and obtain the corresponding several first trimming values;

[0029] Compare each of the first adjustment values ​​with the target adjustment value of the first chip;

[0030] The first chip trimming code corresponding to the first trimming value that is closest to the first chip target trimming value is taken as the first optimal trimming code.

[0031] The calculation and recording module is used to calculate the average value of a portion of the first adjustment values ​​to obtain a first index value, and to record the first index value and the first optimal adjustment code of a plurality of the first chips.

[0032] The test module is used to input the first adjustment code corresponding to the first adjustment value of this part into the second chip to test and obtain the corresponding multiple second adjustment values. The second chip and the first chip are chips on the same type of wafer.

[0033] The calculation module is used to calculate the average of the plurality of second adjustment values ​​to obtain a second index value;

[0034] The lookup module is used to find the first index value that is closest to the second index value, and to use the first best modifier code corresponding to the closest first index value as the second best modifier code of the second chip.

[0035] Optionally, the chip parameter tuning device further includes a testing and judgment module, which is used to perform the following after the step of "taking the first optimal tuning code corresponding to the closest first index value as the second optimal tuning code of the second chip":

[0036] The second optimal modulating code is burned and tested to obtain a second modulating value;

[0037] Determine whether the second adjustment value is within the target adjustment range;

[0038] If the chip is within the target adjustment range, the adjustment of the second chip is successful; otherwise, the adjustment of the second chip fails.

[0039] To achieve the above objectives, the present invention also discloses an electronic device comprising:

[0040] One or more processors;

[0041] One or more memories are used to store one or more programs, which, when executed by the processor, enable the processor to implement the chip parameter tuning method described above.

[0042] To achieve the above objectives, the present invention also discloses a computer-readable storage medium having a program stored thereon, which, when executed by a processor, implements the chip parameter adjustment method described above.

[0043] This application also provides a computer program product or computer program including computer instructions stored in a computer-readable storage medium. A processor of an electronic device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the electronic device to perform the chip parameter tuning method described above.

[0044] This invention first adjusts several first chips: several first adjustment codes are input into the first chips to obtain corresponding first adjustment values; all first adjustment values ​​are compared with the target adjustment value of the first chip; the first chip adjustment code corresponding to the first adjustment value closest to the target adjustment value of the first chip is taken as the first optimal adjustment code; then the average value of a portion of the first adjustment values ​​is calculated to obtain a first index value, and the first index value and the first optimal adjustment code of several first chips are recorded; thus, a lookup table is established to quickly find the corresponding optimal adjustment code based on the index value. Next, the second chip is adjusted: the first adjustment codes corresponding to the portion of the first adjustment values ​​are input into the second chip to obtain multiple corresponding second adjustment values, the second chip and the first chip are chips on the same type of wafer; the average value of the multiple second adjustment values ​​is calculated to obtain a second index value; the first index value closest to the second index value is found, and the first optimal adjustment code corresponding to the closest first index value is taken as the second optimal adjustment code of the second chip. This invention eliminates the need to input all adjustment codes separately when adjusting the second chip. Instead, it only requires inputting a specific portion of the adjustment codes, testing to obtain multiple corresponding second adjustment values ​​to calculate the second index value, and then quickly obtaining the second optimal adjustment code based on the lookup table. This effectively shortens the adjustment time of the second chip and improves the efficiency of adjusting chip parameters. Attached Figure Description

[0045] Figure 1 This is a schematic diagram of a circuit for adjusting the parameters of a non-volatile memory cell chip.

[0046] Figure 2 This is a flowchart of a chip parameter adjustment method according to an embodiment of the present invention.

[0047] Figure 3 This is a partial flowchart of the chip parameter adjustment method according to an embodiment of the present invention.

[0048] Figure 4 This is a flowchart of step S103 in the chip parameter adjustment method of this embodiment of the invention.

[0049] Figure 5 This is a schematic block diagram of a chip parameter adjustment device according to an embodiment of the present invention.

[0050] Figure 6 This is a schematic block diagram of an electronic device according to an embodiment of the present invention. Detailed Implementation

[0051] To illustrate the technical content, structural features, objectives, and effects of the present invention in detail, the following description is provided in conjunction with the embodiments and accompanying drawings.

[0052] Please see Figures 1 to 4This invention discloses a chip parameter tuning method, which includes:

[0053] S101. Adjust and modify several first chips respectively:

[0054] S1011. Input several first trimming codes into the first chip respectively to test and obtain the corresponding several first trimming values;

[0055] S1012. Compare all the first adjustment values ​​with the target adjustment value of the first chip respectively;

[0056] S1013. The first chip trimming code corresponding to the first trimming value that is closest to the first chip target trimming value is taken as the first best trimming code.

[0057] S102. Calculate the average value of the first trimming values ​​to obtain the first index value, and record the first index value and the first best trimming code of several first chips.

[0058] S103. Input the first adjustment code corresponding to the first adjustment value of this part into the second chip respectively to test and obtain the corresponding multiple second adjustment values. The second chip and the first chip are chips on the same type of wafer.

[0059] S104. Calculate the average of multiple second adjustment values ​​to obtain the second index value;

[0060] S105. Find the first index value that is closest to the second index value, and use the first best modifier code corresponding to the closest first index value as the second best modifier code of the second chip.

[0061] This invention first adjusts several first chips: several first adjustment codes are input into the first chips to obtain corresponding first adjustment values; all first adjustment values ​​are compared with the target adjustment value of the first chip; the first chip adjustment code corresponding to the first adjustment value closest to the target adjustment value of the first chip is taken as the first optimal adjustment code; then the average value of a portion of the first adjustment values ​​is calculated to obtain a first index value, and the first index value and the first optimal adjustment code of several first chips are recorded; thus, a lookup table is established to quickly find the corresponding optimal adjustment code based on the index value. Next, the second chip is adjusted: the first adjustment codes corresponding to the portion of the first adjustment values ​​are input into the second chip to obtain multiple corresponding second adjustment values, the second chip and the first chip are chips on the same type of wafer; the average value of the multiple second adjustment values ​​is calculated to obtain a second index value; the first index value closest to the second index value is found, and the first optimal adjustment code corresponding to the closest first index value is taken as the second optimal adjustment code of the second chip. This invention eliminates the need to input all adjustment codes separately when adjusting the second chip. Instead, it only requires inputting a specific portion of the adjustment codes, testing to obtain multiple corresponding second adjustment values ​​to calculate the second index value, and then quickly obtaining the second optimal adjustment code based on the lookup table. This effectively shortens the adjustment time of the second chip and improves the efficiency of adjusting chip parameters.

[0062] Specifically, such as Figure 1 As shown, the chip contains a trimming circuit, a non-volatile memory cell, and a control logic circuit. The trimming circuit includes a fixed resistor Rc connected in series between points A and B, several trimming resistors R, and control components connected in parallel with the trimming resistors to control whether a single trimming resistor is connected to the trimming circuit. In this embodiment, the control component is a switch K, but it is not limited to this. Trimming the chip refers to changing the parameters (voltage, current, etc.) between points A and B by adjusting the number of trimming resistors connected to the trimming circuit, thereby correcting the chip's reference parameters (reference voltage, reference current, etc.) and ensuring the accuracy of the reference parameters.

[0063] When adjusting the chip, an adjustment code is first input to the control logic circuit. This adjustment code consists of several bits of data, each bit (0 or 1) representing an adjustment signal. The control logic circuit then inputs these adjustment signals to a non-volatile memory cell. The non-volatile memory cell controls each switch K to open or close based on the adjustment signal, thus connecting the adjustment resistor in series with the adjustment circuit or short-circuiting it. In other words, each bit of the adjustment code input to the chip controls one switch K. When the bit is 0, the switch is open, and the corresponding adjustment circuit is connected in series with the adjustment circuit. When the bit is 1, the switch is closed, and the corresponding adjustment resistor is short-circuited. Alternatively, the code can be set so that a bit of 0 closes the switch, and a bit of 1 opens the switch.

[0064] For example, if the chip's trimming circuit has n trimming resistors, then the trimming circuit is an n-bit trimming circuit, and the corresponding trimming code includes n bits of data. For example, when the trimming circuit is a 4-bit trimming circuit, the corresponding trimming code includes 0000, 0001, 0010, 0011, 0100, 0101, 0110, 0111, 1000, 1001, 1010, 1011, 1100, 1101, 1110, 1111, a total of 16.

[0065] In this embodiment, the voltage between points A and B is tested as the chip parameter value, but it is not limited to this. For example, the current between points A and B can also be tested as the chip parameter value. When the chip is adjusted, the voltage between points A and B will also change after the number of adjustment resistors in the adjustment circuit changes. The voltage value obtained by the test is then the chip parameter adjustment value. During adjustment, the target adjustment value of the chip needs to be manually set according to the chip's reference parameters so that when the voltage value between points A and B (the chip parameter adjustment value) is adjusted to be close to the target adjustment value, the chip's reference parameters are restored to accuracy.

[0066] It should be noted that the control component connected in parallel with the adjustment resistor to control whether the adjustment resistor is connected to the adjustment circuit is not limited to a switch. For example, it can also be a Zener diode (PN junction), an N-channel MOSFET, or a P-channel MOSFET. Among them, the Zener diode and N-channel MOSFET are like switches. When the data of the bit is 0, the Zener diode and N-channel MOSFET are off, and the corresponding adjustment circuit is connected in series with the adjustment circuit. When the data of the bit is 1, the Zener diode and N-channel MOSFET are on, and the corresponding adjustment resistor is short-circuited. The P-channel MOSFET is different. When the data of the bit is 0, the P-channel MOSFET is on, and when the data of the bit is 1, the P-channel MOSFET is off.

[0067] See Figures 1 to 4 Furthermore, the multiple second trimming values ​​include the initial value of the chip parameters of the second chip, the maximum trimming value, and multiple numerical trimming values ​​between the initial value and the maximum trimming value, wherein the initial value is the chip parameter value obtained by testing the second chip without trimming code input, and the maximum trimming value is the chip parameter value obtained by testing the second chip with the maximum trimming code input.

[0068] Specifically, an input without a trimming code can be understood as all trimming signals in the storage unit being 0, meaning all switches are open and all trimming resistors are connected in series in the trimming circuit. At this point, measuring the voltage between points A and B yields the initial value of the chip parameters. The maximum trimming code is when all bits of the trimming code are 1, meaning all switches are closed and all trimming resistors are short-circuited. Measuring the voltage between points A and B at this point yields the maximum trimming value of the chip parameters. For example, if the trimming circuit of the second chip is a 4-bit trimming circuit, then the maximum trimming code of the second chip is 1111. The numerical trimming value is obtained by testing with a trimming code where some bits are 0 and some are 1; therefore, the numerical trimming value falls between the initial value and the maximum trimming value.

[0069] Step S103 of the chip parameter tuning method includes:

[0070] S1031. Test to obtain the initial values ​​of the chip parameters of the second chip;

[0071] S1032. Compare the initial value with the set range;

[0072] If the initial value is within the set range, the test will yield multiple second adjustment values.

[0073] By determining the initial values ​​of the chip parameters of the second chip, we can filter out the second chips that need to be adjusted and exclude the second chips that do not need to be adjusted, which helps to improve the chip adjustment efficiency.

[0074] Specifically, the set range refers to the adjustable initial value range. If the initial value of the chip parameters is within this range, then the chip parameters of the second chip can be adjusted to be close to the adjustment value of the target chip. This adjustable initial value range is generally estimated by the wafer manufacturer during wafer production.

[0075] It should be noted that there are two scenarios for the second chip whose initial parameter value is not within the set range. The first scenario is that the initial value of the second chip's parameter is already close to the target adjustment value and does not require adjustment. The second scenario is that the second chip's parameter cannot be adjusted to be close to the target adjustment value. For these chips that do not require adjustment and are filtered out by the set range, after comparing their initial value with the set range, they still need to be compared with the target adjustment range. The difference between the chip parameter and the target adjustment value for the second chip whose initial value is within the target adjustment range is acceptable, i.e., it belongs to the first scenario. The second chip whose initial value is not within the target adjustment range belongs to the second scenario, and this second chip is judged as having failed adjustment. Next, the adjustment code with all bits set to 0 needs to be burned into the second chip belonging to the first scenario, and then the chip parameter of this second chip is tested and compared to ensure that it is still close to the target adjustment value.

[0076] Furthermore, the first trimming value includes the initial value of the chip parameters of the first chip, the maximum trimming value, and multiple numerical trimming values ​​between the initial value and the maximum trimming value, wherein the initial value is the chip parameter value obtained by testing the first chip without trimming code input, and the maximum trimming value is the chip parameter value obtained by testing the first chip with the maximum trimming code input.

[0077] Specifically, the acquisition of the first adjustment value is basically the same as the acquisition of the second adjustment value mentioned above. The only difference is that the first adjustment value is obtained by testing the first chip, while the second adjustment value is obtained by testing the second chip. Therefore, it will not be described in detail here.

[0078] Furthermore, multiple numerical adjustment values ​​are chip parameter adjustment values ​​obtained from input weight adjustment code testing.

[0079] Specifically, in this embodiment, the weighted adjustment code is an adjustment code in which only one bit of each bit data is 1 (which can short-circuit the corresponding adjustment resistor) and the other bits are 0. However, it is not limited to this. In other embodiments, only one bit of each bit data of the weighted adjustment code is 0 (which can short-circuit the corresponding adjustment resistor).

[0080] For example, if the adjustment circuits of the first chip and the second chip are 4-bit adjustment circuits, then the numerical adjustment value of the first chip is obtained by testing by inputting the weight adjustment codes 0001, 0010, 0100 and 1000 respectively into the first chip; then the first index value D is calculated according to the average value calculation formula. i = (A0+Aw1+Aw2+…+Awn+Amax) / (2+c), where A0 is the initial value of the chip parameters of the first chip, Aw1, Aw2…Awn are multiple numerical adjustment values ​​of the first chip, Amax is the maximum adjustment value of the first chip, and c is the number of numerical adjustment codes; the calculated first index value and the first best adjustment code of the first chip are recorded to obtain the lookup table shown in Table 1.

[0081] <![CDATA[D1]]> xxxx <![CDATA[D2]]> xxxx <![CDATA[D3]]> xxxx … ….

[0082] Table 1

[0083] The numerical adjustment value of the second chip is also obtained by testing by inputting the weight adjustment codes 0001, 0010, 0100 and 1000 into the second chip respectively. Then, according to the formula for calculating the first index value, the second index value D = (A0 + Aw1 + Aw2 + ... + Awn + Amax) / (2 + c) is calculated, where A0 is the initial value of the chip parameters of the second chip, Aw1, Aw2...Awn are multiple numerical adjustment values ​​of the second chip, Amax is the maximum adjustment value of the second chip, and c is the number of numerical adjustment codes. Then, the first index value closest to the second index value is quickly obtained by looking up Table 1, and the first best adjustment code corresponding to the first index value is used as the second best adjustment code of the second chip.

[0084] It should be noted that the chip trimming method of the present invention is not limited to application on 4-bit trimming circuits. When the trimming circuit is an n-bit trimming circuit, appropriate adjustments can be made according to the actual situation.

[0085] It is understandable that the numerical adjustment value is obtained by inputting a weighted adjustment code into the chip for testing, but it is not limited to this. For example, the numerical adjustment value can also be obtained by inputting an odd adjustment code, an even adjustment code, or a sequence adjustment code into the chip for testing. The odd or even adjustment code includes the adjustment code obtained by converting the decimal odd or even number to binary; while the sequence adjustment code includes the adjustment code obtained by converting the decimal value in, for example, the Fibonacci sequence or the Padua sequence to binary.

[0086] See Figure 3 Furthermore, after step S105, the chip parameter adjustment method also includes:

[0087] S106. Burn the second optimal modulating code and test it to obtain a second modulating value;

[0088] S107. Determine whether the second adjustment value is within the target adjustment range;

[0089] If the chip is within the target adjustment range, the second chip adjustment is successful; otherwise, the second chip adjustment fails.

[0090] The second optimal tuning code is input into the second chip, and the second tuning value obtained by the test is judged to ensure that the second tuning value is within the target tuning range, that is, the difference between it and the target tuning value is acceptable, which helps to improve the accuracy of chip parameter tuning.

[0091] Furthermore, the first chip is a chip on the first wafer, the second chip is a chip on the second wafer, and the first wafer and the second wafer are from the same batch of wafers.

[0092] Since wafers in the same batch have spatial correlation, the electrical parameters of the first wafer and the electrical parameters of the second wafer are correlated. Therefore, while adjusting the first chip on the first wafer, a lookup table is established so that when adjusting the second chip, the second optimal adjustment code of the second chip can be quickly obtained through the lookup table, which helps to save chip adjustment time and improve chip parameter adjustment efficiency.

[0093] Specifically, an 8-inch wafer contains approximately two to three thousand chips. According to statistics, a large number of chips can make the chip parameter tuning method of this invention converge. Moreover, the chip parameter tuning method of this invention is not only applicable to chip tuning with irregular tuning steps, but also applicable to chip tuning with certain regularity (monotonic or piecewise function form) tuning steps. The more bits tuned, the more significant the improvement in tuning efficiency.

[0094] It is understood that the first chip and the second chip are not limited to chips on the first wafer and the second wafer. For example, the first chip can be a chip on the front half of a wafer and the second chip is a chip on the back half. In some embodiments, the first wafer and the second wafer are not limited to wafers from the same batch. For example, the first wafer and the second wafer can also be wafers of the same model produced in different batches using the same manufacturing process.

[0095] See Figure 5 The present invention also discloses a chip parameter adjustment device, which includes:

[0096] Adjustment module 201 is used to adjust several first chips respectively:

[0097] Several first trim codes are input into the first chip to test and obtain the corresponding several first trim values;

[0098] Compare each of the first adjustment values ​​with the target adjustment value of the first chip;

[0099] The first chip trimming code corresponding to the first trimming value that is closest to the first chip target trimming value is taken as the first best trimming code.

[0100] The calculation and recording module 202 is used to calculate the average value of a portion of the first adjustment values ​​to obtain the first index value, and to record the first index value and the first optimal adjustment code of a number of first chips.

[0101] Test module 203 is used to input the first adjustment code corresponding to the first adjustment value into the second chip to test and obtain the corresponding multiple second adjustment values. The second chip and the first chip are chips on the same type of wafer.

[0102] Calculation module 204 is used to calculate the average of multiple second adjustment values ​​to obtain a second index value;

[0103] The lookup module 205 is used to find the first index value that is closest to the second index value, and to use the first best modifier code corresponding to the closest first index value as the second best modifier code of the second chip.

[0104] Optionally, the chip parameter adjustment device further includes a testing and judgment module 206, which is used to perform the following after "taking the first best adjustment code corresponding to the closest first index value as the second best adjustment code of the second chip":

[0105] The second optimal modulator code is burned and tested to obtain a second modulator value;

[0106] Determine whether the second adjustment value is within the target adjustment range;

[0107] If the chip is within the target adjustment range, the second chip adjustment is successful; otherwise, the second chip adjustment fails.

[0108] See Figure 6 The present invention also discloses an electronic device comprising:

[0109] One or more processors 301;

[0110] One or more memories 302 are used to store one or more programs, which, when executed by the processor, enable the processor to implement the chip parameter tuning method as described above.

[0111] This invention also discloses a computer-readable storage medium storing a program thereon, which, when executed by a processor, implements the chip parameter tuning method as described in the foregoing embodiments.

[0112] This application discloses a computer program product or computer program, which includes computer instructions stored in a computer-readable storage medium. The processor of an electronic device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the electronic device to perform the aforementioned chip parameter adjustment method.

[0113] It should be understood that, in the embodiments of this application, the processor may be a central processing unit (CPU), but it may also be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor.

[0114] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by hardware related to computer program instructions. The program can be stored in a computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. The storage medium can be a magnetic disk, optical disk, read-only memory (ROM), or random access memory (RAM), etc.

[0115] The above-disclosed embodiments are merely preferred embodiments of the present invention and should not be construed as limiting the scope of the present invention. Therefore, any equivalent variations made in accordance with the claims of the present invention are still within the scope of the present invention.

Claims

1. A method for adjusting chip parameters, characterized in that, include: Several first chips were individually adjusted: Several first trimming codes are respectively input into the first chip to test and obtain the corresponding several first trimming values; Compare each of the first adjustment values ​​with the target adjustment value of the first chip; The first adjustment code corresponding to the first adjustment value that is closest to the first chip target adjustment value is taken as the first best adjustment code. The first index value is calculated according to the average value calculation formula, and the first index value and the first optimal tuning code of several first chips are recorded. The average value calculation formula is D. i = (A0 + Aw1 + Aw2 + ... + Awn + Amax) / (2 + c), where D i Here, A0 is the first index value, Aw1, Aw2...Awn are multiple first trimming values ​​of the first chip, Amax is the maximum trimming value of the first chip, and c is the number of first trimming codes. The first adjustment code corresponding to the first adjustment value is input into the second chip to test and obtain multiple corresponding second adjustment values. The second chip and the first chip are chips on the same type of wafer. Calculate the average of the plurality of second adjustment values ​​to obtain a second index value; Find the first index value that is closest to the second index value, and use the first best modifier code corresponding to the closest first index value as the second best modifier code of the second chip.

2. The chip parameter adjustment method according to claim 1, characterized in that, The plurality of second trimming values ​​include an initial value, a maximum trimming value, and a plurality of numerical trimming values ​​between the initial value and the maximum trimming value of the second chip, wherein the initial value is a chip parameter value obtained by testing the second chip without trimming code input, and the maximum trimming value is a chip parameter value obtained by testing the second chip with the maximum trimming code input.

3. The chip parameter adjustment method according to claim 1, characterized in that, The first trim value includes the initial value of the chip parameters of the first chip, the maximum trim value, and a plurality of numerical trim values ​​between the initial value and the maximum trim value, wherein the initial value is the chip parameter value obtained by testing the first chip without trim code input, and the maximum trim value is the chip parameter value obtained by testing the first chip with the maximum trim code input.

4. The chip parameter adjustment method according to claim 2 or 3, characterized in that, The multiple numerical adjustment values ​​are chip parameter adjustment values ​​obtained from the input weight adjustment code test.

5. The chip parameter adjustment method according to claim 1, characterized in that, Following the statement "taking the first optimal modifier code corresponding to the closest first index value as the second optimal modifier code of the second chip", the method further includes: The second optimal modulating code is burned and tested to obtain a second modulating value; Determine whether the second adjustment value is within the target adjustment range; If the chip is within the target adjustment range, the adjustment of the second chip is successful; otherwise, the adjustment of the second chip fails.

6. The chip parameter adjustment method according to claim 1, characterized in that, The first chip is a chip on a first wafer, and the second chip is a chip on a second wafer. The first wafer and the second wafer are from the same batch of wafers.

7. A chip parameter adjustment device, characterized in that, include: The adjustment module is used to adjust several first chips individually. Several first trimming codes are respectively input into the first chip to test and obtain the corresponding several first trimming values; Compare each of the first adjustment values ​​with the target adjustment value of the first chip; The first adjustment code corresponding to the first adjustment value that is closest to the first chip target adjustment value is taken as the first best adjustment code. The calculation and recording module is used to calculate a first index value according to the average value calculation formula, and to record the first index value and the first optimal modulator code of several first chips. The average value calculation formula is D. i = (A0 + Aw1 + Aw2 + ... + Awn + Amax) / (2 + c), where D i Here, A0 is the first index value, Aw1, Aw2...Awn are multiple first trimming values ​​of the first chip, Amax is the maximum trimming value of the first chip, and c is the number of first trimming codes. The test module is used to input the first adjustment code corresponding to the first adjustment value into the second chip to test and obtain multiple corresponding second adjustment values. The second chip and the first chip are chips on the same type of wafer. The calculation module is used to calculate the average of the plurality of second adjustment values ​​to obtain a second index value; The lookup module is used to find the first index value that is closest to the second index value, and to use the first best modifier code corresponding to the closest first index value as the second best modifier code of the second chip.

8. The chip parameter adjustment device according to claim 7, characterized in that, It also includes a testing and judgment module, which is used to perform the following after the statement "taking the first best modifier code corresponding to the closest first index value as the second best modifier code of the second chip": The second optimal modulating code is burned and tested to obtain a second modulating value; Determine whether the second adjustment value is within the target adjustment range; If the chip is within the target adjustment range, the adjustment of the second chip is successful; otherwise, the adjustment of the second chip fails.

9. An electronic device, characterized in that, include: One or more processors; One or more memories for storing one or more programs, which, when executed by the processor, cause the processor to implement the chip parameter tuning method as described in any one of claims 1 to 6.

10. A computer-readable storage medium having a program stored thereon, characterized in that, When the program is executed by the processor, it implements the chip parameter adjustment method as described in any one of claims 1 to 6.

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