Method and apparatus for processing kv cache data

CN115421667BActive Publication Date: 2026-09-11BANK OF CHINA
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Patent Information

Application Number
CN202211168121.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-09-23
Publication Date
2026-09-11
Estimated Expiration
2042-09-23

AI Technical Summary

Technical Problem

[0003]目前Android端移动APP开发过程中,原生安卓KV存储API具有重复开发、冗余测试效率低、无法增量更新、序列化效率低、打包速度慢,数据可能出现不一致等缺点,主要体现在以下方面:

Benefits of technology

[0018]由上述技术方案可知,本申请提供一种KV缓存数据处理方法及装置,通过对键值缓存数据的类型转换和移位操作,能够提高KV存储效率,优化线程资源使用,有效减少存储造成的卡死卡顿,提高可靠性可用性。

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Abstract

Embodiments of the present application provide a KV cache data processing method and device, which can be used in the financial field. The method comprises the following steps: reading key value cache data; determining a corresponding shift strategy according to the comparison relationship between each byte character of the key value cache data and a preset encoding bit number, and performing type conversion on each byte character of the key value cache data according to the shift strategy; and performing a cache shift operation on the type-converted data in a preset cache queue. The present application can improve the KV storage efficiency, optimize the use of thread resources, effectively reduce the freezing and lag caused by storage, and improve the reliability and availability.
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Description

Technical Field

[0001] This application relates to the field of data processing, and can also be used in the financial field, specifically to a KV cache data processing method and apparatus. Background Technology

[0002] In a key-value (KV) storage system, data is stored in key-value (KV) format. Storage devices that support the key-value (KV) storage model provide key-based read operations (Get(Key)) and write operations (Put(Key,Value)). To perform a write operation, the host provides the storage device with a key and a value to write the value to the storage device, using the key as an index to the written value. To perform a read operation, the host provides the storage device with a key, the storage device finds the value based on the key, and provides the value to the host. Therefore, in a KV storage system, the key is the index used to access the value, while the value is the data being accessed. Generally, the length of the key and value can be fixed or variable.

[0003] Currently, in the development of Android mobile apps, the native Android key-value storage API has drawbacks such as repetitive development, low efficiency due to redundant testing, inability to perform incremental updates, low serialization efficiency, slow packaging speed, and potential data inconsistencies. These drawbacks are mainly reflected in the following aspects: 1. The native SP uses the memory layer and disk layer differently. When modifying, the HashMap needs to be serialized and converted to XML format for persistence. Serialization is inefficient and affects file saving speed.

[0004] 2. When the native SP performs a write task, it will block the main Activity, causing the application to frequently crash and become unresponsive, resulting in the application freezing or freezing for a long time.

[0005] 3. Using the MMKV storage solution requires the introduction of a large toolkit, which affects packaging efficiency and prolongs application distribution and installation time.

[0006] 4. The MMKV storage solution can cause data corruption during the GC process and lacks corresponding reliability design, resulting in data consistency issues. Summary of the Invention

[0007] To address the problems in the prior art, this application provides a KV cache data processing method and apparatus, which can improve KV storage efficiency, optimize thread resource usage, effectively reduce storage-related freezes and lags, and improve reliability and availability.

[0008] To solve at least one of the above problems, this application provides the following technical solution: Firstly, this application provides a method for processing KV cached data, including: Read key-value cache data; Based on the comparison between the encoding bit length of each byte character in the key-value cache data and the preset encoding bit length, a corresponding shift strategy is determined, and the type of each byte character in the key-value cache data is converted according to the shift strategy; After the type conversion, the data is placed in a preset cache queue for cache shifting. Further, the step of determining a corresponding shift strategy based on the comparison between the encoding bit length of each byte character in the key-value cache data and the preset encoding bit length, and performing type conversion on each byte character of the key-value cache data according to the shift strategy, includes: Determine whether the encoding length of the byte character of the key-value cache data exceeds the number of hexadecimal 0x80; If the value does not exceed the limit, the byte character will be converted to a byte data type.

[0009] Further, after determining whether the encoding length of the byte character of the key-value cache data exceeds the number of hexadecimal 0x80 bits, the process includes: If it exceeds, then determine whether the encoding length of the byte character of the key-value cache data exceeds the number of hexadecimal 0x800; If the value does not exceed the limit, the byte character will be shifted and ORed with the set encoding bit length before being converted into a byte data type.

[0010] Further, after determining whether the encoding length of the byte character of the key-value cache data exceeds the number of bits in hexadecimal 0x800, the process includes: If the value exceeds the limit, the byte character is shifted and ORed with the set encoding bit length before being converted into a byte data type.

[0011] Secondly, this application provides a KV cache data processing apparatus, comprising: The data reading module is used to read key-value cached data; The data conversion module is used to determine the corresponding shift strategy based on the comparison relationship between the encoding bit length of each byte character of the key-value cache data and the preset encoding bit length, and to perform type conversion on each byte character of the key-value cache data according to the shift strategy; The data shifting module is used to perform cache shifting operations after the data is converted and placed in a preset cache queue.

[0012] Furthermore, the data conversion module includes: The first bit-count determination unit is used to determine whether the bit-count encoding of the byte character of the key-value cache data exceeds the number of bits in hexadecimal 0x80; The first type conversion unit is used to convert the byte character to a byte data type if it does not exceed the limit.

[0013] Furthermore, the data conversion module includes: The second bit-count determination unit is used to determine whether the bit-count of the byte character of the key-value cache data exceeds the number of bits in hexadecimal 0x80 if the bit-count of the byte character of the key-value cache data exceeds the number of bits in hexadecimal 0x80. The second type conversion unit is used to shift the byte character and perform an OR operation with the set encoding bit length if the bit length is not exceeded, and then convert it into a byte data type.

[0014] Furthermore, the data conversion module includes: The third type conversion unit is used to convert the byte character into a byte data type after shifting and performing an OR operation with a set number of encoding bits if the encoded bit length of the byte character of the key-value cache data exceeds the number of bits in hexadecimal 0x800.

[0015] Thirdly, this application provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the steps of the KV cache data processing method.

[0016] Fourthly, this application provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the KV cache data processing method described above.

[0017] Fifthly, this application provides a computer program product, including a computer program / instructions that, when executed by a processor, implement the steps of the KV cache data processing method described above.

[0018] As can be seen from the above technical solution, this application provides a KV cache data processing method and apparatus. By performing type conversion and shift operations on key-value cache data, it can improve KV storage efficiency, optimize thread resource usage, effectively reduce storage-related freezes and improve reliability and availability. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1This is one of the flowcharts illustrating the KV cache data processing method in the embodiments of this application; Figure 2 This is the second flowchart illustrating the KV cache data processing method in the embodiments of this application; Figure 3 This is the third flowchart illustrating the KV cache data processing method in the embodiments of this application; Figure 4 This is one of the structural diagrams of the KV cache data processing device in the embodiments of this application; Figure 5 This is the second structural diagram of the KV cache data processing device in the embodiments of this application; Figure 6 This is the third structural diagram of the KV cache data processing device in the embodiments of this application; Figure 7 This is the fourth structural diagram of the KV cache data processing device in the embodiments of this application; Figure 8 This is a schematic diagram of the data conversion process in a specific embodiment of this application; Figure 9 This is a schematic diagram of the thread control flow in a specific embodiment of this application; Figure 10 This is a schematic diagram of the binary search process in a specific embodiment of this application; Figure 11 This is a schematic diagram of the structure of the electronic device in the embodiments of this application. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0022] The acquisition, storage, use, and processing of data in this application all comply with the relevant provisions of national laws and regulations.

[0023] In view of the problems existing in the prior art, this application provides a KV cache data processing method and apparatus. By performing type conversion and shift operations on key-value cache data, it can improve KV storage efficiency, optimize thread resource usage, effectively reduce storage-related freezes and improve reliability and availability.

[0024] To improve key-value storage efficiency, optimize thread resource usage, effectively reduce storage-related freezes and lag, and enhance reliability and availability, this application provides an embodiment of a key-value cache data processing method. See [link to embodiment]. Figure 1 The KV cache data processing method specifically includes the following: Step S101: Read the key-value cache data.

[0025] Step S102: Based on the comparison between the encoding bit length of each byte character of the key-value cache data and the preset encoding bit length, determine the corresponding shift strategy, and perform type conversion on each byte character of the key-value cache data according to the shift strategy.

[0026] Optionally, this application segments the data according to its size and achieves efficient use of the linear cache through a combination of shifting and AND / OR operations.

[0027] For example, the specific processing flow is as follows: Figure 8 As shown: First, read the byte character 'c' in a loop, then check if 'c' is less than 0x80, that is, whether its hexadecimal encoding is less than the number of bits in 0x80. If it is, convert it directly to byte type and put it into the cache queue for cache shifting. If not, further check if 'c' is less than 0x800.

[0028] If so, shift the binary representation of 'c' 6 bits to the right, perform an OR operation with 0xc0, extract the high-order bits, convert them to byte type, and place them in the cache queue for cache shifting. Then, perform an intersection operation with 0x3f, and then perform an OR operation with 0x80 to extract the low-order bits, convert them to byte type, and place them in the cache queue for cache shifting.

[0029] If not, then further determine whether c is less than 0xD800 and greater than 0xDFFF.

[0030] If so, shift its binary representation right by 12 bits, OR it with 0xE0 to extract the high-order bits, then convert it to a byte type and place it in the cache queue for cache shifting. Next, shift its binary representation right by 6 bits, OR it with 0x3F to extract the low-order bits, convert it to a byte type and place it in the cache queue for cache shifting. Finally, OR it with 0x3F again to extract the low-order bits, convert it to a byte type and place it in the cache queue for cache shifting.

[0031] If not, the processed numbers after shifting right by 18, 12, and 6 bits are moduloed at 0x80, converted to bytes, and placed into the buffer in sequence.

[0032] Step S103: After the type conversion, place the data in a preset cache queue for cache shifting operation.

[0033] As can be seen from the above description, the KV cache data processing method provided in this application embodiment can improve KV storage efficiency, optimize thread resource usage, effectively reduce storage-related freezes and lags, and improve reliability and availability by performing type conversion and shift operations on key-value cache data.

[0034] In one embodiment of the KV cache data processing method of this application, see [link to relevant documentation]. Figure 2 The above step S102 may also specifically include the following: Step S201: Determine whether the encoding bit length of the byte character of the key-value cache data exceeds the number of bits in hexadecimal 0x80.

[0035] Step S202: If the value is not exceeded, convert the byte character to a byte data type.

[0036] In one embodiment of the KV cache data processing method of this application, see [link to relevant documentation]. Figure 3 Following step S201 above, the following content may also be included: Step S301: If it exceeds, then determine whether the encoding bit length of the byte character of the key-value cache data exceeds the number of bits of hexadecimal 0x800.

[0037] Step S302: If the number of bits exceeds the limit, the byte character is shifted and ORed with the set number of bits to convert it into a byte data type.

[0038] In one embodiment of the KV cache data processing method of this application, after step S301 above, the following may be specifically included: If the value exceeds the limit, the byte character is shifted and ORed with the set encoding bit length before being converted into a byte data type.

[0039] To improve key-value storage efficiency, optimize thread resource usage, effectively reduce storage-related freezes and lag, and enhance reliability and availability, this application provides an embodiment of a key-value cache data processing apparatus for implementing all or part of the aforementioned key-value cache data processing method. See [link to relevant documentation]. Figure 4 The KV cache data processing device specifically includes the following components: The data reading module 10 is used to read key-value cache data.

[0040] The data conversion module 20 is used to determine the corresponding shift strategy based on the comparison relationship between the encoding bit length of each byte character of the key-value cache data and the preset encoding bit length, and to perform type conversion on each byte character of the key-value cache data according to the shift strategy.

[0041] The data shifting module 30 is used to perform a cache shifting operation after the data is converted and placed in a preset cache queue.

[0042] As can be seen from the above description, the KV cache data processing device provided in this application embodiment can improve KV storage efficiency, optimize thread resource usage, effectively reduce storage-related freezes and lags, and improve reliability and availability by performing type conversion and shifting operations on key-value cache data.

[0043] In one embodiment of the KV cache data processing apparatus of this application, see [link to embodiment]. Figure 5 The data conversion module 20 includes: The first bit determination unit 21 is used to determine whether the bit length of the byte character encoding of the key-value cache data exceeds the number of bits in hexadecimal 0x80.

[0044] The first type conversion unit 22 is used to convert the byte character to a byte data type if the number of bytes exceeds the limit.

[0045] In one embodiment of the KV cache data processing apparatus of this application, see [link to embodiment]. Figure 6 The data conversion module 20 includes: The second bit determination unit 23 is used to determine whether the bit length of the byte character encoding of the key-value cache data exceeds the number of bits in hexadecimal 0x80 if the bit length of the byte character encoding of the key-value cache data exceeds the number of bits in hexadecimal 0x80.

[0046] The second type conversion unit 24 is used to shift the byte character and perform an OR operation with the set encoding bit length if the bit length is not exceeded, and then convert it into a byte data type.

[0047] In one embodiment of the KV cache data processing apparatus of this application, see [link to embodiment]. Figure 7 The data conversion module 20 includes: The third type conversion unit 25 is used to convert the byte character into a byte data type after shifting and performing an OR operation with a set number of encoding bits if the encoding bit length of the byte character of the key-value cache data exceeds the number of bits in hexadecimal 0x800.

[0048] To further illustrate this solution, this application also provides a specific application example of implementing the KV cache data processing method using the aforementioned KV cache data processing device, which specifically includes the following: 1. Design the KV encoding format and field meanings, supporting six core fields and seven types, perfectly compatible with existing SP and MMkv, including six parts: deletion flag, extension flag, data type flag, key value length flag, key value content, and basic type value. This design covers all types and technical requirements of key-value storage in current APP mobile terminals, and realizes unified format modeling and standardization requirements.

[0049] 2. Compatibility support module, which includes support for the original native Android KV storage and MMKV language and type. It uses the Container strategy for polymorphic definition, and defines internal static classes in the Container class, including internal subclasses such as boolean, integer, and floating point. Based on the polymorphic feature, it supports the technical requirements of SP and MMKV scenarios. Due to the internal static attributes, security and data isolation are guaranteed.

[0050] 3. The high-speed cache read / write module includes core logic such as decoding, storage, and format conversion. Taking high-speed encoding conversion as an example, data is segmented according to size. Through the combined use of shifting and AND / OR operations, efficient use of the linear cache is achieved. The processing flow is as follows: Figure 8 As shown.

[0051] 4. The I / O and thread control module implements non-blocking I / O operations, improving concurrency speed and processing efficiency. It adds synchronized thread locks at the field level and uses reflection to load data, fundamentally achieving non-blocking and accelerating concurrency. See [link to relevant documentation]. Figure 9 .

[0052] 5. The synchronization lock module enables multi-threaded I / O and achieves data safety and isolation under multi-threaded conditions. It defines a global static utility class FastKVConfig and a function getExecutor() to obtain the threads in the thread pool. The state of the shared private field mActive between threads is used to determine the current data occupancy. When the data is available, the synchronization lock is released, thus ensuring data safety for non-blocking mechanisms.

[0053] 6. Common foundation modules encapsulate and implement the basic mechanisms of the overall framework, including dual-write mechanism, binary encoding, byte access, GC / Truncate methods, etc. For example, the processing flow of the binary search function can be found in [link to documentation]. Figure 10 .

[0054] As described above, this application improves upon existing technologies by enhancing the encoding method, data consistency guarantee strategy, update and GC strategies, and simplifying the encoding language. It changes the encoding method to binary, optimizes write logic, supports multi-type compatibility, implements a Jar package, and optimizes GC / Truncate strategies. This significantly improves KV storage efficiency, optimizes thread resource usage, effectively reduces storage-related freezes and improves reliability and availability, resulting in a superior customer experience. By supporting existing native Android KV storage and MMKV language and types, it greatly reduces the workload of modifying legacy applications and improves algorithm versatility. Comprehensive project testing shows that after adopting this algorithm, the success rate of Android KV storage increases to 99.8%, IO speed improves by 60%, and stability is excellent.

[0055] From a hardware perspective, in order to improve KV storage efficiency, optimize thread resource usage, effectively reduce storage-related freezes and lag, and improve reliability and availability, this application provides an embodiment of an electronic device for implementing all or part of the KV cache data processing method. The electronic device specifically includes the following components: The system comprises a processor, memory, a communications interface, and a bus; wherein the processor, memory, and communications interface communicate with each other via the bus; the communications interface is used to realize information transmission between the KV cache data processing device and core business systems, user terminals, and related databases and other related devices; the logic controller can be a desktop computer, tablet computer, or mobile terminal, etc., and this embodiment is not limited to these. In this embodiment, the logic controller can be implemented with reference to the embodiments of the KV cache data processing method and the KV cache data processing device in the embodiments, the content of which is incorporated herein, and repeated details will not be described again.

[0056] It is understood that the user terminal may include smartphones, tablet computers, network set-top boxes, portable computers, desktop computers, personal digital assistants (PDAs), in-vehicle devices, smart wearable devices, etc. Among these, the smart wearable devices may include smart glasses, smartwatches, smart bracelets, etc.

[0057] In practical applications, the KV cache data processing method can be partially executed on the electronic device side as described above, or all operations can be completed in the client device. The choice can be made based on the processing capabilities of the client device and the limitations of the user's usage scenario. This application does not impose any limitations on this. If all operations are completed in the client device, the client device may further include a processor.

[0058] The aforementioned client device may have a communication module (i.e., a communication unit) that can communicate with a remote server to achieve data transmission with the server. The server may include a server on the task scheduling center side; in other implementation scenarios, it may also include a server on an intermediate platform, such as a server on a third-party server platform that has a communication link with the task scheduling center server. The server may include a single computer device, a server cluster consisting of multiple servers, or a distributed server structure.

[0059] Figure 11 This is a schematic block diagram illustrating the system configuration of the electronic device 9600 according to an embodiment of this application. Figure 11As shown, the electronic device 9600 may include a central processing unit 9100 and a memory 9140; the memory 9140 is coupled to the central processing unit 9100. It is worth noting that... Figure 11 This is an example; other types of structures can also be used to supplement or replace this structure to achieve telecommunications functions or other functions.

[0060] In one embodiment, the KV cache data processing method function can be integrated into the central processing unit 9100. The central processing unit 9100 can be configured to perform the following control: Step S101: Read the key-value cache data.

[0061] Step S102: Based on the comparison relationship between each byte character of the key-value cache data and the preset encoding bit length, determine the corresponding shift strategy, and perform type conversion on each byte character of the key-value cache data according to the shift strategy.

[0062] Step S103: After the type conversion, place the data in a preset cache queue for cache shifting operation.

[0063] As can be seen from the above description, the electronic device provided in this application embodiment can improve KV storage efficiency, optimize thread resource usage, effectively reduce storage-related freezes and lags, and improve reliability and availability by performing type conversion and shifting operations on key-value cache data.

[0064] In another embodiment, the KV cache data processing device can be configured separately from the central processing unit 9100. For example, the KV cache data processing device can be configured as a chip connected to the central processing unit 9100, and the KV cache data processing method function can be implemented through the control of the central processing unit.

[0065] like Figure 11 As shown, the electronic device 9600 may further include: a communication module 9110, an input unit 9120, an audio processor 9130, a display 9160, and a power supply 9170. It is worth noting that the electronic device 9600 does not necessarily need to include these components. Figure 11 All components shown; in addition, the electronic device 9600 may also include Figure 11 For components not shown, please refer to existing technologies.

[0066] like Figure 11 As shown, the central processing unit 9100, sometimes also referred to as a controller or operating control, may include a microprocessor or other processor device and / or logic device, which receives inputs and controls the operation of various components of the electronic device 9600.

[0067] The memory 9140 may be, for example, one or more of a cache, flash memory, hard drive, removable media, volatile memory, non-volatile memory, or other suitable devices. It may store the aforementioned failure-related information, and also store a program for executing that information. The central processing unit 9100 may execute the program stored in the memory 9140 to perform information storage or processing, etc.

[0068] Input unit 9120 provides input to central processing unit 9100. Input unit 9120 may be, for example, a keypad or touch input device. Power supply 9170 provides power to electronic device 9600. Display 9160 displays images and text. Display may be, for example, an LCD display, but is not limited thereto.

[0069] The memory 9140 can be a solid-state memory, such as a read-only memory (ROM), random access memory (RAM), a SIM card, etc. It can also be a memory that retains information even when power is off, can be selectively erased, and contains more data; examples of this type of memory are sometimes referred to as EPROMs. The memory 9140 can also be some other type of device. The memory 9140 includes a buffer memory 9141 (sometimes referred to as a buffer). The memory 9140 may include an application / function storage unit 9142 for storing application programs and function programs or processes for executing the operation of the electronic device 9600 via the central processing unit 9100.

[0070] The memory 9140 may also include a data storage unit 9143 for storing data, such as contacts, digital data, pictures, sounds, and / or any other data used by the electronic device. The driver storage unit 9144 of the memory 9140 may include various drivers for the electronic device for communication functions and / or for performing other functions of the electronic device (such as messaging applications, address book applications, etc.).

[0071] The communication module 9110 is a transmitter / receiver 9110 that transmits and receives signals via the antenna 9111. The communication module (transmitter / receiver) 9110 is coupled to the central processing unit 9100 to provide input signals and receive output signals, which can be the same as in a conventional mobile communication terminal.

[0072] Based on different communication technologies, multiple communication modules 9110 can be configured in the same electronic device, such as cellular network modules, Bluetooth modules, and / or wireless LAN modules. The communication module (transmitter / receiver) 9110 is also coupled to a speaker 9131 and a microphone 9132 via an audio processor 9130 to provide audio output via the speaker 9131 and receive audio input from the microphone 9132, thereby realizing typical telecommunications functions. The audio processor 9130 may include any suitable buffer, decoder, amplifier, etc. Additionally, the audio processor 9130 is also coupled to a central processing unit 9100, enabling on-device recording via the microphone 9132 and on-device playback of stored audio via the speaker 9131.

[0073] Embodiments of this application also provide a computer-readable storage medium capable of implementing all steps of the KV cache data processing method with a server or client as the execution subject in the above embodiments. The computer-readable storage medium stores a computer program that, when executed by a processor, implements all steps of the KV cache data processing method with a server or client as the execution subject in the above embodiments. For example, when the processor executes the computer program, it implements the following steps: Step S101: Read the key-value cache data.

[0074] Step S102: Based on the comparison relationship between each byte character of the key-value cache data and the preset encoding bit length, determine the corresponding shift strategy, and perform type conversion on each byte character of the key-value cache data according to the shift strategy.

[0075] Step S103: After the type conversion, place the data in a preset cache queue for cache shifting operation.

[0076] As can be seen from the above description, the computer-readable storage medium provided in this application embodiment can improve KV storage efficiency, optimize thread resource usage, effectively reduce storage-related freezes and lags, and improve reliability and availability by performing type conversion and shifting operations on key-value cache data.

[0077] Embodiments of this application also provide a computer program product capable of implementing all steps of the KV cache data processing method with the execution subject being a server or client in the above embodiments. When executed by a processor, this computer program / instruction implements the steps of the KV cache data processing method. For example, the computer program / instruction implements the following steps: Step S101: Read the key-value cache data.

[0078] Step S102: Based on the comparison relationship between each byte character of the key-value cache data and the preset encoding bit length, determine the corresponding shift strategy, and perform type conversion on each byte character of the key-value cache data according to the shift strategy.

[0079] Step S103: After the type conversion, place the data in a preset cache queue for cache shifting operation.

[0080] As can be seen from the above description, the computer program product provided in this application embodiment can improve KV storage efficiency, optimize thread resource usage, effectively reduce storage-related freezes and lags, and improve reliability and availability by performing type conversion and shifting operations on key-value cache data.

[0081] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, apparatus, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0082] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (devices), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0083] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0084] These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable apparatus for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0085] Specific embodiments have been used to illustrate the principles and implementation methods of this invention. The descriptions of the embodiments above are only for the purpose of helping to understand the method and core ideas of this invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this invention. Therefore, the content of this specification should not be construed as a limitation of this invention.

Claims

1. A method for processing KV cached data, characterized in that, The method includes: Read key-value cache data; Based on the comparison between the encoding bit length of each byte character in the key-value cache data and the preset encoding bit length, a corresponding shift strategy is determined, and the type of each byte character in the key-value cache data is converted according to the shift strategy; After the type conversion, the data is placed in a preset cache queue for cache shifting. The step of determining a corresponding shift strategy based on a comparison between the encoding bit length of each byte character in the key-value cache data and a preset encoding bit length, and then performing type conversion on each byte character of the key-value cache data according to the shift strategy, includes: Determine whether the encoding length of the byte character of the key-value cache data exceeds the number of hexadecimal 0x80; If the encoding length of the byte character of the key-value cache data does not exceed the number of hexadecimal 0x80 bits, then the byte character is converted into a byte data type; If the encoding length of the byte character of the key-value cache data exceeds the number of hexadecimal 0x80, then determine whether the encoding length of the byte character of the key-value cache data exceeds the number of hexadecimal 0x800. If the encoding length of the byte character of the key-value cache data does not exceed the number of hexadecimal 0x800, then the byte character is shifted and ORed with the set encoding length to be converted into a byte data type; If the encoding length of the byte character in the key-value cache data exceeds the number of hexadecimal 0x800 bits, the byte character is shifted and ORed with the set encoding length before being converted into a byte data type.

2. A KV cache data processing device, characterized in that, include: The data reading module is used to read key-value cached data; The data conversion module is used to determine the corresponding shift strategy based on the comparison relationship between the encoding bit length of each byte character of the key-value cache data and the preset encoding bit length, and to perform type conversion on each byte character of the key-value cache data according to the shift strategy; The data shifting module is used to perform cache shifting operations after the data is converted and placed in a preset cache queue. The data conversion module includes: The first bit-count determination unit is used to determine whether the bit-count encoding of the byte character of the key-value cache data exceeds the number of bits in hexadecimal 0x80; The first type conversion unit is used to convert the byte character into a byte data type if the encoding bit length of the byte character of the key-value cache data does not exceed the number of bits in hexadecimal 0x80. The data conversion module includes: The second bit-count determination unit is used to determine whether the bit-count of the byte character of the key-value cache data exceeds the number of bits in hexadecimal 0x80 if the bit-count of the byte character of the key-value cache data exceeds the number of bits in hexadecimal 0x80. The second type conversion unit is used to convert the byte character into a byte data type by shifting and ORing it with a set number of encoding bits if the encoding bit length of the byte character of the key-value cache data does not exceed the number of bits in hexadecimal 0x800. The data conversion module includes: The third type conversion unit is used to convert the byte character into a byte data type after shifting and performing an OR operation with a set number of encoding bits if the encoded bit length of the byte character of the key-value cache data exceeds the number of bits in hexadecimal 0x800.

3. An electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the steps of the KV cache data processing method according to claim 1.

4. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the KV cache data processing method as described in claim 1.

5. A computer program product, comprising a computer program / instructions, characterized in that, When the computer program / instruction is executed by the processor, it implements the steps of the KV cache data processing method of claim 1.

Citation Information

Patent Citations

  • Object serializing method as well as object de-serializing method, device and system

    CN102750268A

  • A data processing method and device, an electronic device and a computer storage medium

    CN109033278A