Sub-quantum circuit quantum state measurement method and device and quantum computer operating system
Patent Information
- Application Number
- CN202110601286.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-05-31
- Publication Date
- 2026-10-20
- Estimated Expiration
- 2041-05-31
AI Technical Summary
有限的相干时间、单个量子位的频率选择、量子位之间的串扰和有限的控制带宽等噪声随着量子比特数量的增加而增加,从而限制了NISQ技术的发展
[0018]本申请的这些方面或其他方面在以下实施例的描述中会更加简明易懂。
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Figure CN115423109B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of quantum computing technology, and in particular to a method, apparatus and operating system for measuring quantum states of a quantum circuit. Background Technology
[0002] Humanity is currently at a critical juncture in the development of quantum technology—Noisy Intermediate Scale Quantum (NISQ) devices. Noise, such as finite coherence time, frequency selection of individual qubits, crosstalk between qubits, and limited control bandwidth, increases with the number of qubits, thus limiting the development of NISQ technology. Building a reliable quantum computing device is becoming increasingly difficult.
[0003] The common approach is to divide a large quantum circuit with many qubits into multiple smaller sub-quantum circuits, then run these sub-quantum circuits on a quantum computing device. The results are then synthesized to obtain a simulation of the original quantum circuit. This method yields more reliable results than directly running the large quantum circuit on the quantum computing device. One of the core challenges of this approach lies in how to transform the divided sub-quantum circuits into actual sub-quantum circuits running on the quantum computing device and how to perform quantum state measurements on these actual running sub-quantum circuits. Summary of the Invention
[0004] This application provides a method, apparatus, and quantum computer operating system for measuring the quantum state of a sub-quantum circuit, used to convert a cut sub-quantum circuit into a sub-quantum circuit that actually runs on a quantum computing device and to measure the quantum state of the actually running sub-quantum circuit.
[0005] In a first aspect, embodiments of this application provide a method for measuring the quantum state of a sub-quantum circuit, including: Obtain the segmented sub-quantum circuit, which includes a first qubit and a second qubit, wherein the timeline containing the first qubit is not segmented, and the timeline containing the second qubit has been segmented. The initial quantum state of the first qubit is prepared to the first quantum state using a first unitary matrix; if the timeline where the second qubit is located is the upstream timeline after the cut, the initial quantum state of the second qubit is prepared to the first quantum state using the first unitary matrix; if the timeline where the second qubit is located is the downstream timeline after the cut, the initial quantum state of the second qubit is prepared to the second quantum state using a second unitary matrix, wherein the upstream timeline is the timeline before the cut position and the downstream timeline is the timeline after the cut position; The final quantum state of the first qubit after running the sub-quantum circuit is measured on the first measurement basis; if the timeline of the second qubit is the downstream timeline after the cut, the final quantum state of the second qubit after running the sub-quantum circuit is measured on the first measurement basis; if the timeline of the second qubit is the upstream timeline after the cut, the final quantum state of the second qubit after running the sub-quantum circuit is measured on the second measurement basis.
[0006] Alternatively, the quantum state is represented in the center of the Bloch sphere. O Pointing to a point on the sphere S i Directed line segments between This indicates that the second quantum state The vertex it points to S i A regular tetrahedron is formed in the Bloch sphere, wherein... i It equals 0, 1, 2 or 3.
[0007] Optionally, the first quantum state is |0>, and the second quantum state... Similar to the first quantum state, the first unitary matrix corresponding to the first quantum state is the same as that of the second quantum state. The corresponding second unitary matrix is the identity matrix I; Among them, the .
[0008] Optionally, the for |0>+ |1>, the aforementioned for |0>+ |1>, the aforementioned for |0>+ |1>;The The corresponding second unitary matrix is The The corresponding second unitary matrix is The The corresponding second unitary matrix is ; in, .
[0009] Optionally, the first measurement basis is Z, and the second measurement basis is Z, X, and Y; wherein, the The The .
[0010] Optionally, the Pauli eigenstate corresponding to Z is or The Pauli eigenstate corresponding to X is or The Pauli eigenstate corresponding to Y is or .
[0011] Secondly, embodiments of this application provide a quantum state measurement device for a sub-quantum circuit, characterized in that it includes: A circuit acquisition unit is used to acquire the segmented sub-quantum circuit, wherein the sub-quantum circuit includes a first qubit and a second qubit, the timeline where the first qubit is located is not segmented, and the timeline where the second qubit is located has been segmented. A quantum state preparation unit is used to prepare the initial quantum state of the first qubit to the first quantum state using a first unitary matrix; if the timeline where the second qubit is located is the upstream timeline after the cut, the initial quantum state of the second qubit is prepared to the first quantum state using the first unitary matrix; if the timeline where the second qubit is located is the downstream timeline after the cut, the initial quantum state of the second qubit is prepared to the second quantum state using a second unitary matrix, wherein the upstream timeline is the timeline before the cut position and the downstream timeline is the timeline after the cut position; A quantum state measurement unit is used to measure the final quantum state of the first qubit after the sub-quantum circuit is run on a first measurement basis; if the timeline where the second qubit is located is a downstream timeline after the cut, the final quantum state of the second qubit after the sub-quantum circuit is run is measured on the first measurement basis; if the timeline where the second qubit is located is an upstream timeline after the cut, the final quantum state of the second qubit after the sub-quantum circuit is run is measured on the second measurement basis.
[0012] Thirdly, embodiments of this application provide an electronic device, including a processor, a memory, a communication interface, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the processor, and the programs include instructions for performing the steps of the method described in the first aspect of this application.
[0013] Fourthly, embodiments of this application provide a computer-readable storage medium storing a computer program for electronic data interchange, wherein the computer program causes a computer to perform some or all of the steps described in the method described in the first aspect of embodiments of this application.
[0014] Fifthly, embodiments of this application provide a computer program product, wherein the computer program product includes a non-transitory computer-readable storage medium storing a computer program, the computer program being operable to cause a computer to perform some or all of the steps described in the method described in the first aspect of embodiments of this application. The computer program product may be a software installation package.
[0015] In a sixth aspect, embodiments of this application provide a quantum computer operating system, wherein the quantum computer operating system performs some or all of the steps described in the method described in the first aspect of embodiments of this application for the measurement of quantum states of quantum circuits.
[0016] As can be seen, in this embodiment, the initial quantum state of the first qubit is prepared to the first quantum state using a first unitary matrix; if the timeline of the second qubit is the upstream timeline after the cut, the initial quantum state of the second qubit is prepared to the first quantum state using the first unitary matrix; if the timeline of the second qubit is the downstream timeline after the cut, the initial quantum state of the second qubit is prepared to the second quantum state using a second unitary matrix. The upstream timeline is the timeline before the cut position, and the downstream timeline is the timeline after the cut position. Depending on the type of the timeline of the qubit, different initial quantum states are prepared for the qubit using different unitary matrices, thereby realizing the preparation of the initial quantum states of each qubit of the cut sub-quantum circuit, and thus realizing the transformation of the cut sub-quantum circuit into a sub-quantum circuit that actually runs on a quantum computing device.
[0017] Simultaneously, the final quantum state of the first qubit after the sub-quantum circuit is run is measured on the first measurement basis; if the timeline of the second qubit is a downstream timeline after the cut, the final quantum state of the second qubit after the sub-quantum circuit is run is measured on the first measurement basis; if the timeline of the second qubit is an upstream timeline after the cut, the final quantum state of the second qubit after the sub-quantum circuit is run is measured on the second measurement basis. Depending on the type of timeline of the qubit, the final quantum state of each qubit is measured on different measurement basis, thereby realizing the measurement of the final quantum state of each qubit of the actually running sub-quantum circuit.
[0018] These or other aspects of this application will become more apparent in the following description of the embodiments. Attached Figure Description
[0019] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0020] Figure 1A A hardware structure block diagram of a computer terminal for a sub-quantum circuit quantum state measurement method provided in an embodiment of this application; Figure 1B This is a graphical representation of a quantum circuit provided in an embodiment of this application; Figure 2A A schematic flowchart illustrating a quantum state measurement method for a sub-quantum circuit provided in this application embodiment; Figure 2B A schematic diagram illustrating the process of cutting a quantum circuit into sub-quantum circuits, provided as an embodiment of this application; Figure 2C A schematic diagram of a Bloch sphere provided for an embodiment of this application; Figure 2D This is a schematic diagram of the structure of a second quantum state provided in an embodiment of this application; Figure 3 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application; Figure 4 This is a schematic diagram of the structure of a quantum state measurement device for a sub-quantum circuit provided in an embodiment of this application. Detailed Implementation
[0021] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.
[0022] The following sections will provide detailed explanations.
[0023] The terms "first," "second," "third," and "fourth," etc., used in the specification, claims, and accompanying drawings of this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or apparatuses.
[0024] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.
[0025] Figure 1A This is a hardware structure block diagram of a computer terminal for a quantum state measurement method using a sub-quantum circuit, as provided in an embodiment of this application.
[0026] See Figure 1A As shown, a computer terminal may include one or more ( Figure 1A Only one is shown in the diagram. A processor 102 (which may include, but is not limited to, a microprocessor MCU or a programmable logic device FPGA, etc.) and a memory 104 for storing data are also shown. Optionally, the computer terminal may further include a transmission device 106 for communication functions and an input / output device 108. Those skilled in the art will understand that... Figure 1A The structure shown is for illustrative purposes only and does not limit the structure of the computer terminal described above. For example, the computer terminal may also include components that are more complex than those described above. Figure 1A The more or fewer components shown, or having the same Figure 1A The different configurations shown.
[0027] The memory 104 can be used to store software programs and modules for application software, such as the program instructions / modules corresponding to the quantum state measurement method of the sub-quantum circuit in this embodiment. The processor 102 executes various functional applications and data processing by running the software programs and modules stored in the memory 104, thereby implementing the above-described method. The memory 104 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include memory remotely located relative to the processor 102, and these remote memories can be connected to the computer terminal 10 via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.
[0028] The transmission device 106 is used to receive or send data via a network. Specific examples of the network described above may include a wireless network provided by the communication provider of the computer terminal 10. In one example, the transmission device 106 includes a Network Interface Controller (NIC), which can connect to other network devices via a base station to communicate with the Internet. In another example, the transmission device 106 may be a Radio Frequency (RF) module, used for wireless communication with the Internet.
[0029] It should be noted that the quantum program referred to in the embodiments of this application is a program written in a classical language that represents qubits and their evolution, wherein qubits, quantum logic gates, etc. related to quantum computing are all represented by corresponding classical codes.
[0030] Quantum circuits, also known as quantum logic circuits, are a common and universal quantum computing model. They represent circuits that operate on qubits in an abstract way. A quantum circuit consists of qubits, a circuit (timeline), and various quantum logic gates. The result is often retrieved through quantum measurement operations. A quantum circuit can be represented as a sequence of quantum logic gates arranged in a specific execution order.
[0031] Specifically, for example, a quantum program: QCircuit cir; cir< <H(q[0])<<H(q[1])<<H(q[2])<<H(q[3])<<RZ(q[0],PI / 2)<<RY(q[1],PI / 4)<<RZ(q[2],PI / 4)<<CNOT(q[0],q[1])<<CR(q[1],q[2],PI / 3)<<CNOT(q[2],q[3])<<CNOT(q[0],q[3]). The corresponding quantum circuit (denoted as quantum circuit #1) can be represented as: : ),
[0032] : ), ,
[0033] : ), ,
[0034] : ), ,
[0035] in, This refers to a quantum bit with 0 to 3 bits, which is also commonly referred to as qubit. , , , .
[0036] A more visual representation can be found in the quantum circuit diagrams corresponding to the aforementioned quantum logic gate sequences. Figure 1B As shown.
[0037] Unlike traditional circuits that use metal wires to transmit voltage or current signals, in quantum circuits, the circuits can be seen as being connected by time. That is, the state of a quantum bit evolves naturally over time, following the instructions of the Hamiltonian operator, until it encounters a quantum logic gate and is manipulated.
[0038] A quantum program corresponds to a single quantum circuit. The quantum program described in this application refers to this single quantum circuit, where the total number of qubits in the single quantum circuit is the same as the total number of qubits in the quantum program. This can be understood as follows: a quantum program can consist of a quantum circuit, measurement operations on the qubits within the quantum circuit, registers storing the measurement results, and control flow nodes (jump instructions). A single quantum circuit can contain dozens, hundreds, or even thousands of quantum logic gate operations. The execution of a quantum program is the process of executing all the quantum logic gates in a specific timing order. It should be noted that the timing order refers to the chronological sequence in which individual quantum logic gates are executed.
[0039] It's important to note that in classical computing, the most basic unit is the bit, and the most fundamental control mode is the logic gate. Circuit control can be achieved through combinations of logic gates. Similarly, the way to process qubits is through quantum logic gates. Quantum logic gates enable the evolution of quantum states and are the foundation of quantum circuits. Quantum logic gates include single-qubit quantum logic gates (or simply "single gate"), such as the Hadamard gate (H gate), Pauli-X gate (X gate), Pauli-Y gate (Y gate), Pauli-Z gate (Z gate), RX gate, RY gate, RZ gate, etc.; two-qubit quantum logic gates (or simply "dual gate"), such as the CNOT gate, CR gate, SWAP gate, iSWAP gate, etc.; and multi-qubit quantum logic gates (or simply "multi-gate"), such as the Toffoli gate, etc. Quantum logic gates are generally represented using unitary matrices, which are not only matrix forms but also operations and transformations. The general quantum logic gate's effect on a quantum state is calculated by left-multiplying the unitary matrix by the matrix corresponding to the right vector of the quantum state.
[0040] For example, the vector corresponding to the right vector of the quantum state |0> is The vector corresponding to the right vector of the quantum state |1> is .
[0041] A quantum state is the logical state of a qubit. In quantum algorithms (or quantum programs), the quantum states of a group of qubits within a quantum circuit are represented in binary. For example, a group of qubits q0, q1, and q2, representing the 0th, 1st, and 2nd qubits, are represented in binary from most significant bit to least significant bit as q2q1q0. This group of qubits corresponds to a total of 2^(1 / 2) qubits, or 8 eigenstates (determined states): |000>, |001>, |010>, |011>, |100>, |101>, |110>, and |111>. Each bit in a quantum state corresponds to a qubit. For example, in the |001> state, 001 corresponds to q2q1q0 from most significant bit to least significant bit. |> represents the Dirac notation. For a quantum circuit containing... 1 quantum bit , … … The quantum circuit, in binary representation, shows the order of quantum states as follows: …、 .
[0042] To illustrate the logic state of a single qubit. It may be in a superposition of the states |0>, |1>, |0>, and |1> (an uncertain state), which can be specifically represented as: Where a and b are complex numbers representing the quantum state amplitude (probability amplitude), and the square of the magnitude of the amplitude represents the probability. 2 b 2 Let |a| represent the probabilities that the logical state is |0> and |1>, respectively. 2 +|b| 2 =1. In short, a quantum state is a superposition of eigenstates. When the probability of other states is 0, it is in a uniquely determined eigenstate.
[0043] The following description, in conjunction with the accompanying drawings, further illustrates a method for measuring the quantum state of a sub-quantum circuit provided by an embodiment of this application.
[0044] See Figure 2A , Figure 2A This application provides a flowchart illustrating a method for measuring quantum states in a sub-quantum circuit, which includes: Step 201: Obtain the segmented sub-quantum circuit, which includes a first qubit and a second qubit. The timeline containing the first qubit is not segmented, while the timeline containing the second qubit is segmented.
[0045] like Figure 2B As shown, Figure 2BThis is a schematic diagram illustrating the process of cutting a quantum circuit into sub-quantum circuits, provided in an embodiment of this application. The original quantum circuit is cut into two sub-quantum circuits at the two cutting positions shown in the diagram: sub-quantum circuit 1 and sub-quantum circuit 2. The timelines containing qubits q[1] and q[3] in the original quantum circuit are cut, while the timelines containing qubits q[0] and q[2] are not cut.
[0046] Step 202: Prepare the initial quantum state of the first qubit to the first quantum state using the first unitary matrix; if the timeline where the second qubit is located is the upstream timeline after the cut, prepare the initial quantum state of the second qubit to the first quantum state using the first unitary matrix; if the timeline where the second qubit is located is the downstream timeline after the cut, prepare the initial quantum state of the second qubit to the second quantum state using the second unitary matrix. The upstream timeline is the timeline before the cut position, and the downstream timeline is the timeline after the cut position.
[0047] The initial quantum state can be |0>, |1>, or a superposition of |0> and |1>. In quantum algorithms and experiments, the ground state |0> is generally assumed to be the initial quantum state.
[0048] like Figure 2B As shown, the timeline where qubit q[1] in sub-quantum circuit 1 is located is the downstream timeline, and the timeline where qubit q[3] is located is the upstream timeline; the timeline where qubit q[1] in sub-quantum circuit 2 is located is the upstream timeline, and the timeline where qubit q[3] is located is the downstream timeline.
[0049] Step 203: Measure the final quantum state of the first qubit after running the sub-quantum circuit on the first measurement basis; if the timeline where the second qubit is located is the downstream timeline after the cut position, then measure the final quantum state of the second qubit after running the sub-quantum circuit on the first measurement basis; if the timeline where the second qubit is located is the upstream timeline after the cut position, then measure the final quantum state of the second qubit after running the sub-quantum circuit on the second measurement basis.
[0050] The segmented sub-quantum circuit is the first sub-quantum circuit. The sub-quantum circuit in which the qubits in the first sub-quantum circuit are prepared into quantum states and allowed to actually operate in electronic devices is the second quantum circuit. The number of second sub-quantum circuits is determined based on the second quantum state, the first measurement basis, and the upstream and downstream timelines in the first sub-quantum circuit.
[0051] Furthermore, if the number of the second quantum states is m, the number of the second measurement bases is n, the number of upstream timelines in the first sub-quantum circuit is p, and the number of downstream timelines in the first sub-quantum circuit is q, then the number of the second sub-quantum circuits is m. p ·n q .
[0052] As can be seen, in this embodiment, the initial quantum state of the first qubit is prepared to the first quantum state using a first unitary matrix; if the timeline of the second qubit is the upstream timeline after the cut, the initial quantum state of the second qubit is prepared to the first quantum state using the first unitary matrix; if the timeline of the second qubit is the downstream timeline after the cut, the initial quantum state of the second qubit is prepared to the second quantum state using a second unitary matrix. The upstream timeline is the timeline before the cut position, and the downstream timeline is the timeline after the cut position. Depending on the type of the timeline of the qubit, different initial quantum states are prepared for the qubit using different unitary matrices, thereby realizing the preparation of the initial quantum states of each qubit of the cut sub-quantum circuit, and thus realizing the transformation of the cut sub-quantum circuit into a sub-quantum circuit that actually runs on a quantum computing device.
[0053] Simultaneously, the final quantum state of the first qubit after the sub-quantum circuit is run is measured on the first measurement basis; if the timeline of the second qubit is a downstream timeline after the cut, the final quantum state of the second qubit after the sub-quantum circuit is run is measured on the first measurement basis; if the timeline of the second qubit is an upstream timeline after the cut, the final quantum state of the second qubit after the sub-quantum circuit is run is measured on the second measurement basis. Depending on the type of timeline of the qubit, the final quantum state of each qubit is measured on different measurement basis, thereby realizing the measurement of the final quantum state of each qubit of the actually running sub-quantum circuit.
[0054] In one embodiment of this application, the quantum state is represented by the center of the Bloch sphere. O Pointing to a point on the sphere S i Directed line segments between This indicates that the second quantum state The vertex it points to S i A regular tetrahedron is formed in the Bloch sphere, wherein... i It equals 0, 1, 2 or 3.
[0055] See Figure 2C , Figure 2C This is a schematic diagram of a Bloch sphere provided as an embodiment of this application. Figure 2C As shown, the center of Bloch's sphere coincides with the origin O of the rectangular coordinate system. For any point in Bloch's sphere... S i Spherical coordinates can be used Represented or expressed in rectangular coordinates (rsin) cos rsin sin rcos The radius r of the Bloch sphere is 1. For a directed line segment... The corresponding quantum state can be represented as: | >= |0>+ |1>, The value range is [0, ], The value range is [0, ].
[0056] As can be seen, in this embodiment of the application, the initial quantum state of the second qubit is prepared by using the four vertices of the inscribed regular tetrahedron of the Bloch sphere as the second quantum state. In one embodiment of this application, the first quantum state is |0>, and the second quantum state... Similar to the first quantum state, the first unitary matrix corresponding to the first quantum state is the same as that of the second quantum state. The corresponding second unitary matrix is the identity matrix I; Among them, the .
[0057] For the first quantum state |0>: , =0, According to the double-angle formula for trigonometric functions, we can obtain The rectangular coordinates are (0, 0, 1). Based on the relationship between the height h of the regular tetrahedron and the radius r of its circumscribed Bloch sphere: h = 4r / 3, we can obtain... , , lie in =1 / 3 of the circle.
[0058] Among them, the quantum state remains unchanged after the identity matrix acts on |0>, and is still |0>.
[0059] As can be seen in the embodiments of this application, by using the first quantum state and the second quantum state Setting it to |0> enables the preparation of the initial quantum states of the first and second qubits. In one embodiment of this application, the... for |0>+ |1>, the aforementioned for |0>+ |1>, the aforementioned for |0>+ |1>;The The corresponding second unitary matrix is The The corresponding second unitary matrix is The The corresponding second unitary matrix is ; in, .
[0060] See Figure 2D , Figure 2D This is a schematic diagram of the structure of a second quantum state provided in an embodiment of this application. Wherein, according to... (0, 0, 1) gives cos =-1 / 3.
[0061] for |0>+ |1>: ; According to the double-angle formula for trigonometric functions, we can obtain The rectangular coordinates are ( ,0, ).
[0062] Similarly, the coordinates of the other three vertices of the regular tetrahedron can be determined as follows: (0, 0, 1) ( , , ), ( , , ).
[0063] As can be seen in the embodiments of this application, by using the first quantum state and the second quantum state Setting it to |0> will change the second quantum state. Set as |0>+ |1>, the second quantum state Set as |0>+ |1>, the second quantum state Set as |0>+ |1>, the preparation of the initial quantum states of the first and second qubits was realized.
[0064] In one embodiment of this application, the first measurement basis is Z, and the second measurement basis is Z, X, and Y; wherein, the The The .
[0065] Wherein, the quantum logic gate corresponding to the measurement operation on the second measurement basis Z is I, the quantum logic gate corresponding to the measurement operation on the second measurement basis X is H gate, and the quantum logic gate corresponding to the measurement operation on the second measurement basis Y is and H; in, , .
[0066] In this embodiment of the application, the second quantum state is , , , The number of bases is 4; the first measurement base is X, Y, Z, and the number of bases is 3; for Figure 2B The first sub-quantum circuit shown is sub-quantum circuit 1 and sub-quantum circuit 2. The number of second sub-quantum circuits is m. p ·n q This allows us to obtain 12 second sub-quantum circuits corresponding to each first sub-quantum circuit.
[0067] In one embodiment of this application, the Pauli eigenstate corresponding to Z is: or The Pauli eigenstate corresponding to X is or The Pauli eigenstate corresponding to Y is or .
[0068] The Pauli characteristic state corresponding to the first measurement basis can be derived from the secular equation H| >=E| > Determined, where H is the Hamiltonian, and E is the eigenvalue corresponding to H, | > represents the eigenstate corresponding to H. For example, for the second measurement basis Z, according to the secular equation: | >=E| > We can obtain E=1. E=-1, .
[0069] Similarly, the Pauli characteristic state corresponding to X and Pauli eigenstate corresponding to Y and All of these can be calculated using the secular equation.
[0070] With the above Figure 2A The embodiments shown are consistent; please refer to [link / reference]. Figure 3 , Figure 3 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application, such as... Figure 3 As shown, the electronic device includes a processor, a memory, a communication interface, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the processor, and the programs include instructions for performing the following steps: Obtain the segmented sub-quantum circuit, which includes a first qubit and a second qubit, wherein the timeline containing the first qubit is not segmented, and the timeline containing the second qubit has been segmented. The initial quantum state of the first qubit is prepared to the first quantum state using a first unitary matrix; if the timeline where the second qubit is located is the upstream timeline after the cut, the initial quantum state of the second qubit is prepared to the first quantum state using the first unitary matrix; if the timeline where the second qubit is located is the downstream timeline after the cut, the initial quantum state of the second qubit is prepared to the second quantum state using a second unitary matrix, wherein the upstream timeline is the timeline before the cut position and the downstream timeline is the timeline after the cut position; The final quantum state of the first qubit after running the sub-quantum circuit is measured on the first measurement basis; if the timeline of the second qubit is downstream of the cut position, the final quantum state of the second qubit after running the sub-quantum circuit is measured on the first measurement basis; if the timeline of the second qubit is upstream of the cut position, the final quantum state of the second qubit after running the sub-quantum circuit is measured on the second measurement basis.
[0071] In one embodiment of this application, the quantum state is represented by the center of the Bloch sphere. O Pointing to a point on the sphere S i Directed line segments between This indicates that the second quantum state The vertex it points to S i A regular tetrahedron is formed in the Bloch sphere, wherein... i It equals 0, 1, 2 or 3.
[0072] In one embodiment of this application, the first quantum state is |0>, and the second quantum state... Similar to the first quantum state, the first unitary matrix corresponding to the first quantum state is the same as that of the second quantum state. The corresponding second unitary matrix is the identity matrix I.
[0073] In one embodiment of this application, the for |0>+ |1>, the aforementioned for |0>+ |1>, the aforementioned for |0>+ |1>;The The corresponding second unitary matrix is The The corresponding second unitary matrix is The The corresponding second unitary matrix is ; wherein, the ; .
[0074] In one embodiment of this application, the first measurement basis is Z, and the second measurement basis is Z, X, and Y; wherein, the The The .
[0075] In one embodiment of this application, the Pauli eigenstate corresponding to Z is: or The Pauli eigenstate corresponding to X is or The Pauli eigenstate corresponding to Y is or .
[0076] It should be noted that the specific implementation process of this embodiment can be found in the specific implementation process described in the above method embodiments, and will not be described again here.
[0077] This application embodiment can divide an electronic device into functional units according to the method example described above. For example, each function can be divided into its own functional unit, or two or more functions can be integrated into one processing unit. The integrated unit can be implemented in hardware or as a software functional unit. It should be noted that the unit division in this application embodiment is illustrative and only represents one logical functional division; other division methods may be used in actual implementation.
[0078] The following are embodiments of the apparatus described in this application. These embodiments are used to execute the methods implemented in the embodiments of the method described in this application. Please refer to... Figure 4 , Figure 4 This is a schematic diagram of the structure of a sub-quantum circuit quantum state measurement device provided in an embodiment of this application, including: The circuit acquisition unit 401 is used to acquire the cut sub-quantum circuit, the sub-quantum circuit including a first qubit and a second qubit, the timeline where the first qubit is located has not been cut, and the timeline where the second qubit is located has been cut. The quantum state preparation unit 402 is used to prepare the initial quantum state of the first qubit to the first quantum state through a first unitary matrix; if the timeline where the second qubit is located is the upstream timeline after the cut, the initial quantum state of the second qubit is prepared to the first quantum state through the first unitary matrix; if the timeline where the second qubit is located is the downstream timeline after the cut, the initial quantum state of the second qubit is prepared to the second quantum state through a second unitary matrix, wherein the upstream timeline is the timeline before the cut position and the downstream timeline is the timeline after the cut position; The quantum state measurement unit 403 is used to measure the final quantum state of the first qubit after running the sub-quantum circuit on the first measurement basis; if the timeline where the second qubit is located is the downstream timeline after the cut, the final quantum state of the second qubit after running the sub-quantum circuit is measured on the first measurement basis; if the timeline where the second qubit is located is the upstream timeline after the cut, the final quantum state of the second qubit after running the sub-quantum circuit is measured on the second measurement basis.
[0079] In one embodiment of this application, the quantum state is represented by the center of the Bloch sphere. O Pointing to a point on the sphere S i Directed line segments between This indicates that the second quantum state The vertex it points to S i A regular tetrahedron is formed in the Bloch sphere, wherein... i It equals 0, 1, 2 or 3.
[0080] In one embodiment of this application, the first quantum state is |0>, and the second quantum state... Similar to the first quantum state, the first unitary matrix corresponding to the first quantum state is the same as that of the second quantum state. The corresponding second unitary matrix is the identity matrix I.
[0081] In one embodiment of this application, the for |0>+ |1>, the aforementioned for |0>+ |1>, the aforementioned for |0>+ |1>;The The corresponding second unitary matrix is The The corresponding second unitary matrix is The The corresponding second unitary matrix is ; wherein, the ; .
[0082] In one embodiment of this application, the first measurement basis is Z, and the second measurement basis is Z, X, and Y; wherein, the The The .
[0083] In one embodiment of this application, the Pauli eigenstate corresponding to Z is: or The Pauli eigenstate corresponding to X is or The Pauli eigenstate corresponding to Y is or .
[0084] It should be noted that the circuit acquisition unit 401, the quantum state preparation unit 402, and the quantum state measurement unit 403 can be implemented by a processor.
[0085] This application also provides a computer-readable storage medium storing a computer program for electronic data interchange, which causes a computer to perform some or all of the steps of any of the methods described in the above method embodiments, wherein the computer includes an electronic device.
[0086] This application also provides a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program operable to cause a computer to perform some or all of the steps of any of the methods described in the above method embodiments. The computer program product may be a software installation package, and the computer may include an electronic device.
[0087] This application also provides a quantum computer operating system, which implements the cutting process of the quantum computing circuit according to some or all of the steps of any of the methods described in the above method embodiments.
[0088] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this application. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to this application.
[0089] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.
[0090] In the several embodiments provided in this application, it should be understood that the disclosed apparatus can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of the units described above is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical or other forms.
[0091] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0092] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.
[0093] If the aforementioned integrated units are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage device (CMD). Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a memory and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned memory includes various media capable of storing program code, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.
[0094] Those skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage device, which may include: a flash drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, etc.
[0095] The embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.
Claims
1. A method for measuring quantum states in a quantum circuit, characterized in that, include: Obtain the segmented sub-quantum circuit, which includes a first qubit and a second qubit, wherein the timeline containing the first qubit is not segmented, and the timeline containing the second qubit has been segmented. The initial quantum state of the first qubit is prepared to the first quantum state using the first unitary matrix; if the timeline of the second qubit is the upstream timeline after the cut, the initial quantum state of the second qubit is prepared to the first quantum state using the first unitary matrix. If the timeline where the second qubit is located is the downstream timeline after the cut, then the initial quantum state of the second qubit is prepared into the second quantum state through the second unitary matrix. The upstream timeline is the timeline before the cut position, and the downstream timeline is the timeline after the cut position. The final quantum state of the first qubit after running the sub-quantum circuit is measured on the first measurement basis; if the timeline of the second qubit is downstream of the cut position, the final quantum state of the second qubit after running the sub-quantum circuit is measured on the first measurement basis; if the timeline of the second qubit is upstream of the cut position, the final quantum state of the second qubit after running the sub-quantum circuit is measured on the second measurement basis.
2. The method according to claim 1, characterized in that, Quantum states in the center of a Bloch sphere O Pointing to a point on the sphere S i Directed line segments between This indicates that the second quantum state The vertex it points to S i In Bloch's sphere, a regular tetrahedron is formed, wherein, the... i It equals 0, 1, 2 or 3.
3. The method according to claim 2, characterized in that, The first quantum state is |0>, and the second quantum state Similar to the first quantum state, the first unitary matrix corresponding to the first quantum state is the same as that of the second quantum state. The corresponding second unitary matrix is the identity matrix I; Among them, the .
4. The method according to claim 3, characterized in that, The for |0>+ |1>, the aforementioned for |0>+ |1>, the aforementioned for |0>+ |1>;The The corresponding second unitary matrix is The The corresponding second unitary matrix is The The corresponding second unitary matrix is ; in, .
5. The method according to claim 1, characterized in that, The first measurement basis is Z, and the second measurement basis is Z, X, and Y; wherein, the The The .
6. The method according to claim 5, characterized in that, The Pauli eigenstate corresponding to Z is: or The Pauli eigenstate corresponding to X is or The Pauli eigenstate corresponding to Y is or .
7. A quantum state measurement device for a quantum circuit, characterized in that, include: A circuit acquisition unit is used to acquire the segmented sub-quantum circuit, wherein the sub-quantum circuit includes a first qubit and a second qubit, the timeline where the first qubit is located is not segmented, and the timeline where the second qubit is located has been segmented. A quantum state preparation unit is used to prepare the initial quantum state of the first quantum bit to the first quantum state through a first unitary matrix; if the timeline where the second quantum bit is located is the upstream timeline after the cut, the initial quantum state of the second quantum bit is prepared to the first quantum state through the first unitary matrix; If the timeline where the second qubit is located is the downstream timeline after the cut, then the initial quantum state of the second qubit is prepared into the second quantum state through the second unitary matrix. The upstream timeline is the timeline before the cut position, and the downstream timeline is the timeline after the cut position. A quantum state measurement unit is used to measure the final quantum state of the first qubit after the sub-quantum circuit is run on a first measurement basis; if the timeline where the second qubit is located is a downstream timeline after the cut, the final quantum state of the second qubit after the sub-quantum circuit is run is measured on the first measurement basis; if the timeline where the second qubit is located is an upstream timeline after the cut, the final quantum state of the second qubit after the sub-quantum circuit is run is measured on the second measurement basis.
8. An electronic device, characterized in that, The method includes a processor, a memory, a communication interface, and one or more programs, said programs being stored in the memory and configured to be executed by the processor, said programs including instructions for performing the steps of the method as described in any one of claims 1-6.
9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that is executed by a processor to implement the method of any one of claims 1-6.
10. A quantum computer operating system, characterized in that, The quantum computer operating system implements the measurement of quantum states of sub-quantum circuits according to any one of claims 1-6.
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