Overlapping circuit for power systems

Abstract

The invention relates to an overlap circuit configured to be coupled between a power source and a load for power transfer. The overlap circuit (100) disclosed herein is configured to simultaneously transfer power to two loads or two power sources for an overlap power transfer time period. Furthermore, the invention also relates to a system comprising such an overlap circuit.

Description

Technical Field

[0001] The present invention relates to an overlay circuit for a power system and a power system including the overlay circuit. Background Technology

[0002] An electrical system can be a power grid consisting of electrical components and devices interconnected through electrical infrastructure. The components and devices can be configured to supply, transmit, and consume electrical power. An electrical system may also include one or more electrical subsystems interconnected through electrical infrastructure.

[0003] When two independent power sources are connected to a common load, or when a common power source is connected to two independent loads, an intermediate device or circuit may be needed to transfer power from the power sources to the loads. This intermediate device or circuit can act as a power transfer switch, subsequently incorporating transistors / switches connected in different configurations to operate according to the intended function. However, this power transfer results in different types of unwanted losses, such as conduction losses, switching losses, no-load losses, gate losses, and IC losses. Summary of the Invention

[0004] The purpose of this invention is to provide a solution that alleviates or solves the shortcomings and problems of traditional solutions.

[0005] Another objective of this invention is to provide a solution that reduces power loss compared to conventional solutions.

[0006] The subject matter of the independent claims addresses the above and other objectives. Further advantageous embodiments of the invention can be found in the dependent claims.

[0007] According to a first aspect of the invention, the above and other objectives are achieved by an overlay circuit for a power system, the overlay circuit comprising:

[0008] A first controllable switch is configured to be connected between a first power source and a load;

[0009] A second controllable switch is configured to be connected between a second power source and the load; wherein

[0010] i) During the first time period T1, when the second controllable switch is configured to block the second current i2 from the second power source to the load, the first controllable switch is configured to feed the first current i1 from the first power source to the load;

[0011] ii) During a second time period T2 following the first time period T1, when the second controllable switch is configured to feed a second current i2 from the second power source to the load, the first controllable switch is configured to feed a first current i1 from the first power source to the load; and

[0012] iii) During the third time period T3 following the second time period T2, when the second controllable switch is configured to feed a second current i2 from the second power source to the load, the first controllable switch (110) is configured to block the first current i1 from the first power source to the load.

[0013] The time periods T1-T3 are arranged sequentially. The second time period T2 can be represented as an overlapping power transmission period because the first and second power sources simultaneously feed current to the common load. Therefore, the overlapping circuit can also be called a power transmission circuit.

[0014] According to the first aspect, one advantage of overlay circuits is that, compared to conventional solutions, switching and no-load time losses are reduced or eliminated because no-load time is not used. Furthermore, a continuous current can be supplied to the load, meaning that components such as inductors and capacitors are not needed to compensate for no-load time as in conventional solutions.

[0015] In an embodiment of the overlapping circuit according to the first aspect, the duration of the second time period T2 depends on the switching time of the first controllable switch and / or the switching time of the second controllable switch.

[0016] In an embodiment of the overlapping circuit according to the first aspect, the duration of the second time period T2 is less than 10% of the duration of the first time period T1 and / or the duration of the third time period T3.

[0017] The advantage of these embodiments is that switching losses can be kept as low as possible.

[0018] According to an embodiment of the overlapping circuit of the first aspect, iv) during a fourth time period T4 following the third time period T3, when the second controllable switch is configured to feed a second current i2 from the second power source to the load, the first controllable switch is configured to feed a first current i1 from the first power source to the load.

[0019] In an embodiment of the overlapping circuit according to the first aspect, the overlapping circuit is configured to repeat steps i) to iv) any number of times.

[0020] The advantage of this embodiment is that the overlapping time period can be repeated repeatedly in any number of cycles.

[0021] In an embodiment of the overlapping circuit according to the first aspect, the overlapping circuit further includes a control device / arrangement configured to provide a first control signal to a first controllable switch and a second control signal to a second controllable switch, such that both the first and second controllable switches are turned on during a second time period T2, thereby simultaneously feeding current to the load.

[0022] The advantage of this embodiment is that the overlapping time period can be controlled by a control signal with appropriate timing.

[0023] In an embodiment of the overlapping circuit according to the first aspect, the first control signal and the second control signal are timed simultaneously or not simultaneously.

[0024] Therefore, both simultaneous and non-simultaneous timing control signals can be used to achieve overlapping power transfer.

[0025] In one embodiment of the overlapping circuit according to the first aspect, the first control signal and the second control signal are timed separately, and the time offset depends on at least one of the following: the current supplied to the load, the voltage difference between the first power supply and the second power supply, and the resistance value when the resistance of the first controllable switch is equal to the resistance of the second controllable switch.

[0026] By using a asynchronously timed control signal, creating a time offset between the two, the current delivered to the load can be further controlled and tuned. Furthermore, when the controllable switch uses a low resistance value, the voltage in the system can be maintained.

[0027] In an embodiment of the overlapping circuit according to the first aspect,

[0028] The first controllable switch includes at least one first diode connected in parallel with at least one first variable resistor between the first power supply and the load; and

[0029] The second controllable switch includes at least one second diode connected in parallel with at least one second variable resistor between the second power supply and the load.

[0030] In an embodiment of the overlapping circuit according to the first aspect,

[0031] During the first time period T1, the first variable resistor is configured to provide a first current i1 to the load, and subsequently, the first diode is configured to provide a first current i1 to the load;

[0032] During the second time period T2, the first diode is configured to provide a first current i1 to the load, and the second diode is configured to provide a second current i2 to the load; and

[0033] During the third time period T3, the second diode is configured to provide a second current i2 to the load, and subsequently, the second variable resistor is configured to provide a second current i2 to the load.

[0034] The advantage of this embodiment is that by performing the above sequence, current can be blocked in a suitable manner between the first and second power sources.

[0035] In an embodiment of the overlapping circuit according to the first aspect, the overlapping circuit is configured to:

[0036] When the output voltage of the first power supply is less than the first threshold voltage V Th1 When switching from i) to ii); and / or

[0037] When the output voltage of the second power supply is greater than the second threshold voltage V Th2 When switching from i) to ii).

[0038] In an embodiment of the overlapping circuit according to the first aspect,

[0039] The first threshold voltage V Th1 Depends on the nominal voltage V of the load n , and / or

[0040] The second threshold voltage V Th2 Depends on the first threshold voltage V Th1 and the nominal voltage V of the load n At least one of them.

[0041] In an embodiment of the overlapping circuit according to the first aspect,

[0042] The first threshold voltage V Th1 The nominal voltage V of the load is greater than that of the load. n 90%; and / or

[0043] The second threshold voltage V Th2 The nominal voltage V of the load is higher than or equal to that of the load. n ; and / or

[0044] The second threshold voltage V Th2 Depends on the first threshold voltage V Th1 and the nominal voltage V of the load n The voltage difference between them.

[0045] In an embodiment of the overlapping circuit according to the first aspect,

[0046] The first controllable switch includes two first diodes connected in series with each other in opposite directions between the first power source and the load, and

[0047] The second controllable switch includes two second diodes connected in series with each other in opposite directions between the second power source and the load.

[0048] The advantage of this embodiment is that by using two diodes, current from other power sources can be blocked regardless of whether the voltage on the controllable switch increases or decreases.

[0049] In an embodiment of the overlapping circuit according to the first aspect, the first power supply is configured to act as a first load, the second power supply is configured to act as a second load, and the load is configured to act as a common power supply; wherein

[0050] When the second controllable switch is configured to feed a second current i2 from the common power source to the second load, the first controllable switch is configured to feed a first current i1 from the common power source to the first load.

[0051] In this embodiment, the current flows in opposite directions. For example, the load can be a motor, and the first and second power sources can be separate batteries or battery packs for supplying power to the motor. In this configuration, the motor can operate in two modes: the first mode as a load and the second mode as a power source.

[0052] According to a second aspect of the invention, the above and other objectives are achieved by an overlay circuit for a power system, the overlay circuit comprising:

[0053] A first controllable switch is configured to be connected between the power supply and the first load;

[0054] A second controllable switch is configured to be connected between the power supply and the second load; wherein

[0055] i) During the first time period T1, when the second controllable switch is configured to block the second current i2 from the power source to the second load, the first controllable switch is configured to feed the first current i1 from the power source to the first load;

[0056] ii) During a second time period T2 following the first time period T1, when the second controllable switch is configured to feed a second current i2 from the power source to the second load, the first controllable switch is configured to feed a first current i1 from the power source to the first load; and

[0057] iii) During a third time period T3 following the second time period T2, when the second controllable switch is configured to feed a second current i2 from the power source to the second load, the first controllable switch is configured to block the first current i1 from the power source to the first load.

[0058] According to the second aspect, one advantage of overlay circuits is that, compared to conventional solutions, switching and no-load time losses are reduced or eliminated because no-load time is not used. Furthermore, a continuous current can be supplied to the load, meaning that components such as inductors and capacitors are not needed to compensate for no-load time as in conventional solutions.

[0059] In an embodiment of the overlapping circuit according to the second aspect,

[0060] iv) During the fourth time period T4 following the third time period T3, when the second controllable switch is configured to feed a second current i2 from the power source to the second load, the first controllable switch is configured to feed a first current i1 to the first load.

[0061] In an embodiment of the overlapping circuit according to the second aspect, the overlapping circuit is configured to repeat steps i) to iv) any number of times.

[0062] The advantage of this embodiment is that the overlapping time period can be repeated repeatedly in any number of cycles.

[0063] In an embodiment of the overlapping circuit according to the second aspect, the overlapping circuit further includes a control device / arrangement configured to provide a first control signal to a first controllable switch and a second control signal to a second controllable switch, thereby enabling both the first and second controllable switches to conduct during a second time period T2, thereby simultaneously feeding current to the first load and the second load, respectively.

[0064] The advantage of this embodiment is that the overlapping time period can be controlled by a control signal with appropriate timing.

[0065] In an embodiment of the overlapping circuit according to the second aspect, the first control signal and the second control signal are timed simultaneously or not simultaneously.

[0066] Therefore, control signals that are timed simultaneously or not simultaneously can be used to achieve overlapping power transfer.

[0067] In one embodiment of the overlapping circuit according to the second aspect, the first control signal and the second control signal are non-simultaneous timing signals, and the time offset depends on at least one of the following: the current supplied to the first load and the current supplied to the second load, the voltage difference between the first load and the second load, and the resistance value when the resistance of the first controllable switch is equal to the resistance of the second controllable switch.

[0068] By using a asynchronously timed control signal, creating a time offset between the two, the current delivered to the load can be further controlled and tuned. Furthermore, when the controllable switch uses a low resistance value, the voltage in the system can be maintained.

[0069] In one embodiment of the overlapping circuit according to the second aspect,

[0070] The first controllable switch includes at least one first diode connected in parallel with at least one first variable resistor between the power supply and the first load; and

[0071] The second controllable switch includes at least one second diode connected in parallel with at least one second variable resistor between the power supply and the second load.

[0072] In one embodiment of the overlapping circuit according to the second aspect,

[0073] During the first time period T1, the first variable resistor is configured to provide a first current i1 to the first load, and subsequently, the first diode is configured to provide a first current i1 to the first load.

[0074] During the second time period T2, the first diode is configured to provide a first current i1 to the first load, and the second diode is configured to provide a second current i2 to the second load; and

[0075] During the third time period T3, the second diode is configured to provide a second current i2 to the second load, and subsequently, the second variable resistor is configured to provide a second current i2 to the second load.

[0076] The advantage of this embodiment is that by performing the above sequence, current can be blocked in a suitable manner between the first and second power sources.

[0077] In an embodiment of the overlapping circuit according to the second aspect, the overlapping circuit is configured to:

[0078] When the voltage on the first load is higher than the first threshold voltage V Th1 When switching from i) to ii); and / or

[0079] When the voltage on the second load is less than the second threshold voltage V Th2 When switching from i) to ii).

[0080] In an embodiment of the overlapping circuit according to the second aspect,

[0081] The first threshold voltage V Th1 Depends on the nominal voltage V of the first load n , and / or

[0082] The second threshold voltage V Th2 The nominal voltage V depends on the second load. n .

[0083] In an embodiment of the overlapping circuit according to the second aspect,

[0084] The first threshold voltage V Th1 The nominal voltage V of the load is greater than that of the load. n 90%; and / or

[0085] The second threshold voltage V Th2 The nominal voltage V of the load is higher than or equal to that of the load. n ; and / or

[0086] The second threshold voltage V Th2 Depends on the first threshold voltage V Th1 and the nominal voltage V of the load n The voltage difference between them.

[0087] In an embodiment of the overlapping circuit according to the second aspect,

[0088] The first controllable switch includes two first diodes connected in series with each other in opposite directions between the power supply and the first load, and

[0089] The second controllable switch includes two second diodes connected in series with each other in opposite directions between the power supply and the second load.

[0090] The advantage of this embodiment is that by using two diodes, current from other power sources can be blocked regardless of whether the voltage on the controllable switch increases or decreases.

[0091] In an embodiment of the overlapping circuit according to the second aspect, the first load is configured to act as a first power supply, the second load is configured to act as a second power supply, and the power supplies are configured to act as a common load; wherein

[0092] When the second controllable switch is configured to feed a second current i2 from the second power source to the common load, the first controllable switch is configured to feed a first current i1 from the first power source to the common load.

[0093] In this embodiment, the current direction is opposite.

[0094] This invention also relates to a power system, which, according to an embodiment of the invention, includes at least one power source, at least one load, and at least one overlay circuit, configured to transmit current / power between the at least one power source and the at least one load.

[0095] Further applications and advantages of the embodiments of the present invention will become clear from the following detailed description.

[0096] Brief description of the attached figures

[0097] The accompanying drawings are intended to illustrate and explain different embodiments of the invention, wherein:

[0098] Figure 1 and Figure 2 An overlay circuit according to various aspects of the present invention is shown;

[0099] Figures 3-5 An overlay circuit according to an embodiment of the present invention is shown;

[0100] Figure 6 An embodiment of the present invention including a control device is shown;

[0101] Figure 7- Figure 9 Different aspects of controlling a controllable switch are shown;

[0102] Figures 10-14 An overlay circuit according to an embodiment of the present invention is shown;

[0103] Figure 15 – Figure 19 An overlay circuit according to an embodiment of the present invention is shown;

[0104] Figure 20a and Figure 20b A state diagram of a single-switch implementation according to an embodiment of the present invention is shown;

[0105] Figure 21 A state diagram of a two-switch implementation according to an embodiment of the present invention is shown;

[0106] Figure 22 and Figure 23 Other embodiments of the invention are shown; and

[0107] Figure 24 and Figure 25 Other aspects of the invention are described. Detailed Implementation

[0108] Figure 1 and Figure 2 Overlapping circuits according to the first and second aspects of the present invention are shown respectively. Figure 1 In this circuit, two independent power supplies feed a common load using an overlay circuit, serving as an intermediate circuit for power transfer. Figure 2 In this embodiment, a common power source feeds two independent loads using an overlapped circuit, serving as an intermediate loop for power transmission. It should be noted that the overlapped circuit can also be switched between the first and second aspects of this invention, such as... Figure 24 and 25 As shown.

[0109] refer to Figure 1 and Figure 3-5Embodiments of the present invention relate to an overlay circuit 100 in a power system 400 according to a first aspect. The overlay circuit 100 disclosed herein includes a first controllable switch 110, which includes a first input 112 configured to be connected to a first power supply 210 and a first output 114 configured to be connected to a load 310. The overlay circuit 100 also includes a second controllable switch 120, which includes a second input 122 configured to be connected to a second power supply 220 and a second output 124 configured to be connected to the load 310. According to the present invention: i) during a first time period T1, the first controllable switch 110 is configured to feed a first current i1 from the first power supply 210 to the load 310 when the second controllable switch 120 is configured to block the second current i2 from the second power supply 220 to the load 310; ii) during a second time period T2 after the first time period T1, when the second controllable switch 120 is configured to feed the second current i2 from the second power supply 220 to the load 310, the first controllable switch 110 is configured to feed the first current i1 from the first power supply 210 to the load 310; and iii) during a third time period T3 after the second time period T2, when the second controllable switch 120 is configured to feed the second current i2 from the second power supply 220 to the load 310, the first controllable switch 110 is configured to block the first current i1 from the first power supply 210 to the load 310.

[0110] Therefore, the second time period T2 defines the period during which the first and second power supplies simultaneously deliver current to the load. This time period can thus be represented as the overlapping power transfer period. It is well known that in conventional solutions, power transfer is not overlapping but rather separated using so-called idle time. Further information on this will be explained in the following disclosures.

[0111] The power system 400 can be any power system, including any number of power sources, electrical loads, power subsystems, and suitable power infrastructure for connecting the components, equipment, and subsystems of the power system. A power source can be an electrical device or electrical subsystem configured to provide electricity. A load can be represented as an electrical appliance, i.e., an electrical device configured to use electricity to perform its function. Electrical power, or simple power, can be expressed in watts and is typically defined as voltage multiplied by the current in a given circuit and torque.

[0112] In an embodiment of the invention, iv) during the fourth time period T4 following the third time period T3, when the second controllable switch 120 is configured to feed the second current i2 from the second power supply 220 to the load 310, the first controllable switch 110 is configured to feed the first current i1 from the first power supply 210 to the load 310. This situation is not shown in the figure. However, it can be understood that time period T4 is also an overlapping time period when the first power supply and the second power supply simultaneously supply power to the load 310. Furthermore, according to an embodiment of the invention, steps i) to iv) described above can be repeated any number of times.

[0113] This document also discloses different methods for switching between different steps i) to iv) of the invention according to the first aspect. Typically, different conditions can be set or used to switch from state i) to state ii). These conditions may be related to the output voltage of the first power supply and its associated threshold parameters and / or the output power supply voltage of the second power supply and its associated threshold parameters.

[0114] Therefore, in embodiments of the present invention, the overlay circuit is configured such that when the output voltage of the first power supply 210 is less than the first threshold voltage V... Th1 When switching from i) to ii); and / or when the output voltage of the second power supply 220 is greater than the second threshold voltage V Th2 When switching from i) to ii). First threshold voltage V Th1 It can depend on the nominal voltage V of the load 310. n and / or the second threshold voltage V Th2 Depends on the first threshold voltage V Th1 and the nominal voltage V of the load 310 n At least one of the following. The nominal voltage of load 310 can be understood as the expected voltage of the load, the operating voltage of the load, the working voltage of the load, etc. Different types of nominal voltages can be considered. One type is static or more or less constant, i.e., a constant nominal voltage value, for example, for loads that require constant power. Another type is when the nominal voltage value takes a discrete value, for example, a predefined discrete value, such as different power levels of a microwave oven. Yet another type is where the nominal voltage value can take a continuous value, such as the motor of a vehicle such as a car or truck.

[0115] As described above, the first threshold voltage V Th1 The nominal voltage V may be lower than the load's 310V. n This means that load 310 is depleting the power of the first power supply 210 to some extent. However, for load 310 to operate normally, the output voltage should not drop too much; therefore, in a further embodiment of the invention, the first threshold voltage V... Th1 The nominal voltage V is greater than the load voltage of 310. n90% of the nominal voltage. However, it should be noted that the percentage of the nominal voltage depends on the application or type of the load; therefore, in this embodiment of the invention, the first threshold voltage V Th1 Greater than the nominal voltage V of the load n X%, where X% depends on or is based on the actual functionality of the load. In other words, the lower limit of how well the load functions or operates.

[0116] Another type of condition is primarily related to the output voltage of the second power supply 220, but it is conceivable that these conditions may also, in turn, depend on the conditions related to the output voltage of the first power supply described above. Second threshold voltage V Th2 It may be higher than or equal to the nominal voltage V of the load. n It was further recognized that the second threshold voltage V Th2 It may depend on the first threshold voltage V Th1 and the nominal voltage V of the load 310 n At least one of them. For example, the second threshold voltage V. Th2 It may be higher than the first threshold voltage V Th1 and rated voltage V n .

[0117] In an embodiment of the present invention, a first threshold voltage V is further determined. Th1 and the nominal voltage V of the load 310 n The voltage difference between them is used to determine the second threshold voltage V. Th2 For example, the second threshold voltage V Th2 It can be set to the nominal voltage plus the voltage difference. A non-limiting example is: nominal voltage V n =200V, first threshold voltage V Th1 =190V, which means that 200–190 = 10V is the voltage difference, therefore the second threshold voltage V Th2 The voltage is set to 10 + 200 = 210V. The technicians understand that when the system returns from state iii) to state i), the above conditions can be applied in comparison.

[0118] Furthermore, in a further embodiment of the invention, the first power source 210 is configured to act as a first load, the second power source 220 is configured to act as a second load, and the load 310 is configured to act as a common power source; additionally, when the second controllable switch is configured to feed a second current i2 from the common power source to the second load, the first controllable switch 110 is configured to feed a first current i1 from the common power source to the first load. This means that in these embodiments the directions of the currents are opposite. More information will be explained in conjunction with Figures 20 and 21. However, it can be noted that the first input and the first output can be configured as a first output and a first input. Therefore, the first input and the first output can be simply represented as a first electrical connection, a first connection point, a first connection node, etc.

[0119] However, as previously stated, according to a second aspect of the invention, a common power source supplies power to two separate loads. (Reference) Figure 2 In this configuration, the overlay circuit 100 includes a first controllable switch 110, which includes a first input 112 configured to be connected to a power supply 310 and a first output 114 configured to be connected to a first load 210. The overlay circuit 100 also includes a second controllable switch 120, which includes a second input 122 configured to be connected to a power supply 310 and a second output 124 configured to be connected to a second load 220. According to the present invention: i) during a first time period T1, when the second controllable switch 120 is configured to block the flow of the second current i2 from the power supply 310 to the second load 330, the first controllable switch 110 is configured to feed the first current i1 from the power supply 310 to the first load 210; ii) during a second time period T2 after the first time period T1, when the second controllable switch 120 is configured to feed the second current i2 from the power supply 310 to the second load 220, the first controllable switch 110 is configured to feed the first current i1 from the power supply 310 to the first load 210; and iii) during a third time period T3 after the second time period T2, when the second controllable switch 120 is configured to feed the second current i2 from the power supply 310 to the second load 220, the first controllable switch 110 is configured to block the first current i1 from the power supply 310 to the first load 210.

[0120] It should be noted that, for the first aspect of the present invention, the previous references Figure 1 and Figure 3-5The general principles of the invention disclosed and explained (with necessary modifications) also apply to the second aspect of the invention. Therefore, in an embodiment of the invention, iv) during a fourth time period T4 following the third time period T3, when the second controllable switch 120 is configured to feed a second current i2 from the power supply 310 to the second load 220, the first controllable switch 110 is configured to feed a first current i1 to the first load 210. Furthermore, according to an embodiment of the invention, steps i) to iv) described above can be repeated any number of times. Therefore, overlapping time periods are also defined for the second aspect of the invention.

[0121] The first load 320 and the second load 330 should be interpreted in a very general way. This means that the first and second loads mentioned above could be any electrical appliance, but could also be energy storage devices such as batteries and battery systems.

[0122] This document also discloses different methods for switching between different steps i) to iv) of the invention according to the second aspect. Typically, different conditions can be set or used to switch from state i) to state ii). These conditions may be related to the voltage of the first load and its associated threshold parameters and / or the voltage of the second load and its associated threshold parameters.

[0123] Therefore, in an embodiment of the present invention, the overlay circuit 100 is configured such that when the voltage on the first load 210 is higher than the first threshold voltage V... Th1 When, switch from step i) to step ii); and / or when the voltage on the second load 220 is less than the second threshold voltage V Th2 At that time, switch from i) to ii). First threshold voltage V Th1 It can depend on the nominal voltage V of the first load 210. n and / or second threshold pressure V Th2 Depends on the rated voltage V of the second load 210 n .

[0124] Furthermore, in a further embodiment of the invention, the first load 210 is configured to act as a first power source, the second load 220 is configured to act as a second power source, and the power source 310 is configured to act as a common load; additionally, when the second controllable switch is configured to feed a second current i2 from the second power source to the common load, the first controllable switch 110 is configured to feed a first current i1 from the first power source to the common load. This means that in these embodiments the directions of the currents are opposite. More information will be explained with reference to FIG20 and 21. However, it can be noted that the second input and the second output can be configured as a second output and a second input. Therefore, the second input and the second output can simply be represented as a second electrical connection, a second connection point, a second connection node, etc.

[0125] In embodiments of the present invention, the overlapping circuit 100 may include a control device / arrangement 150, which is electrically connected to the first controllable switch 110 and the second controllable switch 120, such as... Figure 6 As shown. When controlling different components of the system, the control device 150 can operate using a switching or timing frequency. The control device 150 can use the same or different timing frequencies for different components and applications. The control device 150 is configured to provide a first control signal CTRL1 to a first controllable switch 110 to control the first controllable switch 110. The control device 150 is also configured to provide a second control signal CTRL2 to a second controllable switch 120 to control the second controllable switch 120. To obtain the overlap mechanism disclosed herein, the first control signal CTRL1 and the second control signal CTRL2 are configured to cause both the first controllable switch 110 and the second controllable switch 120 to be turned on during a second time period T2, thereby feeding current to the load 310.

[0126] It should be noted that even without showing the second aspect, it is apparent that, according to the second aspect, the overlapping circuit may also include a control device 150 and operate according to the control signal timing principle described herein. Therefore, the first control signal CTRL1 and the second control signal CTRL2, configured according to the second aspect, cause both the first controllable switch 110 and the second controllable switch 120 to conduct during the second time period T2, thereby feeding current to the first load 210 and the second load 220 respectively. See [reference needed]. Figure 2 .

[0127] More specifically, the first control signal CTRL1 and the second control signal CTRL2 can include ON and OFF signals, such as 1 and 0 (1 / 0). The ON signal sets a controllable switch, such as the first controllable switch 110 and the second controllable switch 120, to an ON mode, while the OFF signal sets the controllable switch to a OFF mode. Therefore, in the ON mode, current can pass through the controllable switch, while in the OFF mode, current is blocked and cannot pass through the controllable switch. Based on this reasoning, the first control signal CTRL1 and the second control signal CTRL2 can be synchronously or asynchronously timed, which may mean that the first and second control signals are sent or received at the same time or at different times. Both synchronously and asynchronously timed control signals work well. In the latter case, when the first control signal CTRL1 and the second control signal CTRL2 are asynchronously timed, there may be a time offset between CTRL1 and CTRL2.

[0128] Figure 7 shows the control signals according to the prior art, while Figure 8 An example of a control signal according to an embodiment of the present invention is shown in Figure 7 and... Figure 8In the diagram, the x-axis displays time, and the y-axis displays the OFF and ON states of the corresponding controllable switches. It's important to note that when a controllable switch receives a control signal, there is always a delay between the non-conducting mode and the fully conducting mode or state, and vice versa. This can be represented as the rise time and fall time before the component enters the fully conducting (ON) or blocking (OFF) mode. Furthermore, the switch can also be represented as a variable resistor with a resistivity that varies with the said rise and fall times.

[0129] Figure 7 illustrates an exemplary no-load time DTS, namely DT1–DT4, according to the prior art. During these no-load times, no current is supplied to the load because both resistors are in a non-conducting or blocking mode, i.e., OFF. Between no-load times, each switch delivers or feeds current to the common load, but never simultaneously. Therefore, during the ON1 time period, only the first switch is ON, delivering current to the load. After the no-load time DT2, during the ON2 time period, only the second switch is ON, delivering current to the load, as shown in Figure 7.

[0130] on the other hand, Figure 8 This illustrates the controllability of the first and second controllable switches according to an embodiment of the invention with overlapping power transfer conductivity. First, it should be noted that... Figure 8 There is no idle time. This can be stated as follows: according to the present invention, there is no time period when both the first and second controllable switches are in the non-conducting mode (i.e., in the OFF state). Furthermore, Figure 8 The diagram shows overlapping or overlapping power transfer periods, during which both the first (ON) and second (ON-state) controllable switches are on, thus transferring current to the load simultaneously. For example, in the first time period T1, the first controllable switch is on when the second controllable switch is off, while in the second time period T2, both the first and second controllable switches are on. However, it's important to note that during the second time period T2, the resistance R1 of the first controllable switch rises from fully on to fully off, while the resistance R2 of the second controllable switch falls from fully off to fully on. This means that during the second time period T2, the current through the first controllable switch will decrease accordingly, and the current through the second controllable switch will increase accordingly. During the third time period T3, the second controllable switch is on when the first controllable switch is off.

[0131] It should also be noted that when the resistance values ​​of the first and second controllable switches are within... Figure 8 When marked as TI, there will be a specific time instance. Figure 9 The time instances of these two different examples, TI1 and TI2, are shown in more detail. Figure 9The vertical lines illustrate instances of control signals CTRL1 and CTRL2, or timing instances. In the first example, the control signals of the first and second controllable switches are timed simultaneously. Figure 9 In the second example, the control signal is not timed simultaneously, so in the... Figure 9 In Chinese, this is represented as "non-sim".

[0132] exist Figure 9 In the first example, during the first time period T1, only the first controllable switch is on. During the second time period T2, when sim 1 starts timing, R1 begins to increase while R2 begins to decrease, so both the first and second controllable switches are on during T2. In time instance TI1, the resistivity of R1 is equal to that of R2, R1 = R2. In the third time period T3, only the second controllable switch is on, so the first controllable switch is off. Therefore, this is an example where the timing of control signals CTRL1 and CTRL2 has no time offset.

[0133] exist Figure 9 In the second example, the situation for the first time period T1 is the same as in the first example. However, during the time period T2′, a timing offset is introduced between the CTRL1 and CTRL2 signals, which may mean that the time period T2′ is longer in time compared to the time period T2. Within the time period T1′, the value of R1′ increases while the value of R2 decreases. The timing offset means that when the resistivity of R1′ equals R2, and R1′=R2, the time instance TI2 is offset in time, resulting in a lower resistivity and therefore a higher current compared to the first example. Therefore, the current delivered to the load can be controlled by controlling the time offset.

[0134] Therefore, it has been recognized that, according to the first aspect of the invention, the time offset may depend on at least one of the following factors: the current supplied to the load 310, the voltage difference between the first power supply 210 and the second power supply 220, and the resistance value when the resistance R1 of the first controllable switch 110 is equal to the resistance R2 of the second controllable switch 120.

[0135] Accordingly, according to a second aspect of the invention, the time offset may depend on at least one of the following: the current supplied to the first load 210 and the current supplied to the second load 220, the voltage difference between the first load 210 and the second load 240, and the resistance value when the resistance R1 of the first controllable switch 110 is equal to the resistance R2 of the second controllable switch 120.

[0136] Figures 10 to 14Further details of the control method according to an embodiment of the first aspect of the present invention are described, wherein the first controllable switch 110 includes a first diode 116 connected in parallel with a first variable resistor 118 between a first input 112 and a first output 114, and the second controllable switch 120 includes a second diode 126' connected in parallel with a second variable resistor 128 between a second input 122 and a second output 124. Figure 10 –14 explains the sequential time order T11, T12, T2, T31, and T32.

[0137] exist Figure 10 During the time period T11, the first variable resistor 118 is configured to provide a first current i1 to the load 310 to achieve minimum resistance, instead of through the first diode 116. This means minimum loss.

[0138] exist Figure 11 During the first time period T12, the first diode 116 is configured to supply a first current i1 to the load 310 instead of the first variable resistor 118 in preparation for blocking possible current from the second power source in the next time period.

[0139] exist Figure 12 During time period T2, the first diode 116 is configured to provide a first current i1 to the load 310, while the second diode 126 is configured to supply a second current i2 to the load 310. Therefore, current cannot be transferred from the first power source to the second power source, and vice versa.

[0140] exist Figure 13 During time period T31, the second diode 126 is configured to provide a second current i2 to the load 310, thereby blocking possible current from the first power source.

[0141] exist Figure 14 During T32, the second variable resistor 128 is configured to provide a second current i2 to the load 310 to achieve minimum resistance.

[0142] despite this, Figures 10-14While the second aspect of the invention is not shown, it should be recognized that a sequence control sequence can be applied thereto. In these embodiments of the second aspect of the invention, the first controllable switch 110 includes at least one first diode 116, 116' connected in parallel with at least one first variable resistor 118, 118' between the power supply 310 and the first load 210. The second controllable switch 120 includes at least one second diode 126, 126' connected in parallel with at least one second variable resistor 128, 128' between the power supply 310 and the second load 220. During a first time period T1, the first variable resistor 118 is configured to provide a first current i1 to the first load 210, and subsequently the first diode 116 is configured to provide the first current i1 to the first load 210. During a second time period T2, the first diode 116 is configured to provide the first current i1 to the first load 210, and the second diode 126 is configured to provide a second current i2 to the second load 220. During the third time period T3, the second diode 126 is configured to provide a second current i2 to the second load 220, and subsequently, the second variable resistor 128 is configured to provide a first current i2 to the second load 220.

[0143] Figures 15-19 An embodiment of the first aspect of the invention is described, wherein the first controllable switch 110 includes two first diodes 116, 116' connected in series with each other in opposite directions between the first input 112 and the first output 114, and wherein the second controllable switch 120 includes two second diodes 126, 126' connected in series with each other in opposite directions between the second input 122 and the second output 124.

[0144] exist Figure 15 During the T11 time period, the first current from the first power source passes through resistors 118 and 118', where the resistance is at its minimum, and therefore the loss is at its minimum.

[0145] exist Figure 16 In the T12 time period, when the voltage of the first power supply begins to drop, the first current from the first power supply is fed through the first resistor 118 and the first diode 116′ in preparation for blocking possible current from the second power supply in the next time period.

[0146] exist Figure 17 During time period T2, when the second current from the second power supply flows through the second resistor 128 and the second diode 126', the first current flows through the first resistor 118 and the first diode 116'. Therefore, during time period T2, current cannot be transferred from the first power supply to the second power supply, and vice versa.

[0147] exist Figure 18During T31, the second current is fed through the second resistor 128 and the second diode 126'. Simultaneously, no first current is fed to the load 310.

[0148] exist Figure 19 During T32, the second current from the second power supply passes through the second resistors 118 and 118', where the resistance is at its minimum, and therefore the loss is at its minimum.

[0149] According to a second aspect of the invention, the control sequence of the first aspect of the invention is as follows: Figures 15-19 The above can also be applied to embodiments of the present invention. Therefore, the first controllable switch 110 may include two first diodes 116 and 116' connected in series in opposite directions between the power supply 310 and the first load 210, and the second controllable switch 120 includes two second diodes 126 and 126' connected in series in opposite directions between the power supply 310 and the second load 220.

[0150] Referring to Figures 20 and 21, further aspects and embodiments of the invention will now be described. Figure 20a and 20b A switch box conversion diagram is displayed. Figure 20a The first power supply 210 and the second power supply 220, along with their switches 110 and 120, are shown. Additionally, the load 310 and the current flow pattern (bold lines and arrows) are shown as follows. Figure 20a As shown.

[0151] exist Figure 20b At point I, the first power supply 210 is active (first output voltage = 200V) and is supplying power to the load 310 because its switch 110 is in the ON mode. The second power supply 220 is inactive (second output voltage = 0V) and its switch 120 is in the OFF mode.

[0152] exist Figure 20b At point II, the first power supply 210 is still supplying power to the load 310, but the first output voltage has dropped to 198V due to the previous power supply to the load 310.

[0153] exist Figure 20b At point III, the first power supply 210 is still feeding the load, but its switch 110 is set to OFF mode. This means the switch is not fully turned on, but is still conducting through its body diode. There are losses in the body diode as current flows through it.

[0154] exist Figure 20bAt point IV, the first power supply 210 is still supplying power to the load 310, but the second power supply 220 is also activated and feeding 200V to the load 310, but its switch 120 is in OFF mode, which means that current flows through the main diode. This is the power supply overlap period or state.

[0155] exist Figure 20b At point V, the second power supply 220 supplies power to the load 310 through the switch 120 which is in the ON mode. However, the first power supply 210 no longer supplies power to the load 310, but remains in the active state (first output voltage = 198V).

[0156] exist Figure 20b At point VI, the first power supply 210 is inactive (first output voltage = 0V), and only the second power supply 220 feeds the second output voltage 200V to the load 310.

[0157] Figure 21 The diagram shows the transitions of two switch boxes connected in opposite current directions. This opposite connection prevents current surges between the system's power supplies during activation and interconnection periods. For simplicity, the ON-mode switch is shown as a conductor, while the OFF-mode switch is shown as its body diode, which remains conducting when the threshold voltage is reached.

[0158] exist Figure 21 At point I, the first power supply 210 is in an active state (first output voltage = 199V). When its switch 110 is in the ON mode, it supplies power to the load 310, which means that the first power supply 210 can both supply power and receive current. The second power supply 220 is in an inactive state (second output voltage = 0V), and its switch 120 is in the OFF mode.

[0159] exist Figure 21 At point II, the first power supply 210 is still active (first output voltage = 199V) and supplies power to the load 310. The second power supply 220 is active (second output voltage = 200V), but since both switches are in OFF mode, it does not supply power to the load 310.

[0160] exist Figure 21 At point III, the first power supply 210 is still active (first output voltage = 199V), but switch 110 is set to OFF mode. Therefore, the first power supply 210 can only supply current but cannot receive any current to prevent current surges from the second power supply 220. The second power supply 220 is active but will not supply power to the load 200 because its two switches 120 are still in OFF mode.

[0161] exist Figure 21At point IV, the first power supply 210 and the second power supply 220 simultaneously power the load 310. This is the power supply overlap period. Since the second output voltage (second output voltage = 200V) is higher than the first output voltage, the second power supply 220 will take over the power supply from the first power supply 210 from the load 310. Furthermore, as mentioned earlier, due to the respective switching configurations of the first power supply 210 and the second power supply 220, they can only supply current and cannot receive current; therefore, no current will flow from the second power supply 220 to the first power supply 210.

[0162] exist Figure 21 At point V, the first power supply 210 remains active (first output voltage = 199V), but is disconnected from the load 310 because both of its switches 110 are set to OFF mode. The second power supply 220 is active, feeding the load 310 separately through the main diode of its switch 120, and is in OFF mode, thus resulting in less power loss on the main diode.

[0163] exist Figure 21 At point VI, the second power supply 220 is active and supplying power to the load 310, but both of its switches 120 are set to ON, so there is no main diode loss. The first power supply 210 is still active (first output voltage = 199V), but is disconnected from the load 310.

[0164] exist Figure 21 At point VII, the first power supply 210 is in an inactive mode, so the first output voltage is 0V. However, the second power supply 220 is active and continues to supply power to the load 310.

[0165] When the second power source 220 loses some power, the first power source 210 can take over and feed power to the load 200, as described herein, in order to repeat states I through VII.

[0166] Figure 22a and 22b Another embodiment of the invention is shown, where the load of such a motor operates in a first direction D1 (e.g., forward) and a second direction D2 (e.g., reverse) opposite to the first direction D1. Therefore, the system may include a third power source / load 230 and a fourth power source / load 240 connected to the motor. Figure 22a In the first power supply, the first power supply is active (first output voltage = 200V), its switch is in the ON mode, and it drives the motor in the first direction D1. On the other hand, the second power supply is inactive (0V), and its switch is in the OFF mode. Current flows from the motor to the inactive but ON-switched third and fourth power supplies. However, in... Figure 22bIn this configuration, the motor operates in the second direction, D2. Therefore, any of the third and / or fourth power sources can drive the motor in the second direction, D2. Figure 22b This shows how the third power supply is activated (third output voltage = 200V) and drives the motor in the second direction D1. Therefore, current flows from the third power supply to the first and second power supplies via the motor.

[0167] also, Figure 23 A state diagram is shown according to an embodiment of the present invention when the system is charged by an electric motor. This occurs, for example, when a vehicle containing an electric motor is traveling downhill, i.e., when there is a negative gradient. Another exemplary example is when the vehicle brakes to reduce speed. In these examples, energy is transferred from the electric motor.

[0168] exist Figure 23 At point I, the first power supply 210 is in an active state (first output voltage = 200V), and its switch is in the ON mode, thus driving the motor. The second power supply 220 is in an inactive state (second output voltage = 0V), and its switch is in the OFF mode.

[0169] exist Figure 23 At point II, the motor voltage is higher than the first output voltage, which means that current will flow from the motor to the first power supply 210, and the first output voltage will rise to 205V.

[0170] exist Figure 23 At point III, the second power supply 220 is activated (second output voltage = 195V), but its switch is still in OFF mode, so the current still flows only from the motor to the first power supply 210.

[0171] exist Figure 23 At point IV, the second switch of the second power supply 220 is set to ON, meaning that the motor current also flows to the second power supply, and the second output voltage rises to 200V. Since the first output voltage has already risen and is higher than the second output voltage, it is time to power on the second power supply.

[0172] exist Figure 23 At point V, the first power supply 210 is still active (first output voltage = 210V), but its switch is in OFF mode, and the current only flows to the motor to the second power supply 220, both of which are in ON mode.

[0173] exist Figure 23 At point VI, the first power supply 210 is deactivated (first output voltage = 0V), so it can be connected to other inactive power supplies to share power / voltage (not shown in the diagram). The second power supply 220 is active and continues to be powered by the motor.

[0174] Figure 24 and 25 Further aspects of the invention are explained below. First, it should be noted that the overlapping circuit 100 disclosed and explained in this invention can be connected to two different sets of voltage modules, namely a first set of voltage modules (or a first power supply) and a second set of voltage modules (or a second power supply). The voltage modules can be any module that holds or stores power, such as a battery. Furthermore, since the voltage module group is a modular service, the voltage module group can be simplified. Moreover, since the voltage level to be handled during service is only the voltage level of each module, rather than the dangerously high voltage levels of multiple connected batteries in conventional solutions, safety is greatly improved. Second, it can be further noted that the overlapping circuit is further connected to an electrical device that acts as a load or power source, such as a motor. It is well known that motors may consume or transmit power depending on their operating mode. For example, during normal operation, the motor of an electric vehicle consumes energy, but when disconnected, the disconnected power may be converted into electricity.

[0175] The switches here can be any suitable switches known in the art. For example, solid-state transistors, such as MOSFETs, or any other transistor type. The selected switches may depend on the application, such as high-voltage or low-voltage switches. High-voltage switches can be any suitable high-voltage switches known in the art. They should be able to handle voltages higher than those of the switches in the voltage modules. For example, if each voltage module provides 25V, they can handle voltages from 25V to 600V.

[0176] Finally, it should be understood that the present invention is not limited to the above embodiments, but also relates to and incorporates all embodiments within the scope of the appended independent claims.

Claims

1. An overlay circuit (100) for a power system (400), the overlay circuit (00) comprising: A first controllable switch (110) is configured to be connected between a first power source (210) and a load (310). The first controllable switch (110) includes at least one first diode (116, 116') connected in parallel with at least one first variable resistor (118, 118') between the first power source (210) and the load (310). A second controllable switch (120) configured to be connected between a second power supply (220) and the load (310), the second controllable switch (120) comprising at least one second diode (126, 126') connected in parallel with at least one second variable resistor (128, 128') between the second power supply (220) and the load (310); characterized in that i) During the first time period T1, when the second controllable switch (120) is configured to block the second current from the second power supply (220) to the load (310). i At time 2, the first variable resistor (118) is configured to direct the first current... i 1. The first power source (210) is fed to the load (310), and then the first diode (116) is configured to provide the first current to the load (310). i 1; ii) During a second time period T2 following the first time period T1, the first diode (116) is configured to supply the first current to the load (310). i 1, and the second diode (126) is configured to provide a second current to the load (310). i 2; wherein, during the second time period T2, the first current i 1. Decrease and the second current i 2. Increase; and iii) During the third time period T3 following the second time period T2, when the second diode (126) is configured to provide a second current to the load (310) i 2. Subsequently, the second variable resistor (128) is configured to provide a second current to the load (310). i At time 2, the first controllable switch (110) is configured to block the first current from the first power source (210) to the load (310). i 1.

2. The overlapping circuit (100) according to claim 1, wherein iv) During the fourth time period T4 following the third time period T3, when the second controllable switch (120) is configured to feed a second current from the second power source (220) to the load (310). i At time 2, the first controllable switch (110) is configured to switch the first current... i 1 is fed from the first power source (210) to the load (310).

3. The overlapping circuit (100) according to claim 1 or 2 further includes a control device (150) configured to provide a first control signal (CTRL1) to the first controllable switch (110) and a second control signal (CTRL2) to the second controllable switch (120), such that both the first controllable switch (110) and the second controllable switch (120) are turned on during the second time period T2, thereby simultaneously feeding current to the load (310), wherein, The first control signal (CTRL1) and the second control signal (CTRL2) are timed simultaneously or not simultaneously.

4. The overlapping circuit (100) according to claim 3, wherein, The first control signal (CTRL1) and the second control signal (CTRL2) are not timed simultaneously, and their time offset depends on at least one of the following: the current supplied to the load (310), the voltage difference between the first power supply (210) and the second power supply (220), and the resistance value when the resistance (R1) of the first controllable switch (110) is equal to the resistance (R2) of the second controllable switch (120).

5. The overlapping circuit (100) according to any one of the preceding claims, configured as follows: When the output voltage of the first power supply (210) is less than the first threshold voltage V Th1 When switching from i) to ii); and / or When the output voltage of the second power supply (220) is greater than the second threshold voltage V Th2 When switching from i) to ii).

6. The overlapping circuit (100) according to claim 5, wherein The first threshold voltage V Th1 Depends on the nominal voltage V of the load (310) n , and / or The second threshold voltage V Th2 Depends on the first threshold voltage V Th1 and the nominal voltage V of the load (310) n At least one of them.

7. An overlay circuit (100) for a power system (400), the overlay circuit (100) comprising: A first controllable switch (110) is configured to be connected between a power source (310) and a first load (210). The first controllable switch (110) includes at least one first diode (116, 116') connected in parallel with at least one first variable resistor (118, 118') between the power source (310) and the first load (210). A second controllable switch (120) configured to be connected between the power supply (310) and the second load (220), the second controllable switch (120) comprising at least one second diode (126, 126') connected in parallel with at least one second variable resistor (128, 128') between the power supply (310) and the second load (220); characterized in that i) During the first time period T1, when the second controllable switch (120) is configured to block the second current from the power supply (310) to the second load (220). i At time 2, the first variable resistor (118) is configured to provide a first current to the first load (210). i 1. Subsequently, the first diode (116) is configured to provide a first current to the first load (210). i 1; ii) During a second time period T2 following the first time period T1, the first diode (116) is configured to provide a first current to the first load (210). i 1, and the second diode (126) is configured to provide a second current to the second load (220). i 2, wherein, during the second time period T2, the first current i 1. Decrease and the second current i 2. Increase; and iii) During the third time period T3 following the second time period T2, when the second diode (126) is configured to provide a second current to the second load (220) i 2. Subsequently, the second variable resistor (128) is configured to provide a second current to the second load (220). i At time 2, the first controllable switch (110) is configured to block the first current from the power source (310) to the first load (210). i 1.

8. The overlapping circuit (100) according to claim 7, wherein iv) During the fourth time period T4 following the third time period T3, when the second controllable switch (120) is configured to feed a second current from the power source (310) to the second load (220). i At time 2, the first controllable switch (110) is configured to switch the first current... i 1 is fed to the first load (210).

9. The overlapping circuit (100) according to claim 7 or 8 further includes a control device (150) configured to provide a first control signal (CTRL1) to the first controllable switch (110) and a second control signal (CTRL2) to the second controllable switch (120), such that both the first controllable switch (110) and the second controllable switch (120) are turned on during the second time period T2, thereby simultaneously feeding current to the first load (210) and the second load (220), respectively, wherein, The first control signal (CTRL1) and the second control signal (CTRL2) are timed simultaneously or not simultaneously.

10. The overlapping circuit (100) according to claim 9, wherein, The first control signal (CTRL1) and the second control signal (CTRL2) are not timed simultaneously, and their time offset depends on at least one of the following: the current supplied to the first load (210) and the current supplied to the second load (220), the voltage difference between the first load (210) and the second load (220), and the resistance value when the resistance (R1) of the first controllable switch (110) is equal to the resistance (R2) of the second controllable switch (120).

11. The overlay circuit (100) according to any one of claims 7 to 10, configured as follows: When the voltage on the first load (210) is higher than the first threshold voltage V Th1 When switching from i) to ii); and / or When the voltage on the second load (220) is less than the second threshold voltage V Th2 When switching from i) to ii).

12. The overlapping circuit (100) according to claim 11, wherein The first threshold voltage V Th1 Depends on the nominal voltage V of the first load (210) n , and / or The second threshold voltage V Th2 The nominal voltage V depends on the second load (220). n .

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