A method for simulating soft errors of single event effect of integrated circuits based on cluster analysis

Abstract

The application discloses a kind of integrated circuit single particle effect soft error simulation method based on cluster analysis, steps include: application VPI obtains target integrated circuit internal structure and resource information;The obtained integrated circuit internal unit information is clustered according to functional correlation, obtain a certain number of clusters;Random sampling is carried out to unit in each cluster with 20%-40% proportion, and fault node list is generated;Integrated circuit single particle effect soft error digital signal equivalent model for fault injection is constructed, fault injection is carried out to sampling unit with cluster as unit, and whether fault injection causes chip soft error is monitored;The soft error probability of sampling unit is counted;The soft error probability obtained by fault injection evaluation of sampling unit is taken as cluster soft error probability.Based on cluster soft error probability, the evaluation and sensitive area positioning of chip overall soft error probability are realized.The application realizes the optimization of fault injection sample, improves simulation efficiency, and can be used for integrated circuit single particle effect sensitivity analysis.

Description

Technical Field

[0001] This invention relates to a method for simulating soft errors in integrated circuits based on cluster analysis, belonging to the field of integrated circuit single-event effect simulation technology. Background Technology

[0002] In the space applications of integrated circuits, soft errors caused by single-event effects are one of the main factors leading to system malfunctions or failures. With the reduction in process size and the increase in integration density of integrated circuits, the structural and functional complexity of integrated circuits has increased, and the number of integrated cells within integrated circuits has increased significantly. Performing comprehensive simulation of integrated circuits based on fault injection simulation requires enormous time and resources. Therefore, it is necessary to use cluster analysis methods to rationally divide the internal resources of the chip according to the principle of functional similarity. By sampling and simulating fault injection of cells within clusters, the aim is to optimize the fault injection samples. This improves simulation efficiency, allows for the location of sensitive areas of the chip, and the assessment of the overall soft error probability of the chip, providing guidance for radiation hardening design.

[0003] Single-event soft error analysis (SEE) of integrated circuits (ICs) is mainly conducted through three methods, which can be categorized based on the fault injection method: hardware-based SEE, software-based SEE, and simulation-based SEE. Hardware-based SEE primarily utilizes current pulse injection or high-energy particle injection to achieve comprehensive detection and analysis of SEE soft errors in the target IC; however, radiation sources are often scarce. Software-based SEE requires the control capabilities of host computer software to inject errors into the input vectors of the target IC, limiting the injection scope to externally accessible resources of the chip. Simulation-based SEE targets the behavioral or netlist-level circuit description files of the IC, thus enabling fault injection and functional analysis of various internal resources. Furthermore, the analysis phase occurs in the early stages of radiation hardening design for ICs, facilitating the verification, modification, and optimization of the circuit design.

[0004] Currently, the challenge in analyzing single-event soft errors (SEE) in integrated circuits based on simulation lies in the sheer number and complexity of the internal resources of the circuit. Existing fault injection methods require significant time and resources for SEE simulation, resulting in low simulation efficiency. Therefore, there is an urgent need to utilize new techniques such as cluster analysis to rationally divide and integrate the internal resources of the chip, optimize the configuration of fault injection samples, and apply precise and controllable fault models to assess the SEE sensitivity of integrated circuits. Summary of the Invention

[0005] The purpose of this invention is to overcome the shortcomings of existing technologies and propose a single-event soft error simulation method for integrated circuits based on cluster analysis. This method analyzes and clusters the functional correlations of internal chip units, and then performs fault injection simulation using proportional random sampling. This optimizes the number and distribution of fault injection samples, thereby improving simulation efficiency. Furthermore, the evaluation of the sampled fault injection simulation results can also enable the location of sensitive areas of the chip and the assessment of the overall soft error probability of the chip.

[0006] The objective of this invention is achieved through the following technical solutions:

[0007] A method for simulating single-event soft errors in integrated circuits based on cluster analysis includes the following steps:

[0008] (1) Obtain information about the internal units of the integrated circuit;

[0009] (2) Define an inter-cluster distance function based on the internal unit information of the integrated circuit;

[0010] (3) Based on the distance function, cluster analysis is performed on the internal units of the integrated circuit to generate several clusters;

[0011] (4) Randomly sample the units within each cluster in an equal proportion to form sampling units, and generate a fault injection list for each cluster.

[0012] (5) Construct a single-event soft error fault model for integrated circuits;

[0013] (6) Based on the fault injection list of each cluster, apply the fault model to perform fault injection simulation on the sampling unit in clusters, monitor integrated circuit soft errors, and generate fault injection simulation results.

[0014] (7) Based on the fault injection simulation results, the soft error probability of the sampling unit is statistically analyzed in clusters;

[0015] (8) The soft error probability of the sampling unit is taken as the soft error probability of the cluster as a whole;

[0016] (9) Repeat steps (4) to (8) until the soft error probability assessment of all clusters is completed;

[0017] (10) Based on the soft error probability assessment results, sort the soft error probabilities of each cluster to determine the sensitive areas inside the integrated circuit; count the number of units and soft error probabilities of each cluster to obtain the overall soft error probability of the integrated circuit.

[0018] In the above soft error simulation method, obtaining the internal cell information of the integrated circuit specifically includes:

[0019] Use the VPI tool in EDA tools to obtain the resource information of the target integrated circuit, including cell name, cell type, module to which the cell belongs, and cell level information;

[0020] VPI is used to obtain the internal structure information of the target integrated circuit, including cell structure information, inter-cell connection information, and cell dependency relationships.

[0021] In the above soft error simulation method, the inter-cluster distance function is defined based on the internal cell information of the integrated circuit, and the specific formula is as follows:

[0022]

[0023] Among them, D A,B Let LN be the distance function between two units A and B, LN be the level depth, and Li represent the i-th level where units A and B are located. Ali Module Bli This indicates the hierarchical module to which units A and B belong in the lower Li levels; Compare(Module) Ali Module Bli The function is used to compare modules. Ali Module Bli If they are the same, then Compare(Module). Ali Module Bli Returns 0 if different, or 1 if different.

[0024] In the aforementioned soft error simulation method, based on the distance function, cluster analysis is performed on the internal cells of the integrated circuit to generate several clusters. The specific method is as follows:

[0025] (1) Define the number of clusters KN to be clustered. Randomly select KN units {Cell1} from all the units inside the obtained integrated circuit. K1 Cell1 K2 Cell1 K3 Cell1 KN} is the first cluster center. Using the distance function, the distances from all other units to the KN first cluster centers are calculated. Clustering is performed based on the shortest distance, and the set of units with the shortest distance to the first cluster center is the first cluster {Cluster}. 11 Cluster 12 Cluster 13 Cluster 1KN};

[0026] (2) Using the distance function, the first cluster {Cluster} is calculated sequentially. 11Cluster 12 Cluster 13 Cluster 1KN Calculate the distance from each cell within the first cluster to all other cells within that cluster, sum these distances, and designate the cell with the smallest sum of distances as the new cluster center. Then, designate each of these new cluster centers as the second cluster center {Cell2}. K1 Cell2 K2 Cell2 K3 Cell2 KN Then, the distance function is used again to calculate the distance from all other units to the center of the second cluster. Clustering is performed based on the shortest distance, and the set of units with the shortest distance to the center of the second cluster is obtained as the second cluster {Cluster}. 21 Cluster 22 Cluster 23 Cluster 2KN};

[0027] This process continues until the cluster centers no longer change, at which point clustering stops, resulting in the nth cluster {Cluster}. n1 Cluster n2 Cluster n3 Cluster nKN}, where n is the number of clustering, and the nth cluster is represented as {Cluster1, Cluster2, Cluster3, ..., ClusterKN}.

[0028] In the above soft error simulation method, 20% to 40% of the units within each cluster are randomly sampled.

[0029] In the above soft error simulation method, for clusters with fewer than 1 / 12 to 1 / 10 of the average number of cluster units, proportional random sampling is not performed, and all units within the cluster will directly generate the fault injection list for that cluster.

[0030] In the above soft error simulation method, the fault injection list includes injection unit information, injection node, and injection time; wherein, the injection unit information includes unit name, unit type, and the hierarchical path of the unit; the injection node information includes the target unit output net; and the injection time is a randomly generated simulation time within the time range before the simulation ends after the integrated circuit has completed its initialization configuration.

[0031] In the above soft error simulation method, the fault models include a single-event flip fault model simulating the single-event effect of sequential logic units, a single-event transient fault model simulating the single-event effect of combinational logic units, and a single-event multi-bit flip fault model simulating the single-event effect of memory units.

[0032] In the above soft error simulation method, based on the fault injection list of each cluster, the fault model is applied to perform fault injection simulation on the sampling unit on a cluster-by-cluster basis, and integrated circuit soft errors are monitored to generate fault injection simulation results. The specific method is as follows:

[0033] The VPI-based fault injection identifies the unit types in the fault list, including sequential logic units, combinational logic units, and memory units, and injects the corresponding fault model according to the unit type.

[0034] Fault injection simulation is performed on the sampling unit based on the fault injection list of each cluster, and soft errors of the integrated circuit are detected by comparing the simulation results before and after fault injection.

[0035] In the above soft error simulation method, the unit soft error probability is calculated as follows:

[0036] SER F =Enum / N F

[0037] Among them, SER F To statistically analyze the soft error probability of sampling units on a cluster basis; Enum represents the number of soft errors detected in the integrated circuit; N F This represents the total number of faults injected into the sampling unit.

[0038] In the above soft error simulation method, based on the soft error probability evaluation results, the soft error probabilities of each cluster are sorted to determine the sensitive areas inside the integrated circuit; the number of cells and the soft error probability of each cluster are counted to obtain the overall soft error probability of the integrated circuit. The specific method is as follows:

[0039] The clusters are sorted from highest to lowest soft error probability. The hierarchical structure and connectivity of the internal units of the top 10%-20% of the clusters are defined as sensitive regions within the integrated circuit.

[0040] Based on the number of clusters, the number of cells within each cluster, and their corresponding soft error probabilities, the overall soft error probability SER of the integrated circuit is calculated. Chip The specific method is as follows:

[0041]

[0042] Among them, CellN Cluster_i SER represents the number of units within the i-th cluster.Cluster_i This represents the soft error probability of the i-th cluster.

[0043] Compared with the prior art, the present invention has the following advantages:

[0044] (1) This invention uses a clustering analysis algorithm to divide the functionally similar units inside the chip and generate a certain number of clusters. The fault injection list is generated by sampling proportionally in units of clusters, thereby optimizing the number and distribution of fault injection samples, greatly improving the efficiency of fault injection simulation, and ensuring the accuracy of simulation results.

[0045] (2) The present invention evaluates the soft error probability of each cluster by evaluating the soft error probability of the sampling unit. Since the units within the cluster have similar hierarchical and logical connection relationships, sorting the soft error probabilities of each cluster obtained by evaluation can quickly locate the sensitive area of ​​the chip.

[0046] (3) This invention proposes an algorithm for evaluating the chip soft error probability by applying the soft error probability of each cluster, which can realize the rapid evaluation of the chip soft error probability.

[0047] (4) This invention uses VPI to simulate single-event soft errors in complex integrated circuits. The simulation is combined with mature EDA tools, which improves the reliability of the simulation system. Attached Figure Description

[0048] Figure 1 This is a flowchart of the integrated circuit single-event effect simulation method based on cluster analysis in this invention;

[0049] Figure 2 This invention relates to a single-event fault modeling method based on VPI. Figure 2 'a' represents the equivalent digital signal model of a single-event effect fault in a combinational logic unit. Figure 2 a1 is a diagram showing the selection of the equivalent square wave pulse width. Figure 2 a2 is the diagram for constructing the equivalent square wave model. Figure 2 b represents the equivalent digital signal model of a single-event effect fault in a sequential logic unit. Figure 2 c represents the equivalent digital signal model of single-event effect multi-cell fault in memory cells. Figure 2 c1 is a 2-cell digital information model. Figure 2 c2 is a 3-Cell digital information model;

[0050] Figure 3 This is a flowchart of the fault injection algorithm based on cluster analysis in this invention;

[0051] Figure 4 This invention presents a clustering-based soft error analysis method for integrated circuits. Detailed Implementation

[0052] This invention applies cluster analysis to divide the internal units of a chip. Based on the hierarchical structure and logical connection relationship of the internal units, its functional relevance is defined. A set of a certain number of clusters is generated using cluster analysis. Mature EDA simulation tools are called, and fault injection simulation is used to evaluate the soft error probability of the clusters. The cluster evaluation results are analyzed to further locate the sensitive areas of the chip and evaluate the overall soft error probability of the chip.

[0053] like Figure 1 The diagram shows a flowchart of the integrated circuit single-event effect simulation method based on cluster analysis in this invention. A soft error simulation method for integrated circuit single-event effects based on cluster analysis includes the following steps:

[0054] Step 1: Call the EDA (Electronic Design Automation) simulation tool and enable VPI (Verilog Program Interface) to obtain information about the internal cells of the integrated circuit.

[0055] The flowchart of the fault injection algorithm based on cluster analysis invented in this paper is as follows: Figure 1 As shown, step 1 mainly involves enabling VPI to extract cells and related information from the circuit netlist. The cell information to be extracted includes cell name, cell type, cell path, hierarchy information, module to which it belongs, and connection relationship.

[0056] The main implementation methods are as follows:

[0057] First, all cells in the target circuit netlist are searched. For each identified cell, the following steps are taken: Second, the cell's attribute information is extracted, including cell name, cell instantiation name, and cell type. Third, the cell's structural information is extracted, including path information, hierarchy information, module to which it belongs, and connection relationships. All cells in the target circuit netlist are then traversed, and the acquired information is collected and integrated.

[0058] Step 2: Based on the integrated circuit internal unit information obtained in Step 1, perform cluster analysis on the integrated circuit internal units according to functional relevance to generate several clusters.

[0059] Step 2 of this invention involves organizing and extracting the information obtained in Step 1.

[0060] First, a first clustering is performed based on the hierarchical relationship between units. Based on the unit information obtained in step 1, a distance function D between units is defined.

[0061] Based on the hierarchical relationship, define the distance function between units. If the required hierarchical depth is defined as LN, then the distance function D between two units A and B is... A,B It can be defined as:

[0062]

[0063] Where Li represents the i-th level of units A and B, Module Ali Module Bli This indicates the hierarchical module to which units A and B belong in the lower Li levels; Compare(Module) Ali Module Bli The function is used to compare modules. Ali Module Bli If they are the same, then Compare(Module). Ali Module Bli Returns 0 if different, or 1 if different.

[0064] Step 3: Based on the distance function in step (2), perform cluster analysis on the internal units of the integrated circuit according to the partitioning method to generate several clusters.

[0065] (1) Define the number of clusters KN to be clustered. Randomly select KN units {Cell1} from all the units inside the obtained integrated circuit. K1 Cell1 K2 Cell1 K3 Cell1 KN} is the first cluster center. Using the distance function, the distances from all other units to the KN first cluster centers are calculated. Clustering is performed based on the shortest distance, and the set of units with the shortest distance to the first cluster center is the first cluster {Cluster}. 11 Cluster 12 Cluster 13 Cluster 1KN};

[0066] (2) Using the distance function, the first cluster {Cluster} is calculated sequentially. 11 Cluster 12 Cluster 13 Cluster 1KN Calculate the distance from each cell within the first cluster to all other cells within that cluster, sum these distances, and designate the cell with the smallest sum of distances as the new cluster center. Then, designate each of these new cluster centers as the second cluster center {Cell2}. K1 Cell2 K2Cell2 K3 Cell2 KN Then, the distance function is used again to calculate the distance from all other units to the center of the second cluster. Clustering is performed based on the shortest distance, and the set of units with the shortest distance to the center of the second cluster is obtained as the second cluster {Cluster}. 21 Cluster 22 Cluster 23 Cluster 2KN};

[0067] This process continues until the cluster centers no longer change, at which point clustering stops, resulting in the nth cluster {Cluster}. n1 Cluster n2 Cluster n3 Cluster nKN}, where n is the number of clustering, and the nth cluster is represented as {Cluster1, Cluster2, Cluster3, ..., ClusterKN}.

[0068] Step 4: For each cluster generated in Step 3, randomly sample 20%-40% of the units within each cluster to generate a fault injection list for each cluster;

[0069] This invention is based on the set with KN clusters generated in step 3, if its average number of cluster units is CellN. avg Therefore, the extraction of each cluster unit should follow the following two principles:

[0070] For clusters where each cluster contains at least 1 / 10 of the average number of cluster cells, randomly sample 20%-40% of the cluster cells. Based on the sampling results, generate a fault injection list for that cluster. That is, for clusters with CellN... C1 Cluster1, consisting of N units, if CellN C1 >1 / 10*CellN avg Then randomly select 20%-40% of CellN within the cluster. C1 The cells are used as samples for fault injection simulation, and a fault injection list FaultList for Cluster1 is generated. C1 .

[0071] For clusters with fewer than 1 / 12 to 1 / 10 of the average number of cluster units, in this embodiment, 1 / 10 is selected, and no proportional random sampling is performed. All units within the cluster will directly generate the fault injection list for that cluster. That is, for clusters with CellN... C2 Cluster2, consisting of N units, if CellN C2 <1 / 10*CellNavg If so, proportional extraction will not be performed, but the CellN within the cluster will be extracted. C2 All cells are used as samples for fault injection simulation, and a fault injection list FaultList for Cluster2 is generated. C2 .

[0072] Step 5: Use VPI to construct a single-event soft error fault model for integrated circuits for fault injection simulation;

[0073] In this invention, the single-event effect of integrated circuits constructed using VPI is used as an equivalent digital signal model for cell faults. The model construction method includes equivalent modeling of single-event transient effects of combinational logic cells, equivalent modeling of single-event flip effects of sequential logic cells, and equivalent modeling of single-event single-cell flip and multi-cell flip effects of memory cells. The construction method of the single-event equivalent model for each cell is as follows: Figure 2 As shown.

[0074] like Figure 2 Figure a illustrates the single-event transient effect modeling method for combinational logic units. The modeling method mainly includes two aspects: pulse width setting and equivalent model selection. A square wave is selected as the equivalent digital model. The method for setting the square wave pulse width is as follows: Figure 2 As shown in Figure a1, the curves in the figure represent the transient pulse widths obtained from unit-level simulations. VDD and GND are the target unit's operating voltage and ground, respectively, and VTR is the target unit's threshold voltage. The pulse width exceeding VTR in the curve is taken as the equivalent digital square wave pulse width (PW). Figure 2 As shown in a2, the constructed equivalent square wave model is injected into the target wire mesh, thus completing the model construction and injection.

[0075] like Figure 2 As shown in b, the modeling method for the single-event flip effect of rising edge triggered sequential logic unit is the numerical conversion of 0-1 and 1-0. The difficulty in constructing its equivalent digital model lies in the fact that the duration of the sequential logic flip effect is related to both the random time of fault injection and the time of arrival of the driving clock edge. Unlike the fixed equivalent digital model of combinational logic unit, the fault model of sequential logic unit is not quantitative.

[0076] like Figure 2 Figure c shows the equivalent digital signal model of single-event effect multi-cell fault in a memory cell, where... Figure 2 c1 is a 2-cell digital information model. Figure 2c2 is a 3-cell digital information model. For memory cells, as the process size decreases, the proportion of multi-cell flips in soft errors increases. Modeling the multi-cell flip effect involves the number of flipped cells and their distribution. For the case of heavy ion vertical incidence, the multi-cell flip model is constructed with the implanted cell as the center and influencing nodes are selected from its adjacent nodes to match their flip number and flip distribution.

[0077] Step 6: Based on the cluster fault injection list generated in Step 4, apply the fault model constructed in Step 5 to perform fault injection simulation on the sampling unit in clusters, and monitor chip soft errors.

[0078] The flowchart of the fault injection algorithm based on cluster analysis invented in this paper is as follows: Figure 3 As shown. For the fault injection list generated from N clusters, fault injection simulation is performed sequentially on a cluster-by-cluster basis.

[0079] For cluster_i, obtain its corresponding fault injection list FaultList_Ci, and sequentially execute fault injection simulations for the cells in FaultList_Ci. For each cell in FaultList_Ci, construct a fault model based on the cell type, locate the fault injection point at the cell output port, run the fault injection simulation according to the generated random time, and continuously monitor the chip's main output signals after fault injection to see if any abnormality occurs. If an abnormality occurs, it is recorded as a soft error; if no abnormality occurs, sequentially execute the fault injection simulation for the next cell in FaultList_Ci. After completing the fault injection simulations for all cells in FaultList_Ci, count the number of soft errors in cluster_i.

[0080] Step 7: Based on the fault injection simulation results in Step 6, calculate the soft error probability of the sampling unit on a cluster basis;

[0081] For those containing CellN Ci The cluster_i of cells has a total number of cells in its FaultList_Ci, CellN. FCi The number of soft errors obtained from the fault injection simulation statistics in step 5 is Enum. Ci Then the soft error probability SER of the cell in FaultList_Ci FCi It can be represented as:

[0082] SER FCi =Enum Ci / N FCi

[0083] Step 8: Use the soft error probability of the sampling unit obtained in Step 7 as the soft error probability of the entire cluster. For a cluster containing CellN...Ci The cluster soft error probability SER of each unit in Cluster_i is... Ci It can be represented as:

[0084] SER Ci =SER FCi

[0085] Step 9: Repeat steps 4 to 8 until the soft error probability assessment of all clusters is completed.

[0086] Step 10: Based on the evaluation results of Step 9, locate the sensitive areas inside the chip and complete the overall soft error probability of the chip;

[0087] Based on the evaluation results of step 9, the soft error probabilities of each cluster are sorted to locate sensitive areas inside the chip.

[0088] The integrated circuit soft error analysis method based on cluster analysis proposed in this paper is as follows: Figure 4 As shown, sensitive areas within the chip can be located. Based on the soft error probability assessment results of the obtained KN clusters, the clusters are sorted in descending order of soft error probability. The higher the soft error probability, the lower the cluster number, indicating that the units within that cluster are more sensitive to single-event effects. If the cluster number of Cluster_i is NO.1, it means that the units within Cluster_i exhibit a higher soft error probability. Since the units within Cluster_i either have similar hierarchical structures and modules or have close logical connections, the hierarchical structure and modules to which the units within Cluster_i belong, or the upstream and downstream units with which they have logical connections, are defined as relatively sensitive areas within the chip.

[0089] Based on the evaluation results of step 9, the number of units and soft error probability of each cluster are counted to complete the overall soft error probability evaluation of the chip.

[0090] The integrated circuit soft error analysis method based on cluster analysis proposed in this paper is as follows: Figure 4 As shown, this allows for the evaluation of the overall soft error probability of the chip. For a set containing KN clusters, after obtaining the number of cells and the soft error probability of each cluster, the overall soft error probability SER of the chip can be calculated. Chip It can be represented as:

[0091]

[0092] Among them, CellN Cluster_i SER represents the number of cells within the i-th cluster. Cluster_i This represents the soft error probability of the i-th cluster.

[0093] The contents not described in detail in this specification are common knowledge to those skilled in the art.

Claims

1. A method for simulating single-event soft errors in integrated circuits based on cluster analysis, characterized in that, Includes the following steps: (1) Obtain information about the internal units of the integrated circuit; (2) Define the inter-cluster distance function based on the internal unit information of the integrated circuit; (3) Based on the distance function, perform cluster analysis on the internal units of the integrated circuit to generate several clusters; (4) Randomly sample units within each cluster in equal proportions to form sampling units, and generate a fault injection list for each cluster; (5) Construct a single-event soft error fault model for integrated circuits; (6) Based on the fault injection list of each cluster, apply the fault model to perform fault injection simulation on the sampling unit in clusters, monitor integrated circuit soft errors, and generate fault injection simulation results. (7) Based on the fault injection simulation results, the soft error probability of the sampling unit is statistically analyzed on a cluster basis; (8) The soft error probability of the sampling unit is taken as the soft error probability of the cluster as a whole; (9) Repeat steps (4) to (8) until the soft error probability assessment of all clusters is completed; (10) Based on the soft error probability assessment results, sort the soft error probabilities of each cluster to determine the sensitive areas inside the integrated circuit; The overall soft error probability of the integrated circuit is obtained by statistically analyzing the number of units and the soft error probability of each cluster. The acquisition of integrated circuit internal unit information specifically includes: Use the VPI tool in EDA tools to obtain the resource information of the target integrated circuit, including cell name, cell type, module to which the cell belongs, and cell level information; VPI is used to obtain the internal structure information of the target integrated circuit, including cell structure information, inter-cell connection information, and cell dependency relationships; Based on the internal unit information of the integrated circuit, a cluster distance function is defined, and the specific formula is as follows: Among them, D A,B Let LN be the distance function between two units A and B, LN be the level depth, and Li represent the i-th level where units A and B are located. Ali Module Bli This indicates the level module to which units A and B belong at the Lith level; Compare(Module) ALi ,Module BLi The function is used to compare modules. Ali Module Bli If they are the same, Compare(ModuleAli, ModuleBli) returns 0; otherwise, it returns 1.

2. The method for simulating single-event soft errors in integrated circuits based on cluster analysis according to claim 1, characterized in that: Based on the distance function, cluster analysis is performed on the internal units of the integrated circuit to generate several clusters. The specific method is as follows: (1) Define the number of clusters KN to be clustered. Randomly select KN units {Cell1} from all the units inside the obtained integrated circuit. K1 Cell1 K2 Cell1 K3 Cell1 KN } is the first cluster center. Using the distance function, the distances from all other units to the KN first cluster centers are calculated. Clustering is performed based on the shortest distance, and the set of units with the shortest distance to the first cluster center is the first cluster {Cluster}. 11 Cluster 12 Cluster 13 Cluster 1KN }; (2) Using the distance function, the first cluster {Cluster} is calculated sequentially. 11 Cluster 12 Cluster 13 Cluster 1KN Calculate the distance from each cell within the first cluster to all other cells within that cluster, sum these distances, and designate the cell with the smallest sum of distances as the new cluster center. Then, designate each of these new cluster centers as the second cluster center {Cell2}. K1 Cell2 K2 Cell2 K3 Cell2 KN Then, the distance function is used again to calculate the distance from all other units to the center of the second cluster. Clustering is performed based on the shortest distance, and the set of units with the shortest distance to the center of the second cluster is obtained as the second cluster {Cluster}. 21 Cluster 22 Cluster 23 Cluster 2KN }; This process continues until the cluster centers no longer change, at which point clustering stops, resulting in the nth cluster {Cluster}. n1 Cluster n2 Cluster n3 Cluster nKN }, where n is the number of clustering, and the nth cluster is represented as {Cluster1, Cluster2, Cluster3, ..., ClusterKN}.

3. The method for simulating single-event soft errors in integrated circuits based on cluster analysis according to claim 1, characterized in that: Random sampling was performed on 20% to 40% of the units within each cluster.

4. The method for simulating single-event soft errors in integrated circuits based on cluster analysis according to claim 1, characterized in that: For clusters with fewer than 1 / 12 to 1 / 10 of the average number of cluster units, no proportional random sampling is performed, and all units within the cluster will directly generate the fault injection list for that cluster.

5. The method for simulating single-event soft errors in integrated circuits based on cluster analysis according to claim 1, characterized in that: The fault injection list includes injection unit information, injection node, and injection time; wherein, the injection unit information includes unit name, unit type, and the hierarchical path of the unit; the injection node information includes the target unit output net; the injection time is a randomly generated simulation time within the time range before the simulation ends after the integrated circuit has completed its initial configuration.

6. The method for simulating single-event soft errors in integrated circuits based on cluster analysis according to claim 1, characterized in that: The fault models include a single-event flip fault model simulating the single-event effect of sequential logic units, a single-event transient fault model simulating the single-event effect of combinational logic units, and a single-event multi-bit flip fault model simulating the single-event effect of memory units.

7. The method for simulating single-event soft errors in integrated circuits based on cluster analysis according to claim 1, characterized in that: Based on the fault injection list of each cluster, the fault model is applied to perform fault injection simulation on the sampling unit on a cluster-by-cluster basis, and integrated circuit soft errors are monitored to generate fault injection simulation results. The specific method is as follows: The VPI-based fault injection identifies the unit types in the fault list, including sequential logic units, combinational logic units, and memory units, and injects the corresponding fault model according to the unit type. Fault injection simulation is performed on the sampling unit based on the fault injection list of each cluster, and soft errors of the integrated circuit are detected by comparing the simulation results before and after fault injection.

8. The method for simulating single-event soft errors in integrated circuits based on cluster analysis according to claim 1, characterized in that: The unit soft error probability is calculated as follows: SEE F = Enum / N F Among them, SER F To statistically analyze the soft error probability of sampling units on a cluster basis; Enum represents the number of soft errors detected in the integrated circuit; N F This represents the total number of faults injected into the sampling unit.

9. The method for simulating single-event soft errors in integrated circuits based on cluster analysis according to claim 1, characterized in that: Based on the soft error probability assessment results, the soft error probabilities of each cluster are ranked to determine the sensitive areas within the integrated circuit; the number of cells and the soft error probability of each cluster are counted to obtain the overall soft error probability of the integrated circuit. The specific method is as follows: The clusters are sorted from largest to smallest soft error probability. The hierarchical structure and connection relationship of the internal units of the clusters with the highest ordinal number (top 10%-20%) are defined as the sensitive region inside the integrated circuit. Based on the number of clusters, the number of cells within each cluster, and their corresponding soft error probabilities, the overall soft error probability SER of the integrated circuit is calculated. Chip The specific method is as follows: Among them, CellN Cluster_i SER represents the number of units within the i-th cluster. Cluster_i Let KN represent the soft error probability of the i-th cluster, and KN be the number of clusters that need to be clustered.

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