Serial port baud rate adaptive method, chip and system

Abstract

The application provides a serial port baud rate self-adapting method, a chip and a system, and the method comprises the following steps: step 1, real-time monitoring whether a calibration interface of a target chip receives a start calibration instruction from a host device, if yes, start recording a clock number; step 2, real-time monitoring whether the calibration interface of the target chip receives a stop calibration instruction from the host device, if yes, stop recording the clock number, taking the clock number record value as a calibration parameter I, and extracting a calibration parameter II in the stop calibration instruction; wherein the stop calibration instruction comprises the calibration parameter II; step 3, calculating a new frequency division coefficient according to the calibration parameter II and the calibration parameter I, and updating a register value of a frequency division coefficient stored in the target chip based on the new frequency division coefficient; step 4, calculating a calibrated serial port baud rate through the new frequency division coefficient, and communicating with other devices based on the calibrated serial port baud rate, so as to achieve the effect of automatic adjustment of the serial port baud rate.

Description

Technical Field

[0001] This invention relates to the field of communication technology, and more specifically, to a serial port baud rate adaptive method, chip, and system. Background Technology

[0002] Serial communication refers to a communication method in which a master device and an external device transmit data bit by bit through data signal lines, ground lines, control lines, etc. This communication method is based on the baud rate between the master device and the external device for serial communication. It uses fewer data lines and can save communication costs in long-distance communication, but its transmission speed is lower than that of parallel transmission.

[0003] Serial communication parameters include baud rate, data bits, stop bits, and parity. Among them, baud rate represents the number of symbol bits transmitted per unit time. It is a measure of symbol transmission rate. The unit of baud rate is bits per second, denoted as bps.

[0004] To ensure that the master device and the external device obtain the same data, they need to communicate at the same baud rate. However, the baud rate of serial communication is usually affected by the frequency of the master device. Due to differences in the real environment, the baud rates between the master device and the external device are easily inconsistent, which affects the serial transmission.

[0005] To achieve stable serial data transmission between the master device and the external device, the baud rate between them is typically calibrated before communication begins: the master device sends a preset signal of a certain length to the external device, which detects this preset signal and adjusts its serial port baud rate based on the number of clock signals detected. However, this calibration method has the problem that both the master device and the external device need to be adjusted simultaneously, and the external device needs to be debugged each time before it can be used.

[0006] In order to solve the above problems, people have been seeking an ideal technological solution. Summary of the Invention

[0007] The purpose of this invention is to address the shortcomings of existing technologies by providing a serial port baud rate adaptive method, chip, and system.

[0008] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0009] The first aspect of this invention provides a serial port baud rate adaptive method, which includes the following steps:

[0010] Step 1: Monitor in real time whether the calibration interface of the target chip receives a start calibration command from the master device. If so, start recording the clock count.

[0011] The calibration interface is the physical interface of the target chip.

[0012] Step 2: Monitor in real time whether the calibration interface of the target chip receives a stop calibration command from the master device. If so, stop recording the clock count, use the recorded clock count value as calibration parameter I, and extract calibration parameter II from the stop calibration command.

[0013] Wherein, the calibration parameter II is a time parameter;

[0014] Step 3: Calculate the new frequency division coefficient based on the calibration parameter II and the calibration parameter I, and update the register value storing the frequency division coefficient in the target chip based on the new frequency division coefficient;

[0015] Step 4: During serial communication, the calibrated serial port baud rate is calculated using the new frequency division coefficient stored in the register and the peripheral bus frequency, and serial communication with other devices is performed based on the calibrated serial port baud rate.

[0016] A second aspect of the present invention provides a baud rate adaptive chip, characterized in that it includes a calibration parameter acquisition unit, an adjustment value generation unit, and a baud rate configuration unit, wherein...

[0017] The calibration parameter acquisition unit is used to monitor in real time whether the calibration interface of the target chip receives a start calibration command from the master device. If so, it starts recording clock counts. It is also used to monitor in real time whether the calibration interface of the target chip receives a stop calibration command from the master device. If so, it stops recording clock counts, uses the recorded clock count value as calibration parameter I, and extracts calibration parameter II from the stop calibration command. Herein, the calibration interface is the physical interface of the target chip, and the calibration parameter II is a time parameter.

[0018] The adjustment value generation unit is used to calculate a new frequency division coefficient based on the calibration parameter II and the calibration parameter I, and update the register value storing the frequency division coefficient in the target chip based on the new frequency division coefficient;

[0019] The baud rate configuration unit is used to calculate the calibrated serial port baud rate using the new division coefficient stored in the register and the peripheral bus frequency, and to perform serial communication with other devices based on the calibrated serial port baud rate.

[0020] A third aspect of the present invention provides a high-precision serial port baud rate adaptive system, which includes a master device and a target chip, wherein the target chip is the baud rate adaptive chip described above.

[0021] The host device and the target chip are connected via a calibration interface and serial communication. When the serial baud rate is adjusted, the following operations are performed:

[0022] The master device sends a start calibration command to the target chip through the communication channel corresponding to the calibration interface; after a preset delay, the master device sends a stop calibration command to the target chip through the communication channel corresponding to the calibration interface, so that the serial port baud rate of the target chip matches the serial port baud rate of the master device.

[0023] This invention has outstanding substantive features and significant progress compared to the prior art, specifically:

[0024] 1) This invention reuses the physical interface of the target chip as a calibration interface. The start calibration command and stop calibration command are transmitted through the communication channel corresponding to the calibration interface and the extended instructions based on the target chip. This enables the covert transmission of calibration parameter I and calibration parameter II, which is highly practical.

[0025] The target chip and the main device only need to exchange calibration commands and stop calibration commands. The target chip and the main device do not need to be adjusted at the same time, nor does the target chip need to be debugged. The serial port baud rate of the target chip can be automatically adjusted.

[0026] 2) This invention achieves adaptive serial port baud rate of the target chip through the built-in COS and internal instructions of the target chip. It can automatically match the serial port baud rate of the target chip with the serial port baud rate of the host device without the need to install an overly complex baud rate adjustment program file on the target chip. The calculation is small and the efficiency is high.

[0027] 3) This invention receives start calibration command and stop calibration command through the calibration interface of the target chip. The calibration interface can reuse SD interface, USB interface, SPI interface or IIC interface; even if a certain interface is temporarily unavailable, it will not affect the serial port baud rate adaptation of the target chip.

[0028] These calibration interfaces correspond to communication channels with high data transmission rates, which can effectively shorten the transmission time of start calibration commands and stop calibration commands, and reduce the impact of calibration command transmission process on baud rate calibration accuracy.

[0029] 4) When calibrating the serial port baud rate between the master device and the target chip, the master device only needs one logic to verify the target chip, without modifying the program. Attached Figure Description

[0030] Figure 1 This is a timing diagram of the serial port baud rate adaptive method of the present invention;

[0031] Figure 2This is a flowchart of the serial port baud rate adaptive method of the present invention;

[0032] Figure 3 This is a schematic diagram of the high-precision serial port baud rate adaptive system of the present invention. Figure 1 ;

[0033] Figure 4 This is a schematic diagram of the high-precision serial port baud rate adaptive system of the present invention. Figure 2 ;

[0034] Figure 5 This is a schematic diagram of the high-precision serial port baud rate adaptive system of the present invention. Figure 3 . Detailed Implementation

[0035] The technical solution of the present invention will be further described in detail below through specific embodiments.

[0036] Serial communication output baud rate SCIBD: The communication baud rate of the target chip's serial port output pin TX;

[0037] MCLK (Master Clock Frequency): refers to the main clock frequency of the target chip;

[0038] Peripheral Bus Frequency (FBF): refers to the peripheral bus frequency of the target chip, which is generally a low-speed bus and is obtained by dividing the master clock frequency.

[0039] Frequency Division Factor (FDF): This refers to the coefficient used to calculate the serial port baud rate based on the peripheral bus frequency, including both integer and floating-point parts.

[0040] The integer part of the frequency division coefficient FDF is denoted as FDFI.

[0041] The floating-point part of the frequency division coefficient FDF is denoted as FDFF.

[0042] Frequency division coefficient floating-point register FDFFR: The floating-point part is stored in the register in base 64, and the value range is 1~63;

[0043] Frequency division coefficient integer register FDFIR: The integer part is stored directly in the register, and the value range is 1~65535;

[0044] Start calibration command: also known as start clock counting command, is an APDU command sent by the master device MCU to the target chip to notify the target chip to start clock counting;

[0045] Stop calibration instruction: also known as the end clock counting instruction, is an APDU instruction sent by the master device MCU to the target chip to notify the target chip to stop clock counting.

[0046] Example 1

[0047] Appendix Figure 1 A timing diagram of a serial port baud rate adaptive method is shown, which includes the following steps:

[0048] Step 1: Monitor in real time whether the calibration interface of the target chip receives a start calibration command from the master device. If so, start recording the clock count.

[0049] The calibration interface is the physical interface of the target chip.

[0050] Step 2: Monitor in real time whether the calibration interface of the target chip receives a stop calibration command from the master device. If so, stop recording the clock count, use the recorded clock count value as calibration parameter I, and extract calibration parameter II from the stop calibration command.

[0051] The stop calibration command includes calibration parameter II, which is a time parameter in seconds.

[0052] Step 3: Calculate the new frequency division coefficient based on the calibration parameter II and the calibration parameter I, and update the register value storing the frequency division coefficient in the target chip based on the new frequency division coefficient;

[0053] Step 4: Before serial communication, calculate the calibrated serial port baud rate using the new division coefficient stored in the register and the peripheral bus frequency, and then conduct serial communication with other devices based on the calibrated serial port baud rate during serial communication (after the target chip is powered on and off).

[0054] It should be noted that since the master device has a precise clock while the target chip does not, the reference clock of the target chip may drift or become inaccurate. However, the user cannot know the reference clock offset of some target chips (such as security chips), which makes it difficult to calibrate the serial port baud rate of the target chip. If calibration is based on non-precise internal time, it is difficult to guarantee accuracy. Therefore, in this embodiment, the calibration parameter II is specified and sent by the master device to ensure accuracy.

[0055] It should be noted that before adjusting the serial port baud rate, the target chip and the master device pre-agree on the format and operation code of the start calibration command and the stop calibration command. The operation code corresponding to the start calibration command is operation code I composed of specified characters, and the operation code corresponding to the stop calibration command is operation code II composed of specified characters. The operation code II includes calibration parameter II, which can be adjusted by the master device according to the specific situation.

[0056] When the target chip receives data from the master device at its calibration interface, the target chip determines whether the data is a start calibration command or a stop calibration command based on the data's format and content: if the data format is a pre-agreed format and the data content contains operation code I, the target chip determines that it has received a start calibration command; if the data format is a pre-agreed format and the data content contains operation code II, the target chip determines that it has received a stop calibration command.

[0057] In one specific implementation, the target chip and the master device pre-agree that the Mth to M+nth bits of the operation code II represent the calibration parameter II; accordingly, after determining that the target chip has received a stop calibration command, the Mth to M+nth bits of the operation code II of the stop calibration command are parsed out to obtain the calibration parameter II; wherein, M and n are natural numbers greater than or equal to 1.

[0058] Specifically, the target chip can be a security chip with a built-in standard COS (System-on-a-Chip) or other chips, which have multiple or one of multiple physical communication interfaces such as serial port and SD, USB, SPI and IIC interfaces.

[0059] Furthermore, in step 3, when calculating the new frequency division coefficient based on calibration parameter II and calibration parameter I, and updating the register value storing the frequency division coefficient in the target chip based on the new frequency division coefficient, the following is executed:

[0060] Step 301: Calculate the real-time main frequency of the target chip based on the ratio of calibration parameter I and calibration parameter II, and obtain the new frequency division coefficient of the target chip based on the real-time main frequency of the target chip; wherein, calibration parameter I is a clock count record value, and calibration parameter II is a time parameter;

[0061] Step 302: Extract the integer part and floating-point part of the new frequency division coefficient, update the register value FDFIR to the integer part of the new frequency division coefficient, and update the register value FDFFR to the floating-point part of the new frequency division coefficient, as the corrected serial port baud rate.

[0062] In one specific implementation, the serial port (output) baud rate of the target chip is obtained by dividing the peripheral bus frequency; the new division coefficient = (real-time main frequency of the target chip MCLK / N) / (16 × set serial port baud rate SCIBD), the real-time main frequency of the target chip = calibration parameter I / calibration parameter II; the serial port baud rate SCIBD = peripheral bus frequency FBF / (16 × division coefficient FDF), the peripheral bus frequency FBF = main frequency MCLK / N, where N is a natural number greater than or equal to 2; the division coefficient FDF = FDFI + FDFF, the register value FDFIR = FDFI = ABS(peripheral bus frequency FBF / (16 × serial port baud rate SCIBD)), the register value FDFFR = ABS(FDFF × 64 + 0.5), where the function ABS(X) represents the absolute value of X;

[0063] Typically, two values ​​are set in the target chip's registers: register value FDFIR and register value FDFFR. Register value FDFIR corresponds to the integer register of the frequency division coefficient, which stores the integer part of the frequency division coefficient FDF. Register value FDFFR corresponds to the floating-point register of the frequency division coefficient, which stores the floating-point part of the frequency division coefficient FDF.

[0064] This embodiment uses a serial port baud rate of SCIBD=115200HZ, a fixed main frequency of MCLK=200M, and N=2 as an example to illustrate the serial port baud rate adaptive method:

[0065] Frequency divider FDF = Peripheral bus frequency FBF / (16 × Set serial port baud rate SCIBD) = (Main frequency MCLK / N) / (16 × Set serial port baud rate SCIBD) = (200M / 2) / (16 × 115200) = 54.25347, register value FDFIR is 54 (0x36), register value FDFFR is ABS(0.25347*64+0.5) = 17 = 0x11;

[0066] Assuming the calculated real-time clock frequency MCLK = 201MHz, then the new frequency division factor FDF = (real-time clock frequency MCLK / N) / (16 × set serial port baud rate SCIBD) = 100500000 / (16 × 115200) = 54.52474; based on the new frequency division factor FDF, the register values ​​FDFIR and FDFFR are updated and corrected.

[0067] Therefore, the calibrated serial port baud rate = peripheral bus frequency FBF / (16 × new frequency division coefficient FDF) = 100000000 / (16 × 54.52474) = 114626.86;

[0068] It should be noted that since the target chip adjusts its serial port baud rate based on the calibration parameters I and II transmitted by the master device, as well as the pre-configured serial port baud rates of the master device and the target chip, the corrected serial port baud rate of the target chip matches (is equal to) the real-time serial port baud rate of the master device, and even if there is a deviation, it is within an acceptable range, which can ensure stable serial port data transmission between the master device and the target chip.

[0069] In one specific implementation, the calibration interface is pre-configured to reuse the target chip's SD interface, USB interface, SPI interface, or IIC interface, and is pre-agreed upon with the corresponding master device. It can be understood that the two agree to use the SD interface, USB interface, SPI interface, or IIC interface to transmit start calibration commands and stop calibration commands. The communication channels corresponding to these calibration interfaces have high data transmission rates, which can effectively shorten the transmission time of start calibration commands and stop calibration commands, and reduce the impact of the calibration command transmission process on the baud rate calibration accuracy.

[0070] In addition, using the communication channel corresponding to the calibration interface to trigger the baud rate calibration of the target chip can also avoid the impact of unstable or unreachable serial communication on the baud rate calibration.

[0071] In another specific implementation, the connection and communication status of the SD interface, USB interface, SPI interface and IIC interface of the target chip are detected. If the SD interface, USB interface, SPI interface or IIC interface is connected to the master device and is in a communication idle state, the interface is configured as a calibration interface and the corresponding master device is notified. In this way, the serial port baud rate adaptive method in this embodiment is realized without affecting the normal communication of the calibration interface.

[0072] Example 2

[0073] The difference between this embodiment and Embodiment 1 is as follows: (See attached diagram) Figure 2 As shown, if the calibration interface of the target chip is pre-configured to reuse the serial port of the target chip, then before step 1, the serial port baud rate adaptive method further includes the following steps:

[0074] The serial port of the target chip is monitored in real time to see if it receives a test command from the master device. The test command is transmitted using a set serial port baud rate.

[0075] If so, send a response command to the master device and proceed to step 1;

[0076] Otherwise, continue to monitor in real time whether the target chip's serial port receives a test command transmitted by the master device at a dynamic baud rate, where the dynamic baud rate is the product of the set serial port baud rate and a preset multiple.

[0077] It is understood that in this embodiment, when the timer of the master device is accurate and the baud rate of the master device's serial port output is (accurate) and adjustable within a certain range, the master device attempts to adjust itself to "scan the target chip". By first coarsely adjusting the baud rate of the master device's serial port output, and then finely adjusting it using the method steps in embodiment 1, the serial port baud rate of the target chip is automatically matched with the serial port baud rate of the master device.

[0078] The test commands sent by the master device and the response commands sent by the target chip adopt a data format predetermined before baud rate adjustment.

[0079] Specifically, the dynamic baud rate = set serial port baud rate × preset multiple, where the set serial port baud rate is the pre-configured serial port baud rate between the master device and the target chip, and the preset multiple can be 90%, 92.5%, 95%, 97.5%, 102.5%, 105%, 107.5%, or 110%.

[0080] For example, the master device transmits test commands to the target chip's serial port at a set serial port baud rate;

[0081] If the target chip receives the test command, it sends a response command to the master device. If the master device does not receive a response command after waiting for a period of time (preset time period), it will transmit the test command to the serial port of the target chip again at 90% × the set serial port baud rate, and repeat the above process until the master device receives a returned response command or the preset number of attempts is exceeded.

[0082] Example 3

[0083] Based on Examples 1 and 2, this example provides a specific implementation of a baud rate adaptive chip;

[0084] The baud rate adaptive chip includes a calibration parameter acquisition unit, an adjustment value generation unit, and a baud rate configuration unit, wherein...

[0085] The calibration parameter acquisition unit is used to monitor in real time whether the calibration interface of the target chip receives a start calibration command from the master device. If so, it starts recording clock counts. It is also used to monitor in real time whether the calibration interface of the target chip receives a stop calibration command from the master device. If so, it stops recording clock counts, uses the recorded clock count value as calibration parameter I, and extracts calibration parameter II from the stop calibration command. Herein, the calibration interface is the physical interface of the target chip, and the calibration parameter II is a time parameter.

[0086] The adjustment value generation unit is used to calculate a new frequency division coefficient based on the calibration parameter II and the calibration parameter I, and update the register value storing the frequency division coefficient in the target chip based on the new frequency division coefficient;

[0087] The baud rate configuration unit is used to calculate the calibrated serial port baud rate by using the new division coefficient stored in the register and the peripheral bus frequency during serial communication, and to perform serial communication with other devices based on the calibrated serial port baud rate after the target chip is powered on and off.

[0088] Furthermore, the adjustment value generation unit calculates the new frequency division coefficient based on the calibration parameter II and the calibration parameter I, and executes:

[0089] The real-time clock frequency of the target chip is calculated based on the ratio of calibration parameter I to calibration parameter II; wherein, calibration parameter II is a time parameter.

[0090] The new frequency division coefficient of the target chip is obtained based on the real-time main frequency of the target chip. The integer part and floating-point part of the new frequency division coefficient are extracted. The register value FDFIR is updated to the integer part of the new frequency division coefficient, and the register value FDFFR is updated to the floating-point part of the new frequency division coefficient.

[0091] In one specific embodiment, the baud rate adaptive chip further includes a first interface multiplexing unit, which is used to pre-configure the calibration interface of the target chip as a serial port.

[0092] The calibration parameter acquisition unit is also used to monitor whether the calibration interface of the target chip receives a start calibration command from the master device before:

[0093] The serial port of the target chip is monitored in real time to see if it receives a test command from the master device. The test command is transmitted using a set serial port baud rate.

[0094] When a test command is received from the master device, a response command is sent to the master device; when no test command is received from the master device, the serial port of the target chip continues to monitor in real time whether the master device has received a test command transmitted at a dynamic baud rate; wherein, the dynamic baud rate is the product between the set serial port baud rate and a preset multiple.

[0095] In another specific embodiment, the baud rate adaptive chip further includes a second interface multiplexing unit, which is used to: pre-agree with the corresponding master device to configure the calibration interface as a multiplexer of the target chip's SD interface, USB interface, SPI interface or IIC interface.

[0096] In another specific embodiment, the baud rate adaptive chip further includes a third interface multiplexing unit, which is used for:

[0097] The connection and communication status of the target chip's SD (Secure Digital) interface, USB interface, SPI (Serial Peripheral Interface) interface, and IIC (Inter-Integrated Circuit) interface are detected. If the SD interface, USB interface, SPI interface, or IIC interface is connected to the host device and is in a communication idle state, the interface is configured as a calibration interface and the corresponding host device is notified.

[0098] Example 4

[0099] Based on the above embodiments, this embodiment provides a specific implementation of a high-precision serial port baud rate adaptive system;

[0100] The high-precision serial port baud rate adaptive system includes a master device and a target chip, wherein the target chip is the baud rate adaptive chip in Example 3.

[0101] The host device and the target chip are connected via a calibration interface and serial communication. When the serial baud rate is adjusted, the following operations are performed:

[0102] The master device sends a start calibration command to the target chip through the communication channel corresponding to the calibration interface; after a preset delay, the master device sends a stop calibration command to the target chip through the communication channel corresponding to the calibration interface, and the target chip executes the steps of the serial port baud rate adaptive method in embodiments 1 and 2, so that the serial port baud rate of the target chip matches the serial port baud rate of the master device.

[0103] Furthermore, the main device includes a calibration instruction generation unit and a calibration instruction sending unit. The calibration instruction generation unit is used to generate start calibration instructions and stop calibration instructions pre-agreed with the corresponding target chip, and send them to the corresponding target chip through the calibration interface of the main device via the calibration instruction sending unit.

[0104] Specifically, the preset time is equal to the calibration parameter II in the stop calibration command, and the start calibration command and the start calibration command are custom extended commands. The format and meaning of the custom extended commands are agreed upon and negotiated in advance by the master device and the target chip before the serial port baud rate is adjusted.

[0105] In one specific embodiment, the high-precision serial port baud rate adaptive system includes a master device and a target chip, wherein the target chip is a security chip, and the calibration interface is configured to multiplex the target chip's SD interface, USB interface, SPI interface, or IIC interface, as shown in the attached figure. Figure 3 As shown.

[0106] In another specific embodiment, the high-precision serial port baud rate adaptive system includes a master device and two target chips, the two target chips being security chips, as shown in the attached figure. Figure 4 As shown;

[0107] Under normal circumstances, given the number of interfaces on the master device, a master device can simultaneously perform serial port baud rate self-adjustment with two or more target chips, and the target chips do not interfere with each other during the serial port baud rate self-adjustment process.

[0108] In another specific embodiment, the high-precision serial port baud rate adaptive system includes two chips, one of which is a security chip, as shown in the attached figure. Figure 5 As shown;

[0109] Due to the physical differences between chips, the actual clock frequency MCLK of the security chip may deviate from the fixed clock frequency MCLK. If the actual deviation range of the clock frequency is unknown, and the known fixed clock frequency MCLK is still substituted into the formula for calculation, it will cause the peripheral bus frequency FBF to deviate, resulting in deviations in the calculation of the register values ​​FDFIR and FDFFR of the security chip. If the deviation is too large, it will cause the serial port to fail.

[0110] In this embodiment, a security chip is configured to perform serial port baud rate adaptation. The register values ​​FDFIR and FDFFR of the security chip are dynamically adjusted to match the serial port baud rate of the security chip with that of the host device (chip).

[0111] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit them; although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications can still be made to the specific implementation of the present invention or equivalent substitutions can be made to some technical features without departing from the spirit of the technical solutions of the present invention, and all such modifications and substitutions should be covered within the scope of the technical solutions claimed in the present invention.

Claims

1. A serial port baud rate adaptive method, characterized in that, Includes the following steps: Step 1: Monitor in real time whether the calibration interface of the target chip receives a start calibration command from the master device. If so, start recording clock counts. The calibration interface is the physical interface of the target chip. Step 2: Monitor in real time whether the calibration interface of the target chip receives a stop calibration command from the master device. If so, stop recording the clock count, use the recorded clock count value as calibration parameter I, and extract calibration parameter II from the stop calibration command. Wherein, the calibration parameter II is a time parameter; Step 3: Calculate the new frequency division coefficient based on calibration parameter II and calibration parameter I. When updating the register value storing the frequency division coefficient in the target chip based on the new frequency division coefficient, execute: The real-time main frequency of the target chip is calculated based on the ratio of calibration parameter I to calibration parameter II, and the new frequency division coefficient of the target chip is obtained based on the real-time main frequency of the target chip. Extract the integer and floating-point parts of the new frequency division coefficient, update the register value FDFIR to the integer part of the new frequency division coefficient, and update the register value FDFFR to the floating-point part of the new frequency division coefficient; Step 4: Calculate the calibrated serial port baud rate using the new division coefficient stored in the register and the peripheral bus frequency, and then use the calibrated serial port baud rate to communicate with other devices via serial port.

2. The serial port baud rate adaptive method according to claim 1, characterized in that, If the calibration interface of the target chip is pre-configured to reuse the serial port of the target chip, then the following steps are included before step 1: The serial port of the target chip is monitored in real time to see if it receives a test command from the master device. The test command is transmitted using a set serial port baud rate. If so, send a response command to the master device and proceed to step 1; Otherwise, continue to monitor in real time whether the target chip's serial port receives the test command transmitted by the master device at a dynamic baud rate.

3. The serial port baud rate adaptive method according to claim 1, characterized in that, The calibration interface is pre-configured to reuse the target chip's SD interface, USB interface, SPI interface, or IIC interface, and is pre-agreed upon with the corresponding master device.

4. The serial port baud rate adaptive method according to claim 1, characterized in that, The connection and communication status of the target chip's SD interface, USB interface, SPI interface, and IIC interface are detected. If the SD interface, USB interface, SPI interface, or IIC interface is connected to the master device and is in a communication idle state, the interface is configured as a calibration interface and the corresponding master device is notified.

5. A baud rate adaptive chip, characterized in that: It includes a calibration parameter acquisition unit, an adjustment value generation unit, and a baud rate configuration unit, wherein, The calibration parameter acquisition unit is used to monitor in real time whether the calibration interface of the target chip receives a start calibration command from the master device. If so, it starts recording clock counts. It is also used to monitor in real time whether the calibration interface of the target chip receives a stop calibration command from the master device. If so, it stops recording clock counts, uses the recorded clock count value as calibration parameter I, and extracts calibration parameter II from the stop calibration command. Herein, the calibration interface is the physical interface of the target chip, and the calibration parameter II is a time parameter. The adjustment value generation unit is used to calculate a new frequency division coefficient based on the calibration parameter II and the calibration parameter I, and when updating the register value storing the frequency division coefficient in the target chip based on the new frequency division coefficient, it performs the following: The real-time main frequency of the target chip is calculated based on the ratio of calibration parameter I to calibration parameter II, and the new frequency division coefficient of the target chip is obtained based on the real-time main frequency of the target chip. Extract the integer and floating-point parts of the new frequency division coefficient, update the register value FDFIR to the integer part of the new frequency division coefficient, and update the register value FDFFR to the floating-point part of the new frequency division coefficient; The baud rate configuration unit is used to calculate the calibrated serial port baud rate using the new division coefficient stored in the register and the peripheral bus frequency, and to perform serial communication with other devices based on the calibrated serial port baud rate.

6. The baud rate adaptive chip according to claim 5, characterized in that: It also includes a first interface multiplexing unit, which is used to pre-configure the calibration interface of the target chip as a serial port; The calibration parameter acquisition unit is also used to monitor whether the calibration interface of the target chip receives a start calibration command from the master device before: The serial port of the target chip is monitored in real time to see if it receives a test command from the master device. The test command is transmitted using a set serial port baud rate. Upon receiving a test command from the master device, send a response command to the master device; When no test command is received from the master device, the serial port of the target chip continues to monitor in real time whether it receives a test command transmitted by the master device at a dynamic baud rate; wherein, the dynamic baud rate is the product between the set serial port baud rate and a preset multiple.

7. The baud rate adaptive chip according to claim 5, characterized in that, It also includes a second interface multiplexing unit, which is used for: The calibration interface is configured in advance with the corresponding master device to reuse the target chip's SD interface, USB interface, SPI interface or IIC interface.

8. The baud rate adaptive chip according to claim 5, characterized in that: It also includes a third interface multiplexing unit, which is used for: The connection and communication status of the target chip's SD interface, USB interface, SPI interface, and IIC interface are detected. If the SD interface, USB interface, SPI interface, or IIC interface is connected to the master device and is in a communication idle state, the interface is configured as a calibration interface and the corresponding master device is notified.

9. A high-precision serial port baud rate adaptive system, characterized in that: It includes a main device and a target chip, wherein the target chip is the baud rate adaptive chip according to any one of claims 5 to 8; The host device and the target chip are connected via a calibration interface and serial communication. When the serial baud rate is adjusted, the following operations are performed: The master device sends a start calibration command to the target chip through the communication channel corresponding to the calibration interface; after a preset delay, the master device sends a stop calibration command to the target chip through the communication channel corresponding to the calibration interface, so that the serial port baud rate of the target chip matches the serial port baud rate of the master device.

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