TCAD-based thyristor modeling method and device for uhvdc converter valve

Abstract

This invention discloses a method and apparatus for modeling thyristors in UHVDC converter valves based on TCAD. The method includes: geometrically modeling the thyristor in the SDE tool integrated in TCAD; setting the electrode contact surface and contact material of the thyristor model in the SDE tool; applying low-concentration N-type doping followed by Gaussian doping superposition to the thyristor model in SDE; meshing the model in SDE; declaring physical parameters in Sdevice to describe the physical process; verifying the static blocking characteristics of the model using quasi-static scanning simulation in Sdevice; and building a pulse test circuit in Sdevice and using dynamic simulation to verify the dynamic switching characteristics of the model under gate current pulses. The advantage of this invention is that it provides a method for modeling thyristors in UHVDC converter valves based on TCAD, enabling monitoring of thyristors within the converter station.

Description

Technical Field

[0001] This invention relates to the fields of ultra-high voltage direct current transmission and semiconductor device modeling, and more specifically to a method and apparatus for modeling UHVDC converter valve thyristors based on TCAD. Background Technology

[0002] The east-west inverse distribution of primary energy and load demand in my country necessitates the development of ultra-high-voltage direct current (UHVDC) transmission. The Guquan UHVDC station is the largest power transmission hub in East China, a converter station with a large scale of equipment and many first-of-its-kind devices. During daily operation and maintenance, changes in system power supply methods, equipment overhauls, and the commissioning of new equipment all require corresponding changes in the operating modes of relay protection devices. Therefore, the parameter configuration within the converter station needs to be adjusted according to the changing operating modes. Consequently, tasks such as adjusting the operating parameters and setting thresholds of the secondary control and protection system introduce significant uncertainty to the safe operation of primary equipment within the station, sharply increasing the safety risks in the operation and maintenance and equipment management processes of the converter station. Currently, there is a lack of verification methods for modifying the daily control and protection logic of the converter station, making it impossible to perform secondary continuity and voltage verification as in AC systems. There is an urgent need to introduce more reliable verification methods and testing techniques. The concept of Digital Twin (DT) integrates popular technologies such as intelligent sensing, cloud platforms, big data analytics, and artificial intelligence. It designs virtual models in digital space and establishes a real-time mapping relationship between the digital virtual model and physical entities. This model is required to more realistically, objectively, and comprehensively depict the dynamic and real-time characteristics of the physical entities. Introducing a digital twin model into UHVDC converter stations facilitates multi-index monitoring and full lifecycle management of primary and secondary equipment. It allows for equipment maintenance and relay protection parameter debugging within the station while maintaining normal system operation, significantly improving the convenience and safety of UHVDC transmission system control.

[0003] Current carrying capacity is one of the most important attributes of a converter station, and its boundary directly determines the station's power transmission capacity. Previously, the calculation of the current carrying capacity boundary of converter stations used a coarse-grained margin calculation method. Besides considerations for safe operation, this method lacked a refined descriptive model (typically using a single switch to represent a bridge arm with hundreds of thyristors in series) and reliable operational status monitoring. Thanks to the development of the digital twin concept and related modeling and sensor technologies, thyristor-level modeling and status monitoring have become possible. Exploring a more accurate current carrying capacity boundary for converter stations based on digital twin technology allows for more efficient utilization of the converter valve's power transmission capacity while ensuring safety, bringing greater flexibility to the formulation of converter station power transmission plans.

[0004] Power thyristors are core components of converter valve equipment. Due to the series structure of the converter valves, the current carrying capacity of the converter station is actually determined by the maximum current that the thyristors can withstand, which in turn is determined by their highest junction temperature. Limited by the operating environment of the converter valves and sensing technology, it is difficult to monitor the junction temperature of the power thyristors. However, by modeling the thyristors, it is possible to effectively monitor their operating status and junction temperature, thereby further facilitating the exploration of the current carrying capacity boundaries of the converter station.

[0005] With the continuous development of computer-aided tools, the finite element analysis (EFA) method has been increasingly used in the circuit simulation of power devices. Technology Computer Aided Design (TCAD) is a semiconductor finite element modeling tool whose models are based on underlying physical mechanisms and can fully reflect the underlying physical characteristics of semiconductors. For UHVDC (Ultra-High Voltage Direct Current) thyristors, traditional methods, such as the simulation method for the extreme low-temperature characteristics of typical CMOS devices disclosed in Chinese Patent Publication No. CN108875192A, using the Sprcoess process simulation tool for modeling, require dissecting the physical object and obtaining the necessary parameters through methods such as electron scanning, which is costly. The TCAD model using the SDE structural modeling tool balances model accuracy and cost. However, there is no perfect TCAD-based thyristor modeling scheme in the current technology. For example, Chinese Patent Publication No. CN112948960A discloses a co-simulation method for the effect of high-power microwaves on frequency modulation fuses, which mentions using TCAD modeling but does not explain how to model. Similarly, Chinese Patent Publication No. CN107622172A discloses a chip-device level co-simulation method for the temperature field finite element modeling of press-fit IGBTs, which directly imports models from external sources (ATHENA or DevEdit) without explaining how to model. Summary of the Invention

[0006] The technical problem to be solved by this invention is that the existing technology lacks a TCAD-based modeling method for UHVDC converter valve thyristors, making it difficult to monitor the thyristors in the converter station.

[0007] This invention solves the above-mentioned technical problems through the following technical means: a TCAD-based modeling method for UHVDC converter valve thyristors, the method comprising:

[0008] Step 1: Model the geometric structure of the thyristor in the SDE tool integrated with TCAD;

[0009] Step 2: Set the electrode contact surface and contact material of the thyristor model in the SDE tool;

[0010] Step 3: In SDE, first apply low-concentration N-type doping to the thyristor model, then apply Gaussian doping superposition to complete the division of the anode region, gate region, and cathode region;

[0011] Step 4: Mesh the model in SDE;

[0012] Step 5: Declare the physical parameter model in Sdevice to describe the physical process;

[0013] Step 6: Use quasi-static scan simulation in Sdevice to verify the static blocking characteristics of the model. If the static blocking characteristics are correct, proceed to the next step; otherwise, return to step 3 and reduce the doping concentration of the N-drift region and the doping depth of other regions, or increase the overall device size in step 1.

[0014] Step 7: Build a pulse test circuit in Sdevice and use dynamic simulation to verify the dynamic switching characteristics of the model under gate current pulse. If the dynamic switching characteristics are correct, the UHVDC thyristor modeling is complete; otherwise, return to step 3 to adjust the doping concentration or doping range of the anode and gate regions.

[0015] This invention does not require existing internal device structures or existing device TCAD models. Instead, it relies on semiconductor physics principles and the external characteristics given in the device datasheet to build a UHVDC thyristor model that conforms to static blocking and dynamic switching characteristics. This enables the monitoring of thyristors in the converter station and facilitates the exploration of the current carrying capacity boundary of the converter station.

[0016] Further, step one includes:

[0017] Based on the physical dimensions of the thyristor chip or the chip dimensions given in the thyristor device datasheet, a geometric structure model of the thyristor chip is performed in the SDE tool integrated into TCAD. The geometric structure modeling adopts the cellular modeling method. For the very large UHVDC thyristor chip, the cellular modeling method saves a significant amount of computational resources, enabling simulation results to be obtained in a shorter time. The cellular modeling method requires calculating the area factor using the formula... Calculate the area factor, where V is the volume of the thyristor in μm. 3 S is the cross-sectional area of ​​its complete cross-section, in μm². 2The 1 in the denominator indicates that the Z-axis dimension of the 2D model is 1 μm in the actual simulation. The area factor connects the macroscopic external characteristics and the external characteristics of the unit cell. In reality, the device can be understood as being formed by a large number of unit cells "connected in parallel". The simulation only calculates various physical quantities within a unit cell of a few hundred cubic μm. By multiplying some quantities by the area factor, the physical quantities of all parts of the entire device are obtained, thus accelerating the simulation calculation. The area factor is implemented by declaring the value of the AreaFactor keyword in the simulation code, such as: AreaFactor = 1e6. In this case, the simulated unit cell volume is 400 μm^3, and the corresponding simulated physical volume is 4e8 μm^3, which is a silicon chip of 0.4 cm^3.

[0018] Furthermore, step two includes:

[0019] In the SDE tool, the thyristor model is divided into cathode, gate, base, and anode regions from top to bottom. The entire lower surface of the anode region along the X-axis is set as anode contacts, the entire upper surface of the cathode region along the X-axis is set as cathode contacts, and a portion of the upper surface of the gate region along the X-axis is set as gate contacts. A 15% surface area is left between the gate and cathode contacts as an electrode-free contact region, with aluminum as the contact material. The X-axis represents the width of the thyristor model, and the Y-axis represents its thickness. The 15% surface area between the gate and cathode contacts is primarily to prevent the gate pulse from failing to diffuse effectively, thus preventing the formation of positive feedback for thyristor turn-on and ensuring the model cannot simulate the thyristor turn-on process. The 15% parameter is chosen because it is a relatively universal value; designing the contact area according to this value ensures the correctness of the gate-triggered positive feedback mechanism for models of different sizes. If the empty area is too large, such as 30%, it will inevitably lead to uneven internal electric field distribution, affecting the accuracy of subsequent device characteristic simulations. If the value is too small, such as 5%, it will inevitably lead to incomplete gate triggering, which in turn will prevent the model from reflecting the triggering conduction mechanism. The specific numerical range should be set according to the actual situation.

[0020] Furthermore, step three includes:

[0021] In the SDE tool, a low-concentration uniform N-type doping is first applied to the entire geometry. Then, Gaussian doping baselines are established on the boundaries of each region away from the center. Finally, based on these Gaussian doping baselines, Gaussian doping is applied towards the N-drift region. P-type doping is applied to the anode and gate regions, while N-type doping is applied to the cathode region. The preset thicknesses are approximately 70% of the model thickness, 3% for the P+ anode region, 25% for the P-gate region, and 2% for the N+ cathode region. The doping depth is the preset thickness for each region.

[0022] Furthermore, step four includes:

[0023] In the non-PN junction direction, the maximum mesh size is set to 1 / 8 of the device size in that direction. In the PN junction direction, the maximum mesh size is set to approximately 1 / 30 of that direction. The minimum mesh size is used at the PN junction and electrode contacts, and the mesh size at the minimum mesh location expands at a rate of 1.3 times towards the direction away from the PN junction until it reaches the maximum mesh size. This meshing scheme is suitable for models of various sizes. Furthermore, because the mesh is mainly concentrated at the contact points between different doped regions, and the mesh is relatively sparse in other areas, it ensures the accuracy of electrical property calculations with limited computational resources.

[0024] Furthermore, step five includes:

[0025] The Physics section of the Sdevice code declares the physical parameter models used for simulation, including mobility models, carrier transport models, and carrier generation and recombination models. Specifically, the mobility models must declare at least the default silicon doping model and the carrier saturation model; the carrier transport models must declare at least the bandgap narrowing model; and the carrier generation and recombination models must declare at least the SRH recombination, Auger recombination, and avalanche ionization models. A lack of physical models can lead to a mismatch between the model's characteristics and the device under certain operating conditions. Declaring too many physical models can cause difficulties in numerical solution convergence, making it impossible to obtain a TCAD model suitable for characteristic simulation. This invention declares several physical models related to the TCAD model in the above manner, facilitating the rapid acquisition of a TCAD model suitable for characteristic simulation.

[0026] Furthermore, step six includes:

[0027] The static blocking characteristics of the model were verified using the Quasi-static scanning method of Sdevice. The initial anode voltage condition was set to 0, and two-step Quasi-static solution boundary conditions were set. The first solution boundary condition was an anode voltage of 1kV, and the second solution boundary condition was an anode voltage of -1kV. The anode current-anode voltage curve in the simulation results was observed. If the anode current did not exceed 50mA, the positive blocking characteristic was considered correct, and the next step was initiated. Otherwise, the doping concentration of the N-drift region and the doping depth of other regions in step three were reduced. If the static blocking characteristic could not be achieved even after the N-drift region doping concentration was reduced to the 10-10 level, the Gaussian doping depth of the gate region and anode region was reduced by 10% each time to increase the thickness of the N-drift region. If the thickness of the gate region and anode region was less than 1% of the total thickness of the model, the process was returned to step one to increase the thickness of the entire model and thus increase the overall device size.

[0028] Furthermore, step seven includes:

[0029] Add a system section to the Sdevice code area, and use a node table in the system section to construct a pulse test circuit consisting of a main circuit with an external 1Ω resistive load and a gate pulse circuit with an external 0.1Ω current-limiting resistor. Use Sdevice's Transient dynamic simulation solution method to simulate the activation of the model. First, set the piecewise linear model of the anode voltage source. The piecewise linear model only needs to declare the inflection points in the waveform. The rest of the Sdevice system will automatically take values ​​according to the line segments connected between the points. The inflection points of the piecewise linear model of the anode voltage source are 0, 1kV and -1kV. The anode voltage source rises from 0 to 1kV within a certain time, lasts for a certain time, and then drops to -1kV within a certain time. The certain time is a preset time.

[0030] Then, a piecewise linear model of the gate voltage source is set up. The gate voltage source has an instantaneous pulse waveform during the period when the anode voltage source is 1kV. This pulse also lasts for a period of time and returns to zero before the anode voltage starts to drop.

[0031] Observe the anode current-time curve and gate current-time curve in the simulation results. If the anode current rapidly rises to 1kA after the gate current pulse is applied and remains at 1kA after the instantaneous gate pulse returns to zero, then the dynamic switching characteristics of the model are considered correct, and the UHVDC thyristor modeling is complete. If there are problems with the above characteristics, return to step three to adjust the doping concentration or doping range of the anode and gate regions. Adjusting according to the above scheme can effectively avoid the joint adjustment of multiple parameters and quickly obtain a model that meets the withstand voltage and trigger turn-on characteristics of the UHVDC thyristor.

[0032] This invention also provides a TCAD-based modeling device for UHVDC converter valve thyristors, the device comprising:

[0033] The geometry modeling module is used to model the geometric structure of thyristors in the SDE tool integrated with TCAD;

[0034] The electrode contact module is used to set the electrode contact surface and contact material of the thyristor model in the SDE tool;

[0035] The doping setting module is used in SDE to first apply low-concentration N-type doping to the thyristor model, and then apply Gaussian doping superposition to complete the division of the anode region, gate region and cathode region;

[0036] The mesh generation module is used to mesh the model in SDE;

[0037] The physics parameter declaration module is used to declare physics parameter models in Sdevice to describe physical processes;

[0038] The static characteristic verification module is used to verify the static blocking characteristics of the model using quasi-static scan simulation in Sdevice. If the static blocking characteristics are correct, proceed to the next step; otherwise, return to step three to reduce the doping concentration of the N-drift region and the doping depth of other regions, or increase the overall device size in step one.

[0039] The dynamic characteristic verification module is used to build a pulse test circuit in Sdevice and use dynamic simulation to verify the dynamic on-off characteristics of the model under gate current pulse. If the dynamic on-off characteristics are correct, the UHVDC thyristor modeling is completed; otherwise, return to step three to adjust the doping concentration or doping range of the anode and gate regions.

[0040] Furthermore, the geometric modeling module is also used for:

[0041] Based on the physical dimensions of the thyristor chip or the chip dimensions given in the thyristor device manual, perform geometric modeling of the thyristor chip in the SDE tool integrated with TCAD.

[0042] Furthermore, the electrode contact module is also used for:

[0043] In the SDE tool, the thyristor model is divided into cathode region, gate region, base region, and anode region from top to bottom. The entire lower surface of the anode region in the X-axis direction is set as anode contact, the entire upper surface of the cathode region in the X-axis direction is set as cathode contact, and a portion of the upper surface of the gate region in the X-axis direction is set as gate contact. A 15% surface area between the gate contact and the cathode contact is left as an electrode-free contact area, and the contact material is set to aluminum. The X-axis is the width direction of the thyristor model, and the Y-axis is the thickness direction of the thyristor model.

[0044] Furthermore, the doping setting module is also used for:

[0045] In the SDE tool, firstly, a low concentration of uniform N-type doping is applied to the entire geometry. Then, Gaussian doping baselines are set on the boundaries of each region away from the center. Finally, based on the Gaussian doping baselines, Gaussian doping is applied in the direction of the N-drift region, with P-type doping applied to the anode and gate regions and N-type doping applied to the cathode region.

[0046] Furthermore, the mesh generation module is also used for:

[0047] In the non-PN junction direction, the maximum grid size is set to 1 / 8 of the device size in that direction. In the PN junction direction, the maximum grid size is set to approximately 1 / 30 of that direction. The minimum grid size is used at the PN junction and electrode contact points. The grid size at the minimum grid point expands to the maximum grid size at a rate of 1.3 times the expansion rate in the direction away from the PN junction.

[0048] Furthermore, the physical parameter declaration module is also used for:

[0049] In the Physics section of the Sdevice code area, declare the physical parameter models used for simulation solutions. The physical parameter models are mobility models, carrier transport models, and carrier generation and recombination models. Among them, the mobility model declares at least the default doping model and the carrier saturation model of silicon, the carrier transport model declares at least the bandgap narrowing model, and the carrier generation and recombination model declares at least the SRH recombination, Auger recombination, and avalanche ionization models.

[0050] Furthermore, the static characteristic verification module is also used for:

[0051] The static blocking characteristics of the model were verified using the Quasi-static scanning method of Sdevice. The initial anode voltage condition was set to 0, and two-step Quasi-static solution boundary conditions were set. The first solution boundary condition was an anode voltage of 1kV, and the second solution boundary condition was an anode voltage of -1kV. The anode current-anode voltage curve in the simulation results was observed. If the anode current did not exceed 50mA, the positive blocking characteristic was considered correct, and the next step was performed. Otherwise, the doping concentration of the N-drift region and the doping depth of other regions in step three were reduced, or the overall device size in step one was increased.

[0052] Furthermore, the dynamic characteristic verification module is also used for:

[0053] Add a system section to the Sdevice code area, and use a node table in the system section to construct a pulse test circuit consisting of a main circuit with an external 1Ω resistive load and a gate pulse circuit with an external 0.1Ω current-limiting resistor. Use Sdevice's Transient dynamic simulation solution method to simulate the activation of the model. First, set the piecewise linear model of the anode voltage source. The piecewise linear model only needs to declare the inflection points in the waveform. The rest of the Sdevice system will automatically take values ​​according to the line segments connected between the points. The inflection points of the piecewise linear model of the anode voltage source are 0, 1kV and -1kV. The anode voltage source rises from 0 to 1kV within a certain time, lasts for a certain time, and then drops to -1kV within a certain time. The certain time is a preset time.

[0054] Then, a piecewise linear model of the gate voltage source is set up. The gate voltage source has an instantaneous pulse waveform during the period when the anode voltage source is 1kV. This pulse also lasts for a period of time and returns to zero before the anode voltage starts to drop.

[0055] Observe the anode current-time curve and the gate current-time curve in the simulation results. If the anode current rises rapidly to 1kA after the gate current pulse is applied and remains at 1kA after the instantaneous gate pulse returns to zero, then the dynamic switching characteristics of the model are considered to be correct, and the UHVDC thyristor modeling is completed. If there are problems with the above characteristics, return to step three to adjust the doping concentration or doping range of the anode and gate regions.

[0056] The advantages of this invention are:

[0057] (1) This invention does not require existing internal device structure or existing device TCAD model. Instead, it relies on semiconductor physics principles and the external characteristics given in the device datasheet to build a UHVDC thyristor model that conforms to static blocking characteristics and dynamic switching characteristics. This enables the monitoring of thyristors in the converter station and promotes the exploration of the current carrying capacity boundary of the converter station.

[0058] (2) If the surface size between the cathode and the gate is too large, it will lead to uneven distribution of the internal electric field, affecting the accuracy of subsequent device characteristic simulation. If the surface size between the cathode and the gate is too small, it will lead to incomplete gate triggering, which will cause the model to fail to reflect the triggering and conduction mechanism. In this invention, a non-contact area of ​​about 15% of the surface size is left between the cathode and the gate to prevent the gate pulse from failing to spread effectively, prevent the formation of positive feedback for thyristor turn-on, and avoid the model failing to simulate the thyristor turn-on process.

[0059] (3) The mesh setting method proposed in this invention selects different densities for different regions. Small-size (high-density) meshes are used for different doped contact regions (i.e., near the PN junction) that mainly affect the electrical characteristics of the device, ensuring the accuracy of subsequent electrical characteristic simulation. Large-size (small) density meshes are used in other regions, increasing the calculation speed.

[0060] (4) The lack of physical models can lead to a mismatch between the characteristics of the model and the device under certain specific operating conditions. Declaring too many physical models can lead to difficulty in numerical solution convergence and make it impossible to obtain a TCAD model that can be used for characteristic simulation. This invention declares several physical parameter models that are closely related to the thyristor model, avoiding the mismatch of characteristics due to too few physical parameter models and avoiding the difficulty in convergence due to too many physical parameter models.

[0061] (5) The premise of modeling is that the device process flow, process parameters and internal structural parameters are unknown, and there is no ready-made model. However, the SDE tool is a modeling method that directly sets parameters. This invention uses the SDE tool for modeling, which does not require ready-made device internal structure or ready-made device TCAD model. It can directly rely on semiconductor physical principles and the external characteristics given in the device datasheet to complete the modeling. Attached Figure Description

[0062] Figure 1 This is a flowchart of the TCAD-based UHVDC converter valve thyristor modeling method provided in Embodiment 1 of the present invention;

[0063] Figure 2 This is a schematic diagram of the thyristor model geometry and contact settings in the TCAD-based UHVDC converter valve thyristor modeling method provided in Embodiment 1 of the present invention.

[0064] Figure 3 This is a schematic diagram of the regions and contact divisions of the thyristor model in the TCAD-based UHVDC converter valve thyristor modeling method provided in Embodiment 1 of the present invention.

[0065] Figure 4 This is a doping distribution diagram of the thyristor model in the TCAD-based UHVDC converter valve thyristor modeling method provided in Embodiment 1 of the present invention;

[0066] Figure 5 This is a mesh distribution diagram of the thyristor model in the TCAD-based UHVDC converter valve thyristor modeling method provided in Embodiment 1 of the present invention;

[0067] Figure 6 This is a schematic diagram of the thyristor static characteristic simulation circuit in the TCAD-based UHVDC converter valve thyristor modeling method provided in Embodiment 1 of the present invention;

[0068] Figure 7 This is a simulation result of the static characteristics of the thyristor in the TCAD-based UHVDC converter valve thyristor modeling method provided in Embodiment 1 of the present invention;

[0069] Figure 8 This is a schematic diagram of the thyristor dynamic characteristic simulation circuit in the TCAD-based UHVDC converter valve thyristor modeling method provided in Embodiment 1 of the present invention.

[0070] Figure 9 The figure shows the simulation results of the dynamic characteristics of the thyristor in the TCAD-based UHVDC converter valve thyristor modeling method provided in Embodiment 1 of the present invention. Detailed Implementation

[0071] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0072] Example 1

[0073] like Figure 1 As shown, a TCAD-based modeling method for UHVDC converter valve thyristors is described, the method comprising:

[0074] Step 1: Model the geometric structure of the thyristor in the SDE tool integrated with TCAD;

[0075] Step 2: Set the electrode contact surface and contact material of the thyristor model in the SDE tool;

[0076] Step 3: In SDE, first apply low-concentration N-type doping to the thyristor model, then apply Gaussian doping superposition to complete the division of the anode region, gate region, and cathode region;

[0077] Step 4: Mesh the model in SDE;

[0078] Step 5: Declare the physical parameter model in Sdevice to describe the physical process;

[0079] Step 6: Use quasi-static scan simulation in Sdevice to verify the static blocking characteristics of the model. If the static blocking characteristics are correct, proceed to the next step; otherwise, return to step 3 and reduce the doping concentration of the N-drift region and the doping depth of other regions, or increase the overall device size in step 1.

[0080] Step 7: Build a pulse test circuit in Sdevice and use dynamic simulation to verify the dynamic switching characteristics of the model under gate current pulse. If the dynamic switching characteristics are correct, the UHVDC thyristor modeling is complete; otherwise, return to step 3 to adjust the doping concentration or doping range of the anode and gate regions.

[0081] The above is just the modeling idea of ​​this invention. The following is a detailed introduction to the modeling process of this invention through specific examples. According to the modeling process proposed in this invention, a UHVDC thyristor TCAD model that can withstand 8.5kV forward and reverse anode voltages and can simulate dynamic characteristics is established.

[0082] First, create a new project in Sentaurus TCAD and add the SDE tool.

[0083] Referring to the cross-section of a typical cylindrical thyristor chip, a rectangle with a width of 400μm and a thickness of 1240μm was created, and its material was declared as "Silicon". In the SDE tool, the thyristor model was divided into cathode, gate, base, and anode regions from top to bottom. The entire lower surface of the anode region along the X-axis was set as an anode contact, the entire upper surface of the cathode region along the X-axis was set as a cathode contact, and the upper surface of the gate region along the X-axis was set as a gate contact. A 15% surface area was left between the gate and cathode contacts as a no-electrode contact region, with the contact material set to aluminum. Specifically, a silicon rectangle with a width of 180μm and a thickness of 10μm was created on one side of the rectangle as the cathode contact. The created geometry is shown below. Figure 2 As shown. Figure 3 As shown, if the base region is divided according to the actual modeling dimensions, it is very thick while other regions are very thin, making it difficult to clearly display the contact settings. Therefore, in order to clearly show the specific locations of the gate contact, cathode contact, and anode contact, they are drawn separately. Figure 3 The diagram illustrates the contact division. Figure 3 In the diagram, L1 represents the X-axis dimension of the thyristor model, L2 represents the X-axis dimension of the cathode region, the X-axis is the width direction of the thyristor model, and the Y-axis is the thickness direction of the thyristor model. Figure 3 The dimensions shown are not the actual dimensions. Figure 3 In the diagram, 1 is the cathode contact, 2 is the gate contact, 3 is the anode contact, 4 is the cathode region, 5 is the gate region, 6 is the base region, and 7 is the anode region.

[0084] Use the "Find-face-id" statement to obtain the boundary location of the contacts. Set the anode contact on the face containing point (200, 1250). Set the gate contact on the face containing point (40, 10), and the cathode contact on the face containing point (200, 0). The gate contact width is 80 μm, the non-contact area width on the gate-cathode surface is 30 μm, and the anode contact width is 400 μm, which is the entire surface at the other end of the gate-cathode surface. Figure 4 In the diagram, the purple bars at the upper and lower boundaries of the geometric structure represent the contact points.

[0085] A two-dimensional region with dimensions of 401μm × 1251μm was created to cover a rectangular silicon material region, and this region was named "R.Global" as the doping application region. Doping was applied to the model according to empirical parameters and literature reference parameters. Specifically, the highest and lowest doping concentrations and doping ranges of each region used in this embodiment are shown in Table 1.

[0086] Table 1 Doping-related parameters

[0087] Area Name Doping type Doping range / μm highest doping concentration Minimum doping concentration P+ Anode Region Gaussian doping (boron) 18 1e18 2e16 N-Drift Zone Uniform doping (phosphorus) 1240 1e13 1e13 P-gate region Gaussian doping (boron) 130 2e16 1e13 N+ cathode region Gaussian doping (phosphorus) 12 1e20 2e16

[0088] After doping, an N- drift region with a thickness of 1092 μm, a P+ anode region with a thickness of 18 μm, a P-gate region with a thickness of 130 μm (the portion of which in contact with the N+ cathode region is affected by the N+ cathode region doping for 2 μm), and an N+ cathode region with a thickness of 12 μm were actually formed. A schematic diagram of the doping results is shown below. Figure 4 As shown.

[0089] The region "R.Global" is used as the applied mesh region. According to the mesh generation standard, the maximum mesh size is set to 50 μm (400 * 1 / 8 = 50) in the X-axis direction, 40 μm (1240 * 1 / 30 ≈ 40) in the Y-axis direction, and 1 μm in the Z-axis direction. The minimum mesh size is 1 μm in all coordinate axes. A minimum mesh size of 1 μm × 1 μm × 1 μm is used at the boundary between different doping concentrations. The keywords "Maxlatent" and "Doubleside" are declared to indicate bidirectional mesh expansion, and "1.3" is declared as the expansion rate. The mesh generation result is as follows. Figure 5 As shown.

[0090] Add the Sdevice tool to the project for declaring physical parameter models, setting solution methods, and performing characteristic simulations.

[0091] In the file section of the Sdevice code block, specify Grid as the .tdr file generated by SDE, specify Plot as the .plot file generated by SDE, specify Plot as the .tdrdat file generated by SDE, and specify Output as the default .log file.

[0092] In the Physics section of the Sdevice code block, declare the physical parameter models used for simulation. Using keywords for each physical parameter model, declare the default doping model (DopingDependent), the carrier saturation model (High-Field Saturation), the bandgap narrowing model (Bandgapnarrowing), SRH recombination, Auger recombination, and the avalanche model (eAvalanche).

[0093] In the Electrode section of the Sdevice code area, the initial voltage conditions for the anode, cathode, and gate contacts are set to 0, and the contact material is declared as Aluminium.

[0094] In the Math section of the Sdevice code, the keyword for exiting on automatic solution failure (Extrapolate) is declared, the maximum number of iterations is declared to be 50 (Iterations = 50), and the numerical solution method is declared to be ParDiso (Method = ParDiso).

[0095] In the Solve section of the Sdevice codebase, the software Quasi stationary is used to solve the macro code. The Goal of the first solver code is set to: {name="anode" Voltage=1000}, and the Goal of the second solver code is set to: {name="anode" Voltage=-1000}. Other simulation settings can use the macro default settings. The equivalent simulation circuit diagram is as follows: Figure 6 As shown.

[0096] After the simulation, open the .plt file under the Sdevice case block using Svisual software. Plot the simulation results with anode voltage on the x-axis and anode total current on the y-axis. A correct simulation result is shown below. Figure 7 As shown, the model exhibits a leakage current of only 50mA under anode withstand voltages ranging from -8500V to 8500V, demonstrating that the model possesses the ability to block forward and reverse anode voltages of a thyristor.

[0097] Add a second Sdevice tool to the project for dynamic on / off characteristic simulation.

[0098] Add a system section to the Sdevice code segment, and construct the system section using a node table as follows: Figure 8 The simulation circuit is shown. Each component in the circuit uses a self-named node number to indicate its connection position. Resistors are declared directly in the parameter section. Anode voltage source V d and gate voltage source V g The parameter part is described using a piecewise linear model (Pwl). The piecewise linear model only requires declaring the inflection points in the waveform; the system will automatically assign values ​​to the remaining parts based on the line segments connecting these points. Anode voltage source voltage V d The voltage is set to 8500V using the Quasi stationary method. A gate pulse with a peak voltage of 1V occurring at t=100μs, a rise time of 0.1μs, a peak duration of 50μs, a total duration of 80μs, and a peak voltage of 1V is represented by declaring {pwl=(0 0 100 0 100.1 1 150 1 180 0)} in the gate voltage source parameter section.

[0099] In the Math section of Sdevice, declare the transient solution keyword (Transient = BE).

[0100] In the Solve section of Sdevice, use the Transient solver macro code, set the final simulation time to 250μs, and leave the other parameters at their default settings before running the simulation.

[0101] After the simulation, open the .plt file under the Sdevice case block using Svisual software. Plot the simulation results with time on the x-axis and anode total current on the y-axis. A correct simulation result is shown below. Figure 9 As shown, at t = 100 μs, the thyristor successfully turns on after the gate pulse, and the anode current reaches approximately 8500 A, which matches the main circuit voltage source and impedance settings. After t = 180 μs, the gate pulse has been removed, but the thyristor model remains on.

[0102] In summary, the TCAD model can be considered to accurately reflect the static forward and reverse blocking characteristics and dynamic turn-on characteristics of UHVDC thyristors, thus realizing UHVDC thyristor modeling based on physical mechanisms.

[0103] Example 2

[0104] Based on Embodiment 1, Embodiment 2 of the present invention also provides a TCAD-based UHVDC converter valve thyristor modeling device, the device comprising:

[0105] The geometry modeling module is used to model the geometric structure of thyristors in the SDE tool integrated with TCAD;

[0106] The electrode contact module is used to set the electrode contact surface and contact material of the thyristor model in the SDE tool;

[0107] The doping setting module is used in SDE to first apply low-concentration N-type doping to the thyristor model, and then apply Gaussian doping superposition to complete the division of the anode region, gate region and cathode region;

[0108] The mesh generation module is used to mesh the model in SDE;

[0109] The physics parameter declaration module is used to declare physics parameter models in Sdevice to describe physical processes;

[0110] The static characteristic verification module is used to verify the static blocking characteristics of the model using quasi-static scan simulation in Sdevice. If the static blocking characteristics are correct, proceed to the next step; otherwise, return to step three to reduce the doping concentration of the N-drift region and the doping depth of other regions, or increase the overall device size in step one.

[0111] The dynamic characteristic verification module is used to build a pulse test circuit in Sdevice and use dynamic simulation to verify the dynamic on-off characteristics of the model under gate current pulse. If the dynamic on-off characteristics are correct, the UHVDC thyristor modeling is completed; otherwise, return to step three to adjust the doping concentration or doping range of the anode and gate regions.

[0112] Specifically, the geometric modeling module is also used for:

[0113] Based on the physical dimensions of the thyristor chip or the chip dimensions given in the thyristor device manual, perform geometric modeling of the thyristor chip in the SDE tool integrated with TCAD.

[0114] More specifically, the electrode contact module is also used for:

[0115] In the SDE tool, the thyristor model is divided into cathode region, gate region, base region, and anode region from top to bottom. The entire lower surface of the anode region in the X-axis direction is set as anode contact, the entire upper surface of the cathode region in the X-axis direction is set as cathode contact, and the upper surface of the gate region in the X-axis direction is set as gate contact. A 15% surface area between the gate contact and the cathode contact is left as an electrode-free contact area, and the contact material is set to aluminum. The X-axis is the width direction of the thyristor model, and the Y-axis is the thickness direction of the thyristor model.

[0116] More specifically, the doping setting module is also used for:

[0117] In the SDE tool, firstly, a low concentration of uniform N-type doping is applied to the entire geometry. Then, Gaussian doping baselines are set on the boundaries of each region away from the center. Finally, based on the Gaussian doping baselines, Gaussian doping is applied in the direction of the N-drift region, with P-type doping applied to the anode and gate regions and N-type doping applied to the cathode region.

[0118] More specifically, the mesh generation module is also used for:

[0119] In the non-PN junction direction, the maximum grid size is set to 1 / 8 of the device size in that direction. In the PN junction direction, the maximum grid size is set to approximately 1 / 30 of that direction. The minimum grid size is used at the PN junction and electrode contact points. The grid size at the minimum grid point expands to the maximum grid size at a rate of 1.3 times the expansion rate in the direction away from the PN junction.

[0120] More specifically, the physical parameter declaration module is also used for:

[0121] In the Physics section of the Sdevice code area, declare the physical parameter models used for simulation solutions. The physical parameter models are mobility models, carrier transport models, and carrier generation and recombination models. Among them, the mobility model declares at least the default doping model and the carrier saturation model of silicon, the carrier transport model declares at least the bandgap narrowing model, and the carrier generation and recombination model declares at least the SRH recombination, Auger recombination, and avalanche ionization models.

[0122] More specifically, the static characteristic verification module is also used for:

[0123] The static blocking characteristics of the model were verified using the Quasi-static scanning method of Sdevice. The initial anode voltage condition was set to 0, and two-step Quasi-static solution boundary conditions were set. The first solution boundary condition was an anode voltage of 1kV, and the second solution boundary condition was an anode voltage of -1kV. The anode current-anode voltage curve in the simulation results was observed. If the anode current did not exceed 50mA, the positive blocking characteristic was considered correct, and the next step was performed. Otherwise, the doping concentration of the N-drift region and the doping depth of other regions in step three were reduced, or the overall device size in step one was increased.

[0124] More specifically, the dynamic characteristic verification module is also used for:

[0125] Add a system section to the Sdevice code area, and use a node table in the system section to construct a pulse test circuit consisting of a main circuit with an external 1Ω resistive load and a gate pulse circuit with an external 0.1Ω current-limiting resistor. Use Sdevice's Transient dynamic simulation solution method to simulate the activation of the model. First, set the piecewise linear model of the anode voltage source. The piecewise linear model only needs to declare the inflection points in the waveform. The rest of the Sdevice system will automatically take values ​​according to the line segments connected between the points. The inflection points of the piecewise linear model of the anode voltage source are 0, 1kV and -1kV. The anode voltage source rises from 0 to 1kV within a certain time, lasts for a certain time, and then drops to -1kV within a certain time. The certain time is a preset time.

[0126] Then, a piecewise linear model of the gate voltage source is set up. The gate voltage source has an instantaneous pulse waveform during the period when the anode voltage source is 1kV. This pulse also lasts for a period of time and returns to zero before the anode voltage starts to drop.

[0127] Observe the anode current-time curve and the gate current-time curve in the simulation results. If the anode current rises rapidly to 1kA after the gate current pulse is applied and remains at 1kA after the instantaneous gate pulse returns to zero, then the dynamic switching characteristics of the model are considered to be correct, and the UHVDC thyristor modeling is completed. If there are problems with the above characteristics, return to step three to adjust the doping concentration or doping range of the anode and gate regions.

[0128] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A TCAD-based modeling method for thyristors in UHVDC converter valves, characterized in that, The method includes: Step 1: Model the geometric structure of the thyristor in the SDE tool integrated with TCAD; Step 2: Set the electrode contact surface and contact material of the thyristor model in the SDE tool; In the SDE tool, the thyristor model is divided into cathode, gate, base, and anode regions from top to bottom. The entire lower surface of the anode region along the X-axis is set as anode contacts, the entire upper surface of the cathode region along the X-axis is set as cathode contacts, and a portion of the upper surface of the gate region along the X-axis is set as gate contacts. A 15% surface area between the gate and cathode contacts is left as an electrode-free contact area, and the contact material is set to aluminum. The X-axis represents the width of the thyristor model, and the Y-axis represents the thickness of the thyristor model. Step 3: In SDE, first apply low-concentration N-type doping to the thyristor model, then apply Gaussian doping superposition to complete the division of the anode region, gate region, and cathode region; Step 4: Mesh the model in SDE; Step 5: Declare the physical parameter model in Sdevice to describe the physical process; Step 6: Use quasi-static scan simulation in Sdevice to verify the static blocking characteristics of the model. If the static blocking characteristics are correct, proceed to the next step; otherwise, return to step 3 and reduce the doping concentration of the N-drift region and the doping depth of other regions, or increase the overall device size in step 1. Step 7: Build a pulse test circuit in Sdevice and use dynamic simulation to verify the dynamic switching characteristics of the model under gate current pulse. If the dynamic switching characteristics are correct, the UHVDC thyristor modeling is complete; otherwise, return to step 3 to adjust the doping concentration or doping range of the anode and gate regions.

2. The TCAD-based modeling method for UHVDC converter valve thyristors according to claim 1, characterized in that, Step one includes: Based on the physical dimensions of the thyristor chip or the chip dimensions given in the thyristor device manual, perform geometric modeling of the thyristor chip in the SDE tool integrated with TCAD.

3. The TCAD-based modeling method for UHVDC converter valve thyristors according to claim 1, characterized in that, Step three includes: In the SDE tool, firstly, a low concentration of uniform N-type doping is applied to the entire geometry. Then, Gaussian doping baselines are set on the boundaries of each region away from the center. Finally, based on the Gaussian doping baselines, Gaussian doping is applied in the direction of the N-drift region, with P-type doping applied to the anode and gate regions and N-type doping applied to the cathode region.

4. The TCAD-based modeling method for UHVDC converter valve thyristors according to claim 3, characterized in that, Step four includes: In the non-PN junction direction, the maximum grid size is set to 1 / 8 of the device size in that direction. In the PN junction direction, the maximum grid size is set to 1 / 30 of that direction. The minimum grid size is used at the PN junction and electrode contact. The grid size at the minimum grid size is expanded at 1.3 times the expansion rate in the direction away from the PN junction to the maximum grid size.

5. The TCAD-based modeling method for UHVDC converter valve thyristors according to claim 4, characterized in that, Step five includes: In the Physics section of the Sdevice code area, declare the physical parameter models used for simulation solutions. The physical parameter models are mobility models, carrier transport models, and carrier generation and recombination models. Among them, the mobility model declares at least the default doping model and the carrier saturation model of silicon, the carrier transport model declares at least the bandgap narrowing model, and the carrier generation and recombination model declares at least the SRH recombination, Auger recombination, and avalanche ionization models.

6. The TCAD-based modeling method for UHVDC converter valve thyristors according to claim 5, characterized in that, Step six includes: The static blocking characteristics of the model were verified using the Quasi-static scanning method of Sdevice. The initial anode voltage condition was set to 0, and two-step Quasi-static solution boundary conditions were set. The first solution boundary condition was an anode voltage of 1kV, and the second solution boundary condition was an anode voltage of -1kV. The anode current-anode voltage curve in the simulation results was observed. If the anode current did not exceed 50mA, the positive blocking characteristic was considered correct, and the next step was performed. Otherwise, the doping concentration of the N-drift region and the doping depth of other regions in step three were reduced, or the overall device size in step one was increased.

7. The TCAD-based modeling method for UHVDC converter valve thyristors according to claim 6, characterized in that, Step seven includes: Add a system section to the Sdevice code area, and use a node table in the system section to construct a pulse test circuit consisting of a main circuit with an external 1Ω resistive load and a gate pulse circuit with an external 0.1Ω current-limiting resistor. Use Sdevice's Transient dynamic simulation solution method to simulate the activation of the model. First, set the piecewise linear model of the anode voltage source. The piecewise linear model only needs to declare the inflection points in the waveform. The rest of the Sdevice system will automatically take values ​​according to the line segments connected between the points. The inflection points of the piecewise linear model of the anode voltage source are 0, 1kV and -1kV. The anode voltage source rises from 0 to 1kV within a preset time, continues for a preset time, and then falls to -1kV within a preset time. The preset time is a preset time. Then, a piecewise linear model of the gate voltage source is set up. The gate voltage source has an instantaneous pulse waveform during the period when the anode voltage source is 1kV. This pulse also lasts for a period of time and returns to zero before the anode voltage starts to drop. Observe the anode current-time curve and the gate current-time curve in the simulation results. If the anode current rises rapidly to 1kA after the gate current pulse is applied and remains at 1kA after the instantaneous gate pulse returns to zero, then the dynamic switching characteristics of the model are considered to be correct, and the UHVDC thyristor modeling is completed. If there are problems with the above characteristics, return to step three to adjust the doping concentration or doping range of the anode and gate regions.

8. A TCAD-based modeling device for UHVDC converter valve thyristors, characterized in that, The device includes: The geometry modeling module is used to model the geometric structure of thyristors in the SDE tool integrated with TCAD; The electrode contact module is used to set the electrode contact surface and contact material of the thyristor model in the SDE tool; In the SDE tool, the thyristor model is divided into cathode, gate, base, and anode regions from top to bottom. The entire lower surface of the anode region along the X-axis is set as anode contacts, the entire upper surface of the cathode region along the X-axis is set as cathode contacts, and a portion of the upper surface of the gate region along the X-axis is set as gate contacts. A 15% surface area between the gate and cathode contacts is left as an electrode-free contact area, and the contact material is set to aluminum. The X-axis represents the width of the thyristor model, and the Y-axis represents the thickness of the thyristor model. The doping setting module is used in SDE to first apply low-concentration N-type doping to the thyristor model, and then apply Gaussian doping superposition to complete the division of the anode region, gate region and cathode region; The mesh generation module is used to mesh the model in SDE; The physics parameter declaration module is used to declare physics parameter models in Sdevice to describe physical processes; The static characteristic verification module is used to verify the static blocking characteristics of the model using quasi-static scan simulation in Sdevice. If the static blocking characteristics are correct, proceed to the next step; otherwise, return to step three to reduce the doping concentration of the N-drift region and the doping depth of other regions, or increase the overall device size in step one. The dynamic characteristic verification module is used to build a pulse test circuit in Sdevice and use dynamic simulation to verify the dynamic on-off characteristics of the model under gate current pulse. If the dynamic on-off characteristics are correct, the UHVDC thyristor modeling is completed; otherwise, return to step three to adjust the doping concentration or doping range of the anode and gate regions.

9. The TCAD-based UHVDC converter valve thyristor modeling device according to claim 8, characterized in that, The geometric modeling module is also used for: Based on the physical dimensions of the thyristor chip or the chip dimensions given in the thyristor device manual, perform geometric modeling of the thyristor chip in the SDE tool integrated with TCAD.

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