A flip-chip alignment structure for a focal plane array detector

By using self-aligning methods of bumps and limit structures in the flip alignment structure of the focal plane array detector, the problem of low alignment accuracy and yield under small center distance is solved, and high-precision pixel interconnection and batch production are achieved.

CN115458544BActive Publication Date: 2025-05-30WUHAN GAOXIN TECH
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Patent Information

Application Number
CN202211190849.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-09-28
Publication Date
2025-05-30
Estimated Expiration
2042-09-28

AI Technical Summary

Technical Problem

The prior art is difficult to effectively manufacture focal plane array detectors at a center distance below 10 μm, mainly due to the difficulty of processing and high alignment accuracy requirements of small bumps, resulting in low product yield and difficult to mass production.

Method used

A flip alignment structure is designed, by setting corresponding bumps and limit structures on the readout circuit and the photosensitive array, self-alignment is achieved by using the side-slip action of bumps and limit structures to ensure the precise alignment of bumps connected to pixels.

Benefits of technology

Through the self-alignment structure, the alignment accuracy can be effectively improved, and the accurate alignment of pixel interconnected convex points can be ensured, thus achieving batch preparation of a focal plane array detector below 10μm.

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Abstract

The present invention belongs to the field of optoelectronic technology, and particularly relates to a flip-chip alignment structure of a focal plane array detector. The flip-chip bonding structure of the present invention includes a bump-limiting structure with a self-alignment effect. The bump-limiting structure can convert the adverse factor of the lateral sliding of pixel interconnection bumps in the traditional flip-chip bonding process into a favorable condition, enabling the photosensitive array and the readout circuit to achieve self-alignment, thereby completing the precise alignment and flip-chip bonding of the pixel interconnection structures of the two, and capable of batch-producing focal plane array detectors with a center pitch of less than 10 μm.
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Description

Technical Field

[0001] The present invention belongs to the field of optoelectronic technology, and particularly relates to a flip-chip alignment structure of a focal plane array detector. Background Art

[0002] With the continuous improvement of the demand for detectors in infrared imaging systems, infrared focal plane detectors have achieved rapid development in recent years. A focal plane detector is a focal plane component that mechanically and electrically connects a photosensitive chip detection element to the input end of a corresponding readout circuit. Flip-chip bonding is a commonly used packaging technology in the manufacturing process of infrared focal plane detectors, which can conveniently achieve mechanical and electrical connections between chips, and has the advantages of high precision, small occupied volume of the formed hybrid integrated chip, high input-output density, short interconnection lines, and small lead parasitic parameters.

[0003] After several generations of product development, staring planar arrays have completely replaced line-scanning in recent years, and the scale of the planar array is getting larger and the pixel center pitch is getting smaller. For a center pitch of less than 10 μm, it is very difficult to process products with conventional flip-chip bonding interconnection technology. Even if a few samples can be made occasionally, the product yield is very low and mass production and commercialization cannot be achieved. This is because, after the center pitch becomes smaller, the interconnecting bumps will also become smaller, which will lead to two problems: one is that the processing difficulty of the bumps themselves becomes larger, the yield of semi-finished products is low, and the quality is uncontrollable; the other is that small bumps have very high requirements for alignment accuracy during flip-chip bonding, and the flip-chip bonding interconnection difficulty between the photosensitive array and the readout circuit increases exponentially.

[0004] Therefore, there is a need for a solution to solve the above technical problems in the prior art. Summary of the Invention

[0005] The present invention provides a flip-chip bonding structure and method with self-alignment for a small center pitch, which can at least solve some problems existing in the prior art.

[0006] To solve the above technical problems, according to one aspect of the present invention, the following technical solutions are provided:

[0007] A flip-chip alignment structure of a focal plane array detector, characterized in that it includes a readout circuit and a photosensitive array, one of the readout circuit and the photosensitive array is provided with bumps around the pixel interconnection structure, and the other is provided with a limiting structure around the pixel interconnection structure. The number and positions of the bumps and the limiting structure correspond to each other, and the readout circuit and the photosensitive array are flip-chip aligned through the bumps and the limiting structure.

[0008] As a preferred solution of the flip-chip alignment structure of a focal plane array detector according to the present invention, wherein: the bumps and the limiting structure are symmetrically distributed about the center of the corresponding area of the pixel interconnection structure.

[0009] As a preferred embodiment of the flip-chip alignment structure of a focal plane array detector according to the present invention, wherein: the size of the bumps and the limiting structure is larger than the size of the pixel interconnection structure.

[0010] As a preferred embodiment of the flip-chip alignment structure of a focal plane array detector according to the present invention, wherein: the bumps and the limiting structure include at least two size specifications, and the number of bumps or limiting structures with a smaller size is more than that of the adjacent bumps or limiting structures with a larger size.

[0011] As a preferred embodiment of the flip-chip alignment structure of a focal plane array detector according to the present invention, wherein: the size of the bumps or limiting structures with a larger size is 10%-30% higher than that of the adjacent bumps or limiting structures with a smaller size.

[0012] As a preferred embodiment of the flip-chip alignment structure of a focal plane array detector according to the present invention, wherein: along the direction of extending from the four corners of the readout circuit or the photosensitive array towards the middle along the edge, the size of the bumps or the limiting structure gradually decreases.

[0013] As a preferred embodiment of the flip-chip alignment structure of a focal plane array detector according to the present invention, wherein: the number of bumps or limiting structures with a smaller size is 4-20 times that of the adjacent bumps or limiting structures with a larger size.

[0014] As a preferred embodiment of the flip-chip alignment structure of a focal plane array detector according to the present invention, wherein: the shape of the bumps is selected from at least one of hemispherical, cylindrical, conical, and frustum-shaped.

[0015] As a preferred embodiment of a focal plane array according to the present invention, wherein: the limiting structure protrudes from the surface of the readout circuit or the photosensitive array.

[0016] As a preferred embodiment of a focal plane array according to the present invention, wherein: the limiting structure is a central concave structure, and the outer shape is circular or regular polygon.

[0017] As a preferred embodiment of the flip-chip alignment structure of a focal plane array detector according to the present invention, wherein: the material of the bumps is selected from at least one of In, PbSn, AuSn, and CuSn.

[0018] As a preferred embodiment of the flip-chip alignment structure of a focal plane array detector according to the present invention, wherein: the center distance d between adjacent bumps satisfies: d > (r 1 3 / 2 +r 2 3 / 2 ) / 2, where r 1 , r 2 are the diameters of adjacent bumps respectively.

[0019] The beneficial effects of the present invention are as follows:

[0020] The present invention converts the adverse factors that are difficult to align and flip-chip due to side-slip between pixel interconnect bumps during the traditional flip-chip process into favorable conditions. The present invention provides a flip-chip alignment structure for a focal plane array detector. The flip-chip alignment structure has a bump-limiting structure with a self-alignment effect. A series of bumps or limiting structures with gradually increasing sizes are fabricated on both sides of the photosensitive array and the readout circuit, and the bumps on one side and the limiting structures on the other side are concentric in design. During flip-chip bonding, the largest bump or limiting structure is used to complete rough alignment, and then pressure is applied. When the positions of the bump and the limiting structure are not completely concentric, the bump will press against one side of the limiting structure, thereby receiving an unbalanced horizontal force. This horizontal force causes the bump to have side-slip and drives the bump to move towards the center of the limiting structure, thus achieving the effect of self-alignment. After further applying pressure, the second smallest bump or limiting structure comes into contact and achieves self-alignment in the same way, and the self-alignment accuracy is higher than that of the relatively larger bump or limiting structure. Accordingly, through reasonable design, before the effective pixel bumps come into contact, precise alignment is completed through the self-alignment generated by the side-slip of the bumps or limiting structures, ensuring the accurate alignment of the pixel interconnect bumps, and enabling the batch preparation of focal plane array detectors with a center pitch of less than 10 μm. Description of the Drawings

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on the structures shown in these drawings.

[0022] Figure 1 It is a top view schematic diagram of the photosensitive array end of the present invention;

[0023] Figure 2 It is a top view schematic diagram of the readout circuit end of the present invention;

[0024] Figure 3 It is a side view schematic diagram of flip-chip alignment between the photosensitive array end and the readout circuit end of the present invention;

[0025] Figure 4 It is a side view schematic diagram of the lateral movement of the bump or limiting structure during the flip-chip bonding process of the present invention.

[0026] Explanation of the reference numerals in the drawings:

[0027] 1 - Photosensitive array, 2 - Readout circuit, 3 - Photosensitive array pixel interconnection bump, 4 - Readout circuit pixel interconnection bump, 51 - Limiting structure, 52 - Limiting structure, 53 - Limiting structure, 61 - Bump, 62 - Bump, 63 - Bump. Detailed implementation mode

[0028] The technical solutions in the embodiments will be described clearly and completely below. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0029] It should be noted that if there are directional indications (such as up, down, left, right, front, back...) in the embodiments of the present invention, the directional indications are only used to explain the relative position relationship and movement conditions between components in a specific posture (as shown in the drawings). If the specific posture changes, the directional indications will also change accordingly.

[0030] In addition, if there are descriptions such as "first", "second", etc. in the embodiments of the present invention, the descriptions of "first", "second", etc. are only for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions between various embodiments can be combined with each other, but it must be based on the ability of those of ordinary skill in the art to implement. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the protection scope required by the present invention.

[0031] The present invention provides a flip-chip alignment structure for a focal plane array detector, which can convert the adverse factor of the lateral sliding of pixel interconnection bumps in the traditional flip-chip soldering process into a favorable condition, enabling the photosensitive array and the readout circuit to achieve self-alignment, thereby completing the precise alignment and flip-chip soldering of the pixel interconnection bumps of the two, and being able to batch-produce focal plane array detectors with a center pitch of less than 10 μm.

[0032] A flip-chip alignment structure for a focal plane array detector, comprising a readout circuit and a photosensitive array. Pixel interconnection structures for connecting the detection elements of the photosensitive array to the corresponding readout circuits are provided on both the readout circuit and the photosensitive array. In this embodiment, the pixel interconnection structure is a pixel interconnection bump, and in other embodiments, it is not limited to the bump form and can also be other structural forms. Bumps are provided around the pixel interconnection structure on one of the readout circuit and the photosensitive array, and a limiting structure is provided around the pixel interconnection structure on the other of the readout circuit or the photosensitive array. The number and positions of the bumps and the limiting structure correspond to each other, and the readout circuit and the photosensitive array are flip-chip aligned through the bumps and the limiting structure.

[0033] There is no clear limitation on the setting positions of the bumps or the limiting structures on the readout circuit and the photosensitive array. Bumps or limiting structures can be provided on both the readout circuit and the photosensitive array, as long as it is ensured that the bumps or the limiting structures exist simultaneously during the flip-chip bonding process.

[0034] The bumps and the limiting structure are concentrically designed and symmetrically distributed around the center of the area corresponding to the pixel interconnection bumps, and their sizes are larger than the sizes of the pixel interconnection bumps. The setting manner of the bumps or the limiting structure can ensure that the in-plane rotation does not occur in the area of the area array during flip-chip bonding, which affects the alignment accuracy. In addition, during the flip-chip bonding process, the bumps or the limiting structure can come into contact prior to the pixel interconnection bumps, thereby producing the technical effect of self-alignment.

[0035] The bumps or the limiting structure include more than two size specifications, and the number of the bumps or the limiting structure with a smaller size is more than that of the adjacent bumps or the limiting structure with a larger size. The sizes of the bumps or the limiting structure gradually decrease and the number gradually increases along the edge from the four corners of the readout circuit or the photosensitive array towards the middle. Correspondingly, the number of the bumps or the limiting structure with a smaller size is 4 - 20 times that of the adjacent bumps or the limiting structure with a larger size. The reason for setting the number of the bumps and the limiting structure as above is that the side-slip force generated by the bumps or the limiting structure with a small size is small, and more of them are needed to generate sufficient lateral side-slip force to offset the fixing effect generated by the bumps or the limiting structure that has already come into contact, so as to achieve further lateral side-slip and enable further alignment of the pixel interconnection bumps. If the number of the bumps and the limiting structure is set too small, sufficient side-slip force cannot be generated, and if it is set too large, the area of the photosensitive array and the readout circuit will be occupied.

[0036] The bump and the limiting structure include more than two size specifications, and the number of bumps or limiting structures with smaller sizes is more than that of the adjacent bumps or limiting structures with larger sizes. The size of the bumps or limiting structures with larger sizes is 10%-30% higher than that of the adjacent bumps or limiting structures with smaller sizes. The sizes of adjacent bumps or limiting structures have a direct impact on the alignment of the pixel interconnection bumps. If the size difference is too small, it cannot achieve the effect of further improving the alignment accuracy. If the size difference is too large, when the smaller bumps or limiting structures start to come into contact, the larger ones are flattened too much and the fixing effect is too strong, making it difficult for further lateral relative movement and alignment to occur between the readout circuit and the photosensitive array, which also affects the alignment of the subsequent pixel interconnection bumps.

[0037] The shape of the bump is selected from hemispherical, cylindrical, conical, and frustum-shaped. The limiting structure is a central concave structure, and its shape matches that of the bump. The limiting structure is preferably arranged protruding from the surface of the readout circuit or the photosensitive array, which can correspondingly reduce the height of the bump and the manufacturing difficulty. The outer shape of the limiting structure is circular or regular polygon, and the specific shape can be a ring or a square, etc. The bump and the limiting structure are concentrically designed, and the alignment center is the geometric center of the shapes of the bump and the limiting structure.

[0038] A certain distance needs to be maintained between adjacent bumps to ensure that adjacent bumps are not affected after being flattened. The center distance d between adjacent bumps satisfies: d > (r 1 3 / 2 +r 2 3 / 2 ) / 2, where r 1 and r 2 are the diameters of adjacent bumps respectively.

[0039] The material of the bump is preferably made of a material that is easy to deform, so that the larger-sized bump is flattened after being pressurized, and the distance between the photosensitive array and the readout circuit becomes smaller, so that the smaller-sized bump can come into contact with the limiting structure and generate a self-alignment effect. The material of the bump can be selected from at least one of softer metals such as In, PbSn, AuSn, and CuSn.

[0040] Embodiment 1

[0041] This embodiment provides a flip-chip alignment structure for a focal plane array detector, including a readout circuit 2 and a photosensitive array 1. Bumps 61, 62, 63 or limiting structures 51, 52, 52 with corresponding numbers and positions are arranged around the pixel interconnection structure regions 3, 4 of the readout circuit 2 and the photosensitive array 1. When the readout circuit 2 and the photosensitive array 1 are flip-chip welded, self-aligning bumps or limiting structures are formed.

[0042] The bump points 61, 62, 63 or the limiting structures 51, 52, 52 are concentrically designed and symmetrically distributed around the centers of the corresponding regions of the pixel interconnect bump points. Their sizes are larger than the sizes of the bump points in the pixel interconnect structure regions 3, 4. The shapes of the bump points 61, 62, 63 are selected from at least one of hemispherical, cylindrical, conical, and frustum shapes. The material is preferably made of a material that is easily deformable. The limiting structure is a central concave structure, and the shape is selected from at least one of a circular ring and a square frame.

[0043] The bump points or the limiting structures include more than two size specifications. The number gradually increases from both sides to the middle. The number of the bump points or the limiting structures with smaller sizes is more than that of the adjacent bump points or the limiting structures with larger sizes. The number of the bump points or the limiting structures with smaller sizes is 4 - 20 times that of the adjacent bump points or the limiting structures with larger sizes. The size of the bump points or the limiting structures with larger sizes is 10% - 30% higher than that of the adjacent bump points or the limiting structures with smaller sizes.

[0044] Embodiment 2

[0045] In this embodiment, a 2024 * 2024 pixel focal plane detector with a pixel pitch of 10 μm is taken as an example to further illustrate the implementation method of the present invention.

[0046] A manufacturing method for a flip - chip alignment structure of a focal plane array detector includes the following steps:

[0047] (1) Preparation of the photosensitive array end

[0048] The limiting structure at the photosensitive array end is a circular ring structure of an Al (aluminum) photosensitive array. It includes 3 different size specifications, such as 51, 52, 53 in the appendix Figure 1 . The inner diameters of the limiting circular rings of each specification are different. The outer diameter has no effect on the limitation, so it does not need to be particularly considered. However, the heights of the circular rings are the same. The inner diameters of the 3 different specifications of limiting circular rings are 12 μm, 9 μm, and 6 μm in sequence, and the height is 5 μm for all. The number of the rings is 40, 400, and 4000 in sequence, and they are evenly distributed in the edge region with the center of the photosensitive array as the geometric center.

[0049] The circular - ring - shaped limiting structure is realized through conventional processes such as photolithography, coating, and stripping.

[0050] (2) Preparation of the read - out circuit end

[0051] The read - out circuit end is a bump structure. The shape of the bump is hemispherical. It also includes 3 specifications, such as 61, 62, 63 in the appendix Figure 2 . The ball diameters are 16 μm, 12 μm, and 8 μm respectively, and the heights are 12 μm, 9 μm, and 6 μm respectively. And the number and positions of the bump points are in one - to - one correspondence with the limiting structures at the photosensitive array end.

[0052] The production of the bumps is carried out by using conventional processes such as photolithography, coating, and stripping. The selected metal material is circular In (indium), and then it is reflowed to form In balls. The diameter and height of the In balls are determined by the amount of In (i.e., the volume of the In frustum) and the size of the pre-prepared bottom wetting layer. These two items can be calculated to obtain the design dimensions through simple theoretical calculations. And, according to the common sense of the reflow process, the larger the amount of In and the smaller the area of the bottom wetting metal, the larger the diameter and the higher the height of the In ball after reflow. Therefore, the relevant size design before reflow can be calculated from the above-mentioned target diameter and height.

[0053] (3) Flip-chip packaging

[0054] Flip-chip is performed using currently mature and relatively low-cost flip-chip equipment, and its processing limit is a 20μm pixel pitch. Using the traditional flip-chip process method, the photosensitive array is aligned with the readout circuit. After the alignment is completed, pressure is applied to make the photosensitive array and the readout circuit start to contact to complete the flip-chip.

[0055] The specific process of flip-chip is as follows:

[0056] In the first stage, the 12μm high spherical bumps 61 at the readout circuit end contact the 12μm annular limiting structure 51 at the photosensitive array end. When there is an incomplete alignment between the photosensitive array and the readout circuit after rough alignment, the centers of the bumps and the limiting ring are offset in the vertical direction. At this time, the side of the bump will first contact one side of the limiting ring, and the force exerted on the bump by the limiting ring is divided into a vertically upward and a horizontally non-contact side. The unbalanced horizontal component force causes a tendency for the photosensitive array and the readout circuit to move relative to each other in the horizontal direction, as shown in the appendix Figure 4 As shown, with the continuous application of pressure, the two move relative to each other in the horizontal direction, which makes the centers of the bump and the limiting ring closer in the vertical direction, that is, the alignment is more accurate.

[0057] In the second stage, when the pressure is continuously applied to flatten the 12μm In ball to about 9μm (that is, the distance between the photosensitive array and the readout circuit is 9μm), the 9μm high In ball starts to contact the corresponding 9μm inner diameter limiting ring. During the pressure application process, the same effect as that of the 12μm high In ball will occur, but due to the smaller size, its horizontal movement is more accurate, enabling the photosensitive array and the readout circuit to complete a more precise alignment. During this process, since the 12μm high In ball has been flattened and has a large area of contact with the photosensitive array end, it is difficult for the photosensitive array and the readout circuit to move horizontally. However, due to the large number of 9μm In ball - limiting ring pairs, the generated lateral force is large enough to enable the relative movement in the horizontal direction to continue.

[0058] In the third stage, when the pressure is continuously increased until the distance between the photosensitive array and the readout circuit is about 6 μm, the 6-μm bumps start to contact the limiting ring and produce the same effect as in the second stage. However, the smaller bump-limiting ring size will result in a more precise and accurate horizontal movement, enabling the further alignment of the photosensitive array and the readout circuit.

[0059] The above are only the preferred embodiments of the present invention, and do not limit the patent scope of the present invention accordingly. Any equivalent structural transformation made using the content of the specification of the present invention under the inventive concept of the present invention, or direct / indirect application in other related technical fields, is included in the patent protection scope of the present invention.

Claims

1. Flip-chip alignment structure of a focal plane array detector, Characterized in that, It includes a readout circuit and a photosensitive array. One of the readout circuit and the photosensitive array is provided with bumps around the pixel interconnection structure, and the other is provided with a limiting structure around the pixel interconnection structure. The number and positions of the bumps and the limiting structure correspond to each other. The readout circuit and the photosensitive array are flip-chip aligned through the bumps and the limiting structure; the bumps and the limiting structure include at least two size specifications, and the number of the bumps or the limiting structure with a smaller size is more than that of the adjacent bumps or the limiting structure with a larger size.

2. The flip-chip alignment structure of a focal plane array detector according to claim 1, Characterized in that, The bumps and the limiting structure are symmetrically distributed about the center of the corresponding area of the pixel interconnection structure.

3. The flip-chip alignment structure of a focal plane array detector according to claim 1, Characterized in that, The sizes of the bumps and the limiting structure are larger than the size of the pixel interconnection structure.

4. The flip-chip alignment structure of a focal plane array detector according to claim 1, Characterized in that, The size of the bump or the limiting structure with a larger size is 10%-30% higher than that of the adjacent bump or the limiting structure with a smaller size.

5. The flip-chip alignment structure of a focal plane array detector according to claim 1, Characterized in that, The sizes of the bumps or the limiting structure gradually decrease along the edge from the four corners of the readout circuit or the photosensitive array towards the middle.

6. The flip-chip alignment structure of a focal plane array detector according to claim 1, Characterized in that, The number of the bumps or the limiting structure with a smaller size is 4-20 times that of the adjacent bump or the limiting structure with a larger size.

7. The flip-chip alignment structure of a focal plane array detector according to claim 1, Characterized in that, The shape of the bump is selected from at least one of hemispherical, cylindrical, conical, and frustum-shaped.

8. The flip-chip alignment structure of a focal plane array detector according to claim 1, Characterized in that, The limiting structure protrudes from the surface of the readout circuit or the photosensitive array.

9. The flip-chip alignment structure of a focal plane array detector according to claim 1, Characterized in that, The center distance d between adjacent convex points satisfies: d > (r 1 3 / 2 + r 2 3 / 2 ) / 2, where r 1 and r 2 are the diameters of adjacent convex points respectively.

Citation Information

Patent Citations

  • Flip chip package maintaining alignment during soldering

    US20110215466A1