A gallium nitride switching device and its fabrication method

Abstract

This application belongs to the field of power device technology and provides a gallium nitride (GaN) switching device and its fabrication method. The GaN switching device includes: a substrate layer, a buffer layer, a gallium nitride layer, a barrier layer, a source layer, a gate layer, a drain layer, a source electrode, a gate electrode, and a drain electrode. The substrate layer, buffer layer, gallium nitride layer, and barrier layer are stacked sequentially from bottom to top. The source layer, gate layer, and drain layer are disposed on the barrier layer. The source electrode, gate electrode, and drain electrode are respectively disposed on the source layer, gate layer, and drain layer. By setting the gate electrode and drain electrode as finger-shaped metal field plates, and alternating the finger-shaped metal strips of the gate electrode and drain electrode, the output capacitance of the device can be increased, and it can withstand greater inductive energy conversion, thereby improving the reliability of the switching device when applied to high-load inductive scenarios.

Description

Technical Field

[0001] This application belongs to the field of power device technology, and in particular relates to a gallium nitride switching device and its fabrication method. Background Technology

[0002] In gallium nitride high-speed electron mobility field-effect transistors (GaN HEMTs), there is no parasitic body diode between the drain and source, whereas in silicon or silicon carbide-based field-effect transistors (MOSFETs), a parasitic body diode exists between the drain and source. In applications with highly inductive loads, when a switch transitions from the open to the closed state, the energy stored in the inductor charges the closed-state switch by releasing a current.

[0003] When a MOSFET based on a silicon substrate or silicon carbide substrate is used as a switching device and is turned off, the source-drain voltage Vds between its drain and source rises all the way to the avalanche voltage of its parasitic body diode. At this time, the body diode turns on, current flows, and the source-drain voltage Vds is equal to the avalanche voltage of the diode. When a GaN HEMT is used as a switching device and is turned off, the energy stored in the inductor is released. Since there is no parasitic body diode, it can only charge the output capacitor of the device. The source-drain voltage Vds will rise all the way until it reaches the maximum voltage Vm. That is, the inductor energy can no longer charge the capacitor. The energy in the capacitor is consumed in the process of exchanging energy with the energy in the inductor.

[0004] However, if GaN HEMT is used as a switching device, excessive energy stored in its inductor will cause the parasitic capacitance between the drain and source terminals to be fully charged when the output capacitor is charged. This will cause the source-drain voltage Vds to continue to rise, leading to an increase in the gate-source voltage Vgs, which in turn turns on the switching device that should be turned off, resulting in malfunction of the switching device. Summary of the Invention

[0005] The purpose of this application is to provide a gallium nitride power device and its fabrication method, aiming to provide a novel gallium nitride power device to improve the reliability of switching devices when applied to high-load inductor scenarios.

[0006] A first aspect of this application provides a gallium nitride (GaN) switching device, the GaN switching device comprising:

[0007] The substrate layer, buffer layer, gallium nitride layer, and barrier layer are stacked sequentially from bottom to top.

[0008] A source layer, a gate layer, and a drain layer are disposed on the barrier layer;

[0009] Source electrode, gate electrode, and drain electrode are respectively disposed on the source layer, the gate layer, and the drain layer;

[0010] The gate electrode and the drain electrode are both finger-shaped metal field plates, and the finger-shaped electrodes of the gate electrode and the drain electrode are arranged intersectingly.

[0011] In one embodiment, the gate electrode includes a first electrode substrate and a plurality of first strip electrodes connected to the first electrode substrate;

[0012] The drain electrode includes a second electrode substrate and a plurality of second strip electrodes connected to the second electrode substrate;

[0013] In this configuration, multiple first strip electrodes and multiple second strip electrodes are arranged in an interleaved manner.

[0014] In one embodiment, the first electrode substrate is arranged perpendicularly to the first strip electrode;

[0015] The second electrode substrate is arranged perpendicularly to the second strip electrode.

[0016] In one embodiment, the source electrode, the first electrode substrate, and the second electrode substrate are arranged in parallel.

[0017] In one embodiment, the distance between the first strip electrode and the adjacent second strip electrode is greater than the width of the second strip electrode.

[0018] In one embodiment, the lengths of the first strip electrode and the second strip electrode are less than the distance between the first electrode substrate and the second electrode substrate.

[0019] In one embodiment, the thickness of the first strip electrode and the second strip electrode is less than the thickness of the source layer and the gate layer.

[0020] In one embodiment, the barrier layer is AlGaN.

[0021] A second aspect of this application also provides a method for fabricating a gallium nitride switching device, the method comprising:

[0022] The substrate layer, buffer layer, gallium nitride layer, and barrier layer are fabricated sequentially from bottom to top.

[0023] A source layer and a drain layer are formed on the barrier layer, and a gate layer is formed between the source layer and the drain layer;

[0024] A source electrode, a gate electrode, and a drain electrode are formed on the source layer, the gate layer, and the drain layer, respectively; wherein the gate electrode and the drain electrode are both finger-shaped metal field plates, and the finger-shaped openings of the gate electrode and the drain electrode are arranged opposite to each other.

[0025] In one embodiment, the step of forming a source electrode, a gate electrode, and a drain electrode on the source layer, the gate layer, and the drain layer, respectively, includes:

[0026] The shapes of the source electrode, the gate electrode, and the drain electrode are determined using a mask, and metal is deposited on the mask to form the source electrode, the gate electrode, and the drain electrode.

[0027] This application provides a gallium nitride (GaN) switching device and its fabrication method. The GaN switching device includes: a substrate layer, a buffer layer, a gallium nitride layer, a barrier layer, a source layer, a gate layer, a drain layer, a source electrode, a gate electrode, and a drain electrode. The substrate layer, buffer layer, gallium nitride layer, and barrier layer are stacked sequentially from bottom to top. The source layer, gate layer, and drain layer are disposed on the barrier layer. The source electrode, gate electrode, and drain electrode are respectively disposed on the source layer, gate layer, and drain layer. By setting the gate electrode and drain electrode as finger-shaped metal field plates, and alternating the finger-shaped metal strips of the gate electrode and drain electrode, the output capacitance of the device can be increased, and it can withstand greater inductive energy conversion, thereby improving the reliability of the switching device when applied to high-load inductive scenarios. Attached Figure Description

[0028] Figure 1 This is a schematic diagram of the test structure for the unclamped inductive switching (UIS) process of the gallium nitride switching device provided in the embodiments of this application;

[0029] Figure 2 This is a schematic diagram of the current and voltage waveforms of the gallium nitride switching device provided in the embodiments of this application;

[0030] Figure 3 This is a schematic diagram of the structure of the gallium nitride switching device provided in the embodiments of this application. Figure 1 ;

[0031] Figure 4 This is a schematic diagram of the structure of the gallium nitride switching device provided in the embodiments of this application. Figure 2 ;

[0032] Figure 5 This is a schematic diagram of the structure of the gallium nitride switching device provided in the embodiments of this application. Figure 3 ;

[0033] Figure 6 This is a schematic flowchart of a method for fabricating a gallium nitride switching device provided in an embodiment of this application;

[0034] Figure 7This is an example diagram provided in this application embodiment showing that a buffer layer 200, a gallium nitride layer 300, and a barrier layer 400 are sequentially formed on a substrate layer 100;

[0035] Figure 8 This is an example diagram of the formation of source layer 610, drain layer 630 and gate layer 620 provided in the embodiments of this application. Detailed Implementation

[0036] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0037] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0038] It should be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0039] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0040] In applications with highly inductive loads, when a switching device switches from the open to the closed state, the energy stored in the inductor charges the closed switch by releasing current. Specifically, Figure 1 This is a circuit diagram of the switching device Uh applied to a highly inductive load, combined with... Figure 1As shown, the pulse generator 700 is connected to the gate G of the switching device Uh through the first diode D1. A first resistor R1 is connected between the gate G and the source S of the switching device Uh, and the drain D of the switching device Uh is connected to the load inductor L0. VDD is an external power supply. When the voltage of the gate G of the switching device Uh flips to a high level, the external power supply VDD charges the load inductor L0. After the inductor L0 is fully charged, current begins to flow through the switching device Uh. When the voltage of the gate G of the switching device Uh flips to a low level, the switching device Uh is turned off. The load inductor L0 maintains the slow change of current between the drain D and the source S of the switching device Uh, and the voltage between the drain D and the source S of the switching device Uh increases rapidly.

[0041] Combination Figure 2 As shown in (a), when the MOSFET on a silicon substrate or a silicon carbide substrate is turned off as a switching device Uh, the gate-source voltage Vgs of the switching device Uh rises to a high level. Since the switching device Uh has a body diode, the diode enters the avalanche region. Figure 2 As shown in (b), the voltage Vds between the drain and source rises all the way to the avalanche voltage of the parasitic body diode inside the switching device. The body diode inside the switching device Uh turns on, the current Ids flows through, and the maximum current IL is reached when the switching device Uh is turned off. The voltage Vds is equal to the avalanche voltage BVava of the diode.

[0042] When a gallium nitride (GaN) HEMT is used as a switching device Uh and is turned off, since Uh does not have a body diode, energy conversion is required between the output capacitance of Uh and the load inductor L0. When the load inductor L0 is normal, the conversion process consumes the energy stored in the load inductor L0. If the load inductor L0 is too large, the energy conversion causes an excessively high voltage at its gate terminal G, leading to damage to the switching device. Specifically, in conjunction with... Figure 2 As shown in (c), the energy stored in inductor L0 is released. Since there is no parasitic diode, it can only charge the output capacitor of switching device Uh. Current Ids flows through it and reaches its maximum current IL when switching device Uh is turned off. The voltage Vds between its drain and source will rise continuously. After Vds reaches its maximum voltage Vm, the inductor energy can no longer charge the capacitor. Then, the energy in the capacitor is consumed in the process of exchanging energy with the energy in the inductor. However, if the load inductance L0 connected to the drain D of switching device Uh is too large, and too much energy is stored, when charging the output capacitor, after the parasitic capacitance at its drain and gate ends is saturated, the voltage Vds between the drain and source will continue to rise, causing the voltage Vgs between the gate and source of switching device Uh to rise. This will turn on the switching device Uh, which should be turned off, leading to the problem of malfunction of switching device Uh.

[0043] To address the aforementioned technical problems, this application provides a gallium nitride switching device, see [link to relevant documentation]. Figure 3 As shown, the gallium nitride switching device includes: a substrate layer 100, a buffer layer 200, a gallium nitride layer 300, a barrier layer 400, a source layer 610, a gate layer 620, a drain layer 630, a source electrode 510, a gate electrode 520, and a drain electrode 530.

[0044] Specifically, the substrate layer 100, buffer layer 200, gallium nitride layer 300, and barrier layer 400 are stacked sequentially from bottom to top. The source layer 610, gate layer 620, and drain layer 630 are disposed on the barrier layer 400. The source electrode 510 is disposed on the source layer 610, the gate electrode 520 is disposed on the gate layer 620, and the drain electrode 530 is disposed on the drain layer 630. Both the gate electrode 520 and the drain electrode 530 are finger-shaped metal field plates, and the finger-shaped electrodes of the gate electrode 520 and the drain electrode 530 are arranged intersectingly.

[0045] In this embodiment, by setting the gate electrode 520 and the drain electrode 530 as finger-shaped metal field plates, and by having the finger-shaped electrodes of the gate electrode 520 and the drain electrode 530 cross-arranged, the withstand voltage between the drain and source of the gallium nitride switching device can be increased, thereby enhancing the turn-off process of the gallium nitride switching device, so that the release of inductive energy at the drain terminal causes the drain-source voltage to rise without accidentally turning on the switching device.

[0046] In practical applications, the drain electrode 530 of the gallium nitride (GaN) switching device is connected to a highly inductive load. By setting the gate electrode 520 and the drain electrode 530 as finger-shaped metal field plates, and by having the finger-shaped electrodes of the gate electrode 520 and the drain electrode 530 cross-set, in addition to the parasitic capacitance of the drain and gate of the GaN switching device itself, the parasitic capacitance between the field plates in the gate electrode 520 and the drain electrode 530 is connected in parallel with the GaN switching device, which increases the output capacitance of the device. This allows the GaN switching device to withstand a larger inductive energy conversion, resulting in a smaller voltage rise between the drain and source of the GaN switching device when the same inductive energy is transferred.

[0047] Furthermore, by setting the drain electrode 530 as a forked metal field plate, the heat dissipation of the drain of the gallium nitride switch device can be increased, the temperature of the drain of the gallium nitride switch device can be lowered, the leakage current from the drain of the gallium nitride switch device to the gate terminal will also be reduced, making the gate terminal of the gallium nitride switch device less likely to be turned on, improving the withstand voltage between the drain and source of the gallium nitride switch device, and enhancing the turn-off process of the gallium nitride switch device.

[0048] In one embodiment, see Figure 3As shown, the gate electrode 520 includes a first electrode substrate 521 and a plurality of first strip electrodes 522 connected to the first electrode substrate 521, and the drain electrode 530 includes a second electrode substrate 531 and a plurality of second strip electrodes 532 connected to the second electrode substrate 531.

[0049] In this embodiment, a plurality of first strip electrodes 522 and a plurality of second strip electrodes 532 are arranged in a cross manner, and the first strip electrodes 522 and the second strip electrodes 532 are arranged alternately.

[0050] Figure 4 for Figure 3 A schematic diagram of the cross-section of the device at the dashed line BB' in the diagram. Figure 5 for Figure 3 The schematic diagram of the device cross-section at the dashed line AA' in the diagram, combined with... Figure 4 and Figure 5 As shown, the first strip electrode 522 is opposite to the second electrode substrate 531, and the second strip electrode 532 is opposite to the first electrode substrate 521.

[0051] In one specific application, the distance between adjacent first strip electrodes 522 is equal.

[0052] In one specific application, the distance between adjacent second strip electrodes 532 is equal.

[0053] The first strip electrode 522 and the second strip electrode 532 can be metal field plates. The first strip electrode 522 and the second strip electrode 532 are arranged alternately. Adjacent first strip electrodes 522 and second strip electrodes 532 form parasitic capacitance. At this time, the parasitic capacitance is located between the gate terminal and the drain terminal of the gallium nitride switching device.

[0054] In this embodiment, the size of the parasitic capacitance between the gate and drain terminals of the gallium nitride switching device is directly proportional to the area of ​​the capacitor plates facing each other and the relative permittivity between the capacitor plates, and inversely proportional to the distance between the capacitor plates. Therefore, the size of the parasitic capacitance between the gate and drain terminals of the gallium nitride switching device can be adjusted by setting the material, facing length, and field plate area of ​​the first strip electrode 522 and the second strip electrode 532. For example, the number of first strip electrodes 522 connected to the first electrode substrate 521 and the number of second strip electrodes 532 connected to the second electrode substrate 531 can be selected by laser process as needed.

[0055] In specific applications, the facing length between adjacent first strip electrodes 522 and second strip electrodes 532, as well as the field plate area between adjacent first strip electrodes 522 and second strip electrodes 532, can be set according to the application scenario.

[0056] In one embodiment, combined Figure 3As shown, the first electrode substrate 521 is perpendicular to the first strip electrode 522; the second electrode substrate 531 is perpendicular to the second strip electrode 532.

[0057] In this embodiment, a plurality of first strip electrodes 522 are arranged perpendicularly to the first electrode substrate 521, and the plurality of first strip electrodes 522 and the first electrode substrate 521 form a finger-shaped metal field plate. A plurality of second strip electrodes 532 are arranged perpendicularly to the second electrode substrate 531, and the plurality of second strip electrodes 532 and the second electrode substrate 531 form a finger-shaped metal field plate.

[0058] In one embodiment, the source electrode 510, the first electrode substrate 520, and the second electrode substrate 530 are arranged in parallel.

[0059] In this embodiment, the source electrode 510 is disposed on the source layer 610, the first electrode substrate 520 is disposed on the gate layer 620, and the second electrode substrate 530 is disposed on the drain layer 630. The source electrode 510, the first electrode substrate 520, and the second electrode substrate 530 are all elongated and arranged in parallel.

[0060] In one specific application embodiment, the source electrode 510 can be integrally formed with the source layer 610, the first electrode substrate 520 can be integrally formed with the gate layer 620, and the second electrode substrate 530 can be integrally formed with the drain layer 630.

[0061] In one specific application embodiment, the gate layer 620 may consist of a capping layer and a metal layer, with a Schottky contact between the capping layer and the metal layer.

[0062] A metal layer is disposed between the first electrode substrate 520 and the capping layer. In specific applications, the capping layer can be P-type gallium nitride, and the metal layer can be at least one of copper, gold, and silver. The metal layer can be integrally formed with the first electrode substrate 520.

[0063] In one embodiment, the distance between the first strip electrode 522 and the adjacent second strip electrode 522 is greater than the width of the second strip electrode 522.

[0064] In one embodiment, the widths of the first strip electrode 522 and the second strip electrode 532 are equal.

[0065] In one embodiment, the first strip electrode 522 and the second strip electrode 532 have the same length.

[0066] In one embodiment, the first strip electrode 522 and the second strip electrode 532 have the same thickness.

[0067] In one embodiment, the gate electrode 520 and the drain electrode 530 have a centrally symmetrical structure.

[0068] In one embodiment, the lengths of the first strip electrode 522 and the second strip electrode 532 are less than the distance between the first electrode substrate 521 and the second electrode substrate 531.

[0069] In one embodiment, the thickness of the first strip electrode 522 and the second strip electrode 532 is less than the thickness of the source layer 610 and the gate layer 620.

[0070] In one embodiment, the barrier layer 400 is AlGaN.

[0071] In one embodiment, the substrate 100 may be a silicon-based substrate or a silicon carbide substrate.

[0072] In one embodiment, the buffer layer 200 may be gallium nitride.

[0073] In one embodiment, a diode can be disposed on the back side of the substrate 100, for example, by forming a PN junction through P-type ion doping and N-type ion doping on the back side of the substrate 100, thereby disposing a diode on its back side.

[0074] Specifically, a P-type doped region is formed by P-type ion doping on the back side of the substrate 100, and an N-type doped region is formed by N-type ion doping on the back side of the substrate 100. The diode is composed of adjacent N-type doped regions and P-type doped regions.

[0075] In one embodiment, a substrate layer 100 is formed by adjacent N-type doped regions and P-type doped regions, with the P-type doped region in contact with the source electrode and the N-type doped region in contact with the drain electrode. The P-type doped region and the N-type doped region form a PN junction, thereby forming a diode between the drain and source terminals of the device. When the device is turned on, the energy conversion on its load inductance causes the voltage between the drain and source terminals to reach the avalanche voltage of the diode, at which point the diode turns on, fixing the voltage between the drain and source terminals and preventing the gate from being turned on. This allows the device to withstand greater inductance energy conversion and improves the reliability of the device when applied to high-load inductance scenarios.

[0076] In one embodiment, the boundary between the N-type doped region and the P-type doped region in the diode is opposite to the gate layer 620.

[0077] In this embodiment, the gate layer 620 is located on the barrier layer 400 and in the region between the source layer 610 and the drain layer 630, and its position is opposite to the boundary line between the N-type doped region and the P-type doped region.

[0078] Specifically, the length of the N-type doped region in the diode is the distance between the gate layer 620 and the drain layer 630, and the length of the P-type doped region is the distance between the gate layer 620 and the source layer 610.

[0079] In one embodiment, the N-type doped region in the diode has the same area as the P-type doped region.

[0080] In one embodiment, the N-type doped region in the diode has the same shape as the P-type doped region.

[0081] In one embodiment, the substrate 100 can be a silicon-based substrate or a silicon carbide substrate. The N-type doped and P-type doped regions can be formed by implanting different types of dopant ions into the substrate 100. For example, P-type dopant ions can be implanted into the region of the substrate 100 near the source electrode to form a P-type doped region, and N-type dopant ions can be implanted into the region of the substrate 100 near the drain electrode to form an N-type doped region.

[0082] This application also provides a method for fabricating a gallium nitride switching device, see [link to relevant documentation]. Figure 6 As shown, the preparation method includes steps S100 to S300.

[0083] In step S100, a substrate layer, a buffer layer, a gallium nitride layer, and a barrier layer are sequentially prepared from bottom to top.

[0084] See Figure 7 As shown, a buffer layer 200, a gallium nitride layer 300, and a barrier layer 400 are sequentially formed on the substrate layer 100.

[0085] Specifically, a buffer layer 200 and a gallium nitride layer 300 can be formed on the substrate layer 100 by first depositing gallium nitride material, and then a barrier layer 400 can be formed by depositing AlGaN material.

[0086] In one embodiment, the substrate 100 may be a silicon-based substrate or a silicon carbide substrate.

[0087] In step S200, a source layer and a drain layer are formed on the barrier layer, and a gate layer is formed between the source layer and the drain layer.

[0088] In this embodiment, see Figure 8 As shown, a source layer 610, a drain layer 630, and a gate layer 620 are formed on the barrier layer 400. Specifically, the source layer 610, the drain layer 630, and the gate layer 620 can be used as electrode pad materials, such as gallium nitride materials, or they can be metal material layers.

[0089] In specific applications, the source layer 610, drain layer 630 and gate layer 620 can be formed in a predetermined region on the barrier layer 400 by depositing semiconductor materials or metal materials.

[0090] In step S300, a source electrode, a gate electrode, and a drain electrode are formed on the source layer, the gate layer, and the drain layer, respectively.

[0091] In this embodiment, combined with Figure 3 As shown, both the gate electrode 520 and the drain electrode 530 are finger-shaped metal field plates, and the finger-shaped electrodes of the gate electrode 520 and the drain electrode 530 are arranged in an intersecting manner.

[0092] By setting the gate electrode 520 and the drain electrode 530 as finger-shaped metal field plates, and by having the finger-shaped electrodes of the gate electrode 520 and the drain electrode 530 cross-arranged, the withstand voltage between the drain and source of the gallium nitride switching device can be increased, thereby enhancing the turn-off process of the gallium nitride switching device. This allows the release of inductive energy at the drain terminal to cause the drain-source voltage to rise without accidentally turning on the switching device.

[0093] In practical applications, the drain electrode 530 of the gallium nitride (GaN) switching device is connected to a highly inductive load. By setting the gate electrode 520 and the drain electrode 530 as finger-shaped metal field plates, and by having the finger-shaped electrodes of the gate electrode 520 and the drain electrode 530 cross-set, in addition to the parasitic capacitance of the drain and gate of the GaN switching device itself, the parasitic capacitance between the field plates in the gate electrode 520 and the drain electrode 530 is connected in parallel with the GaN switching device, which increases the output capacitance of the device. This allows the GaN switching device to withstand a larger inductive energy conversion, resulting in a smaller voltage rise between the drain and source of the GaN switching device when the same inductive energy is transferred.

[0094] Furthermore, by setting the drain electrode 530 as a forked metal field plate, the heat dissipation of the drain of the gallium nitride switch device can be increased, the temperature of the drain of the gallium nitride switch device can be lowered, the leakage current from the drain of the gallium nitride switch device to the gate terminal will also be reduced, making the gate terminal of the gallium nitride switch device less likely to be turned on, improving the withstand voltage between the drain and source of the gallium nitride switch device, and enhancing the turn-off process of the gallium nitride switch device.

[0095] In one embodiment, step S300, which involves forming a source electrode, a gate electrode, and a drain electrode on the source layer, the gate layer, and the drain layer, includes: using a mask to determine the shape of the source electrode, the gate electrode, and the drain electrode, and depositing metal on the mask to form the source electrode, the gate electrode, and the drain electrode.

[0096] In this embodiment, a mask is used to define the shape of the source electrode 510, the gate electrode 520 and the drain electrode 530, thereby depositing metal material on the mask to form the source electrode 510, the gate electrode 520 and the drain electrode 530, and then removing the mask.

[0097] This application provides a gallium nitride (GaN) switching device and its fabrication method. The GaN switching device includes: a substrate layer, a buffer layer, a gallium nitride layer, a barrier layer, a source layer, a gate layer, a drain layer, a source electrode, a gate electrode, and a drain electrode. The substrate layer, buffer layer, gallium nitride layer, and barrier layer are stacked sequentially from bottom to top. The source layer, gate layer, and drain layer are disposed on the barrier layer. The source electrode, gate electrode, and drain electrode are respectively disposed on the source layer, gate layer, and drain layer. By setting the gate electrode and drain electrode as finger-shaped metal field plates, and alternating the finger-shaped metal strips of the gate electrode and drain electrode, the output capacitance of the device can be increased, and it can withstand greater inductive energy conversion, thereby improving the reliability of the switching device when applied to high-load inductive scenarios.

[0098] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of doped regions is used as an example. In practical applications, the above-described functional areas can be assigned to different doped regions as needed, that is, the internal structure of the device can be divided into different doped regions to complete all or part of the functions described above.

[0099] In the embodiments, the doped regions can be integrated into one functional region, or each doped region can exist independently, or two or more doped regions can be integrated into one functional region. The integrated functional region can be implemented using the same type of dopant ion or multiple types of dopant ions. Furthermore, the specific names of each doped region are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the doped region in the fabrication method of the above device can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0100] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A gallium nitride switching device, characterized in that, The gallium nitride switching device includes: The substrate layer, buffer layer, gallium nitride layer, and barrier layer are stacked sequentially from bottom to top. A source layer, a gate layer, and a drain layer are disposed on the barrier layer; the gate layer includes a capping layer and a metal layer, and a Schottky contact is formed between the capping layer and the metal layer; the capping layer is P-type gallium nitride. A source electrode, a gate electrode, and a drain electrode are respectively disposed on the source layer, the gate layer, and the drain layer; wherein the source electrode, the gate electrode, and the drain electrode are located on the same side of the device, the gate electrode and the drain electrode are both finger-shaped metal field plates, and the finger-shaped electrodes of the gate electrode and the drain electrode are arranged intersectingly; The gate electrode includes a first electrode substrate and a plurality of first strip electrodes connected to the first electrode substrate; the drain electrode includes a second electrode substrate and a plurality of second strip electrodes connected to the second electrode substrate; the plurality of first strip electrodes and the plurality of second strip electrodes are arranged intersectingly, and adjacent first strip electrodes and second strip electrodes form a parasitic capacitance; the metal layer is integrally formed with the first electrode substrate; the size of the parasitic capacitance is related to the material of the first strip electrodes and the second strip electrodes, their facing length, and the area of ​​the field plate; The drain electrode is connected to an inductive load, and the parasitic capacitance between the field plates in the gate electrode and the drain electrode is connected in parallel with the gallium nitride switching device. The back side of the substrate includes a P-type doped region and an N-type doped region, which form a diode. The source electrode is in contact with the P-type doped region, and the drain electrode is in contact with the N-type doped region. When the energy conversion on the inductive load causes the voltage between the drain electrode and the source electrode to reach the avalanche voltage of the diode, the diode turns on. The source electrode, the first electrode substrate, and the second electrode substrate are arranged in parallel.

2. The gallium nitride switching device as described in claim 1, characterized in that, The first electrode substrate is arranged perpendicularly to the first strip electrode; The second electrode substrate is arranged perpendicularly to the second strip electrode.

3. The gallium nitride switching device as described in claim 1, characterized in that, The distance between the first strip electrode and the adjacent second strip electrode is greater than the width of the second strip electrode.

4. The gallium nitride switching device as described in claim 1, characterized in that, The lengths of the first strip electrode and the second strip electrode are less than the distance between the first electrode substrate and the second electrode substrate.

5. The gallium nitride switching device as described in claim 1, characterized in that, The thickness of the first strip electrode and the second strip electrode is less than the thickness of the source layer and the gate layer.

6. The gallium nitride switching device according to any one of claims 1-5, characterized in that, The barrier layer is AlGaN.

7. A method for fabricating a gallium nitride switching device as described in any one of claims 1-6, characterized in that, The preparation method includes: The substrate layer, buffer layer, gallium nitride layer, and barrier layer are fabricated sequentially from bottom to top. A source layer and a drain layer are formed on the barrier layer, and a gate layer is formed between the source layer and the drain layer; A source electrode, a gate electrode, and a drain electrode are formed on the source layer, the gate layer, and the drain layer, respectively; wherein the gate electrode and the drain electrode are both finger-shaped metal field plates, and the finger-shaped openings of the gate electrode and the drain electrode are arranged opposite to each other.

8. The preparation method according to claim 7, characterized in that, The step of forming source electrode, gate electrode, and drain electrode on the source layer, gate layer, and drain layer, respectively, includes: The shapes of the source electrode, the gate electrode, and the drain electrode are determined using a mask, and metal is deposited on the mask to form the source electrode, the gate electrode, and the drain electrode.

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