Frequency-locked loop and method for correcting the oscillation frequency of its output signal

By monitoring and correcting the resistance difference using a frequency-locked loop (FLL), the frequency drift problem of self-excited ring oscillators is solved, enabling simplified circuit design and cost control under temperature variations.

CN115473525BActive Publication Date: 2026-07-21MEDIATEK INC
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
MEDIATEK INC
Filing Date
2022-03-25
Publication Date
2026-07-21

AI Technical Summary

Technical Problem

In the prior art, the oscillation frequency of self-excited ring oscillators is easily affected by process angle and temperature changes, requiring additional circuitry to correct frequency drift, which increases circuit complexity and cost.

Method used

A frequency-locked loop (FLL) is used, which includes a switched capacitor circuit, a resistor bank, a judgment circuit, and a control circuit. The oscillation frequency is corrected by monitoring the resistance difference. The resistance value is corrected by using resistor banks with different temperature coefficients and the judgment circuit, avoiding the need for additional circuitry.

Benefits of technology

Without significantly increasing costs, it effectively corrects oscillation frequency drift, simplifies circuit design, and reduces the need for additional circuitry.

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Abstract

A frequency locked loop (FLL) and a method of correcting an oscillation frequency of an output signal of the FLL are provided. The FLL includes at least one switched capacitor circuit, a first resistor set, a second resistor set, a decision circuit, and a control circuit. The at least one switched capacitor circuit includes at least one capacitor, and a connection of the at least one capacitor is switched according to an oscillation frequency of an output signal of the FLL. The first resistor set provides a first resistance value, and the second resistor set provides a second resistance value. The decision circuit generates a decision result according to the first resistance value and the second resistance value. The control circuit generates at least one control signal to correct at least one of the first resistance value and the second resistance value according to the decision result. The oscillation frequency is determined based on the at least one of the first resistance value and the second resistance value and the at least one capacitor.
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