An inductance current ripple in-slice compensation circuit for switching power supply
Patent Information
- Application Number
- CN202210612117.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-05-31
- Publication Date
- 2026-10-23
- Estimated Expiration
- 2042-05-31
AI Technical Summary
[0005]针对现有技术中存在的技术问题,本发明提供了一种用于开关电源的电感电流纹波片内补偿电路,以解决现有的基于输出电压纹波控制的恒定导通时间的Buck型开关电源易出现次谐波振荡线性,导致输出电压稳定性较差的技术问题
本发明提供了一种用于开关电源的电感电流纹波片内补偿电路,通过对BUCK型开关电源中电感两端的电压VSW和电压VOUT进行处理,产生与电感电流成正比的纹波;并将所述与电感电流成正比的纹波,叠加至BUCK型开关电源的FB引脚上;采用在VFB上叠加一个与电感电流成正比的纹波电压,所述纹波电压抑制了其他次谐波,起主导作用来与VREF比较,达到了想要的稳定效果;在不影响正常输出电压纹波的情况下极大的增加了FB的纹波大小,改善了系统的次谐波震荡现象,有效提高了系统输出电压的稳定性。
Smart Images

Figure CN115483816B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of power supply technology, and specifically relates to an inductor current ripple compensation circuit for switching power supplies. Background Technology
[0002] In the consumer electronics field, various electronic devices require power to operate, and switching power supply management chips are an indispensable part of electronic systems. Among them, switching power supplies with constant on-time control mode have been widely used in the power supply field due to their superior load transient response and smooth operating mode switching.
[0003] The constant on-time control mode of a switching power supply is a control mode based on output voltage ripple. It typically has certain requirements regarding the equivalent series resistance (ESR) of the output capacitor. For a Buck-type switching power supply with constant on-time control based on output voltage ripple, the voltage ripple generated by the output capacitor itself and the voltage ripple generated by its equivalent series resistance (ESR) together constitute the output voltage ripple. There is no phase difference between the inductor current ripple and the voltage ripple generated across the ESR, but the voltage ripple generated across the output capacitor lags behind the inductor current ripple by 90°. To suit high-precision electronic systems, ceramic capacitors are used as output capacitors to reduce output voltage ripple. However, their equivalent series resistance (ESR) is very small, and the ripple voltage generated by the capacitor itself plays a major role, easily inducing subharmonic oscillations.
[0004] As attached Figure 1 As shown, the waveform of the subharmonic oscillation phenomenon is characterized by alternating wide and narrow pulses. After the power switch is turned off in the first cycle, the voltage ripple of the output capacitor lags behind the current ripple of the output inductor by 90° and may be less than the output voltage of the error amplifier. The power switch will immediately turn on again after a minimum turn-off time, thus causing the subharmonic oscillation phenomenon. The subharmonic oscillation phenomenon will cause the output voltage to become extremely unstable, and the output voltage ripple will increase. Summary of the Invention
[0005] To address the technical problems existing in the prior art, this invention provides an inductor current ripple on-chip compensation circuit for switching power supplies, in order to solve the technical problem that existing Buck-type switching power supplies with constant on-time based on output voltage ripple control are prone to subharmonic oscillation linearity, resulting in poor output voltage stability.
[0006] To address the technical problems existing in the prior art, this invention provides an inductor current ripple on-chip compensation circuit for switching power supplies, in order to solve the technical problem that existing Buck-type switching power supplies with constant on-time based on output voltage ripple control are prone to subharmonic oscillation linearity, resulting in poor output voltage stability.
[0007] To achieve the above objectives, the technical solution adopted by the present invention is as follows: This invention provides an inductor current ripple compensation circuit for a switching power supply, wherein the inductor current ripple compensation circuit is applied to a BUCK type switching power supply. The inductor current ripple compensation circuit is used to compensate for the voltage V across the inductor in a BUCK-type switching power supply. SW and voltage V OUT The process generates a ripple proportional to the inductor current; and this ripple proportional to the inductor current is superimposed on the FB pin of the BUCK-type switching power supply.
[0008] Furthermore, the inductor current ripple compensation circuit includes resistors R1, R2, R3, R4, R5, R6, R7, and R8, capacitors C1 and C2, operational amplifier A1, NMOS transistor M3, and NMOS transistor M4. Resistor R1 is connected between the SW pin of the BUCK-type switching power supply and node A; resistor R2 is connected between node A and ground; resistor R3 is connected between node A and node B; resistor R4 is connected between node B and node C; resistor R5 is connected between node C and node D; resistor R6 is connected between the FB pin of the BUCK-type switching power supply and node B; resistor R7 is connected between the source of NMOS transistor M3 and ground; resistor R8 is connected between the source of NMOS transistor M4 and ground. Capacitor C1 is connected between node B and ground, and capacitor C2 is connected between node C and ground; The gate of NMOS transistor M3 is connected to the output of operational amplifier A1, and the drain of NMOS transistor M3 is connected to node D; the gate of NMOS transistor M4 is connected to the output of operational amplifier A1, and the drain of NMOS transistor M4 is connected to the FB pin of the BUCK-type switching power supply. The positive input terminal of the operational amplifier A1 is connected to the V of the BUCK-type switching power supply. FB The negative input terminal of the operational amplifier A1 is connected to node D.
[0009] Furthermore, the BUCK-type switching power supply is a BUCK switching power supply with a constant on-time control mode.
[0010] Furthermore, the BUCK-type switching power supply includes MOSFET M1, LOGIC, MOSFET M2, inductor L0, capacitor C, resistor R9, and resistor R10. The drain of the MOSFET M1 is connected to V IN The source of the MOS transistor M1 is connected to V. SWThe gate of MOS transistor M1 is connected to one end of LOGIC; the drain of MOS transistor M2 is connected to V. SW The source of the MOSFET M2 is connected to ground, and the gate of the MOSFET M2 is connected to the other end of the LOGIC; one end of the inductor L0 is V SW Connected, the other end of the inductor L0 is connected to V OUT Connected; one end of the capacitor C is connected to V OUT The capacitor C is connected to ground; one end of the resistor R9 is connected to V. OUT The resistor R9 is connected to the FB pin at one end, and the resistor R10 is connected to ground at the other end.
[0011] Furthermore, the operational amplifier A1 includes MOS transistors MP1, MP2, MP3, MP4, MP5, and MP6, as well as transistors NP1, NP2, NP3, and NP4. The sources of MOSFETs MP1, MP2, MP3, and MP6 are all connected to the VDD port; the sources of transistors NP1, NP2, NP3, and NP4 are all connected to GND. The drain and gate of MOSFET MP1 are both connected to the gate of MOSFET MP3. The drain of MOSFET MP1 is also connected to the current input Ibias port. The drain and gate of MOSFET MP2 are both connected to the gate of MOSFET MP6. The drain of MOSFET MP2 is also connected to the drain of transistor NP1. The drain of MOSFET MP3 is configured in two paths, one of which is connected to the source of MOSFET MP4, and the other is connected to the source of MOSFET MP5. The gate of MOSFET MP4 is connected to node D, and the gate of MOSFET MP5 is connected to the V of the BUCK-type switching power supply. FB Connected; The gate and drain of transistor NP2 are both connected to the gate of transistor NP1, and the drain of transistor NP2 is also connected to the drain of MOSFET MP4; the gate and drain of transistor NP3 are both connected to the gate of transistor NP4, and the drain of transistor NP3 is also connected to the drain of MOSFET MP5; the drain of MOSFET MP6 is connected to the drain of transistor NP4.
[0012] Furthermore, the output gain of the operational amplifier A1 for:
[0013] in, This is the transconductance value of MOSFET MP4; The on-resistance of MOSFET MP6; This is the on-resistance of transistor NP4; The gain-bandwidth product of the operational amplifier A1 for:
[0014] in, This is the equivalent capacitance at the output of operational amplifier A1.
[0015] Furthermore, the MOS transistor MP1 and MOS transistor MP2 have the same dimensions.
[0016] Furthermore, the resistance values of resistor R5 and resistor R6 are equal.
[0017] Compared with the prior art, the beneficial effects of the present invention are as follows: This invention provides an inductor current ripple compensation circuit for switching power supplies, which compensates for the voltage V across the inductor in a BUCK-type switching power supply. SW and voltage V OUT The process generates a ripple proportional to the inductor current; this ripple is then superimposed on the FB pin of the BUCK-type switching power supply; using V... FB A ripple voltage proportional to the inductor current is superimposed on it. This ripple voltage suppresses other harmonics and plays a dominant role in harmonic response with V. REF The comparison showed that the desired stability was achieved; the ripple of FB was greatly increased without affecting the normal output voltage ripple, which improved the subharmonic oscillation phenomenon of the system and effectively improved the stability of the system output voltage. Attached Figure Description
[0018] Figure 1 Waveform diagram of subharmonic oscillation phenomenon; Figure 2 This is a structural diagram of the inductor current ripple compensation circuit described in this invention; Figure 3 This is a circuit diagram of operational amplifier A1 in this invention; Figure 4 This is a model diagram of the output filter containing parasitic parameters in this invention; Figure 5 This is a waveform diagram of inductor current and voltage in the complete output model of this invention; Figure 6 This is a graph showing the relationship between iL and output voltage ripple for different RSR values in this invention. Figure 7After adding the inductor current ripple compensation circuit in this invention, V FB Waveform diagram showing the change in inductor current. Detailed Implementation
[0019] To make the technical problems solved by the present invention, the technical solutions, and the beneficial effects clearer, the following specific embodiments provide a further detailed description of the present invention. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the scope of the invention.
[0020] As attached Figure 2 As shown, this invention provides an inductor current ripple compensation circuit for a switching power supply, wherein the inductor current ripple compensation circuit is applied to a BUCK-type switching power supply; wherein the BUCK-type switching power supply is a BUCK-type switching power supply with a constant on-time control mode; the inductor current ripple compensation circuit is used to compensate for the voltage V across the inductor in the BUCK-type switching power supply. SW and voltage V OUT The process generates a ripple proportional to the inductor current; and this ripple proportional to the inductor current is superimposed on the FB pin of the BUCK-type switching power supply.
[0021] In this invention, the BUCK-type switching power supply includes MOSFET M1, LOGIC, MOSFET M2, inductor L0, capacitor C, resistor R9, and resistor R10; the drain of MOSFET M1 is connected to V... IN The source of the MOS transistor M1 is connected to V. SW The gate of MOS transistor M1 is connected to one end of LOGIC; the drain of MOS transistor M2 is connected to V. SW The source of the MOSFET M2 is connected to ground, and the gate of the MOSFET M2 is connected to the other end of the LOGIC; one end of the inductor L0 is V SW Connected, the other end of the inductor L0 is connected to V OUT Connected; one end of the capacitor C is connected to V OUT The capacitor C is connected to ground; one end of the resistor R9 is connected to V. OUT The resistor R9 is connected to the FB pin at one end, and the resistor R10 is connected to ground at the other end.
[0022] The inductor current ripple compensation circuit includes resistors R1, R2, R3, R4, R5, R6, R7, and R8, capacitors C1 and C2, operational amplifier A1, NMOS transistors M3 and M4.
[0023] Resistor R1 is connected between the SW pin of the BUCK-type switching power supply and node A; resistor R2 is connected between node A and ground; resistor R3 is connected between node A and node B; resistor R4 is connected between node B and node C; resistor R5 is connected between node C and node D; resistor R6 is connected between the FB pin of the BUCK-type switching power supply and node B; wherein, the resistance values of resistor R5 and resistor R6 are equal; resistor R7 is connected between the source of NMOS transistor M3 and ground; resistor R8 is connected between the source of NMOS transistor M4 and ground.
[0024] Capacitor C1 is connected between node B and ground, and capacitor C2 is connected between node C and ground; the gate of NMOS transistor M3 is connected to the output of operational amplifier A1, and the drain of NMOS transistor M3 is connected to node D; the gate of NMOS transistor M4 is connected to the output of operational amplifier A1, and the drain of NMOS transistor M4 is connected to the FB pin of the BUCK-type switching power supply; the positive input of operational amplifier A1 is connected to the V pin of the BUCK-type switching power supply. FB The negative input terminal of the operational amplifier A1 is connected to node D.
[0025] The connection relationships between the components in the inductor current ripple compensation circuit are as follows: One end of resistor R1 is connected to the SW pin of the BUCK-type switching power supply, and the other end of resistor R1 is connected to node A; one end of resistor R2 is connected to node A, and the other end of resistor R2 is connected to ground; one end of resistor R3 is connected to node A, and the other end of resistor R3 is connected to node B; one end of resistor R4 is connected to node B, and the other end of resistor R4 is connected to node C; one end of resistor R5 is connected to node C, and the other end of resistor R5 is connected to node D; one end of resistor R6 is connected to node B, and the other end of resistor R6 is connected to the FB pin of the BUCK-type switching power supply; one end of resistor R7 is connected to the source of NMOS transistor M3, and the other end of resistor R7 is connected to ground; one end of resistor R8 is connected to the source of NMOS transistor M4, and the other end of resistor R8 is connected to ground.
[0026] One end of capacitor C1 is connected to node B, and the other end of capacitor C1 is connected to ground; one end of capacitor C2 is connected to node C, and the other end of capacitor C2 is connected to ground.
[0027] The gate of NMOS transistor M3 is connected to the output terminal of operational amplifier A1, the drain of NMOS transistor M3 is connected to node D, and the source of NMOS transistor M3 is connected to one end of resistor R7; the gate of NMOS transistor M4 is connected to the output terminal of operational amplifier A1, the drain of NMOS transistor M4 is connected to the FB pin of BUCK type switching power supply, and the source of NMOS transistor M4 is connected to one end of resistor R8.
[0028] The positive input terminal of the operational amplifier A1 is connected to the V of the BUCK-type switching power supply. FB The negative input terminal of the operational amplifier A1 is connected to node D, and the output terminal of the operational amplifier A1 is connected to the gate of both the NMOS transistor M3 and the gate of the NMOS transistor M4.
[0029] In this invention, the operational amplifier A1 is a symmetrical operational transconductance amplifier, and the output node of the operational amplifier A1 is a unique high-impedance node; the output gain of the operational amplifier A1 is... for:
[0030] in, This is the transconductance value of MOSFET MP4; The on-resistance of MOSFET MP6; This is the on-resistance of transistor NP4.
[0031] The gain-bandwidth product of the operational amplifier A1 for:
[0032] in, This is the equivalent capacitance at the output of operational amplifier A1.
[0033] As attached Figure 3 As shown, the operational amplifier A1 includes MOS transistors MP1, MP2, MP3, MP4, MP5, and MP6, as well as transistors NP1, NP2, NP3, and NP4.
[0034] The sources of MOSFETs MP1, MP2, MP3, and MP6 are all connected to the VDD port; the sources of transistors NP1, NP2, NP3, and NP4 are all connected to GND.
[0035] The drain and gate of MOSFET MP1 are connected to the gate of MOSFET MP3. The drain of MOSFET MP1 is also connected to the current input Ibias port. The drain and gate of MOSFET MP2 are connected to the gate of MOSFET MP6. The drain of MOSFET MP2 is also connected to the drain of transistor NP1.
[0036] The drain of MOSFET MP3 is configured with two paths, one connected to the source of MOSFET MP4 and the other connected to the source of MOSFET MP5; the gate of MOSFET MP4 is connected to node D, and the gate of MOSFET MP5 is connected to the V of the BUCK-type switching power supply. FB The gate and drain of transistor NP2 are connected to the gate of transistor NP1, and the drain of transistor NP2 is also connected to the drain of MOS transistor MP4.
[0037] The gate and drain of transistor NP3 are both connected to the gate of transistor NP4, and the drain of transistor NP3 is also connected to the drain of MOS transistor MP5; the drain of MOS transistor MP6 is connected to the drain of transistor NP4; preferably, the MOS transistor MP1 and MOS transistor MP2 have the same size.
[0038] The inductor current ripple compensation circuit for switching power supplies described in this invention is applied to BUCK switching power supplies with a control mode having a constant on-time; it reduces the voltage V across the inductor in the BUCK switching power supply. SW and voltage V OUT The process generates a ripple proportional to the inductor current; this ripple is then superimposed on the FB pin of the BUCK-type switching power supply. This significantly increases the ripple magnitude of FB without affecting the normal output voltage ripple, improving the subharmonic oscillation phenomenon and enhancing system stability. In this invention, an internal circuit implements an inductor current ripple sampling circuit, superimposing a ripple voltage in phase with the inductor current ripple onto the output sampling voltage and inputting it to a loop comparator for comparison with the output signal of the error amplifier. The voltage waveform at point SW is synchronized with the inductor current waveform; therefore, the ripple compensation circuit obtains a ripple voltage in phase with the inductor current ripple by sampling the voltage at point SW.
[0039] Working principle: The inductor current ripple compensation circuit for switching power supplies described in this invention obtains the voltage at node B after passing through a first-stage R filter circuit; and the voltage at node C after passing through a two-stage RC filter circuit. The voltage waveform at node B is a sawtooth wave, and the voltage at node C is the average value of the voltage at node B. The FB voltage is not simply the output sampling voltage, but rather the output sampling voltage after ripple compensation. The current I1 flowing into resistor R6 is:
[0040] Among them, V B V is the voltage at node B. FB R6 represents the voltage at the FB pin of the BUCK-type switching power supply; R6 represents the resistance value of resistor R6.
[0041] The output signal of operational amplifier A1 serves as the input signal of the common-source circuit, and the output signal of the common-source circuit is short-circuited with the negative input terminal of operational amplifier A1, forming a negative feedback system; the voltage at node D is clamped to the FB voltage; therefore, the current I2 flowing through resistor R5 is:
[0042] Among them, V C R is the voltage at node C; R5 is the resistance value of resistor R5.
[0043] Since MOSFETs MP1 and MP2 in operational amplifier A1 are of the same size and form a current mirror, with the two branches having the same current, the magnitudes of currents I3 and I2 are equal. Therefore: .
[0044] In the operational amplifier A1, the resistance values of resistor R5 and resistor R6 are equal. Therefore, the current I4 flowing out of resistor R6 is: .
[0045] In this invention, the current I4 flowing out of resistor R6 is a ripple current in phase with the inductor current ripple. According to the superposition theorem, the output of the ripple compensation circuit is the sum of the current I4 flowing out of resistor R6 and the voltages generated by the output voltage on resistors R9 and R10 respectively, thereby achieving the design purpose of the ripple compensation circuit.
[0046] As attached Figure 4 As shown in the attached document Figure 4The diagram shows the output filter model including parasitic parameters; with the assistance of a power switch and an LC filter, the power stage has the functions of energy storage and power transfer; the inductor model includes an ideal inductor L and a parasitic DC resistance R. DCR The output capacitor model includes three components, such as the equivalent series inductance L. ESL An equivalent series current R and an ideal output capacitor C OUT .
[0047] As attached Figure 5 As shown, attached Figure 5 The diagram shows the inductor current and voltage waveforms in the complete output model; in ripple-based control, two parasitic parameters in the output capacitor are: the ideal inductance L and the equivalent series resistance R. ESR These factors must be taken into account; because the output voltage waveform will be affected by these parasitic parameters; therefore, even with the influence of parasitic parameters, the stability of the converter must be enhanced.
[0048] The change in inductor current causes a change in voltage in each component, thus generating the output voltage waveform. The AC component of the inductor current flows through the output capacitor, producing a voltage ripple V. ESL Voltage ripple V ESR and voltage ripple V COUT They respectively sample the equivalent series resistance R. ESR and ideal output capacitor C OUT produce.
[0049] Among them, the conduction time phase:
[0050] Off-time phase:
[0051] On-time phase:
[0052] Off-time phase:
[0053] As attached Figure 6 As shown, attached Figure 6 The diagram shows the relationship between iL and output voltage ripple for different RSRs; for circuits without ripple compensation, such as Figure 6As shown, output capacitors with different RSR values produce different output ripple characteristics. This phenomenon can be translated into a phase delay Δφ related to the inductor current caused by different RSR values; a small RSR value results in a longer phase delay observed at the lowest value of VOUT; and a small RSR value reduces system stability because the linear relationship between the inductor current ripple and the output voltage ripple is insufficient. Figure 6 As can be seen, for a very small RESR, VOUT and VREF will intersect once more within one cycle, generating subharmonic oscillations.
[0054] As attached Figure 7 As shown, attached Figure 7 The diagram shows the V value after adding an inductor current ripple compensation circuit within the chip. FB Waveform diagram showing the change in inductor current; from the attached... Figure 7 As can be seen from the diagram, after adding the inductor current ripple compensation circuit described above, it will reduce the current ripple in V. FB A ripple voltage proportional to the inductor current is superimposed on the voltage. This ripple suppresses other subharmonics and plays a dominant role in comparison with VREF, achieving the desired stabilization effect.
[0055] The above embodiments are merely one of the implementation methods for achieving the technical solution of the present invention. The scope of protection claimed by the present invention is not limited to this embodiment, but also includes any variations, substitutions and other implementation methods that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention.
Claims
1. An inductor current ripple compensation circuit for a switching power supply, characterized in that, The inductor current ripple compensation circuit is applied to a BUCK-type switching power supply. The inductor current ripple compensation circuit is used to compensate for the voltage V across the inductor in a BUCK-type switching power supply. SW and voltage V OUT The process generates a ripple proportional to the inductor current; and the ripple proportional to the inductor current is superimposed on the FB pin of the BUCK-type switching power supply. The inductor current ripple compensation circuit includes resistors R1, R2, R3, R4, R5, R6, R7, and R8, capacitors C1 and C2, operational amplifier A1, NMOS transistor M3, and NMOS transistor M4. Resistor R1 is connected between the SW pin of the BUCK-type switching power supply and node A; resistor R2 is connected between node A and ground; resistor R3 is connected between node A and node B; resistor R4 is connected between node B and node C; resistor R5 is connected between node C and node D; resistor R6 is connected between the FB pin of the BUCK-type switching power supply and node B; resistor R7 is connected between the source of NMOS transistor M3 and ground; resistor R8 is connected between the source of NMOS transistor M4 and ground. Capacitor C1 is connected between node B and ground, and capacitor C2 is connected between node C and ground; The gate of NMOS transistor M3 is connected to the output of operational amplifier A1, and the drain of NMOS transistor M3 is connected to node D; the gate of NMOS transistor M4 is connected to the output of operational amplifier A1, and the drain of NMOS transistor M4 is connected to the FB pin of the BUCK-type switching power supply. The positive input terminal of the operational amplifier A1 is connected to the V of the BUCK-type switching power supply. FB The negative input terminal of the operational amplifier A1 is connected to node D.
2. The inductor current ripple compensation circuit for a switching power supply according to claim 1, characterized in that, The BUCK-type switching power supply is a BUCK switching power supply with a constant on-time control mode.
3. The inductor current ripple compensation circuit for a switching power supply according to claim 2, characterized in that, The BUCK-type switching power supply includes MOSFET M1, LOGIC, MOSFET M2, inductor L0, capacitor C, resistor R9, and resistor R10. The drain of the MOSFET M1 is connected to V IN The source of the MOS transistor M1 is connected to V. SW The gate of MOS transistor M1 is connected to one end of LOGIC; the drain of MOS transistor M2 is connected to V. SW The source of the MOSFET M2 is connected to ground, and the gate of the MOSFET M2 is connected to the other end of the LOGIC; one end of the inductor L0 is connected to V. SW Connected, the other end of the inductor L0 is connected to V OUT Connected; one end of the capacitor C is connected to V OUT The capacitor C is connected to ground; one end of the resistor R9 is connected to V. OUT The resistor R9 is connected to the FB pin at one end, and the resistor R10 is connected to ground at the other end.
4. The inductor current ripple compensation circuit for a switching power supply according to claim 1, characterized in that, The operational amplifier A1 includes MOSFETs MP1, MP2, MP3, MP4, MP5, and MP6, as well as transistors NP1, NP2, NP3, and NP4. The sources of MOSFETs MP1, MP2, MP3, and MP6 are all connected to the VDD port; the sources of transistors NP1, NP2, NP3, and NP4 are all connected to GND. The drain and gate of MOSFET MP1 are both connected to the gate of MOSFET MP3. The drain of MOSFET MP1 is also connected to the current input Ibias port. The drain and gate of MOSFET MP2 are both connected to the gate of MOSFET MP6. The drain of MOSFET MP2 is also connected to the drain of transistor NP1. The drain of MOSFET MP3 is configured in two paths, one of which is connected to the source of MOSFET MP4, and the other is connected to the source of MOSFET MP5. The gate of MOSFET MP4 is connected to node D, and the gate of MOSFET MP5 is connected to the V of the BUCK-type switching power supply. FB Connected; The gate and drain of transistor NP2 are both connected to the gate of transistor NP1, and the drain of transistor NP2 is also connected to the drain of MOSFET MP4; the gate and drain of transistor NP3 are both connected to the gate of transistor NP4, and the drain of transistor NP3 is also connected to the drain of MOSFET MP5; the drain of MOSFET MP6 is connected to the drain of transistor NP4.
5. The inductor current ripple compensation circuit for a switching power supply according to claim 4, characterized in that, The output gain of operational amplifier A1 for: in, This is the transconductance value of MOSFET MP4; The on-resistance of MOSFET MP6; This is the on-resistance of transistor NP4; The gain-bandwidth product of the operational amplifier A1 for: in, This is the equivalent capacitance at the output of operational amplifier A1.
6. The inductor current ripple compensation circuit for a switching power supply according to claim 4, characterized in that, The MOS transistors MP1 and MP2 have the same dimensions.
7. The inductor current ripple compensation circuit for a switching power supply according to claim 4, characterized in that, The resistance values of resistor R5 and resistor R6 are equal.
Citation Information
Patent Citations
On-chip integrated ripple circuit for buck conversion circuit
CN112600397A