A method and apparatus for generating a time sequence pattern sample, a storage medium and an electronic device

Abstract

The specification discloses a method and device for generating a time sequence pattern sample, a storage medium and an electronic device, the method comprising: generating a mask vector according to the time sequence of an edge from a previous node to a current node, the time sequence of each edge connected to the current node, and a time sequence constraint condition; performing alias sampling on a alias table constructed according to each edge weight to obtain a candidate edge; determining whether the candidate edge satisfies the time sequence constraint condition by using the mask vector; if yes, adding the obtained edge to a random walk path; and when the random walk ends, taking the random walk path as a training sample for training a graph neural network. In the method, alias sampling is performed on the alias table when performing random walk on a time sequence graph, thereby improving the sampling efficiency. Meanwhile, the mask vector is used to determine whether the edge obtained by alias sampling satisfies the time sequence constraint condition, so that the random walk path is generated quickly, thereby enabling efficient generation of the path as a training sample on the time sequence graph.

Description

Technical Field

[0001] This specification relates to the field of computer technology, and in particular to a method, apparatus, storage medium, and electronic device for generating timing diagram samples. Background Technology

[0002] With the development of technology, machine learning has been widely applied. As machine learning has progressed, machine learning models have become increasingly prevalent, especially graph neural networks.

[0003] There are many types of samples used to train graph neural networks (GNNs). One common method is to use paths from one node to another in the graph. Currently, the primary samples for training GNNs are paths from one node to another in static graphs. However, in practical applications, graphs often contain temporal information, specifically information about the edges from a node to its neighbors, which constrains the order of nodes along the path. Graphs with temporal information on their edges are called temporal graphs, and their applications are very wide-ranging, such as... Figure 1 As shown.

[0004] Figure 1 This is a schematic diagram illustrating the application usage process using a sequence diagram in existing technologies. Figure 1 The system comprises four nodes: Node 1 represents logging into the application, Node 2 represents entering the contacts module, Node 3 represents selecting a contact, and Node 4 represents sending a message in the dialog box. The edges connecting nodes have timing information: the timing information for the edge connecting Node 1 and Node 2 is 1, for Node 2 and Node 3 it is 2, and for Node 3 and Node 4 it is 3. During application use, Node 1 is executed first to log in, then Node 2 enters the contacts module, then Node 3 selects the contact to send a message to, and finally Node 4 sends the message in the dialog box. Each node has a specific order; Node 3 cannot be executed before Node 2 enters the contacts module, nor can Node 2 be executed after Node 4 sends a message in the dialog box. Figure 1 The timing constraint corresponding to the timing graph shown is: for two edges, the edge with a larger timing sequence must be placed after the edge with a smaller timing sequence. This is the timing constraint on the order of nodes in the path.

[0005] Meanwhile, training a high-performance graph neural network requires a large number of training samples, and collecting these samples is a time-consuming and labor-intensive process. Therefore, how to efficiently generate paths as training samples based on time sequence graphs is a problem that urgently needs to be solved. Summary of the Invention

[0006] This specification provides a method, apparatus, storage medium, and electronic device for generating timing diagram samples, in order to partially solve the aforementioned problems existing in the prior art.

[0007] The following technical solution is adopted in this specification:

[0008] This specification provides a method for generating time series diagram samples, including:

[0009] In the sequence graph, determine the current node reached by the current random walk, and the previous node of the current node in the path of the current random walk;

[0010] Determine the timing of the edge from the previous node to the current node in the timing graph, and use it as a reference timing.

[0011] Determine the edges connected to the current node in the timing graph, construct an alias table based on the weights of the edges, and generate a mask vector based on the timing of the edges, the reference timing, and the timing constraints corresponding to the timing graph.

[0012] Based on the alias table, each edge is sampled by alias to obtain candidate edges;

[0013] Based on the mask vector, determine whether the candidate edge satisfies the timing constraint condition;

[0014] If so, the candidate edge is added to the path as a sampled edge;

[0015] At the end of the current random walk, the path of the current random walk is used as a generated training sample, which is then used as input to the graph neural network to be trained.

[0016] Optionally, a mask vector is generated based on the timing of each edge, the reference timing, and the timing constraints corresponding to the timing diagram, specifically including:

[0017] For each edge, based on the timing of the edge, the reference timing, and the timing constraints corresponding to the timing diagram, it is determined whether the edge satisfies the timing constraints. If so, the element corresponding to the edge in the mask vector is set as the first element; otherwise, the element corresponding to the edge in the mask vector is set as the second element.

[0018] Determining whether the candidate edge satisfies the temporal constraint condition specifically includes:

[0019] When the element corresponding to the candidate edge in the mask vector is the first element, it is determined that the candidate edge satisfies the timing constraint condition;

[0020] When the element corresponding to the candidate edge in the mask vector is the second element, it is determined that the candidate edge does not satisfy the timing constraint condition.

[0021] Optionally, before setting the element corresponding to the edge in the mask vector as the first element, the method further includes:

[0022] Determine that the edge is not in the path of the current random walk.

[0023] Optionally, determining whether the edge satisfies the timing constraint conditions specifically includes:

[0024] When the timing of an edge is greater than the reference timing, the edge is determined to satisfy the timing constraint condition.

[0025] If the timing of an edge is not greater than the reference timing, then the edge is determined not to meet the timing constraint condition.

[0026] Optionally, when the candidate edge does not satisfy the timing constraint, the method further includes:

[0027] Resample each edge according to the alias table until the candidate edges obtained by alias sampling satisfy the temporal constraint conditions.

[0028] Optionally, when the candidate edge satisfies the temporal constraint condition, the method further includes:

[0029] The neighboring nodes connected to the current node in the time sequence graph via the sampling edge are re-established as the current node reached by the current random walk;

[0030] Alias ​​sampling is performed again based on the newly determined current node until the current random walk ends.

[0031] Optionally, the termination of the current random walk specifically includes:

[0032] The current random walk ends when the length of the current random walk path reaches a set threshold; or

[0033] The current random walk ends when no candidate edge that satisfies the temporal constraints can be obtained.

[0034] This specification provides an apparatus for generating timing diagram samples, comprising:

[0035] The acquisition module is used to determine the current node reached by the current random walk in the time sequence graph, as well as the previous node of the current node in the path of the current random walk;

[0036] The timing determination module is used to determine the timing of the edge from the previous node to the current node in the timing graph, as a reference timing.

[0037] The generation module is used to determine the edges connected to the current node in the timing graph, construct an alias table based on the weights of the edges, and generate a mask vector based on the timing of the edges, the reference timing, and the timing constraints corresponding to the timing graph.

[0038] The sampling module is used to perform alias sampling on each edge according to the alias table to obtain candidate edges;

[0039] The first judgment module is used to determine whether the candidate edge satisfies the timing constraint condition based on the mask vector.

[0040] The processing module is used to add the candidate edge as a sampling edge to the path when the judgment result of the first judgment module is yes;

[0041] The output module is used to take the path of the current random walk as a generated training sample when the current random walk ends. The training sample is used as input to the graph neural network to be trained to train the graph neural network.

[0042] Optionally, the generation module is specifically used to determine whether the edge satisfies the timing constraints based on the timing of the edge, the reference timing, and the timing constraints corresponding to the timing diagram. If yes, the element corresponding to the edge in the mask vector is set as the first element; otherwise, the element corresponding to the edge in the mask vector is set as the second element.

[0043] The first judgment module is specifically used to determine that the candidate edge satisfies the timing constraint condition when the element corresponding to the candidate edge in the mask vector is the first element; and to determine that the candidate edge does not satisfy the timing constraint condition when the element corresponding to the candidate edge in the mask vector is the second element.

[0044] Optionally, before setting the element corresponding to the edge in the mask vector as the first element, the generation module is also used to determine that the edge is not in the path of the current random walk.

[0045] Optionally, the generation module is specifically used to determine that the edge satisfies the timing constraint when the timing of the edge is greater than the reference timing; and to determine that the edge does not satisfy the timing constraint when the timing of the edge is not greater than the reference timing.

[0046] Optionally, the sampling module is further configured to, when the judgment result of the first judgment module is negative, re-sample each edge according to the alias table to obtain the candidate edge, until the candidate edge satisfies the timing constraint condition.

[0047] Optionally, the processing module is further configured to, when the judgment result of the first judgment module is yes, instruct the acquisition module to re-use the neighbor nodes connected to the current node in the time sequence diagram via the sampling edge as the current node of the current random walk, and instruct the time sequence determination module, the generation module, and the sampling module to re-perform alias sampling based on the re-determined current node until the current random walk ends.

[0048] Optionally, the device further includes:

[0049] The second judgment module is used to determine the end of the current random walk when the number of nodes in the current random walk path has reached a set threshold; or, when no candidate edge that satisfies the temporal constraint condition can be obtained, to determine the end of the current random walk.

[0050] This specification provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the above-described method for generating timing diagram samples.

[0051] This specification provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the above-described method for generating timing diagram samples.

[0052] The above-mentioned technical solutions adopted in this specification can achieve the following beneficial effects:

[0053] The method for generating time series graph samples provided in this specification determines the current node reached by the current random walk in the time series graph and the previous node of the current node in the current random walk path. Based on the temporal sequence of the edge from the previous node to the current node, the temporal sequence of each edge connected to the current node, and the temporal constraints of the time series graph, a mask vector is generated. An alias table is constructed based on the weight of each edge. The mask vector is used to determine whether the edge obtained by alias sampling satisfies the temporal constraints. If it does, the obtained edge is added to the random walk path. When the random walk ends, the random walk path is used as the training sample for training the graph neural network.

[0054] As can be seen from the above method, this method uses an alias table for alias sampling during random walks on the time series graph, which improves the sampling efficiency. At the same time, it uses a mask vector to determine whether the edges obtained by alias sampling meet the time series constraints. If they do, the edges obtained by alias sampling are added to the random walk path, which makes the random walk path generation speed fast, thus enabling efficient generation of paths as training samples on the time series graph. Attached Figure Description

[0055] The accompanying drawings, which are included to provide a further understanding of this specification and form part of this specification, illustrate exemplary embodiments and are used to explain this specification, but do not constitute an undue limitation thereof. In the drawings:

[0056] Figure 1 This is a schematic diagram illustrating the usage process of an application using a timing diagram in the prior art as described in this specification;

[0057] Figure 2 This is a flowchart illustrating a method for generating a timing diagram sample as described in this specification.

[0058] Figure 3 This is a schematic diagram of a time series diagram of a random walk generating path samples in this specification;

[0059] Figure 4 This is a schematic diagram illustrating the creation of a histogram based on the adjusted weights of each neighboring edge in this specification.

[0060] Figure 5 This is a flowchart illustrating a method for generating samples in a time sequence graph where the edges are already sorted, as described in this specification.

[0061] Figure 6 This is a schematic diagram illustrating the creation of histograms based on the adjusted weights of each neighboring edge in each group, as described in this specification.

[0062] Figure 7 A schematic diagram of a timing diagram sample generation device provided in this specification;

[0063] Figure 8 The corresponding information provided in this specification Figure 2 A schematic diagram of an electronic device. Detailed Implementation

[0064] To make the objectives, technical solutions, and advantages of this specification clearer, the technical solutions of this specification will be clearly and completely described below in conjunction with specific embodiments and corresponding drawings. Obviously, the described embodiments are only a part of the embodiments of this specification, and not all of them. Based on the embodiments in this specification, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this specification.

[0065] As mentioned earlier, efficiently generating training paths from a temporal graph is a pressing issue. Currently, random walks on temporal graphs typically start from a node. At each step, the transition probability from the current node to its neighboring nodes is determined based on the weights of the neighboring edges of the currently reached node. A new edge is sampled from the neighboring edges of the currently reached node according to the transition probability distribution. The temporal sequence of the sampled edge must be greater than that of the edge reaching the current node to be used as the next step in the random walk. This process continues until no new edge can be sampled, and the generated random walk path is then used as a training sample for the graph neural network. However, the time complexity of sampling through the transition probability distribution is O(logN), resulting in low sampling efficiency and slow random walk path generation, thus leading to low efficiency in generating training paths from temporal graphs.

[0066] Therefore, embodiments of this specification provide a method, apparatus, storage medium, and electronic device for generating timing diagram samples. The technical solutions provided by the embodiments of this specification are described in detail below with reference to the accompanying drawings.

[0067] Figure 2 This is a flowchart illustrating a method for generating a timing diagram sample as described in this specification, specifically including the following steps:

[0068] S100: In the time sequence graph, determine the current node reached by the current random walk, and the previous node of the current node in the path of the current random walk.

[0069] When training a graph neural network, the paths from one node to another in the temporal graph can be used as training samples. These path samples are primarily generated by performing random walks on the temporal graph. During a random walk, multiple rounds of sampling are required. In each round, a new edge is sampled from the neighboring edges of the current node. The neighboring node corresponding to this sampled edge is then used as the next node in the random walk. The sampled edge is added to the random walk path. Finally, the nodes sampled in each round and the edges connecting them are output as the path.

[0070] Based on this, in this specification, the device used to generate training samples determines the current node reached by the current random walk in the time sequence graph, and the previous node of the current node in the path of the current random walk. The device used to generate training samples can be a server for training a graph neural network, or a device such as a mobile phone or personal computer (PC) capable of executing the scheme described in this specification. For ease of explanation, the following description uses a server as the execution entity.

[0071] The current node is the node that the current random walk has reached in the sequence graph. The previous node of the current node is the node that preceded the current node in the path of the current random walk in the sequence graph. For example, Figure 3 This is a temporal graph diagram illustrating the process of generating path samples using a random walk. The graph contains nodes 1 to 7, and the edges connecting each pair of nodes contain temporal information and weights. Figure 3 (Only temporal information is shown in the image). For example, the temporal information of the edge from node 2 to node 3 is 1. The current random walk path is from node 1 to node 2, so the current node is node 2, which is the node that the current random walk has reached. The previous node of the current node is node 1, which is the previous node of the current node in the current random walk path.

[0072] S102: Determine the timing of the edge from the previous node to the current node in the timing graph, and use it as a reference timing.

[0073] The server determines the timing of the edges from the previous node to the current node in the sequence graph, using this as a reference timing sequence. This reference timing sequence is then used in the subsequent generation of the mask vector, based on the edges connected to the current node and the timing constraints corresponding to the sequence graph, to generate the mask vector. For example, Figure 3 In the sequence diagram shown, the current node reached by the random walk is node 2, and the previous node is node 1. Therefore, the sequence of the edge from the previous node to the current node, which is also the sequence of the edge from node 1 to node 2, is 1. Figure 3 When the current random walk reaches the current node, the reference timing is 1.

[0074] S104: Determine the edges connected to the current node in the time sequence graph, and construct an alias table based on the weights of the edges.

[0075] The server determines the edges (i.e., neighbor edges) connected to the current node in the sequence graph and constructs an alias table based on the weights of each edge. This alias table is built using equal probability distributions and binomial distributions. Specifically, the weights of each edge are first normalized to obtain normalized weights. Then, for each edge, the product of its normalized weight and the number of edges connected to the current node is used as its adjustment weight. A histogram is created based on these adjustments, with each column corresponding to an edge. The column height is the corresponding edge's adjustment weight. The histogram is adjusted by transferring the weights of edges with adjustment weights greater than 1 to edges with adjustment weights less than 1, ensuring that the height of each column in the adjusted histogram is 1 and each column contains at most two edges. An alias table is generated based on the adjusted histogram, consisting of a first array and a second array. The first array stores the probability of the edge originally corresponding to the i-th column, and the second array stores the index of the edge transferred to the i-th column. Here, i is a positive integer.

[0076] Continue to use Figure 3 Taking this as an example, we construct an alias table for the current node (node ​​2). The nodes connected to node 2 via edges are node 3, node 5, node 6, and node 7. Using the node numbers as the edge numbers, the neighboring edges connected to node 2 are edge 3, edge 5, edge 6, and edge 7. Assume the weights of each neighboring edge of node 2 are as shown in Table 1.

[0077] Neighbor Weight Side 3 0.3 Side 5 0.1 Side 6 0.1 Side 7 0.5

[0078] Table 1

[0079] Based on the weights shown in Table 1, since the weights in Table 1 are already normalized, there is no need to normalize the weights of each neighboring edge. For each neighboring edge, the product of the weight of that neighboring edge and the number of neighboring edges is used as the adjustment weight of that neighboring edge, that is, multiplying the weight of that neighboring edge by 4. After adjustment, the adjustment weights for edges 3, 5, 6 and 7 are 1.2, 0.4, 0.4 and 2, respectively.

[0080] Then as Figure 4 As shown, a histogram is created based on the adjusted weights of each neighboring edge. The four neighboring edges are divided into four columns, with each column corresponding to one neighboring edge. The column height of each column is the adjusted weight of the corresponding neighboring edge. For example, the first column corresponds to edge 3 with a column height of 1.2, the second column corresponds to edge 5 with a column height of 0.4, the third column corresponds to edge 6 with a column height of 0.4, and the fourth column corresponds to edge 7 with a column height of 2. The weights of neighboring edges with adjustment weights greater than 1 in each column are transferred to neighboring edges with adjustment weights less than 1, so that the column height of each column in the adjusted histogram is 1, and each column contains at most two neighboring edges. Specifically, the portion of the adjustment weight greater than 1 from edge 3 (i.e., 0.2) is transferred to edge 7, and the portion of the adjustment weight greater than 1 from edge 7 (i.e., 1.2) is transferred to edges 5 and 6 respectively, so that the column height of each column is 1. The resulting adjusted histogram has the following probabilities: edge 3 has a probability of 1 in column 1; edge 5 has a probability of 0.4 and edge 7 has a probability of 0.6 in column 2; edge 6 has a probability of 0.4 and edge 7 has a probability of 0.6 in column 3; edge 7 has a probability of 0.8 and edge 3 has a probability of 0.2 in column 4. According to... Figure 4 The adjusted histogram shown generates an alias table, which can be directly used as the alias table. The probabilities of the original neighbor edges in each column are stored in the first array, and the numbers of the neighbor edges transferred to each column are stored in the second array. Thus, the first array stores (1, 0.4, 0.4, 0.8), and the second array stores (null, 7, 7, 3).

[0081] S106: Generate a mask vector based on the timing of each side, the reference timing, and the timing constraints corresponding to the timing diagram.

[0082] The server generates a mask vector based on the timing of each edge, the reference timing, and the timing constraints corresponding to the timing graph. The timing constraints are the order of nodes in the path from one node to another, as specified in each timing graph. Different timing graphs may have the same or different timing constraints. The timing constraints are determined according to the specifications of the timing graph. For example... Figure 1 It is a schematic diagram in the existing technology that uses a timing diagram to represent the usage process of an application. Figure 1 The order of nodes in the path is node 1, node 2, node 3, node 4, executed in that order, with the timing constraints being... Figure 1 For any two edges in the sequence diagram, the edge with a shorter time sequence should be placed before the edge with a longer time sequence. Since the time constraints are determined based on the time diagram, for ease of explanation, the following time constraints are: Figure 1 The mask vector is composed of elements, each corresponding one-to-one with each edge connected to the current node. These elements are set based on the timing of each edge, the reference timing, and the timing constraints corresponding to the timing graph. Depending on the elements, the mask vector can mask edges that do not meet the timing constraints. For example, a mask vector can be a vector with elements of 0 or 1, where the 0 or 1 is determined by the edge timing, the reference timing, and the timing constraints. Element 1 indicates that the edge connected to the current node meets the timing constraints, and element 0 indicates that the edge connected to the current node does not meet the timing constraints. Each element corresponds one-to-one with each edge connected to the current node, and the mask vector can determine which edges connected to the current node meet and which do not based on these elements.

[0083] Specifically, first, determine the timing constraints of the sequence graph. The condition is checked if the timing constraints are met: if the timing of an edge is greater than the reference timing, the timing constraint is met; if the timing of an edge is not greater than the reference timing, the timing constraint is not met. For each edge, based on its timing, the reference timing, and the corresponding timing constraints of the sequence graph, determine if the edge meets the timing constraints. If it does, set the element corresponding to that edge in the mask vector as the first element; otherwise, set the element corresponding to that edge in the mask vector as the second element. For example, Figure 3The reference timing of the current random walk in the timing graph is 1. The neighboring edges of the current node (i.e., node 2) are edge 3, edge 5, edge 6, and edge 7. When setting the elements corresponding to each neighboring edge, the elements corresponding to the neighboring edges with timing greater than 1 in the mask vector are set as the first element 1, and the elements corresponding to the neighboring edges with timing less than 1 in the mask vector are set as the second element 0. After setting each edge, a mask vector is generated. The timing of edge 3 is 1, which is not greater than the reference timing 1, so the elements corresponding to edge 3 in the mask vector are set as the second element 0. The timing of edge 5 is 5, which is greater than the reference timing 1, so the elements corresponding to edge 5 in the mask vector are set as the first element 1. The timing of edge 6 is 2, which is greater than the reference timing 1, so the elements corresponding to edge 6 in the mask vector are set as the first element 1. The timing of edge 7 is 0, which is not greater than the reference timing 1, so the elements corresponding to edge 7 in the mask vector are set as the second element 0. The generated mask vector is [0, 1, 1, 0].

[0084] S108: Perform alias sampling on each edge according to the alias table to obtain candidate edges.

[0085] Based on the alias table constructed according to the weights in step S104, alias sampling is performed on each edge, and the sampled edges are used as candidate edges. Specifically, a random number is generated within the range of 0 to the number of columns in the alias table, and the generated random number is rounded up to obtain the candidate column number. The j-th column in the alias table corresponding to the candidate column number is determined, where j is a positive integer. A probability p1 is then randomly generated. It is determined whether p1 is less than the probability of the edge originally corresponding to the j-th column in the first array. If it is less, the edge originally corresponding to the j-th column is used as a candidate edge; if it is not less, the edge transferred to the j-th column from the second array is used as a candidate edge. Here, p1 is a number in the range of 0 to 1. This process continues... Figure 4 Suppose we generate a random number 1.7. We take the floor of this random number to determine the candidate column number. We then determine the j-th column in the alias table corresponding to this candidate column number, which is the floor of 1.7 (2). This corresponds to the 2nd column in the alias table. Next, suppose we generate a random number with a probability of 0.2. We check if the probability of this random number is less than the probability of the edge originally corresponding to the 2nd column in the first array. If it is less, we consider the edge originally corresponding to the 2nd column as a candidate edge. If it is not less, we consider the edges transferred from the second array to the 2nd column as candidate edges. In the 2nd column, edge 5 has a probability of 0.4, and edge 7 has a probability of 0.6. The probability of the edge originally corresponding to the 2nd column is 0.4. Since the probability of the randomly generated number 0.2 is less than the probability of the edge originally corresponding to the 2nd column, we consider edge 5 originally corresponding to the 2nd column as a candidate edge.

[0086] S110: Based on the mask vector, determine whether the candidate edge satisfies the timing constraint condition. If yes, proceed to step S112; otherwise, proceed to step S108.

[0087] Based on the mask vector, the corresponding elements of the candidate edges are determined, and the timing constraints are judged based on these elements. Specifically, based on the mask vector, the corresponding elements of the candidate edges are determined. If the element corresponding to the candidate edge in the mask vector is the first element, then the candidate edge satisfies the timing constraints; if the element corresponding to the candidate edge in the mask vector is the second element, then the candidate edge does not satisfy the timing constraints. Continuing with the previous example, assuming that the candidate edge obtained in step S108 is edge 5, and the element corresponding to edge 5 in the mask vector is the first element 1, then edge 5 satisfies the timing constraints, and step S112 is executed.

[0088] S112: Add the candidate edge as a sampling edge to the path.

[0089] If the candidate edge obtained in step S108 satisfies the temporal constraints, the server adds the candidate edge as a sample edge to the path. Continuing with the previous example, assuming that edge 5 is a candidate edge obtained in step S108 and satisfies the temporal constraints, edge 5 is added to the path. The current random walk path is node 1, node 2, node 5.

[0090] S114: When the current random walk ends, the path of the current random walk is used as a generated training sample. The training sample is used as input to the graph neural network to be trained to train the graph neural network.

[0091] When the current random walk in the temporal graph ends, the path of the current random walk is used as a generated training sample. This training sample is then input into the graph neural network (Graph Neural Network) to be trained. Specifically, when the length of the current random walk path reaches a set threshold, the current random walk path can be used as a generated training sample, and this training sample can be input into the graph neural network to be trained. The length of the path can be determined by the number of nodes or the number of edges in the path. Alternatively, if no candidate edges satisfying the temporal constraints can be obtained, the current random walk path can be used as a generated training sample, and this training sample can be input into the graph neural network to be trained.

[0092] Specifically, the training process involves obtaining path samples and their labels for the graph neural network to be trained. The graph neural network to be trained is designed to find the shortest paths from one node to another in a time sequence graph. The path samples are random walks from one node to another generated in the time sequence graph and used as training samples. The labels of the path samples represent the shortest paths from one node to another in the time sequence graph. The path samples are then input into the graph neural network to be trained, resulting in its output paths. The training objective is to minimize the difference between the output paths of the graph neural network and the labels of the path samples.

[0093] As can be seen from the above method, when generating samples on the time series graph, this method uses a random walk approach to sample and generate path samples. During sampling, an alias table is used for alias sampling to determine the corresponding element of the candidate edge in the mask vector. Based on the element, it is determined whether the candidate edge satisfies the time constraints. If it does, the candidate edge is added to the random walk path as a sampled edge. At the end of the random walk, the output random walk path can be used as a training sample. Although a random walk approach is used to sample and generate path samples on the time series graph, the use of alias sampling improves the sampling efficiency. Moreover, by determining whether the candidate edge satisfies the time constraints based on the corresponding element in the mask vector, the candidate edge is added to the random walk path only if it satisfies the constraints, making the random walk path generation speed fast. This allows for the efficient generation of paths as training samples on the time series graph.

[0094] In step S106 of the above method, for each edge, based on the edge's timing, reference timing, and the timing constraints corresponding to the timing graph, it is determined whether the edge satisfies the timing constraints. If so, the element corresponding to the edge in the mask vector is set as the first element. Before setting the element corresponding to the edge in the mask vector as the first element, it can also be determined whether the edge is not in the current random walk path. Specifically, if the current random walk sampling is non-replacement sampling, that is, edges that already exist in the current random walk path are not allowed to be added again, then for each edge, based on the edge's timing, reference timing, and the timing constraints corresponding to the timing graph, it is determined whether the edge satisfies the timing constraints. If so, it is determined whether the edge connected to the current node already exists in the current random walk path. If it does not exist, the element corresponding to the edge in the mask vector is set as the first element; if it exists, the element corresponding to the edge in the mask vector is set as the second element. For example, continuing to use... Figure 3Assume the current random walk path is node 2, node 6, node 3, node 6. The edge connected to the current node (i.e., node 6) is edge 3. The temporal sequence of edge 3 is 4, while the reference temporal sequence is 3. Therefore, edge 3 satisfies the temporal constraint. We determine whether the edge connecting the current node already exists in the current random walk path. If it doesn't exist, we set the element corresponding to that edge in the mask vector as the first element; if it does exist, we set the element corresponding to that edge in the mask vector as the second element. Since there is a connection between node 6 and node 3 in the current random walk path (connected by edge 3), meaning edge 3 exists in the current random walk path, we set the element corresponding to edge 3 in the mask vector as the second element.

[0095] In step S110 of the above method, based on the mask vector, it is determined whether the candidate edge meets the timing constraints. If so, step S112 is executed; otherwise, step S108 is executed. If a candidate edge does not meet the timing constraints, aliasing can be performed again on each edge according to the alias table until the candidate edge obtained by aliasing meets the timing constraints. Specifically, based on the mask vector, it is determined whether the candidate edge meets the timing constraints. When the element corresponding to the candidate edge in the mask vector is the first element, the candidate edge meets the timing constraints, and step S112 is executed. However, when the element corresponding to the candidate edge in the mask vector is the second element, the candidate edge does not meet the timing constraints. In this case, the process returns to step S108, and aliasing is performed according to the alias table generated in step S104 until the candidate edge obtained by aliasing meets the timing constraints, and step S112 is executed. This process continues... Figure 3 If the candidate edge obtained in step S108 is edge 7, and the element corresponding to edge 7 in the mask vector is the second element 0, then edge 7 does not meet the timing constraint conditions, and step S108 needs to be executed again. Alias ​​sampling is performed according to the alias table generated in step S104 until the candidate edge obtained by alias sampling meets the timing constraint conditions.

[0096] In step S112 of the above method, after adding the candidate edge as a sampling edge to the path when the candidate edge satisfies the temporal constraints, it is necessary to re-select the neighboring nodes connected to the current node in the temporal graph via the sampling edge as the current node of the current random walk. Based on the newly determined current node, steps S100 to S112 are re-executed until the current random walk ends. For example, continuing with the example in step S112 of the above method, assuming edge 5 is a candidate edge obtained in step S108 and satisfies the temporal constraints, edge 5 is added to the path, and the current random walk path is node 1, node 2, node 5. The neighboring nodes connected to the current node in the temporal graph via the sampling edge are re-selected as the current node of the current random walk, that is, node 5 is re-selected as the current node of the current random walk. Based on node 5, steps S100 to S112 are re-executed until the current random walk ends.

[0097] pass Figure 2 The method for generating time-series graph samples shown can efficiently generate paths as training samples based on the time sequence of the edge from the previous node to the current node, the time sequence of each edge connected to the current node, and the time-series constraints of the time-series graph. Elements corresponding to each edge in the mask vector are set. Using the mask vector, it is determined whether candidate edges obtained through alias sampling using an alias table satisfy the time-series constraints. Satisfactory candidate edges are added to the current random walk path as sampling edges until the current random walk ends, at which point the current random walk path is used as the generated training sample. This method improves sampling efficiency, thereby increasing the generation speed of random walk paths and efficiently generating paths as training samples. However, because some edges do not satisfy the time-series constraints, i.e. Figure 2 In the method, the edge set as the second element is sampled simultaneously during the aliasing process, including both edges that do not meet the temporal constraints and edges that do meet the temporal constraints. Although after obtaining candidate edges, it is possible to determine whether the temporal constraints are met by the corresponding element in the mask vector of the candidate edge, the sampling efficiency is reduced by sampling both edges that do not meet the temporal constraints and edges that meet the temporal constraints together during the aliasing process.

[0098] Based on this, the edges connected to the current node can be arranged in the order specified by the timing information. The arranged edges are then grouped, and the maximum timing sequence for each group is determined. For each group, an alias table is constructed based on the weights of the edges within that group. A mask vector for that group is generated based on the timing sequence of each edge, the reference timing sequence, and the timing constraints corresponding to the timing graph. Based on the reference timing sequence and the maximum timing sequence for each group, groups that meet the criteria are determined, and a group is randomly selected from these groups as a candidate group. Alias ​​sampling is then performed on the candidate group, i.e., [the process is described in the original text]. Figure 2The operations in steps S108 to S114. The specified order can be ascending or descending. For ease of explanation, the following explanation uses ascending order as an example. Figure 5 As shown. Figure 5 This is a flowchart illustrating a method for generating samples in a time series graph where the edges are already sorted, as described in this specification. The method specifically includes the following steps:

[0099] S200: Determine all edges connected to the current node, and arrange them in ascending order according to the temporal sequence information to obtain an ascending sort.

[0100] Identify all edges connecting to the current node (i.e., neighboring edges) and arrange them in ascending order of temporal sequence information. The current node is the node reached during the random walk in the temporal sequence graph. Continuing with... Figure 2 In the example of step S102 of the method shown, the nodes connected to the current node 2 via edges are nodes 3, 5, 6, and 7. Using the node numbers as the edge numbers, the neighboring edges connected to node 2 are edges 3, 5, 6, and 7. The temporal sequences of edges 3, 5, 6, and 7 are 1, 5, 2, and 0, respectively. Based on the temporal sequence of each neighboring edge, they are arranged in ascending order of temporal information to obtain an ascending arrangement. That is, edges 3, 5, 6, and 7 are arranged in ascending order of temporal information, resulting in the ascending arrangement: edge 7, edge 3, edge 5, edge 6.

[0101] S202: Group the ascending order and determine the maximum time sequence for each group.

[0102] Group the edges that are already sorted in ascending order. Each group can contain the same number of edges or different numbers of edges. Determine the maximum time sequence for each group. Continuing with the previous example, group the ascending order, that is, group edge 7, edge 3, edge 5, and edge 6 into two groups, A and B. Group A contains edge 7 and edge 3, and group B contains edge 6 and edge 5. The maximum time sequence for group A is 1, and the maximum time sequence for group B is 5.

[0103] S204: For each group, construct an alias table for that group based on the weights of each edge in that group.

[0104] For each group, an alias table is constructed based on the weights of each edge in that group. The process of constructing the alias table is the same as described above. Figure 2 Step S104 in the method shown is basically the same, so it will not be repeated here. Continuing with the previous example, assume that the weights of each neighboring edge of node 2 are as shown in Table 2.

[0105]

[0106] Table 2

[0107] Based on the weights shown in Table 2, since the weights of each neighbor edge in each group in Table 2 are not normalized weights, the weights of each neighbor edge in each group need to be normalized. In group A, the weights of edge 7 and edge 3 are 0.5 and 0.3 respectively. After normalization, the normalized weights of edge 7 and edge 3 in group A are 5 / 8 and 3 / 8 respectively. In group B, the weights of edge 6 and edge 5 are 0.1 and 0.1 respectively. After normalization, the normalized weights of edge 6 and edge 5 in group B are 1 / 2 and 1 / 2 respectively. For each group, the product of the normalized weight of each neighbor edge in that group and the number of neighbor edges in that group is used as the adjustment weight of each neighbor edge in that group. That is, the weight of each neighbor edge in that group is multiplied by 2. After adjustment, the adjusted weights of edge 7 and edge 3 in group A are 5 / 4 and 3 / 4 respectively, and the adjusted weights of edge 6 and edge 5 in group B are 1 and 1 respectively.

[0108] Create a histogram based on the adjusted weights, such as Figure 6 As shown. Divide the two neighbor edges in group A into two columns, each column corresponding to one neighbor edge. The column height of each column is the adjustment weight of the corresponding neighbor edge. That is, the column height of edge 7 in column 1 is 5 / 4, and the column height of edge 3 in column 2 is 3 / 4. Transfer the weight of the neighbor edges with adjustment weights greater than 1 to the neighbor edges with adjustment weights less than 1, so that the column height of each column in the adjusted histogram of group A is 1, and each column contains at most two neighbor edges. That is, transfer the weight of edge 7 that is greater than 1 (i.e., 1 / 4) to edge 3, so that the column height of each column is 1. The histogram of the adjusted group A is obtained. The probability of edge 7 in column 1 is 1, the probability of edge 3 in column 2 is 3 / 4, and the probability of edge 7 is 1 / 4. The histogram of the adjusted group B is obtained in the same way as the histogram of the adjusted group A. Figure 6 The adjusted histogram shown generates an alias table, which can be directly used as the alias table. The probabilities of the original neighbor edges in each column are stored in the first array, and the numbers of the neighbor edges transferred to each column are stored in the second array. Therefore, for group A, the first array stores (1, 3 / 4), and the second array stores (null, 3). For group B, the first array stores (1, 1), and the second array stores (null, null).

[0109] S206: For each group, generate the mask vector for that group based on the timing of each edge in that group, the reference timing, and the timing constraints corresponding to the timing diagram.

[0110] Based on the current node and the previous node, determine the timing sequence of the edges from the previous node to the current node in the timing graph, using this as the reference timing sequence. For each group, generate a mask vector for that group based on the timing sequence of each edge, the reference timing sequence, and the timing constraints corresponding to the timing graph. Specifically, first determine the timing constraints of the timing graph, and determine whether they are satisfied: if the edge's timing sequence is greater than the reference timing sequence, the timing constraint is satisfied; if the edge's timing sequence is not greater than the reference timing sequence, the timing constraint is not satisfied. For each edge in each group, determine whether it satisfies the timing constraint based on its timing sequence, the reference timing sequence, and the timing constraints corresponding to the timing graph. If it does, set the element corresponding to that edge in the mask vector as the first element; otherwise, set the element corresponding to that edge in the mask vector as the second element.

[0111] Continuing with the previous example, the reference timing for the current random walk in the graph is 1. When setting the elements corresponding to each neighboring edge, the elements corresponding to the neighboring edges with timing greater than 1 are set to the first element 1 in the mask vector, and the elements corresponding to the neighboring edges with timing not greater than 1 are set to the second element 0. After setting each group and each edge, the mask vectors for each group are generated. The timing of edge 7 is 0, which is not greater than the reference timing 1, so the element corresponding to edge 7 in the mask vector is set to the second element 0. The timing of edge 3 is 1, which is not greater than the reference timing 1, so the element corresponding to edge 3 in the mask vector is set to the second element 0. Therefore, the generated mask vector for group A is [0,0]. The timing of edge 6 is 2, which is greater than the reference timing 1, so the element corresponding to edge 6 in the mask vector is set to the first element 1. The timing of edge 5 is 5, which is greater than the reference timing 1, so the element corresponding to edge 5 in the mask vector is set to the first element 1. Therefore, the generated mask vector for group B is [1,1].

[0112] S208: Based on the reference timing and the largest timing in each group, determine the groups that meet the conditions, and randomly select one group from the groups that meet the conditions as a candidate group.

[0113] Based on the reference timing sequence and the maximum timing sequence of each group, groups meeting the criteria are determined. For each group, if the maximum timing sequence of the group is greater than the reference timing sequence, then the group is determined to be a compliant group; if the maximum timing sequence of the group is not greater than the reference timing sequence, then the group is determined not to be a compliant group. A group is randomly selected from the compliant groups as a candidate group. Specifically, since the edges are arranged in ascending order, the groups are also arranged in ascending order. Based on the maximum timing sequence of each group and the reference timing sequence, the smallest maximum timing sequence greater than the reference timing sequence is determined as the boundary timing sequence. The group containing the boundary timing sequence is designated as the boundary group. The maximum timing sequence of all groups after the boundary group is greater than the reference timing sequence; therefore, the groups after the boundary group and the boundary group itself can be directly considered compliant groups. A group is randomly selected from the compliant groups as a candidate group. Continuing with the previous example, the reference time series is 1. Group A contains edges 7 and 3, and the maximum time series of group A is 1. The maximum time series of group A is not greater than the reference time series, meaning group A is not a qualifying group. Group B contains edges 6 and 5, and the maximum time series of group B is 5. The maximum time series of group B is greater than the reference time series, meaning group B is a qualifying group. Since only one group in the example meets the criteria, this group is directly selected as a candidate group; therefore, group B is selected as a candidate group.

[0114] S210: Perform alias sampling on each edge according to the candidate group alias table to obtain candidate edges.

[0115] Alias ​​sampling is performed on each edge according to the candidate group alias table, and the sampled edges are used as candidate edges. Specifically, a random number is generated within the range of 0 to the number of columns in the candidate group alias table, and the integer part of the generated random number is used as the candidate column number. The j-th column in the candidate group alias table corresponding to the candidate column number is determined, where j is a positive integer. Then, a probability p1 is randomly generated, and it is determined whether p1 is less than the probability of the edge originally corresponding to the j-th column in the first array. If it is less, the edge originally corresponding to the j-th column is used as a candidate edge; if it is not less, the edge transferred to the j-th column in the second array is used as a candidate edge. Here, p1 is a number in the range of 0 to 1. This process continues... Figure 6 Suppose we generate a random number 1.7. We round up this random number to get the candidate column number. We then determine the j-th column in the alias table of the candidate group (i.e., group B), which is the j-th column of 1.7 rounded up to 2. This corresponds to the 2nd column in the alias table of the candidate group. Next, suppose we generate a random number with a probability of 0.2. We check if the probability of this random number is less than the probability of the edge originally corresponding to the 2nd column in the first array. If it is less, we use the edge originally corresponding to the 2nd column as a candidate edge. If it is not less, we use the edge transferred from the second array to the 2nd column as a candidate edge. Since there is only edge 5 in the 2nd column, we can directly use edge 5 as a candidate edge.

[0116] S212: Based on the mask vector of the candidate group, determine whether the candidate edge satisfies the timing constraint condition. If yes, proceed to step S214; otherwise, proceed to step S208.

[0117] Based on the mask vector, the corresponding elements of the candidate edges are determined, and the timing constraints are judged based on these elements. Specifically, based on the mask vector, the corresponding elements of the candidate edges are determined. When the element corresponding to the candidate edge in the mask vector is the first element, the candidate edge satisfies the timing constraints. When the element corresponding to the candidate edge in the mask vector is the second element, the candidate edge does not satisfy the timing constraints. If the candidate edge does not satisfy the timing constraints, step S208 needs to be executed to reselect a group, and the operations in steps S210 to S212 are executed until the candidate edges obtained by alias sampling satisfy the timing constraints, and then step S214 is executed. Continuing with the previous example, assuming that the candidate edge obtained in step S210 is edge 5, and the element corresponding to edge 5 in the mask vector is the first element 1, then edge 5 satisfies the timing constraints, and step S214 is executed.

[0118] S214: Add the candidate edge as a sample edge to the path.

[0119] If a candidate edge satisfies the temporal constraints, the server adds it as a sampled edge to the path. The neighboring nodes connected to the current node in the temporal graph via the sampled edge are then used as the current node for the current random walk. Steps S200 to S216 are then re-executed based on the newly determined current node until the current random walk ends. Continuing with the example above, assuming edge 5 is a candidate edge obtained in step S210 and satisfies the temporal constraints, edge 5 is added to the path. The current random walk path is node 1, node 2, node 5, and node 5 is used as the current node for the current random walk.

[0120] S216: At the end of the current random walk, the path of the current random walk is used as the generated training sample. The training sample is used as input to the graph neural network to be trained.

[0121] When the current random walk in the temporal graph ends, the path of the current random walk is used as a generated training sample. This training sample is then input into the graph neural network (Graph Neural Network) to be trained. Specifically, when the length of the current random walk path reaches a set threshold, the current random walk path can be used as a generated training sample, and this training sample can be input into the graph neural network to be trained. The length of the path can be determined by the number of nodes or the number of edges in the path. Alternatively, if no candidate edges satisfying the temporal constraints can be obtained, the current random walk path can be used as a generated training sample, and this training sample can be input into the graph neural network to be trained.

[0122] Specifically, the training process involves obtaining path samples and their labels for the graph neural network to be trained. The graph neural network to be trained is designed to find the shortest paths from one node to another in a time sequence graph. The path samples are random walks from one node to another generated in the time sequence graph and used as training samples. The labels of the path samples represent the shortest paths from one node to another in the time sequence graph. The path samples are then input into the graph neural network to be trained, resulting in its output paths. The training objective is to minimize the difference between the output paths of the graph neural network and the labels of the path samples.

[0123] The above method first groups the edges that have been sorted in ascending order. Then, a group is randomly selected from the groups whose maximum temporal sequence is greater than that of the edge from the previous node to the current node. This reduces the probability of selecting edges that do not meet the temporal constraints, increases the sampling probability, and thus improves the generation speed of random walk paths. This allows for the efficient generation of paths as training samples.

[0124] The above describes a method for generating timing diagram samples according to one or more embodiments of this specification. Based on the same idea, this specification also provides a corresponding apparatus for generating timing diagram samples, such as... Figure 7 As shown.

[0125] Figure 7 This specification provides a schematic diagram of a timing diagram sample generation device, which specifically includes:

[0126] The acquisition module 300 is used to determine the current node reached by the current random walk in the time sequence graph, and the previous node of the current node in the current random walk path;

[0127] The timing determination module 302 is used to determine the timing of the edge from the previous node to the current node in the timing diagram, as a reference timing.

[0128] The generation module 304 is used to determine each edge connected to the current node in the timing graph, construct an alias table according to the weight of each edge, and generate a mask vector according to the timing of each edge, the reference timing, and the timing constraints corresponding to the timing graph.

[0129] Sampling module 306 is used to sample each edge according to the alias table to obtain candidate edges;

[0130] The first judgment module 308 is used to determine whether the candidate edge satisfies the timing constraint condition based on the mask vector.

[0131] The processing module 310 is used to add the candidate edge as a sampling edge to the path when the judgment result of the first judgment module is yes;

[0132] The output module 312 is used to take the path of the current random walk as a generated training sample when the current random walk ends. The training sample is used to input the graph neural network to be trained in order to train the graph neural network.

[0133] Optionally, the generation module 304 is specifically used to determine whether the edge satisfies the timing constraints based on the timing of the edge, the reference timing, and the timing constraints corresponding to the timing diagram. If yes, the element corresponding to the edge in the mask vector is set as the first element; otherwise, the element corresponding to the edge in the mask vector is set as the second element.

[0134] The first judgment module 308 is specifically used to determine that the candidate edge satisfies the timing constraint condition when the element corresponding to the candidate edge in the mask vector is the first element; and to determine that the candidate edge does not satisfy the timing constraint condition when the element corresponding to the candidate edge in the mask vector is the second element.

[0135] Optionally, before setting the element corresponding to the edge in the mask vector as the first element, the generation module 304 is further configured to determine that the edge is not in the path of the current random walk.

[0136] Optionally, the generation module 304 is specifically used to determine that the edge satisfies the timing constraint when the timing of the edge is greater than the reference timing; and to determine that the edge does not satisfy the timing constraint when the timing of the edge is not greater than the reference timing.

[0137] Optionally, the sampling module 306 is further configured to, when the judgment result of the first judgment module 308 is negative, re-sample each edge according to the alias table to obtain the candidate edge, until the candidate edge satisfies the timing constraint condition.

[0138] Optionally, the processing module 310 is further configured to, when the judgment result of the first judgment module 308 is yes, instruct the acquisition module 300 to re-use the neighboring nodes connected to the current node in the timing diagram via the sampling edge as the current node of the current random walk, and instruct the timing determination module 302, the generation module 304, and the sampling module 306 to re-perform alias sampling based on the re-determined current node until the current random walk ends.

[0139] Optionally, the device further includes:

[0140] The second judgment module 314 is used to determine the end of the current random walk when the number of nodes in the current random walk path has reached a set threshold; or, when a candidate edge that satisfies the temporal constraint condition cannot be obtained, determine the end of the current random walk.

[0141] This specification also provides a computer-readable storage medium storing a computer program that can be used to execute the above-described... Figure 2 The method for generating the time series diagram sample shown.

[0142] This instruction manual also provides Figure 8 The diagram shows a schematic structural representation of the electronic device. Figure 8 At the hardware level, the electronic device includes a processor, internal bus, network interface, memory, and non-volatile memory, and may also include other hardware required for the business operations. The processor reads the corresponding computer program from the non-volatile memory into memory and then runs it to achieve the above-mentioned functions. Figure 2 The method for generating the timing diagram sample shown is illustrated. Of course, besides software implementation, this specification does not exclude other implementation methods, such as logic devices or a combination of hardware and software. In other words, the execution entity of the following processing flow is not limited to individual logic units, but can also be hardware or logic devices.

[0143] In the 1990s, improvements to a technology could be clearly distinguished as either hardware improvements (e.g., improvements to the circuit structure of diodes, transistors, switches, etc.) or software improvements (improvements to the methodology). However, with technological advancements, many methodological improvements today can be considered direct improvements to the hardware circuit structure. Designers almost always obtain the corresponding hardware circuit structure by programming the improved methodology into the hardware circuit. Therefore, it cannot be said that a methodological improvement cannot be implemented using hardware physical modules. For example, a Programmable Logic Device (PLD) (such as a Field Programmable Gate Array (FPGA)) is such an integrated circuit whose logic function is determined by the user programming the device. Designers can program and "integrate" a digital system onto a PLD themselves, without needing chip manufacturers to design and manufacture dedicated integrated circuit chips. Furthermore, nowadays, instead of manually manufacturing integrated circuit chips, this programming is mostly implemented using "logic compiler" software. Similar to the software compiler used in program development, the original code before compilation must be written in a specific programming language, called a Hardware Description Language (HDL). There are many HDLs, such as ABEL (Advanced Boolean Expression Language), AHDL (Altera Hardware Description Language), Confluence, CUPL (Cornell University Programming Language), HDCal, JHDL (Java Hardware Description Language), Lava, Lola, MyHDL, PALASM, and RHDL (Ruby Hardware Description Language). Currently, the most commonly used are VHDL (Very-High-Speed ​​Integrated Circuit Hardware Description Language) and Verilog. Those skilled in the art should understand that by simply performing some logic programming on the method flow using one of these hardware description languages ​​and programming it into an integrated circuit, the hardware circuit implementing the logical method flow can be easily obtained.

[0144] The controller can be implemented in any suitable manner. For example, it can take the form of a microprocessor or processor and a computer-readable medium storing computer-readable program code (e.g., software or firmware) executable by the (micro)processor, logic gates, switches, application-specific integrated circuits (ASICs), programmable logic controllers, and embedded microcontrollers. Examples of controllers include, but are not limited to, the following microcontrollers: ARC625D, Atmel AT91SAM, Microchip PIC18F26K20, and Silicon Labs C8051F320. A memory controller can also be implemented as part of the control logic of the memory. Those skilled in the art will also recognize that, in addition to implementing the controller in purely computer-readable program code form, the same functionality can be achieved by logically programming the method steps to make the controller take the form of logic gates, switches, ASICs, programmable logic controllers, and embedded microcontrollers. Therefore, such a controller can be considered a hardware component, and the means included therein for implementing various functions can also be considered as structures within the hardware component. Alternatively, the means for implementing various functions can be considered as both software modules implementing the method and structures within the hardware component.

[0145] The systems, devices, modules, or units described in the above embodiments can be implemented by computer chips or entities, or by products with certain functions. A typical implementation device is a computer. Specifically, a computer can be, for example, a personal computer, laptop computer, cellular phone, camera phone, smartphone, personal digital assistant, media player, navigation device, email device, game console, tablet computer, wearable device, or any combination of these devices.

[0146] For ease of description, the above devices are described in terms of function, divided into various units. Of course, in implementing this specification, the functions of each unit can be implemented in one or more software and / or hardware components.

[0147] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0148] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0149] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0150] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0151] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0152] Memory may include non-persistent storage in computer-readable media, such as random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.

[0153] Computer-readable media includes both permanent and non-permanent, removable and non-removable media that can store information using any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic magnetic disk storage or other magnetic storage devices, or any other non-transferable medium that can be used to store information accessible by a computing device. As defined herein, computer-readable media does not include transient computer-readable media, such as modulated data signals and carrier waves.

[0154] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0155] Those skilled in the art will understand that the embodiments of this specification can be provided as methods, systems, or computer program products. Therefore, this specification may take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this specification may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0156] This specification can be described in the general context of computer-executable instructions that are executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, etc., that perform a specific task or implement a specific abstract data type. This specification can also be practiced in distributed computing environments, where tasks are performed by remote processing devices connected via a communication network. In distributed computing environments, program modules can reside in local and remote computer storage media, including storage devices.

[0157] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to interchangeably. Each embodiment focuses on describing the differences from other embodiments. In particular, the system embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions in the method embodiments.

[0158] The above description is merely an embodiment of this specification and is not intended to limit this specification. Various modifications and variations can be made to this specification by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this specification should be included within the scope of the claims of this specification.

Claims

1. A method for generating time series graph samples, comprising: In the sequence graph, the current node reached by the current random walk and the previous node of the current node in the current random walk path are determined. The sequence graph represents the application usage process, the nodes in the sequence graph represent the operation behavior in the application usage process, and the timing information of the edges between the nodes in the sequence graph represents the order of the corresponding operation behavior. Determine the timing of the edge from the previous node to the current node in the timing graph, and use it as a reference timing. Determine the edges connected to the current node in the timing graph, construct an alias table based on the weights of the edges, and generate a mask vector based on the timing of the edges, the reference timing, and the timing constraints corresponding to the timing graph. Based on the alias table, each edge is sampled by alias to obtain candidate edges; Based on the mask vector, determine whether the candidate edge satisfies the timing constraint condition; If so, the candidate edge is added to the path as a sampled edge; At the end of the current random walk, the path of the current random walk is used as a generated training sample, which is then used as input to the graph neural network to be trained.

2. The method as described in claim 1, wherein generating a mask vector based on the timing of each edge, the reference timing, and the timing constraints corresponding to the timing diagram, specifically includes: For each edge, based on the timing of the edge, the reference timing, and the timing constraints corresponding to the timing diagram, it is determined whether the edge satisfies the timing constraints. If so, the element corresponding to the edge in the mask vector is set as the first element; otherwise, the element corresponding to the edge in the mask vector is set as the second element. Determining whether the candidate edge satisfies the temporal constraint condition specifically includes: When the element corresponding to the candidate edge in the mask vector is the first element, it is determined that the candidate edge satisfies the timing constraint condition; When the element corresponding to the candidate edge in the mask vector is the second element, it is determined that the candidate edge does not satisfy the timing constraint condition.

3. The method of claim 2, wherein before setting the element corresponding to the edge in the mask vector as the first element, the method further comprises: Determine that the edge is not in the path of the current random walk.

4. The method as described in claim 2, determining whether the edge satisfies the timing constraint condition, specifically includes: When the timing of an edge is greater than the reference timing, the edge is determined to satisfy the timing constraint condition. If the timing of an edge is not greater than the reference timing, then the edge is determined not to meet the timing constraint condition.

5. The method of claim 1, wherein when the candidate edge does not satisfy the timing constraint condition, the method further comprises: Resample each edge according to the alias table until the candidate edges obtained by alias sampling satisfy the temporal constraint conditions.

6. The method of claim 1, wherein when the candidate edge satisfies the temporal constraint condition, the method further comprises: The neighboring nodes connected to the current node in the time sequence graph via the sampling edge are re-established as the current node reached by the current random walk; Alias ​​sampling is performed again based on the newly determined current node until the current random walk ends.

7. The method of claim 6, wherein the current random walk ends, specifically including: The current random walk ends when the length of the current random walk path reaches a set threshold. or The current random walk ends when no candidate edge that satisfies the temporal constraints can be obtained.

8. An apparatus for generating time series diagram samples, comprising: The acquisition module is used to determine the current node reached by the current random walk in the time sequence graph, and the previous node of the current node in the current random walk path. The time sequence graph represents the application usage process, the nodes in the time sequence graph represent the operation behavior in the application usage process, and the time sequence information of the edges between the nodes in the time sequence graph represents the order of the corresponding operation behavior. The timing determination module is used to determine the timing of the edge from the previous node to the current node in the timing graph, as a reference timing. The generation module is used to determine the edges connected to the current node in the timing graph, construct an alias table based on the weights of the edges, and generate a mask vector based on the timing of the edges, the reference timing, and the timing constraints corresponding to the timing graph. The sampling module is used to perform alias sampling on each edge according to the alias table to obtain candidate edges; The first judgment module is used to determine whether the candidate edge satisfies the timing constraint condition based on the mask vector. The processing module is used to add the candidate edge as a sampling edge to the path when the judgment result of the first judgment module is yes; The output module is used to take the path of the current random walk as a generated training sample when the current random walk ends. The training sample is used as input to the graph neural network to be trained to train the graph neural network.

9. The apparatus of claim 8, wherein the generation module is specifically configured to determine whether the edge satisfies the timing constraints based on the timing of the edge, the reference timing, and the timing constraints corresponding to the timing diagram; if so, set the element corresponding to the edge in the mask vector as the first element; otherwise, set the element corresponding to the edge in the mask vector as the second element. The first judgment module is specifically used to determine that the candidate edge satisfies the timing constraint condition when the element corresponding to the candidate edge in the mask vector is the first element; and to determine that the candidate edge does not satisfy the timing constraint condition when the element corresponding to the candidate edge in the mask vector is the second element.

10. The apparatus of claim 9, wherein the generating module is further configured to determine that the edge is not in the path of the current random walk before setting the element corresponding to the edge in the mask vector as the first element.

11. The apparatus of claim 9, wherein the generation module is specifically configured to: determine that the edge satisfies the timing constraint when the timing of the edge is greater than the reference timing; and determine that the edge does not satisfy the timing constraint when the timing of the edge is not greater than the reference timing.

12. The apparatus of claim 8, wherein the sampling module is further configured to, when the judgment result of the first judgment module is negative, re-sample each edge according to the alias table to obtain the candidate edge, until the candidate edge satisfies the timing constraint condition.

13. The apparatus of claim 8, wherein the processing module is further configured to, when the judgment result of the first judgment module is yes, instruct the acquisition module to re-use the neighboring nodes connected to the current node in the timing diagram via the sampling edge as the current node of the current random walk, and instruct the timing determination module, the generation module, and the sampling module to re-perform alias sampling based on the re-determined current node until the current random walk ends.

14. The apparatus of claim 13, further comprising: The second judgment module is used to determine the end of the current random walk when the number of nodes in the current random walk path has reached a set threshold. Alternatively, if no candidate edge that satisfies the temporal constraints can be obtained, the current random walk is determined to end.

15. A computer-readable storage medium storing a computer program that, when executed by a processor, implements the method described in any one of claims 1 to 7.

16. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the method described in any one of claims 1 to 7.

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