A low inductance power module

CN115513166BActive Publication Date: 2026-09-04YANGZHOU GUOYANG ELECTRONICS CO LTD
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Patent Information

Application Number
CN202211203534.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-09-29
Publication Date
2026-09-04
Estimated Expiration
2042-09-29

AI Technical Summary

Technical Problem

因此,上桥的电流回路面积也较大,会产生较大的寄生电感(约为20nH),较长的铝线也会导致回路电阻的增加,进而导致损耗的增大

Benefits of technology

本发明优化芯片及铜层的布局,可以有效降低模块的寄生电感和回路电阻,并通过键合连接线及正负电极采用叠层的设计方式,可以进一步降低寄生电感,实现在保证现有封装的外形尺寸不变的情况下,优化其内部结构,降低了回路寄生电感,保障SiC功率模块的高频应用。

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Abstract

The application relates to the technical field of power electronic power modules, in particular to a low-inductance power module which comprises a shell, upper bridge MOS, lower bridge SBD, lower bridge MOS, upper bridge SBD, an output electrode, a positive electrode and a negative electrode, a bottom plate is installed in the shell, an insulating substrate is installed on the top of the bottom plate, a positive copper layer, a negative copper layer and an output copper layer are arranged on the upper surface of the insulating substrate, the output copper layer is divided into an upper output copper layer and a lower output copper layer; the layout of the chip and the copper layer is optimized, the parasitic inductance and loop resistance of the module can be effectively reduced, the parasitic inductance can be further reduced through the laminated design mode of the bonding connection line and the positive and negative electrodes, the internal structure of the module can be optimized under the condition that the shape size of the existing package is unchanged, the loop parasitic inductance is reduced, and the high-frequency application of the SiC power module is guaranteed.
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Description

Technical Field

[0001] This invention relates to the field of power electronic power module technology, and specifically to a low-inductance power module. Background Technology

[0002] As a representative of third-generation semiconductors, SiC MOSFETs offer advantages such as low high-temperature losses and high switching frequencies, which can improve system efficiency, reduce system size, and lower system costs. Major domestic and international manufacturers have begun promoting SiC power modules, such as... Figure 1 As shown, in existing SiC power modules, the positive electrode is connected to the positive copper layer on the surface of the insulating substrate via bonding wires. The lower surfaces of the upper-bridge MOS and upper-bridge SBD are both soldered to the positive copper layer on the same side, and their upper surfaces are connected to the output copper layer via shared bonding wires. The output electrode is connected to the output copper layer on the surface of the insulating substrate via bonding wires. Similarly, the lower surfaces of the lower-bridge MOS and lower-bridge SBD are both soldered to the output copper layer on the same side, and their upper surfaces are connected to the negative copper layer via shared bonding wires. The negative electrode is connected to the negative copper layer on the surface of the insulating substrate via bonding wires. Figure 2 As shown, when the upper-bridge MOSFET is operating, current flows from the positive electrode input through the positive electrode copper layer to the lower surface of the upper-bridge MOSFET, and then from the upper surface of the upper-bridge MOSFET through the longer bonding line on the upper surface of the upper-bridge SBD to the output electrode copper layer. Figure 3 As shown, after the upper-bridge MOS is turned off, since the current direction of the inductive load cannot change abruptly, the freewheeling current flows from the negative electrode into the negative copper layer, then through the longer bonding wire on the upper surface of the lower-bridge MOS to the upper surface of the lower-bridge SBD, and then from the lower surface of the lower-bridge SBD through the output copper layer, finally flowing into the output electrode. Figure 4 As shown, because the upper-bridge MOSFET and lower-bridge SBD are located far apart, the upper-bridge commutation loop path is relatively long. Therefore, the current loop area of ​​the upper-bridge is also large, resulting in a significant parasitic inductance (approximately 20nH). The longer aluminum wire also increases the loop resistance, leading to increased losses. Therefore, it is necessary to develop a low-inductance power module that is compatible with existing packaging structures and enables high-frequency applications of SiC MOSFETs. Summary of the Invention

[0003] To address the aforementioned problems, this invention provides a low-inductance power module that optimizes its internal structure while maintaining the same external dimensions as existing packages, thereby reducing parasitic inductance and ensuring high-frequency applications of SiC power modules.

[0004] To achieve the above objectives, the present invention provides the following technical solution: This invention provides a low-inductance power module, including a housing, an upper-bridge MOSFET, a lower-bridge SBD, another lower-bridge MOSFET, an upper-bridge SBD, an output electrode, a positive electrode, and a negative electrode. A base plate is installed inside the housing, and an insulating substrate is installed on the top of the base plate. A positive copper layer, a negative copper layer, and an output copper layer are disposed on the upper surface of the insulating substrate. The output copper layer is divided into an upper output copper layer and a lower output copper layer. The positive electrode is connected to the positive copper layer through a bonding wire. The positive copper layer is also divided into an upper positive copper layer and a lower positive copper layer. The positive copper layer, the output copper layer, and the negative copper layer are arranged alternately and symmetrically along the central axis of the module.

[0005] The present invention is further configured such that: both the positive electrode and the negative electrode are composed of an external connecting part, a bending part and an internal connecting part, and the bending part is located between the external connecting part and the internal connecting part. The bending part and the internal connecting part are provided with a portion extending towards the other electrode side. The positive electrode and the negative electrode are provided with a stacked structure. Both the positive electrode and the negative electrode include four forms, namely a first structural form, a second structural form, a third structural form and a fourth structural form.

[0006] The present invention is further configured such that: the first structural form is: the bent portion of the positive electrode bends downward from the right side of the external connecting portion, and both the bent portion of the positive electrode and the internal connecting portion extend towards the negative electrode side; the bent portion of the negative electrode bends downward from the right side of the external connecting portion, and both the bent portion of the negative electrode and the internal connecting portion extend towards the positive electrode side.

[0007] The present invention is further configured such that: the second structural form is: the bending portion of the positive electrode bends downward from the front side of the external connecting portion and then bends backward; the internal connecting portion has a portion extending toward the negative electrode side; the bending portion of the negative electrode bends downward from the rear side of the external connecting portion and then bends toward the positive electrode side; the internal connecting portion has a portion extending toward the positive electrode side.

[0008] The present invention is further configured such that: the third structural form is: the bent portion of the positive electrode bends downward from the right side of the external connecting portion, and the internal connecting portion has a portion extending towards the negative electrode side; the bent portion of the negative electrode bends downward from the right side of the external connecting portion, and the internal connecting portion has a portion extending towards the negative electrode side.

[0009] The present invention is further configured such that: the fourth structural form is: the bent portion of the positive electrode bends downward from the right side of the external connecting portion, and both the bent portion of the positive electrode and the internal connecting portion extend towards the negative electrode side; the bent portion of the negative electrode bends downward from the right side of the external connecting portion, and both the bent portion of the negative electrode and the internal connecting portion extend towards the positive electrode side.

[0010] A further feature of this invention is that the width of the copper foil varies along the path, and can become narrower as the current decreases and wider as the current increases.

[0011] A further feature of the present invention is that current equalization grooves can be provided on the positive electrode copper layer, the negative electrode copper layer, and the output electrode copper layer, wherein the length of the current equalization grooves increases with the increase of the copper foil width.

[0012] A further feature of this invention is that the connection between the positive and negative electrodes and the positive and negative copper layers adopts a stacked design.

[0013] Beneficial effects Compared with known public technologies, the technical solution provided by this invention has the following beneficial effects: This invention optimizes the layout of the chip and copper layer, which can effectively reduce the parasitic inductance and loop resistance of the module. By using a stacked design for the bonding wires and positive and negative electrodes, the parasitic inductance can be further reduced. This achieves the optimization of the internal structure and the reduction of loop parasitic inductance while keeping the external dimensions of the existing package unchanged, thus ensuring the high-frequency application of SiC power modules. Attached Figure Description

[0014] Figure 1 This is a schematic diagram of a power module using existing technology. Figure 2 This is a schematic diagram of the operating current loop of a SiC MOS power module in the prior art; Figure 3 This is a schematic diagram of the operating current loop for a current-carrying SiC SBD power module in the prior art. Figure 4 This is a topology diagram of an existing power module. Figure 5 This is a schematic diagram of the power module in Embodiment 1 of the present invention; Figure 6 This is a schematic diagram of the SiC MOS operating current loop in Embodiment 1 of the present invention; Figure 7 This is a schematic diagram of the SiC SBD operating current loop in Embodiment 1 of the present invention; Figure 8 This is a topology diagram of Embodiment 1 of the present invention; Figure 9 This is a side view of the power module in Embodiment 1 of the present invention; Figure 10 This is a schematic diagram of the positive and negative electrode stack in Embodiment 1 of the present invention; Figure 11 This is a schematic diagram of the power module in Embodiment 2 of the present invention; Figure 12 This is a side view of the power module in Embodiment 2 of the present invention; Figure 13This is a schematic diagram of the positive and negative electrode stack in Embodiment 2 of the present invention; Figure 14 This is a schematic diagram of the power module in Embodiment 3 of the present invention; Figure 15 This is a side view of the power module in Embodiment 3 of the present invention; Figure 16 This is a schematic diagram of the positive and negative electrode stack in Embodiment 3 of the present invention; Figure 17 This is a schematic diagram of the power module in Embodiment 4 of the present invention; Figure 18 This is a side view of the power module in Embodiment 4 of the present invention; Figure 19 This is a schematic diagram of the positive and negative electrode stack in Embodiment 4 of the present invention; Figure 20 This is a schematic diagram of the power module in Embodiment 5 of the present invention; Figure 21 This is a schematic diagram of the SiC MOS operating current loop in Embodiment 5 of the present invention; Figure 22 This is a schematic diagram of the flow equalization tank in Embodiment 5 of the present invention.

[0015] Legend: 1. Outer shell; 2. Base plate; 3. Insulating substrate; 4. Upper output electrode copper layer; 5. Lower output electrode copper layer; 6. Upper positive electrode copper layer; 7. Lower positive electrode copper layer; 8. Upper bridge MOS; 9. Lower bridge SBD; 10. Lower bridge MOS; 11. Upper bridge SBD; 12. Negative electrode copper layer; 13. Output electrode; 14. Positive electrode; 15. Negative electrode; 16. Current equalization groove; 100. External connection part; 200. Bending part; 300. Internal connection part. Detailed Implementation

[0016] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0017] In the description of this invention, it should be noted that the terms "upper," "lower," "inner," "outer," "top / bottom," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0018] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installed," "equipped with," "sleeved / connected," "connected," etc., should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be a connection within two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0019] Example 1: like Figure 5-10 As shown, this invention provides a low-inductance power module, including a housing 1, an upper-bridge MOS 8, a lower-bridge SBD 9, a lower-bridge MOS 10, an upper-bridge SBD 11, an output electrode 13, a positive electrode 14, and a negative electrode 15. A base plate 2 is installed inside the housing 1, and an insulating substrate 3 is installed on the top of the base plate 2. A positive copper layer, a negative copper layer 12, and an output copper layer are disposed on the upper surface of the insulating substrate 3. The output copper layer is divided into an upper output copper layer 4 and a lower output copper layer 5. The positive electrode 14 is connected to the positive copper layer via bonding wires. The positive copper layer is divided into an upper positive copper layer 6 and a lower positive copper layer 7. The lower surface of the upper-bridge MOS 8 is soldered to the upper positive copper layer 6. The upper surface of the upper bridge MOS8 is connected to the upper output copper layer 4 via bonding wires. The lower surface of the upper bridge SBD11 is soldered to the lower positive copper layer 7, and the upper surface of the upper bridge SBD11 is connected to the lower output copper layer 5 via bonding wires. The output electrode 13 is connected to the output copper layer via bonding wires. The lower surface of the lower bridge MOS10 is soldered to the lower output copper layer 5, and the upper surface of the lower bridge MOS10 is connected to the negative copper layer 12 via bonding wires. The lower surface of the lower bridge SBD9 is soldered to the upper output copper layer 4, and the upper surface of the lower bridge SBD9 is connected to the negative copper layer 12 via bonding wires. The negative electrode 15 is connected to the negative copper layer 12 via bonding wires.

[0020] Furthermore, both the positive electrode 14 and the negative electrode 15 are composed of an external connecting portion 100, a bending portion 200, and an internal connecting portion 300, with the bending portion 200 located between the external connecting portion 100 and the internal connecting portion 300. In this embodiment, the positive electrode 14 and the negative electrode 15 adopt a first structural form.

[0021] Wherein: the bent portion 200 of the positive electrode 14 bends downward from the right side of the external connecting portion 100, and both the bent portion 200 of the positive electrode 14 and the internal connecting portion 300 have portions extending toward the negative electrode 15; the bent portion 200 of the negative electrode 15 bends downward from the right side of the external connecting portion 100, and both the bent portion 200 of the negative electrode 15 and the internal connecting portion 300 have portions extending toward the positive electrode 14.

[0022] In this embodiment, except for the external connection portion 100, the positive electrode 14 and negative electrode 15 are all designed with a stacked structure, which helps to reduce parasitic inductance. When the upper bridge MOS8 is working, the current flows from the positive electrode 14 input through the upper positive copper layer 6 to the lower surface of the upper bridge MOS8, and then from the upper surface of the upper bridge MOS8 through a shorter bonding line to the upper output copper layer 4.

[0023] Because the upper-bridge MOSFET8 and lower-bridge SBD9 are located close to each other, the upper-bridge commutation loop path is shorter, resulting in a smaller current loop area and a correspondingly smaller parasitic inductance. The shorter aluminum wire further reduces the loop resistance, thereby reducing losses. Additionally, combined with… Figure 9 It is evident that the stacked design of the bonding wires of the positive electrode 14 and the negative electrode 15, as well as the partial stacked design of the positive electrode 14 and the negative electrode 15, both contribute to reducing the inductance of the circuit. Simulation analysis of the low-inductance power module of this invention shows that the circuit inductance is reduced to approximately 13.5 nH, a reduction of approximately 32% compared to previous models.

[0024] Example 2: like Figure 11-13 As shown, the low-inductance power module provided in this embodiment is largely the same as that in Embodiment 1, with the main difference being that the positive electrode 14 and the negative electrode 15 adopt a second structural form: the bent portion 200 of the positive electrode 14 first bends downward from the front side of the external connection portion 100, and then bends backward, with the internal connection portion 300 having a portion extending towards the negative electrode 15; the bent portion 200 of the negative electrode 15 first bends downward from the rear side of the external connection portion 100, and then bends towards the positive electrode 14, with the internal connection portion 300 having a portion extending towards the positive electrode 14. In this embodiment, except for the external connection portion 100, the remaining parts of the positive electrode 14 and the negative electrode 15 adopt a stacked design, which can help reduce parasitic inductance.

[0025] Example 3: like Figure 14-16 As shown, the low-inductance power module provided in this embodiment is largely the same as that in Embodiment 1, with the main difference being that the positive electrode 14 and the negative electrode 15 adopt a third structural form: the bent portion 200 of the positive electrode 14 bends downward from the right side of the external connection portion 100, and the internal connection portion 300 has a portion extending towards the negative electrode 15; similarly, the bent portion 200 of the negative electrode 15 bends downward from the right side of the external connection portion 100, and the internal connection portion 300 has a portion extending towards the negative electrode 15. In this embodiment, except for the external connection portion 100, the remaining portions of the positive electrode 14 and the negative electrode 15 adopt a stacked design, which helps to reduce parasitic inductance.

[0026] Example 4: like Figure 17-19As shown, the low-inductance power module provided in this embodiment is largely the same as that in Embodiment 1, with the main difference being that the positive electrode 14 and the negative electrode 15 adopt a fourth structural form: the bent portion 200 of the positive electrode 14 bends downward from the right side of the external connection portion 100, and both the bent portion 200 and the internal connection portion 300 of the positive electrode 14 extend towards the negative electrode 15; similarly, the bent portion 200 of the negative electrode 15 bends downward from the right side of the external connection portion 100, and both the bent portion 200 and the internal connection portion 300 of the negative electrode 15 extend towards the positive electrode 14. It should be noted that the internal connection portion 300 of the positive electrode 14 and the negative electrode 15 is ultrasonically welded to the corresponding copper layer. Except for the external connection portion 100, the remaining parts of the positive electrode 14 and the negative electrode 15 adopt a multilayer design, which helps to reduce parasitic inductance.

[0027] Example 5: like Figure 20-22 As shown, the low-inductance power module provided in this embodiment is largely the same as that in Embodiment 1, with the main difference being that the layout of the positive copper layer, negative copper layer 12, and output copper layer is optimized, specifically, current-equalizing grooves 16 are provided on the positive copper layer, negative copper layer 12, and output copper layer. The width of the copper layer narrows as the current decreases and widens as the current increases, as shown... Figure 21 As shown. Meanwhile, current-equalizing grooves 16 are arranged around the chip, and their length increases with the width of the copper foil, as shown. Figure 22 As shown. For the multi-chip parallel module of the present invention, by means of the variation in copper layer width and the increase in current sharing slots, the current and inductance between each chip can be effectively balanced to achieve the effect of current sharing.

[0028] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions will not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A low-inductance power module, characterized in that, The module includes a housing (1), an upper bridge MOS (8), a lower bridge SBD (9), a lower bridge MOS (10), an upper bridge SBD (11), an output electrode (13), a positive electrode (14), and a negative electrode (15). A base plate (2) is installed inside the housing (1). An insulating substrate (3) is installed on the top of the base plate (2). A positive copper layer, a negative copper layer (12), and an output copper layer are provided on the upper surface of the insulating substrate (3). The output copper layer is divided into an upper output copper layer (4) and a lower output copper layer (5). The positive copper layer is divided into an upper positive copper layer (6) and a lower positive copper layer (7). The positive copper layer, the output copper layer, and the negative copper layer (12) are arranged alternately and symmetrically along the central axis of the module. The lower surface of the upper bridge MOS (8) is soldered to the upper positive copper layer (6), and the upper surface of the upper bridge MOS (8) is connected to the upper output copper layer (4) through bonding wires. The lower surface of the upper bridge SBD (11) is soldered to the lower positive copper layer (7), and the upper surface of the upper bridge SBD (11) is connected to the lower output copper layer (5) through bonding wires. The lower surface of the lower bridge MOS (10) is soldered to the lower output copper layer (5), and the upper surface of the lower bridge MOS (10) is connected to the negative copper layer (12) through bonding wires. The lower surface of the lower bridge SBD (9) is soldered to the upper output copper layer (4), and the upper surface of the lower bridge SBD (9) is connected to the negative copper layer (12) through bonding wires. The negative electrode (15) is connected to the negative copper layer (12) through bonding wires.

2. The low-inductance power module according to claim 1, characterized in that, The positive electrode (14) and the negative electrode (15) are both composed of an external connecting part (100), a bending part (200) and an internal connecting part (300), and the bending part (200) is located between the external connecting part (100) and the internal connecting part (300). The bending part (200) and the internal connecting part (300) are provided with a portion extending to the other electrode side. The positive electrode (14) and the negative electrode (15) are provided with a stacked structure. The positive electrode (14) and the negative electrode (15) each include four forms, namely the first structural form, the second structural form, the third structural form and the fourth structural form.

3. A low-inductance power module according to claim 2, characterized in that, The first structural form is as follows: the bent portion (200) of the positive electrode (14) bends downward from the right side of the external connecting portion (100), and both the bent portion (200) of the positive electrode (14) and the internal connecting portion (300) have a portion extending toward the negative electrode (15). The bent portion (200) of the negative electrode (15) bends downward from the right side of the external connecting portion (100), and both the bent portion (200) of the negative electrode (15) and the internal connecting portion (300) have a portion extending toward the positive electrode (14).

4. A low-inductance power module according to claim 2, characterized in that, The second structural form is as follows: the bent portion (200) of the positive electrode (14) bends downward from the front side of the external connecting portion (100) and then bends backward; the internal connecting portion (300) has a portion extending toward the negative electrode (15); the bent portion (200) of the negative electrode (15) bends downward from the rear side of the external connecting portion (100) and then bends toward the positive electrode (14); the internal connecting portion (300) has a portion extending toward the positive electrode (14).

5. A low-inductance power module according to claim 2, characterized in that, The third structural form is as follows: the bent portion (200) of the positive electrode (14) bends downward from the right side of the external connecting portion (100), the internal connecting portion (300) has a portion extending towards the negative electrode (15), and the bent portion (200) of the negative electrode (15) bends downward from the right side of the external connecting portion (100).

6. A low-inductance power module according to claim 2, characterized in that, The fourth structural form is as follows: the bent portion (200) of the positive electrode (14) bends downward from the right side of the external connecting portion (100), and both the bent portion (200) and the internal connecting portion (300) of the positive electrode (14) have portions extending toward the negative electrode (15). The bent portion (200) of the negative electrode (15) bends downward from the right side of the external connecting portion (100), and both the bent portion (200) and the internal connecting portion (300) of the negative electrode (15) have portions extending toward the positive electrode (14).

7. A low-inductance power module according to claim 1, characterized in that, The width of the copper foil varies along the path, narrowing as the current decreases and widening as the current increases.

8. A low-inductance power module according to claim 7, characterized in that, A current equalization groove (16) is also provided on the positive electrode copper layer, the negative electrode copper layer (12) and the output electrode copper layer. The length of the current equalization groove (16) increases with the increase of the copper skin width.

9. A low-inductance power module according to claim 1, characterized in that, The connection between the positive and negative electrodes and the positive and negative copper layers adopts a stacked design.

Citation Information

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