Digital to analog conversion circuit of r-2r ladder resistor network architecture
Patent Information
- Application Number
- CN202211167626.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-09-23
- Publication Date
- 2026-09-29
- Estimated Expiration
- 2042-09-23
AI Technical Summary
[0004]本文中描述的实施例提供了一种R-2R梯形电阻网络架构的数模转换电路,解决了为了减低高精度R-2R梯形电阻网络架构的数模转换电路的开关尺寸,设计成本,而产生的DNL误差大,DNL性能下降,引起产品良品率的下降的问题
[0015]本公开的实施例的R-2R梯形电阻网络架构的数模转换电路包括:支路电阻、支路开关、桥接电阻、以及第一补偿电阻、第二补偿电阻、第三补偿电阻;其中,支路电阻和支路开关依次串联在每条支路上;从最低位的支路到最高位的支路,每两个支路之间桥接一个桥接电阻,支路电阻的阻值等于桥接电阻的阻值的两倍,从最低位的支路到最高位的支路分别对应不同的数字信号位;预设位的支路与预设位的支路相邻的更低位的支路之间的桥接电阻串接第一补偿电阻;与预设位的支路依次相邻的两个更低位的支路之间的桥接电阻串接第二补偿电阻;从比预设位的支路低两位的支路开始到最低位的支路之间的桥接电阻都串接一个第三补偿电阻,第一补偿电阻为第二补偿电阻的一半,第三补偿电阻为第二补偿电阻的两倍,第二补偿电阻的阻值与最高位的支路的支路开关的导通阻抗、预设位的支路的权重相关;预设位的支路的支路开关的导通阻抗为第二补偿电阻的两倍;第一补偿电阻与第二补偿电阻之间的支路的支路开关的导通阻抗为第二补偿电阻的三倍;比预设位的支路低两位的支路向最低位的支路的一侧的所有支路的支路开关的导通阻抗都等于第二补偿电阻的四倍,其他的支路的支路开关的导通阻抗与对应的支路的权重成比例关系。本公开实施例的R-2R梯形电阻网络架构的数模转换电路,将补偿电阻(第一补偿电阻、第二补偿电阻、第三补偿电阻)采用渐进的方式引入R-2R网络,补偿电阻与支路开关导通阻抗失配而引入的DNL,在高位支路能够因为补偿电阻的阻值减小而有效衰减,即使在低位支路会随着补偿电阻阻值增加而增加,但是本身低位DNL就会衰减,因此整体DNL仍将减小。
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Figure CN115514364B_ABST
Abstract
Description
Technical Field
[0001] Embodiments of this disclosure relate to the field of integrated circuit technology, and more specifically, to digital-to-analog converter circuits with an R-2R ladder resistor network architecture. Background Technology
[0002] Digital-to-analog converters (DACs) play a crucial role in modern communications, computers, and electronics, converting digital codes into analog signals. There are many different DAC architectures, with the R-2R ladder network architecture being a commonly used one. However, with the increasing demand for high-precision transmission, the number of branches required also increases. The area requirement for branch switches (typically transistors) also increases exponentially with the precision of the R-2R ladder network (corresponding to the number of bits in the DAC). This necessitates a very large layout area for high-precision R-2R ladder networks. Although in practical circuit design, the switch size is not proportionally increased in lower-order branches where the impact is relatively small, the total required switch size remains large to maintain accuracy. Larger switch sizes increase design costs and make device layout matching more difficult.
[0003] To address the aforementioned issues, a method was proposed that reduces the size of switches in some branches and adds compensation resistors to the bridging resistors between some branches to decrease the overall switch size, thereby reducing design costs and simplifying device layout matching. However, the inventors discovered that this solution, under extreme process conditions, exhibits a problem where the differential nonlinearity (DNL) error is maximized when the resistance changes of the branch switches and compensation resistors show opposite trends and the difference reaches its maximum. This affects the linearity performance of the system and consequently leads to a decrease in product yield. Summary of the Invention
[0004] The embodiments described herein provide a digital-to-analog converter circuit with an R-2R trapezoidal resistor network architecture, which solves the problem of large DNL error, degraded DNL performance, and decreased product yield caused by reducing the switching size and design cost of high-precision R-2R trapezoidal resistor network architecture digital-to-analog converter circuits.
[0005] The first aspect of this disclosure provides a digital-to-analog converter circuit with an R-2R ladder resistor network architecture. The digital-to-analog converter circuit includes: branch resistors, branch switches, bridging resistors, and a first compensation resistor, a second compensation resistor, and a third compensation resistor. The branch resistors and branch switches are connected in series in each branch. From the least significant branch to the most significant branch, a bridging resistor is connected between every two branches. The resistance value of each branch is twice the resistance value of the bridging resistor. Each branch from the least significant branch to the most significant branch corresponds to a different digital signal bit. The bridging resistor between a branch with a preset position and a lower-position branch adjacent to the preset position is connected in series with the first compensation resistor. The bridging resistor between two lower-position branches sequentially adjacent to the preset position branch is connected in series with the second compensation resistor. A third compensation resistor is connected in series with the bridging resistors between the branches two positions lower than the lowest position and the lowest position branch. The first compensation resistor is half the value of the second compensation resistor, and the third compensation resistor is twice the value of the second compensation resistor. The resistance value of the second compensation resistor is related to the on-resistance of the branch switch of the highest position branch and the weight of the preset position branch. The on-resistance of the branch switch of the preset position branch is twice the value of the second compensation resistor. The on-resistance of the branch switch of the branch between the first compensation resistor and the second compensation resistor is three times the value of the second compensation resistor. The on-resistance of the branch switches of all branches on the side from the branch two positions lower than the preset position branch to the lowest position branch is four times the value of the second compensation resistor. The on-resistance of the branch switches of other branches is proportional to the weight of the corresponding branch.
[0006] Optionally, the ratio of the on-resistance of the branch switch corresponding to the highest bit to the resistance of the second compensation resistor is equal to twice the weight of the branch of the preset bit.
[0007] Optionally, the range of the preset bits is greater than 3 and less than or equal to the number of bits in the digital-to-analog converter circuit.
[0008] Optionally, the value of the preset bit can be adjusted according to the required accuracy.
[0009] Optionally, the branch switch is a transistor.
[0010] Optionally, the digital-to-analog converter circuit is a voltage-type digital-to-analog converter circuit or a current-type digital-to-analog converter circuit.
[0011] Optionally, one end of the branch switch of each branch from the lowest to the highest level is connected to the branch resistor, and the other end is connected to a high-potential reference voltage or a low-potential reference voltage; one end of the branch resistor of the highest level branch is connected to one end of the corresponding branch switch, and the other end is connected to the output voltage terminal.
[0012] Optionally, if the low-potential reference voltage is a zero reference voltage, the digital-to-analog converter circuit is a voltage-type digital-to-analog converter circuit with a single reference voltage; if the low-potential reference voltage is a non-zero reference voltage, the digital-to-analog converter circuit is a voltage-type digital-to-analog converter circuit with dual reference voltages.
[0013] Optionally, one end of the branch switch of each branch from the lowest to the highest position is connected to the branch resistor, and the other end is connected to the current output terminal or the ground terminal; one end of the branch resistor of the highest position branch is connected to one end of the corresponding branch switch, and the other end is connected to the reference current terminal.
[0014] Optionally, adjusting the value of the preset bit according to the accuracy requirement includes: the higher the accuracy, the larger the value of the preset bit; the lower the accuracy, the smaller the value of the preset bit.
[0015] The digital-to-analog converter circuit of the R-2R ladder resistor network architecture of this disclosure includes: branch resistors, branch switches, bridging resistors, and a first compensation resistor, a second compensation resistor, and a third compensation resistor; wherein, the branch resistors and branch switches are connected in series in each branch; from the least significant branch to the most significant branch, a bridging resistor is connected between every two branches, and the resistance value of the branch resistor is equal to twice the resistance value of the bridging resistor, and the branches from the least significant branch to the most significant branch correspond to different digital signal bits; the bridging resistor between a branch of a preset position and a lower-position branch adjacent to the preset position is connected in series with the first compensation resistor; the bridging resistor between two lower-position branches sequentially adjacent to the preset position branch is connected in series with the second compensation resistor; from the branch of a preset position to the lower-position branch... A third compensation resistor is connected in series with the bridging resistors between the two-digit branches and the lowest-digit branch. The first compensation resistor is half the value of the second compensation resistor, and the third compensation resistor is twice the value of the second compensation resistor. The value of the second compensation resistor is related to the on-resistance of the branch switch of the highest-digit branch and the weight of the branch at the preset position. The on-resistance of the branch switch of the branch at the preset position is twice the value of the second compensation resistor. The on-resistance of the branch switch of the branch between the first and second compensation resistors is three times the value of the second compensation resistor. The on-resistance of the branch switches of all branches on the side from the branch two digits below the preset position to the lowest-digit branch is four times the value of the second compensation resistor. The on-resistance of the branch switches of other branches is proportional to the weight of the corresponding branch. The digital-to-analog converter circuit of the R-2R trapezoidal resistor network architecture in this embodiment introduces compensation resistors (first compensation resistor, second compensation resistor, and third compensation resistor) into the R-2R network in a progressive manner. The DNL introduced by the mismatch between the compensation resistor and the branch switch conduction impedance can be effectively attenuated in the high-order branches due to the decrease in the resistance value of the compensation resistor. Even though the DNL in the low-order branches will increase with the increase in the resistance value of the compensation resistor, the DNL in the low-order branches will be attenuated, so the overall DNL will still be reduced. Attached Figure Description
[0016] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings of the embodiments will be briefly described below. It should be understood that the drawings described below only relate to some embodiments of this disclosure and are not intended to limit this disclosure, wherein:
[0017] Figure 1 This is a schematic diagram of a digital-to-analog converter circuit with a traditional R-2R ladder resistor network architecture.
[0018] Figure 2 Yes Figure 1 A schematic diagram of an improved R-2R ladder resistor network architecture digital-to-analog converter circuit;
[0019] Figure 3 This is a network schematic diagram of a digital-to-analog converter circuit with an R-2R ladder resistor network architecture according to an embodiment of the present disclosure.
[0020] The elements in the attached diagram are schematic and not drawn to scale. Detailed Implementation
[0021] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are also within the scope of protection of this disclosure.
[0022] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this subject matter pertains. It will be further understood that terms such as those defined in commonly used dictionaries shall be interpreted as having the meaning consistent with their meaning in the context of the specification and in the relevant art, and shall not be interpreted in an idealized or overly formal form unless otherwise explicitly defined herein. As used herein, the statement of “connecting” or “coupling” two or more parts together shall mean that these parts are directly joined together or joined through one or more intermediate components.
[0023] In all embodiments of this disclosure, terms such as “first” and “second” are used only to distinguish one component (or part of a component) from another component (or another part of a component).
[0024] like Figure 1 The diagram shown is a schematic of network 100 of a traditional R-2R ladder resistor network architecture for a digital-to-analog converter. Figure 1The diagram shows a schematic of an N-bit digital-to-analog converter (DAC) circuit 100. This N-bit DAC circuit, based on an R-2R trapezoidal resistor network architecture, consists of N-1 bridging resistors R and N+1 branches. Except for the leftmost branch, each branch has its own weight W. When the switch of that branch is turned on, the output voltage (current) of the R-2R trapezoidal resistor network increases by the corresponding weight's voltage (current) W*V. REF (W*I REF Therefore, the output voltage (current) of the R-2R trapezoidal resistor network is ∑W*V. REF (∑W*I REF ).
[0025] The R-2R trapezoidal resistor network relies on a precise matching relationship between the bridging resistor R and the branch resistor 2R to obtain the binary-weighted output resistance, while the on-resistance R introduced by the branch switch... ON This is a non-ideal effect, introducing nonlinear errors into the input-output transmission relationship of the R-2R trapezoidal resistor network. Therefore, a characteristic of the R-2R trapezoidal resistor network is that, to achieve a precise transmission relationship, the on-resistance of the branch switch and the corresponding weight W of that branch need to be adjusted. N The branches (N = 1, 2, ..., N) are proportionally related, with larger weights corresponding to higher-order branches and smaller weights corresponding to lower-order branches. Specifically, Figure 1 The on-resistance of the middle branch switch is 2. N-1 *R ON The weight corresponding to the branch is 1 / 2 N .
[0026] In modern circuits, branch switches are generally implemented using transistors. In this case, the on-resistance of the branch switch is equal to the channel resistance of the transistor in the linear region. The impedance is inversely proportional to the width-to-length ratio of the transistor. Therefore, branch switches with proportional on-resistance can be obtained by adjusting the transistor size. When high-precision transmission relationships are required in R-2R trapezoidal resistor networks, the number of branches required also increases accordingly. For an N-bit R-2R trapezoidal resistor network... Figure 1 As can be seen, the ratio of the maximum on-resistance to the minimum on-resistance of its branch switch can reach 2. N-1As the precision of the R-2R ladder network (corresponding to the number of bits in the digital-to-analog converter (DAC)) increases, the area requirement for branch switches also increases exponentially. This makes the layout area of high-precision R-2R ladder networks very large due to the increased size of the transistors used as branch switches, and increases the difficulty of device layout matching. In practical circuit design, since the number of bits in high-precision DACs increases, the switch size cannot be increased indefinitely. Therefore, for the switch impedance matching of lower-order branches with relatively small impact, a proportional increase is no longer sought. However, to meet the precision performance requirements, the total switch size still needs to be very large.
[0027] against Figure 1 The R-2R ladder resistor network architecture in digital-to-analog converters presents several challenges: with increasing precision and bit depth, larger switch size requirements, higher design costs, and greater difficulty in matching device layouts. Therefore, an improved R-2R ladder resistor network architecture digital-to-analog converter circuit 200 is proposed. Specifically, as... Figure 2 As shown, it includes: branch resistor 2R, branch switch 210, bridging resistor R, and compensation resistor ΔR; wherein, branch resistor 2R and branch switch 210 are connected in series in each branch. In this embodiment, branch switch 210 is a transistor switch, specifically a MOSFET, bipolar transistor, JFET, etc.; from the lowest weight branch to the highest weight branch (the branch with the larger weight is the high weight, and the branch with the smaller weight is the low weight), Figure 2 The highest digit has a weight of W1, and the digit with a weight of W... N (The least significant bit is used as the reference bit). A bridging resistor R is connected between every two branches. The resistance of the branch resistor 2R is twice the resistance of the bridging resistor R. The branches from the least significant bit to the most significant bit correspond to different digital signal bits. A compensation resistor ΔR is connected in series with the bridging resistor R between the branches from the preset bit to the least significant bit. The resistance of the compensation resistor ΔR is related to the on-resistance of the branch switch 210 of the most significant bit and the weight of the preset bit branch. Furthermore, the ratio of the on-resistance of the branch switch 210 corresponding to the most significant bit to the resistance of the compensation resistor ΔR is twice the weight of the preset bit branch. A specific example is provided, assuming the preset bit is the (M+1)th bit (bits are numbered according to the least significant bit being the 1st bit and the most significant bit being the Nth bit), such as... Figure 2 As shown, the weight corresponding to the preset branch is W. N-M =1 / 2 N-M Assume the on-resistance of the branch switch 210 corresponding to the highest bit is R. ON Therefore, the value of the compensation resistor ΔR can be determined as ΔR = 1 / 2 * 2 N-M *R ONThe conduction impedance of the branch switches 210 for all branches on one side of the branch from the preset position to the lowest position is equal to the preset conduction impedance, which is twice the compensation resistor ΔR. The conduction impedance of the branch switches 210 for other branches is proportional to the weight of the corresponding branch. Assuming the preset position is the (M+1)th position, as shown in Figure 2, starting from this branch (including this branch) up to W... N All the branches, and W N The impedance of the branch circuit 210 on the left is 2*ΔR=2. N-M *R ON Other branches, that is, branches with a higher position than the preset position, or in other words, branches with a weight of W. N-M The on-resistance of the branch switches 210 on the right side of the branch is proportional to the weight of the corresponding branch, i.e., it is proportional to... Figure 1 The relationship between the switching impedance of a branch switch and the weight of the corresponding branch is consistent: when the switching impedance increases by a multiple of 2, the weight of the corresponding branch decreases by a multiple of 2.
[0028] Additionally, it should be noted that, Figure 2 The preset bit range is greater than 2 and less than or equal to the number of bits in the digital-to-analog converter circuit. In practical applications, the value of the preset bit can be adjusted according to the required accuracy and the design cost of the layout. Specifically, the higher the required accuracy, the larger the preset bit value; the lower the required accuracy, the smaller the preset bit value; the lower the design cost of the layout, the larger the preset bit value; the higher the design cost of the layout, the smaller the preset bit value. The preset bit value refers to the corresponding number of bits. For example, the 5th bit has a value of 5. From the above explanation, it can be seen that the ratio of the maximum on-resistance to the minimum on-resistance of the branch switch 210 becomes 2. N-M Times, compared to applications Figure 1 In the R-2R trapezoidal resistor network architecture, the ratio of the maximum to minimum on-resistance of the branch switch in the 100-bit digital-to-analog converter circuit is 2. N-1 This represents a significant reduction in the overall size of the branch switch, achieving a substantial decrease in size. Furthermore... Figure 2 The weight of each branch in the improved R-2R ladder network architecture is... Figure 1 Compared to the corresponding branches, there is no change. In summary, the R-2R ladder network architecture in this embodiment can significantly save layout area, reduce device matching difficulty, save on chip fabrication costs, and also meet ideal switching impedance matching in low-level branches.
[0029] Regarding the above Figure 2In the R-2R ladder resistor network architecture of the digital-to-analog converter circuit 200, the inventors discovered that the compensation resistor ΔR uses the same type of resistor element as the bridging resistor R and the branch resistor 2R, namely a polycrystalline resistor or a metal thin film resistor; the on-resistance R of the branch switch... ON These are the channel resistances of MOS transistors when they are turned on, and they are of different types. Therefore, ΔR and R are used. ON The resistance value changes differently under various process fluctuations, temperature changes, and terminal voltage conditions. When using ΔR to compensate for the conduction impedance of the branch switch, under certain conditions, the resistance values of the two change in opposite directions and the difference reaches its maximum, which will cause the largest DNL error in the R-2R ladder resistor network.
[0030] against Figure 2 The invention further analyzed the problem of the largest DNL error caused by the generation of DNL errors, as follows: Figure 2 All the compensation resistors have the same resistance value, ΔR = 1 / 2 * 2 N-M *RON, the on-resistance of the lower-order branch switches is also the same, which is 2. N -M *RON, if we assume that the compensation resistor and the on-resistance of each branch change with the same trend, then the DNL caused by the aforementioned problem during branch switching will decrease by a factor of 1 / 2 from high to low. That is, the DNL caused by the aforementioned problem reaches its maximum when the highest weighted branch introduced by the compensation structure switches. Based on this characteristic, a digital-to-analog converter circuit 300 of the R-2R ladder resistor network architecture of this disclosure is proposed to introduce the compensation resistor in a progressive manner. In this way, the DNL introduced by the mismatch between the compensation resistor and the on-resistance of the switch can be effectively attenuated in the high-order branches due to the decrease in the resistance value of the compensation resistor. Even though the DNL in the low-order branches will increase with the increase in the resistance value of the compensation resistor, the DNL in the low-order branches will decrease, so the overall DNL will still decrease and the linearity performance will be improved.
[0031] The following is a detailed description of the digital-to-analog converter circuit 300 of the R-2R ladder resistor network architecture in the embodiments of this disclosure, such as... Figure 3 As shown, this is for Figure 2 An improved R-2R ladder resistor network architecture digital-to-analog converter circuit 300 includes: branch resistors 2R, branch switches 310, bridging resistors R, and first compensation resistors ΔR1, second compensation resistors ΔR2, and third compensation resistors ΔR3; wherein, branch resistors 2R and branch switches 310 are connected in series in each branch, and the branch switches 310 in this embodiment are MOS switches; from the lowest weight branch to the highest weight branch (the branch with the larger weight is the high-weight branch, and the branch with the smaller weight is the low-weight branch), Figure 3 The highest digit has a weight of W1, and the digit with a weight of W...N (The least significant bit is used as the reference bit). A bridging resistor R is connected between every two branches. The resistance of the branch 2R is twice the resistance of the bridging resistor R. The branches from the least significant bit to the most significant bit correspond to different digital signal bits. The bridging resistor between the branch of the preset bit and the lower-order branch adjacent to the preset bit is connected in series with a first compensation resistor ΔR1. The bridging resistor between two lower-order branches adjacent to the preset bit is connected in series with a second compensation resistor ΔR2. A third compensation resistor ΔR3 is connected in series with the bridging resistor from the branch two bits lower than the preset bit to the least significant bit. The first compensation resistor ΔR1 is half the value of the second compensation resistor ΔR2, and the third compensation resistor ΔR3 is twice the value of the second compensation resistor ΔR2. The resistance value of the second compensation resistor ΔR2 is related to the on-resistance of the branch switch 310 of the highest-order branch and the weight of the branch of the preset position. Furthermore, the ratio of the on-resistance of the branch switch 310 corresponding to the highest-order branch to the resistance value of the second compensation resistor ΔR2 is equal to twice the weight of the branch of the preset position. A specific example is provided, assuming the preset position is the (M+1)th position (positions are numbered according to the least significant position being the 1st position and the most significant position being the Nth position), such as... Figure 3 As shown, the weight corresponding to the preset branch is W. N-M =1 / 2 N-M Assume the on-resistance of the branch switch 310 corresponding to the highest bit is R. ON Therefore, the value of the second compensation resistor ΔR2 can be determined as ΔR2 = 1 / 2 * 2 N-M *R ON Then the value of the first compensation resistor ΔR1 is ΔR1 = 1 / 2 * ΔR2 = 1 / 4 * 2 N-M *R ON Therefore, the value of the third compensation resistor ΔR3 is ΔR3 = 2 * ΔR2 = 2. N-M *R ON The conduction impedance of the branch switch 310 of the branch at the preset position is twice that of the second compensation resistor ΔR2; the conduction impedance of the branch switch 310 of the branch between the first compensation resistor ΔR1 and the second compensation resistor ΔR2 (i.e., the lower-position branch adjacent to the branch at the preset position) is three times that of the second compensation resistor ΔR2; the conduction impedance of the branch switches 310 of all branches on the side from the branch two positions lower than the preset position to the lowest-position branch is four times that of the second compensation resistor ΔR2; the conduction impedance of the branch switches 310 of other branches is proportional to the weight of the corresponding branch. Assuming the preset position is the (M+1)th position, as shown in Figure 3, the conduction impedance of the branch switch 310 of this branch is 2*ΔR2=2 N-M *R ON The lower-ranking branch adjacent to this branch (with a weight of W) N-M+1 The on-resistance of branch switch 310 is 3*ΔR2=1.5*2N-M *R ON Branches two positions lower than the preset position (with a weight of W) N-M+2 The conduction impedance of the branch switch 310 on all branches to the lowest branch side is 4*ΔR2=2. N-M+1 *R ON Other branches, that is, branches with a higher position than the preset position, or in other words, branches with a weight of W. N-M The on-resistance of the branch switches 310 on the right side of the branch is proportional to the weight of the corresponding branch, i.e., it is proportional to... Figure 1 The relationship between the switching impedance of the branch switch 310 and the weight of the corresponding branch is consistent; that is, when the switching impedance increases by a multiple of 2, the weight of the corresponding branch decreases by a multiple of 2.
[0032] Additionally, it should be noted that, Figure 3 The preset bit range is greater than 3 and less than or equal to the number of bits in the digital-to-analog converter circuit. In practical applications, the value of the preset bit can be adjusted according to the accuracy requirements and layout design costs. Specifically, the higher the required accuracy, the larger the preset bit value; the lower the required accuracy, the smaller the preset bit value. The preset bit value refers to the corresponding number of bits; for example, the 5th bit corresponds to a value of 5.
[0033] To further explain Figure 3 The performance of the digital-to-analog converter circuit based on the R-2R ladder resistor network architecture is as follows: Figure 3 A specific example is given to illustrate this. Assuming the R-2R ladder resistor network architecture's digital-to-analog converter is 16-bit, and under a certain manufacturing process, the resistor values do not fluctuate significantly... Figure 2 and Figure 3 The circuits shown have comparable DNL performance; when the values of the compensation resistor and the switch on-resistance exhibit maximum inverse changes due to process variations, Figure 2 The DNL performance of the circuit shown degrades to within approximately 0.7 LSB. Figure 3 The circuit shown has a DNL of less than 0.4 LSB.
[0034] As can be seen from the specific examples above, the digital-to-analog converter circuit 300 using the R-2R ladder network architecture in this embodiment can reduce the DNL. Furthermore, the weight of each branch is... Figure 1 The corresponding branch remains unchanged compared to the previous one. However, the ratio of the maximum to minimum on-resistance of branch switch 310 has changed to 2. N-M+1 Times, compared to applications Figure 1 In the R-2R trapezoidal resistor network architecture, the ratio of the maximum on-resistance to the minimum on-resistance of the branch switch 310 is 2. N-1This also effectively reduces the overall size of the branch switch 310.
[0035] In summary, the digital-to-analog converter circuit 300 of the R-2R ladder network architecture in this embodiment saves layout area and reduces DNL.
[0036] Furthermore, in this embodiment, the digital-to-analog converter circuit 300 of the R-2R ladder resistor network architecture is either a voltage-type or a current-type digital-to-analog converter circuit. When it is a voltage-type digital-to-analog converter circuit, one end of the branch switch 310 of each branch from the lowest to the highest bit is connected to the branch resistor 2R, and the other end is connected to a high-potential reference voltage V. H Or a low-potential reference voltage V L One end of the branch resistor 2R of the highest-order branch is connected to one end of the corresponding branch switch 310, and the other end is connected to the voltage output terminal V. OUT Additionally, if the low-potential reference voltage V L With a zero reference voltage, the digital-to-analog converter (DAC) is a voltage-type DAC with a single reference voltage; if the low-potential reference voltage V... L The reference voltage is non-zero (it can be positive or negative), making the digital-to-analog converter (DAC) a voltage-type DAC with dual reference voltages. When it's a current-type DAC, one end of the branch switch 310 in each branch from the lowest to the highest bit is connected to the branch resistor 2R, and the other end is connected to the current output terminal I. OUT Or grounding terminal GROUD; one end of the branch resistor 2R of the highest branch is connected to one end of the corresponding branch switch 310, and the other end is connected to the reference current terminal I. REF Additionally, it should be noted that... Figure 3 One end of the branch switch 310 in the leftmost branch (the branch with the lowest left position) is always grounded.
[0037] In addition, for Figure 3 The series connection of R and ΔR1 / ΔR2 / ΔR3 in the figure can be used in practical applications to treat the series connection of R and ΔR1, R and ΔR2, and R and ΔR3 as three whole resistors with resistance values of R+ΔR1, R+ΔR2, and R+ΔR3. Of course, it can also be replaced by parallel connection of 2R and 2*ΔR1, 2R and 2*ΔR2, and 2R and 2*ΔR3 to achieve the effect of resistance values of R+ΔR1, R+ΔR2, and R+ΔR3 respectively.
[0038] The descriptions of the same or corresponding module units in the various embodiments of this disclosure can be referenced in turn.
[0039] In the above description, well-known structural elements and steps have not been described in detail. However, those skilled in the art should understand that the corresponding structural elements and steps can be implemented through various technical means. Furthermore, in order to form the same structural elements, those skilled in the art can also design methods that are not entirely identical to those described above. Additionally, although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination.
[0040] As described above, these embodiments of the present invention do not exhaustively describe all details, nor do they limit the invention to specific embodiments. Clearly, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to effectively utilize the invention and its modifications. The scope of protection of this invention should be determined by the scope defined in the claims of this invention.
[0041] Unless otherwise expressly indicated by the context, the singular form of words used herein and in the appended claims includes the plural form, and vice versa. Thus, when referring to the singular, the plural form of the corresponding term is generally included. Similarly, the terms “comprising” and “including” shall be interpreted as including rather than exclusively. Likewise, the terms “including” and “or” shall be interpreted as including unless such interpretation is expressly prohibited herein. Where the term “example” is used herein, particularly when it follows a set of terms, the “example” is merely exemplary and illustrative and should not be considered exclusive or extensive.
[0042] Further aspects and scope of adaptation become apparent from the description provided herein. It should be understood that various aspects of this disclosure may be implemented individually or in combination with one or more other aspects. It should also be understood that the descriptions and specific embodiments herein are for illustrative purposes only and are not intended to limit the scope of this disclosure.
[0043] Several embodiments of this disclosure have been described in detail above. However, it is obvious that those skilled in the art can make various modifications and variations to the embodiments of this disclosure without departing from the spirit and scope of this disclosure. The scope of protection of this disclosure is defined by the appended claims.
Claims
1. A digital-to-analog converter circuit with an R-2R ladder resistor network architecture, characterized in that, The digital-to-analog conversion circuit includes: branch resistors, branch switches, bridging resistors, and first compensation resistors, second compensation resistors, and third compensation resistors; The branch resistor and the branch switch are connected in series in each branch. From the least significant branch to the most significant branch, a bridging resistor is connected between every two branches. The resistance of each branch is twice the resistance of the bridging resistor. Each branch from the least significant branch to the most significant branch corresponds to a different digital signal bit. The bridging resistor between the branch at the preset position and the lower-position branch adjacent to the preset position is connected in series with the first compensation resistor; the bridging resistor between two lower-position branches sequentially adjacent to the preset position is connected in series with the second compensation resistor; a third compensation resistor is connected in series with the bridging resistor from the branch two positions lower than the preset position to the lowest-position branch, the first compensation resistor is half the value of the second compensation resistor, the third compensation resistor is twice the value of the second compensation resistor, and the resistance value of the second compensation resistor is related to the on-resistance of the branch switch of the highest-position branch and the weight of the preset position branch; The conduction impedance of the branch switch of the preset position branch is twice that of the second compensation resistor; the conduction impedance of the branch switch of the branch between the first compensation resistor and the second compensation resistor is three times that of the second compensation resistor; the conduction impedance of the branch switches of all branches on the side of the lowest position branch from the branch two positions lower than the preset position branch is equal to four times that of the second compensation resistor; the conduction impedance of the branch switches of other branches is proportional to the weight of the corresponding branch.
2. The digital-to-analog converter circuit with an R-2R ladder resistor network architecture according to claim 1, characterized in that, The ratio of the on-resistance of the branch switch corresponding to the highest bit to the resistance of the second compensation resistor is equal to twice the weight of the branch of the preset bit.
3. The digital-to-analog converter circuit with an R-2R ladder resistor network architecture according to claim 2, characterized in that, The range of the preset bits is greater than 3 and less than or equal to the number of bits in the digital-to-analog converter circuit.
4. The digital-to-analog converter circuit with an R-2R ladder resistor network architecture according to claim 3, characterized in that, Adjust the value of the preset position according to the required accuracy.
5. The digital-to-analog converter circuit with an R-2R ladder resistor network architecture according to claim 4, characterized in that, The branch switch is a transistor.
6. The digital-to-analog converter circuit with an R-2R ladder resistor network architecture according to claim 5, characterized in that, The digital-to-analog converter circuit is either a voltage-type digital-to-analog converter circuit or a current-type digital-to-analog converter circuit.
7. The digital-to-analog converter circuit with an R-2R ladder resistor network architecture according to claim 6, wherein the digital-to-analog converter circuit is a voltage-type digital-to-analog converter circuit, characterized in that, One end of the branch switch in each branch from the lowest to the highest level is connected to the branch resistor, and the other end is connected to either the high-potential or low-potential reference voltage. One end of the branch resistor in the highest level branch is connected to one end of the corresponding branch switch, and the other end is connected to the output voltage terminal.
8. The digital-to-analog converter circuit with an R-2R ladder resistor network architecture according to claim 7, characterized in that, If the low-potential reference voltage is a zero reference voltage, the digital-to-analog converter circuit is a voltage-type digital-to-analog converter circuit with a single reference voltage. If the low-potential reference voltage is a non-zero reference voltage, the digital-to-analog converter circuit is a voltage-type digital-to-analog converter circuit with dual reference voltages.
9. The digital-to-analog converter circuit with an R-2R trapezoidal resistor network architecture according to claim 6, wherein the digital-to-analog converter circuit is a current-type digital-to-analog converter circuit, characterized in that, One end of the branch switch for each branch from the lowest to the highest position is connected to the branch resistor, and the other end is connected to the current output terminal or the ground terminal; one end of the branch resistor of the highest position branch is connected to one end of the corresponding branch switch, and the other end is connected to the reference current terminal.
10. The digital-to-analog converter circuit with an R-2R ladder resistor network architecture according to claim 4, characterized in that, The step of adjusting the value of the preset bit according to the accuracy requirements includes: The higher the precision, the larger the value of the preset bit; the lower the precision, the smaller the value of the preset bit.
Citation Information
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