Display device

Abstract

A display device is provided. The display device includes a pixel area including a plurality of alignment areas and a misalignment area which is an area other than the plurality of alignment areas; a plurality of electrodes arranged to extend in one direction and spaced apart from each other in the pixel area; a plurality of light emitting elements arranged between the plurality of electrodes such that at least one end portion thereof is placed on one of the plurality of electrodes and disposed in the plurality of alignment areas; and an alignment inducing layer disposed in at least a portion of the misalignment area.

Description

Technical Field

[0001] The disclosure relates to a display device. Background Technology

[0002] The importance of display devices has steadily increased with the development of multimedia technology. In response, various types of display devices, such as organic light-emitting diodes (OLEDs) and liquid crystal displays (LCDs), have been developed.

[0003] A display device is a means for displaying images and includes a display panel such as an organic light-emitting display panel or a liquid crystal display panel. The display panel may include light-emitting elements, such as light-emitting diodes (LEDs), and examples of LEDs include organic light-emitting diodes (OLEDs) that use organic materials as fluorescent materials and inorganic light-emitting diodes that use inorganic materials as fluorescent materials. Summary of the Invention

[0004] Technical issues

[0005] To address the aforementioned problems, embodiments of the invention provide a display device including an alignment guiding layer for guiding light-emitting elements to be arranged at specific locations.

[0006] It should be noted that the disclosed aspects are not limited thereto, and other aspects not mentioned herein will become apparent to those skilled in the art from the following description.

[0007] Technical solution

[0008] According to the disclosed embodiments, the display device includes: a pixel region including a plurality of alignment regions and an unaligned region occupying the remainder of the pixel region; a plurality of electrodes extending in a predetermined direction in the pixel region and spaced apart from each other; a plurality of light-emitting elements disposed between the plurality of electrodes in the plurality of alignment regions such that at least one end of each of the plurality of light-emitting elements is placed on one of the plurality of electrodes; and an alignment-inducing layer disposed at least partially in the unaligned region.

[0009] The alignment induction layer may include a first portion comprising a hydrophobic material, and the first portion may be configured to surround a plurality of alignment regions.

[0010] The display device may also include: multiple connecting electrodes disposed in multiple alignment areas to cover a portion of the multiple electrodes and the ends of multiple light-emitting elements.

[0011] The alignment-inducing layer can be configured such that the first portion partially covers the outermost electrode starting from the center of the pixel region along a predetermined direction.

[0012] The multiple alignment regions may include a first alignment region and a second alignment region, which are spaced apart from each other in a predetermined direction, and the alignment induction layer may be partially disposed between the first alignment region and the second alignment region.

[0013] The number of light-emitting elements disposed in the first alignment region and the second alignment region can be greater than the number of light-emitting elements disposed between the first alignment region and the second alignment region.

[0014] Multiple electrodes can be partially separated from each other between the first alignment region and the second alignment region.

[0015] The alignment induction layer may also include a second part comprising a hydrophilic material, and the second part may also be disposed in multiple alignment regions.

[0016] Multiple light-emitting elements can be directly disposed on the second part in multiple alignment areas.

[0017] The display device may further include: a plurality of first dikes disposed in the pixel region spaced apart from each other and thus superimposed with a plurality of electrodes, wherein the alignment induction layer may be configured to surround the plurality of first dikes.

[0018] The display device may also include a second dike, configured to surround the pixel area.

[0019] Multiple alignment regions can be spaced apart from each other in the region surrounded by the second dike, an alignment induction layer can be disposed between the multiple alignment regions, and multiple light-emitting elements can be disposed in the multiple alignment regions, but the groups of light-emitting elements in different alignment regions emit light of different wavelengths.

[0020] According to the disclosed embodiments, the display device includes: a first substrate; a plurality of first dikes disposed on the first substrate and spaced apart from each other; a plurality of electrodes disposed on the plurality of first dikes and spaced apart from each other; an alignment induction layer disposed on the first substrate such that at least a portion of the alignment induction layer is also disposed in a region other than the region between the plurality of electrodes; and a plurality of light-emitting elements disposed between the plurality of electrodes such that at least one end of each of the plurality of light-emitting elements is placed on the plurality of electrodes, and the plurality of light-emitting elements are not superimposed on the alignment induction layer.

[0021] The alignment induction layer may include a first portion comprising a hydrophobic material, and the first portion may be configured not to be stacked with multiple light-emitting elements.

[0022] The alignment induction layer can be configured such that the first portion covers the outer side of the outermost electrode starting from the center of the first substrate.

[0023] The alignment induction layer may also include a second part comprising a hydrophilic material, the second part may be disposed between multiple electrodes, and multiple light-emitting elements may be disposed superimposed on the second part.

[0024] The display device may further include: a first insulating layer configured to cover portions of a plurality of electrodes, wherein an alignment induction layer may be disposed on the first insulating layer.

[0025] The display device may further include a second insulating layer disposed between a plurality of electrodes to cover at least a portion of a plurality of light-emitting elements.

[0026] The first insulating layer and the alignment induction layer can be configured as portions of the top surface of the exposed electrode on the first embankment.

[0027] The display device may also include: a plurality of connecting electrodes, in contact with an exposed portion of the top surface of the plurality of electrodes and one end of each of the plurality of light-emitting elements.

[0028] Details of other embodiments are included in the detailed description and accompanying drawings.

[0029] Beneficial effects

[0030] According to the disclosed embodiments, the display device may include an alignment-inducing layer, and thus a plurality of light-emitting elements may be densely arranged at specific locations. Each pixel or sub-pixel of the display device includes an aligned region and an misaligned region, in which the light-emitting elements are densely arranged due to the alignment-inducing layer, and the misaligned region occupies the remainder of the corresponding pixel or sub-pixel. Because of the alignment-inducing layer, the loss of light-emitting elements can be minimized, and the degree of emission concentration can be improved by densely arranging the light-emitting elements at specific locations.

[0031] The effects of the embodiments are not limited to the above-described examples, and many more effects are included in this disclosure. Attached Figure Description

[0032] Figure 1 This is a plan view of a display device according to a disclosed embodiment.

[0033] Figure 2 It is a plan view of the pixels of a display device according to a disclosed embodiment.

[0034] Figure 3 It is along Figure 2 The sectional views taken from lines IIIa-IIIa', IIIb-IIIb', and IIIc-IIIc'.

[0035] Figure 4 It is along Figure 2 A sectional view taken from line IV-IV'.

[0036] Figure 5 This is a partial cross-sectional view of a display device according to another disclosed embodiment.

[0037] Figure 6 This is a schematic diagram of a light-emitting element according to a disclosed embodiment.

[0038] Figures 7 to 12 This is a cross-sectional view illustrating a method of manufacturing a display device according to a disclosed embodiment.

[0039] Figure 13 This is a plan view of a sub-pixel of a display device according to another disclosed embodiment.

[0040] Figure 14 This is a plan view of a sub-pixel of a display device according to another disclosed embodiment.

[0041] Figure 15 It is along Figure 14 A sectional view taken by line V-V'.

[0042] Figures 16 to 18 It shows the manufacturing process. Figure 14 A cross-sectional view of the method of displaying the device.

[0043] Figure 19 This is a plan view of a sub-pixel of a display device according to another disclosed embodiment.

[0044] Figure 20 It is along Figure 19 A sectional view taken by line X1-X1'.

[0045] Figure 21 It is along Figure 19 The sectional view taken by line X2-X2'.

[0046] Figure 22 It shows the manufacturing process. Figure 19 A cross-sectional view of the method of displaying the device.

[0047] Figure 23 This is a plan view of a sub-pixel of a display device according to another disclosed embodiment.

[0048] Figure 24 It is along Figure 23 The sectional views taken by lines X3-X3', X4-X4', and X5-X5'.

[0049] Figure 25 This is a plan view of a sub-pixel of a display device according to another disclosed embodiment.

[0050] Figure 26 This is a plan view of a sub-pixel of a display device according to another disclosed embodiment.

[0051] Figure 27 This is a plan view of the pixels of a display device according to another disclosed embodiment.

[0052] Figure 28 This is a plan view of a sub-pixel of a display device according to another disclosed embodiment. Detailed Implementation

[0053] The invention will now be described more fully below with reference to the accompanying drawings, in which preferred embodiments of the invention are illustrated. However, the invention may be embodied in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

[0054] It will also be understood that when a layer is referred to as being "on" another layer or substrate, the layer may be directly on said other layer or substrate, or an intermediary layer may also be present. Throughout the specification, the same reference numerals denote the same components.

[0055] It will be understood that although the terms “first,” “second,” etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, the first element discussed below may be referred to as the second element without departing from the teachings of the invention. Similarly, the second element may also be referred to as the first element.

[0056] In the following description, embodiments will be illustrated with reference to the accompanying drawings.

[0057] Figure 1 This is a plan view of a display device according to a disclosed embodiment.

[0058] Reference Figure 1 The display device 10 displays moving or still images. The display device 10 can refer to virtually any type of electronic device that provides the display of images. Examples of the display device 10 may include televisions (TVs), laptop computers, monitors, billboards, Internet of Things (IoT) devices, mobile phones, smartphones, tablet PCs, electronic watches, smartwatches, watch phones, head-mounted displays (HMDs), mobile communication terminals, electronic notebooks, e-books, portable multimedia players (PMPs), navigation devices, game consoles, digital cameras, camcorders, etc.

[0059] Display device 10 includes a display panel that provides a display screen. Examples of display panels for display device 10 include inorganic light-emitting diode (LED) display panels, organic light-emitting diode (OLED) display panels, quantum dot light-emitting diode (QLED) display panels, plasma display panels (PDP), field emission display (FED) panels, etc. The display panel of display device 10 will be described below as, for example, an inorganic LED display panel, but the disclosure is not limited thereto. That is, various other display panels are also suitable for the display panel of display device 10.

[0060] The shape of the display device 10 can be changed. For example, the display device 10 can have a rectangular shape that extends longer in the horizontal direction than in the vertical direction, a rectangular shape that extends longer in the vertical direction than in the horizontal direction, a square shape, a square shape with rounded corners, a non-square polygonal shape, or a circular shape. The shape of the display area DPA of the display device 10 can be similar to the shape of the display device 10. Figure 1 The display device 10 and the display area DPA are shown to both have a rectangular shape that extends relatively long in the horizontal direction.

[0061] The display device 10 may include a display area DPA and a non-display area NDA. The display area DPA may be the area in which an image is displayed, and the non-display area NDA may be the area in which no image is displayed. The display area DPA may also be referred to as the active area, and the non-display area NDA may also be referred to as the inactive area. The display area DPA may occupy the middle portion of the display device 10.

[0062] The display area DPA may include multiple pixels PX. Pixels PX can be arranged in both row and column directions. Each of the pixels PX can have a rectangular or square shape in a planar view, but is not limited thereto. Optionally, each of the pixels PX can have a rhombus shape with sides slanted relative to a particular direction. Pixels PX can be arranged in stripes or... The elements are arranged alternately. Each pixel PX may include one or more light-emitting elements 30 that emit light of a specific wavelength.

[0063] A non-display area NDA can be disposed around the display area DPA. The non-display area NDA can surround the entire display area DPA or a portion of the display area DPA. The display area DPA can have a rectangular shape, and the non-display area NDA can be disposed adjacent to the four sides of the display area DPA. The non-display area NDA can form the frame of the display device 10. Line or circuit drivers included in the display device 10 can be disposed in the non-display area NDA, or external devices can be mounted in the non-display area NDA.

[0064] Figure 2 It is a plan view of the pixels of a display device according to a disclosed embodiment.

[0065] Reference Figure 2 Each of the plurality of pixels PX can include a plurality of sub-pixels PXn (where n is an integer from 1 to 3). For example, a pixel PX can include a first sub-pixel PX1, a second sub-pixel PX2, and a third sub-pixel PX3. Pixels PX can form pixel regions in the display area DPA. The first sub-pixel PX1 can emit light of a first color, the second sub-pixel PX2 can emit light of a second color, and the third sub-pixel PX3 can emit light of a third color. The first color light, the second color light, and the third color light can be blue light, green light, and red light, respectively, but the disclosure is not limited thereto. Optionally, all sub-pixels PXn can emit light of the same color. Figure 2 It is shown that pixel PX may include three sub-pixels PXn, but the disclosure is not limited thereto. Optionally, pixel PX may include more than three sub-pixels PXn.

[0066] Sub-pixels PXn may include regions defined as emission regions EMA. First sub-pixels PX1 may include a first emission region EMA1, second sub-pixels PX2 may include a second emission region EMA2, and third sub-pixels PX3 may include a third emission region EMA3. Each of the emission regions EMA can be defined as a region in which a light-emitting element 30 is disposed to emit light of a specific wavelength. The light-emitting element 30 may include an active layer (…). Figure 6 The active layer 36 (of the light-emitting element 30) can emit light of a specific wavelength without any directionality. The light emitted by the active layer 36 of the light-emitting element 30 can be emitted from both sides of each of the light-emitting elements 30. Each of the emitting regions EMA includes a region in which the light-emitting element 30 is disposed, and may also include a region around the light-emitting element 30 that outputs the light emitted by the light-emitting element 30.

[0067] However, the disclosure is not limited thereto. Each of the emission regions EMA may include an area that outputs light emitted by the light-emitting element 30 and then reflected or refracted from other elements. The light-emitting element 30 may be disposed in each of the sub-pixels PXn, wherein the area where the light-emitting element 30 is disposed and the area surrounding the light-emitting element 30 may form the emission region EMA.

[0068] Although not specifically shown, each of the sub-pixels PXn of the display device 10 may include a non-emissive region defined as a region other than the emitting region EMA. The non-emissive region may be a region in which no light-emitting element 30 is disposed, and may not output light because the light emitted by the light-emitting element 30 does not reach it.

[0069] Figure 3 It is along Figure 2The sectional views taken from lines IIIa-IIIa', IIIb-IIIb', and IIIc-IIIc'. Figure 4 It is along Figure 2 A sectional view taken from line IV-IV'. Figure 3 and Figure 4 It shows Figure 2 The cross-sectional view of the first sub-pixel PX1 is shown. However, the cross-sectional view of the first sub-pixel PX1 can also be directly applied to other pixels PX or other sub-pixels PXn. Figure 3 and Figure 4 A cross-sectional view of the light-emitting element 30 in the first sub-pixel PX1, taken from one end to the other, is shown.

[0070] Reference Figure 3 and Figure 4 And further refer to Figure 2 The display device 10 may include a circuit element layer and a display element layer disposed on a first substrate 11. A semiconductor layer, a plurality of conductive layers, and a plurality of insulating layers may be disposed on the first substrate 11, and may form the circuit element layer and the display element layer. The conductive layers may include a second conductive layer, a third conductive layer, a fourth conductive layer, a fifth conductive layer, electrodes 21 and 22, and connecting electrodes 26 and 27. The insulating layers may include a buffer layer 12, a first gate insulating layer 13, a first passivation layer 15, a first interlayer insulating layer 17, a second interlayer insulating layer 18, a first planarization layer 19, a first insulating layer 51, a second insulating layer 52, a third insulating layer 53, and a fourth insulating layer 54.

[0071] Specifically, the first substrate 11 may be an insulating substrate. The first substrate 11 may be formed of an insulating material such as glass, quartz, or polymer resin. The first substrate 11 may be a rigid substrate, or it may be a flexible substrate that is bendable, foldable, or rollable.

[0072] A first conductive layer may be disposed on a first substrate 11. The first conductive layer may include lower metal layers BML1 and BML2, which may include a first lower metal layer BML1 and a second lower metal layer BML2. The first lower metal layer BML1 and the second lower metal layer BML2 may be configured to be stacked at least with a first active material layer DT_ACT of the driving transistor DT and a second active material layer ST_ACT of the switching transistor ST, respectively. The lower metal layers BML1 and BML2 may include a material capable of blocking light and preventing light from incident on the first active material layer DT_ACT and the second active material layer ST_ACT. For example, the first lower metal layer BML1 and the second lower metal layer BML2 may be formed of an opaque metallic material capable of blocking light transmission. However, the disclosure is not limited thereto; optionally, the lower metal layers BML1 and BML2 may not be disposed.

[0073] Buffer layer 12 may cover the lower metal layers BML1 and BML2 and may be disposed on the entire surface of the first substrate 11. Buffer layer 12 may be formed on the first substrate 11 to protect the drive transistor DT and the switching transistor ST from moisture that may penetrate the moisture-sensitive first substrate 11, and may perform surface planarization functions. Buffer layer 12 may comprise multiple inorganic layers stacked alternately. For example, buffer layer 12 may be formed to include silicon oxide (SiO2). x ), silicon nitride (SiN) x ) and silicon oxynitride (SiO) x N y Two or more layers of inorganic layers, each of which is alternately stacked.

[0074] A semiconductor layer is disposed on the buffer layer 12. The semiconductor layer may include a first active material layer DT_ACT for the driving transistor DT and a second active material layer ST_ACT for the switching transistor ST. The first active material layer DT_ACT for the driving transistor DT and the second active material layer ST_ACT for the switching transistor ST may be configured to partially overlap with the gate electrodes DT_G and ST_G of the second conductive layer.

[0075] In one embodiment, the semiconductor layer may include polycrystalline silicon, monocrystalline silicon, or oxide semiconductor. Here, polycrystalline silicon can be formed by crystallizing amorphous silicon. When the semiconductor layer includes polycrystalline silicon, the first active material layer DT_ACT may include a first doped region DT_ACTa, a second doped region DT_ACTb, and a first channel region DT_ACTc. The first channel region DT_ACTc may be disposed between the first doped region DT_ACTa and the second doped region DT_ACTb. The second active material layer ST_ACT may include a third doped region ST_ACTa, a fourth doped region ST_ACTb, and a second channel region ST_ACTc. The second channel region ST_ACTc may be disposed between the third doped region ST_ACTa and the fourth doped region ST_ACTb. The first doped region DT_ACTa, the second doped region DT_ACTb, the third doped region ST_ACTa, and the fourth doped region ST_ACTb may be impurity-doped portions of the first active material layer DT_ACT or the second active material layer ST_ACT.

[0076] In another embodiment, the first active material layer DT_ACT and the second active material layer ST_ACT may comprise an oxide semiconductor. In this case, the doped region of each of the first active material layer DT_ACT and the second active material layer ST_ACT may be a conductive region. The oxide semiconductor may be an indium (In)-containing oxide semiconductor. In some embodiments, the oxide semiconductor may be indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium oxide (IGO), indium zinc tin oxide (IZTO), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), or indium gallium zinc tin oxide (IGZTO), but the disclosure is not limited thereto.

[0077] A first gate insulating layer 13 is disposed on the semiconductor layer and the buffer layer 12. The first gate insulating layer 13 can be used as a gate insulating film for driving transistor DT and switching transistor ST. The first gate insulating layer 13 can be formed to include SiO x SiN x and SiO x N y Two or more layers of inorganic layers are stacked alternately, including at least one of them.

[0078] A second conductive layer is disposed on the first gate insulating layer 13. The second conductive layer may include a first gate electrode DT_G of the driving transistor DT and a second gate electrode ST_G of the switching transistor ST. The first gate electrode DT_G may be configured to be stacked with the first channel region DT_ACTc of the first active material layer DT_ACT in the thickness direction, and the second gate electrode ST_G may be configured to be stacked with the second channel region ST_ACTc of the second active material layer ST_ACT in the thickness direction.

[0079] The second conductive layer may be formed as a single layer or multiple layers of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu) and their alloys, but the disclosure is not limited thereto.

[0080] A first passivation layer 15 is disposed on the second conductive layer. The first passivation layer 15 can be configured to cover and protect the second conductive layer. The first passivation layer 15 can be formed to include SiO. x SiN x and SiO x N y Two or more layers of inorganic layers are stacked alternately, including at least one of them.

[0081] A third conductive layer is disposed on the first passivation layer 15. The third conductive layer may include a first capacitor electrode CE1 of a storage capacitor, which is configured to be at least partially stacked with the first gate electrode DT_G in the thickness direction. The first capacitor electrode CE1 may be stacked with the first gate electrode DT_G in the thickness direction, and the first passivation layer 15 is disposed between the first capacitor electrode CE1 and the first gate electrode DT_G. The storage capacitor may be formed by the first capacitor electrode CE1 and the first gate electrode DT_G. The third conductive layer may be formed as a single layer or multiple layers including one of Mo, Al, Cr, Au, Ti, Ni, Nd, Cu and their alloys, but the disclosure is not limited thereto.

[0082] The first interlayer insulating layer 17 is disposed on the third conductive layer. The first interlayer insulating layer 17 can serve as an insulating film between the third conductive layer and the layers disposed on the third conductive layer. The first interlayer insulating layer 17 can be formed to include SiO. x SiN x and SiO x N y Two or more layers of inorganic layers are stacked alternately, including at least one of them.

[0083] A fourth conductive layer is disposed on the first interlayer insulating layer 17. The fourth conductive layer may include the first source / drain electrode DT_SD1 and the second source / drain electrode DT_SD2 of the driving transistor DT, and the first source / drain electrode ST_SD1 and the second source / drain electrode ST_SD2 of the switching transistor ST.

[0084] The first source / drain electrode DT_SD1 and the second source / drain electrode DT_SD2 of the driving transistor DT can contact the first doped region DT_ACTa and the second doped region DT_ACTb of the first active material layer DT_ACT through contact holes penetrating the first interlayer insulating layer 17, the first passivation layer 15, and the first gate insulating layer 13. The first source / drain electrode ST_SD1 and the second source / drain electrode ST_SD2 of the switching transistor ST can contact the third doped region ST_ACTa and the fourth doped region ST_ACTb of the second active material layer ST_ACT through contact holes penetrating the first interlayer insulating layer 17, the first passivation layer 15, and the first gate insulating layer 13. The first source / drain electrode DT_SD1 of the driving transistor DT and the first source / drain electrode ST_SD1 of the switching transistor ST can be electrically connected to the first lower metal layer BML1 and the second lower metal layer BML2 respectively through another contact hole. If one of the first source / drain electrodes DT_SD1 and DT_SD2 of the driving transistor DT, or one of the first source / drain electrodes ST_SD1 and ST_SD2 of the switching transistor ST, is a source electrode, then the other source / drain electrode can be a drain electrode, but the disclosure is not limited thereto. Optionally, if one of the first source / drain electrodes DT_SD1 and DT_SD2 of the driving transistor DT, or one of the first source / drain electrodes ST_SD1 and ST_SD2 of the switching transistor ST, is a drain electrode, then the other source / drain electrode can be a source electrode.

[0085] The fourth conductive layer may be formed as a single layer or multiple layers including one of Mo, Al, Cr, Au, Ti, Ni, Nd, Cu and their alloys, but the disclosure is not limited thereto.

[0086] The second interlayer insulating layer 18 is disposed on the fourth conductive layer. The second interlayer insulating layer 18 can be disposed on the entire surface of the first interlayer insulating layer 17, covering and protecting the fourth conductive layer. The second interlayer insulating layer 18 can be formed to include SiO₂. x SiN x and SiO x N y Two or more layers of inorganic layers are stacked alternately, including at least one of them.

[0087] A fifth conductive layer is disposed on the second interlayer insulating layer 18. The fifth conductive layer may include a first voltage line VL1, a second voltage line VL2, and a first conductive pattern CDP. A high potential voltage (or a first power supply voltage) supplied to the driving transistor DT may be applied to the first voltage line VL1, and a low potential voltage (or a second power supply voltage) supplied to the second electrode 22 may be applied to the second voltage line VL2. During the manufacture of the display device 10, an alignment signal for aligning the light-emitting element 30 may be applied to the second voltage line VL2.

[0088] The first conductive pattern CDP can be electrically connected to the first source / drain electrode DT_SD1 of the driving transistor DT through contact holes formed in the second interlayer insulating layer 18. The first conductive pattern CDP can contact the first electrode 21, which will be described later, and the driving transistor DT can transmit a first power supply voltage from the first voltage line VL1 to the first electrode 21 through the first conductive pattern CDP. The fifth conductive layer is shown as including a second voltage line VL2 and a first voltage line VL1, but the disclosure is not limited thereto. Optionally, the fifth conductive layer may include more than one first voltage line VL1 and more than one second voltage line VL2.

[0089] The fifth conductive layer may be formed as a single layer or multiple layers including one of Mo, Al, Cr, Au, Ti, Ni, Nd, Cu and their alloys, but the disclosure is not limited thereto.

[0090] A first planarization layer 19 is disposed on the fifth conductive layer. The first planarization layer 19 may include an organic insulating material (specifically, an organic material such as polyimide (PI) as an example) and may perform a surface planarization function.

[0091] Multiple first dikes 40, multiple electrodes 21 and 22, a light-emitting element 30, a second dike 45, and multiple connecting electrodes 26 and 27 are disposed on the first planarization layer 19. Multiple insulating layers 51, 52, 53, and 54 may be further disposed on the first planarization layer 19.

[0092] The first dam 40 can be directly disposed on the first planarization layer 19. The first dam 40 can extend in each sub-pixel PXn along the second direction DR2, and can be spaced apart at the boundary between adjacent sub-pixels PXn along the second direction DR2 and terminate without extending into other sub-pixels PXn. Furthermore, the first dams 40 can be configured to be spaced apart from each other and face each other in the first direction DR1. The first dams 40 can be spaced apart to form an area in which the light-emitting element 30 is arranged. The first dam 40 can be disposed in each of the sub-pixels PXn to form a linear pattern in the display area DPA of the display device 10. Figure 3Three first dikes 40 are shown, but the disclosure is not limited thereto. Depending on the number of electrodes 21 and 22, which will be described later, more than three first dikes 40 may be provided.

[0093] The first dam 40 may protrude at least partially from the top surface of the first planarization layer 19. Each of the protruding portions of the first dam 40 may have a sloping side, towards which light emitted by the light-emitting element 30 may travel. Electrodes 21 and 22 disposed on the first dam 40 may comprise a material with high reflectivity, which may reflect light emitted by the light-emitting element 30 to the upward direction of the first planarization layer 19. That is, the first dam 40 not only provides space in which the light-emitting element 30 is disposed, but may also serve as a reflective partition capable of reflecting light emitted by the light-emitting element 30 in the upward direction. The side of each of the first dams 40 may be linearly sloping, but the disclosure is not limited thereto. Alternatively, the side of each of the first dams 40 may have a curved semi-circular or semi-elliptical shape. In one embodiment, the first dam 40 may comprise an organic insulating material such as PI, but the disclosure is not limited thereto.

[0094] Electrodes 21 and 22 are disposed on the first dam 40 and the first planarization layer 19. Electrodes 21 and 22 may include a first electrode 21 and a second electrode 22. The first electrode 21 and the second electrode 22 may extend in a second direction DR2 and may be configured to be spaced apart from each other and facing each other in a first direction DR1. The first electrode 21 and the second electrode 22 may have a shape substantially similar to that of the first dam 40 and may be longer than the first dam 40 in the second direction DR2.

[0095] The first electrode 21 may extend along the second direction DR2 in each of the sub-pixels PXn forming the pixel region, and may be spaced apart from another first electrode 21 at the boundary between two adjacent sub-pixels PXn along the second direction DR2. In some embodiments, a second dike 45 may be disposed along the boundary of each sub-pixel PXn, and the first electrodes 21 of each pair of adjacent sub-pixels PXn in the second direction DR2 may be spaced apart from each other by the second dike 45. The first electrode 21 may be electrically connected to the driving transistor DT through a first contact hole CT1 disposed in the region surrounded by the second dike 45. For example, at least a portion of the first electrode 21 may be in contact with the first conductive pattern CDP through the first contact hole CT1 penetrating the first planarization layer 19. The first electrode 21 may be electrically connected to the first source / drain electrode DT_SD1 of the driving transistor DT through the first conductive pattern CDP.

[0096] The second electrode 22 may extend along the second direction DR2 beyond the boundary between adjacent sub-pixels PXn along the second direction DR2. In some embodiments, the second electrode 22 may be disposed in a plurality of adjacent sub-pixels PXn along the second direction DR2. The second electrode 22 may partially overlap with the second dam 45 at the boundary between adjacent sub-pixels PXn along the second direction DR2 and may be electrically connected to the second voltage line VL2 through the second contact hole CT2. For example, the second electrode 22 may be configured to overlap with a portion of the second dam 45 extending along the first direction DR1 and may be in contact with the second voltage line VL2 through the second contact hole CT2 penetrating the first planarization layer 19. A second power supply voltage may be applied to the second electrode 22 through the second contact hole CT2. The second electrode 22 is shown as being electrically connected to the second voltage line VL2 through the second contact hole CT2 disposed at the boundary of each of the sub-pixels PXn, but the disclosure is not limited thereto. Optionally, in some embodiments, a second contact hole CT2 may be disposed in each of the sub-pixels PXn.

[0097] Each of the sub-pixels PXn is shown, but is not limited to, including one first electrode 21 and two second electrodes 22, the first electrode 21 being shown, but not limited to, being disposed between the two second electrodes 22. Optionally, in some embodiments, more than one first electrode 21 and more than two second electrodes 22 may be disposed in each of the sub-pixels PXn. The first electrode 21 and the second electrode 22 disposed in each of the sub-pixels PXn do not necessarily extend in one direction, but can be arranged in various layouts. For example, the first electrode 21 and the second electrode 22 may be partially bent or folded, and one of the first electrode 21 and the second electrode 22 may be configured to surround the other electrode. At least a portion of the first electrode 21 and the second electrode 22 may be spaced apart from each other and face each other, and the structure and shape of the first electrode 21 and the second electrode 22 are not particularly limited as long as the area in which the light-emitting element 30 is disposed is formed.

[0098] Electrodes 21 and 22 can be electrically connected to the light-emitting element 30, and a predetermined voltage can be applied to electrodes 21 and 22 to enable the light-emitting element 30 to emit light. For example, electrodes 21 and 22 can be electrically connected to the light-emitting element 30, and electrical signals applied to electrodes 21 and 22 can be transmitted to the light-emitting element 30 through connecting electrodes 26 and 27.

[0099] Electrodes 21 and 22 can be used to generate an electric field in each of the sub-pixels PXn to align the light-emitting element 30. The light-emitting element 30 can be positioned between the first electrode 21 and the second electrode 22 by an electric field formed on the first electrode 21 and the second electrode 22. As will be described later, the light-emitting element 30 can be inkjet printed onto the first electrode 21 and the second electrode 22 in a dispersed state, and can be aligned between the first electrode 21 and the second electrode 22 by applying an alignment signal between them.

[0100] like Figure 3 As shown, the first electrode 21 and the second electrode 22 can be disposed on the first dam 40. The first electrode 21 and the second electrode 22 can be spaced apart from each other and face each other in the first direction DR1, and a plurality of light-emitting elements 30 can be disposed between the first electrode 21 and the second electrode 22. The light-emitting elements 30 can be disposed between the first electrode 21 and the second electrode 22, and are simultaneously electrically connected to the first electrode 21 and the second electrode 22.

[0101] In some embodiments, the first electrode 21 and the second electrode 22 may be formed to have a width greater than that of the first dike 40. For example, the first electrode 21 and the second electrode 22 may be configured to cover the outer surface of the first dike 40. The first electrode 21 and the second electrode 22 may be disposed on the side of the first dike 40, and the distance between the first electrode 21 and the second electrode 22 may be smaller than the distance between the first dikes 40. Furthermore, at least a portion of the first electrode 21 and the second electrode 22 may be directly disposed on the first planarization layer 19.

[0102] Electrodes 21 and 22 may comprise a transparent conductive material. For example, electrodes 21 and 22 may comprise materials such as ITO, IZO, or ITZO, but the disclosure is not limited thereto. In some embodiments, electrodes 21 and 22 may comprise a conductive material with high reflectivity. For example, electrodes 21 and 22 may comprise a material with high reflectivity such as silver (Ag), copper (Cu), or Al. In this example, electrodes 21 and 22 may reflect light emitted by the light-emitting element 30 to travel in the upward direction toward the side of the first embankment 40 in each sub-pixel PXn.

[0103] However, the disclosure is not limited thereto. Optionally, electrodes 21 and 22 may have a stack of one or more layers of transparent conductive material and one or more layers of highly reflective metal, or may be formed as a single layer comprising transparent conductive material and highly reflective metal. In one embodiment, electrodes 21 and 22 may have a stack of ITO / Ag / ITO, ITO / Ag / IZO, or ITO / Ag / ITZO / IZO, or may comprise an alloy of Al, Ni, or lanthanum (La). Optionally, electrodes 21 and 22 may have a structure in which layers of metal such as Ti or Mo and alloys of Al, Ni, or La are stacked. In some embodiments, electrodes 21 and 22 may be formed as a double or multilayer structure in which an alloy of Al and at least one layer of Ti or Mo are stacked.

[0104] A first insulating layer 51 is disposed on the first planarization layer 19, the first electrode 21, and the second electrode 22. The first insulating layer 51 may be configured to cover not only the first electrode 21 and the second electrode 22, but also the gap between the first electrode 21 and the second electrode 22. For example, the first insulating layer 51 may cover most of the top surfaces of the first electrode 21 and the second electrode 22, but may be configured to expose portions of the first electrode 21 and the second electrode 22. The first insulating layer 51 may be configured to expose portions of the top surfaces of the first electrode 21 and the second electrode 22 on, for example, the first embankment 40. The first insulating layer 51 may be formed on a portion of the surface of the first planarization layer 19 and may include openings (not shown) that partially expose the first electrode 21 and the second electrode 22.

[0105] In one embodiment, the first insulating layer 51 may be stepped, such that a portion of the top surface of the first insulating layer 51 may be recessed between the first electrode 21 and the second electrode 22. In some embodiments, the first insulating layer 51 may comprise an inorganic insulating material, and the portion of the top surface of the first insulating layer 51 configured to cover the first electrode 21 and the second electrode 22 may be recessed due to the height difference formed by the underlying elements. The light-emitting element 30 disposed on the first insulating layer 51 between the first electrode 21 and the second electrode 22 may form an empty space with the recessed portion of the top surface of the first insulating layer 51. The light-emitting element 30 may be configured to be spaced apart from the top surface of the first insulating layer 51, and the space between the first insulating layer 51 and the light-emitting element 30 may be filled with the material of the second insulating layer 52, which will be described later. However, the disclosure is not limited thereto. The first insulating layer 51 may be formed with a flat surface on which the light-emitting element 30 is disposed.

[0106] The first insulating layer 51 protects the first electrode 21 and the second electrode 22, and also insulates the first electrode 21 and the second electrode 22 from each other. Furthermore, the first insulating layer 51 prevents the light-emitting element 30 disposed on the first insulating layer 51 from directly contacting and being damaged by other elements. However, there are no particular limitations on the shape and structure of the first insulating layer 51.

[0107] The second dam 45 may be disposed on the first insulating layer 51. In some embodiments, the second dam 45 may surround not only the area where the first dam 40 is disposed, but also the area on the first insulating layer 51 where the light-emitting element 30 is disposed, and may be arranged along the boundary between sub-pixels PXn. The second dam 45 may be configured to extend in the first direction DR1 and the second direction DR2, and thus may form a grid pattern on the entire surface of the display area DPA. The portion of the second dam 45 extending in the first direction DR1 may partially overlap with the first electrode 21 and the second electrode 22, and the portion of the second dam 45 extending in the second direction DR2 may be spaced apart from the first dam 40, the first electrode 21, and the second electrode 22.

[0108] The height of the second dike 45 may be greater than the height of the first dike 40. Unlike the first dike 40, the second dike 45 may define adjacent sub-pixels PXn and may prevent ink from overflowing between adjacent sub-pixels PXn during inkjet printing for aligning the light-emitting elements 30 during the manufacture of the display device 10. The second dike 45 may separate inks from different groups of light-emitting elements 30 so that they do not mix together. Similar to the first dike 40, the second dike 45 may include PI, but the disclosure is not limited thereto.

[0109] Light-emitting elements 30 may be disposed between electrodes 21 and 22. In one embodiment, light-emitting elements 30 may extend in one direction and may be configured to be spaced apart from each other and substantially parallel to each other. There is no particular limitation on the distance between the light-emitting elements 30. Some of the light-emitting elements 30 may be configured to be adjacent to each other to form a group, and some of the light-emitting elements 30 may be configured to be spaced apart from each other by a predetermined distance to form another group. Optionally, the light-emitting elements 30 may be arranged with a non-uniform density. Furthermore, the directions in which electrodes 21 and 22 extend may be substantially perpendicular to the directions in which the light-emitting elements 30 extend. However, the disclosure is not limited thereto. Optionally, the light-emitting elements 30 may extend obliquely relative to the directions in which electrodes 21 and 22 extend.

[0110] The light-emitting element 30 may include an active layer containing different materials ( Figure 6The display device 10 may include a light-emitting element 30 capable of emitting light of different wavelengths. For example, the light-emitting element 30 of the first sub-pixel PX1 may include an active layer 36 that emits a first color light having a first wavelength as its center wavelength, the light-emitting element 30 of the second sub-pixel PX2 may include an active layer 36 that emits a second color light having a second wavelength as its center wavelength, and the light-emitting element 30 of the third sub-pixel PX3 may include an active layer 36 that emits a third color light having a third wavelength as its center wavelength.

[0111] Therefore, the first sub-pixel PX1, the second sub-pixel PX2, and the third sub-pixel PX3 can emit a first color light, a second color light, and a third color light, respectively. In some embodiments, the first color light can be blue light with a center wavelength of 450 nm to 495 nm, the second color light can be green light with a center wavelength of 495 nm to 570 nm, and the third color light can be red light with a center wavelength of 620 nm to 752 nm. However, the disclosure is not limited thereto. Optionally, the first sub-pixel PX1, the second sub-pixel PX2, and the third sub-pixel PX3 can include the same type of light-emitting element 30, and therefore can all emit light of the same color.

[0112] Light-emitting elements 30 may be disposed on the first insulating layer 51 between the first electrodes 40 or between electrodes 21 and 22. For example, at least one end of each of the light-emitting elements 30 may be disposed on the first electrode 21 or the second electrode 22. The length of the light-emitting element 30 may be greater than the distance between the first electrode 21 and the second electrode 22, and both ends of each of the light-emitting elements 30 may be disposed on the first electrode 21 and the second electrode 22. However, the disclosure is not limited thereto. Optionally, only one end of each of the light-emitting elements 30 may be disposed on electrodes 21 and 22, or both ends of each of the light-emitting elements 30 may not be disposed on electrodes 21 and 22. Even if the light-emitting elements 30 are not disposed on electrodes 21 and 22, both ends of each of the light-emitting elements 30 may be electrically connected to electrodes 21 and 22 by connection electrodes 26 and 27, which will be described later. In some embodiments, at least a portion of the light-emitting element 30 may be disposed between the first electrode 21 and the second electrode 22, and both ends of each of the light-emitting elements 30 may be electrically connected to electrodes 21 and 22.

[0113] In each of the light-emitting elements 30, multiple layers may be arranged in a direction perpendicular to the top surface of the first substrate 11 or the first planarization layer 19. The light-emitting element 30 may extend in one direction and may have a structure in which multiple semiconductor layers are sequentially arranged. The light-emitting element 30 may be configured such that the direction in which the light-emitting element 30 of the display device 10 extends may be parallel to the first planarization layer 19, including that the semiconductor layers in each of the light-emitting elements 30 may be sequentially arranged in a direction parallel to the top surface of the first planarization layer 19. However, the disclosure is not limited thereto. In cases where the light-emitting elements 30 may have different structures, the layers of each of the light-emitting elements 30 may be arranged in a direction perpendicular to the first planarization layer 19.

[0114] Furthermore, both ends of each of the light-emitting elements 30 can contact the connecting electrodes 26 and 27. This is because no insulating film is formed ( Figure 6 The insulating film 38 of each of the light-emitting elements 30 is partially exposed on two end surfaces in the extending direction of each of the light-emitting elements 30, so that the exposed semiconductor layers can contact the connection electrodes 26 and 27, but the disclosure is not limited thereto. At least a portion of the insulating film 38 of each of the light-emitting elements 30 can be removed, so that the side surfaces of the semiconductor layers of each of the light-emitting elements 30 can be partially exposed. The exposed side surfaces of the semiconductor layers of each of the light-emitting elements 30 can directly contact the connection electrodes 26 and 27.

[0115] During the manufacture of the display device 10, the light-emitting element 30 can be sprayed into each of the sub-pixels PXn in a dispersed state within ink. Once the ink is sprayed, an alignment signal is applied to electrodes 21 and 22 to generate an electric field in the ink. When the light-emitting element 30 is subjected to a force from the electric field, the orientation and position of the light-emitting element 30 continuously change, thus allowing the light-emitting element 30 to be positioned on electrodes 21 and 22. The light-emitting element 30 can be aligned between electrodes 21 and 22 such that the direction along which the light-emitting element 30 extends faces a specific direction. Here, ink is sprayed into each region defined by a second embankment 45 disposed along the boundary of each of the sub-pixels PXn. Since the light-emitting elements 30 are randomly dispersed in the ink, even in the presence of an electric field, at least some of the light-emitting elements 30 will be placed in areas other than the region between electrodes 21 and 22. These light-emitting elements 30 are not electrically connected to electrodes 21 and 22 and are lost during the manufacture of the display device 10.

[0116] The display device 10 may include an alignment guiding layer 70 that guides the light-emitting elements 30 to specific locations when ink, in which light-emitting elements 30 are dispersed, is sprayed into each of the sub-pixels PXn during the manufacturing process of the display device 10. The ink sprayed into each of the sub-pixels PXn may settle or move to a specific area formed by the alignment guiding layer 70, resulting in a dense arrangement of the light-emitting elements 30 in that specific area. Because the display device 10 includes the alignment guiding layer 70, loss of the light-emitting elements 30 can be minimized during the manufacturing process of the display device 10, and the light-emitting elements 30 can be densely placed in specific locations.

[0117] The alignment induction layer 70 may include a hydrophobic material. The polarity of the material of the alignment induction layer 70 may be varied depending on the chemical polarity of the solvent of the ink. In one embodiment, during the manufacture of the display device 10, the solvent of the ink having the light-emitting element 30 dispersed therein may be a hydrophilic solvent, and the alignment induction layer 70 may include a hydrophobic material and thus guide the ink to settle or move to areas where the alignment induction layer 70 is not disposed. The ink containing the hydrophilic solvent is densely located in each of the sub-pixels PXn at locations where the alignment induction layer 70 is not disposed, and the light-emitting element 30 may be configured not to overlap with the portion of the alignment induction layer 70 that includes the hydrophobic material. However, the disclosure is not limited thereto. Optionally, the alignment induction layer 70 may include portions containing a hydrophilic material (such as the solvent of the ink). This will be described later in conjunction with other embodiments disclosed.

[0118] Alignment induction layer 70 may be disposed in each of the sub-pixels PXn. The position of alignment induction layer 70 may vary depending on the region in which the light-emitting element 30 is disposed. In one embodiment, alignment induction layer 70 may be configured to surround at least a portion of the region between electrodes 21 and 22 in each of the sub-pixels PXn. For example, alignment induction layer 70 may be configured to surround a space in each of the sub-pixels PXn in which electrodes 21 and 22 are spaced apart from each other. Alignment induction layer 70 may include a first extension 70A extending in a first direction DR1 and a second extension 70B extending in a second direction DR2. The first extension 70A of alignment induction layer 70 may be configured to intersect electrodes 21 and 22 and thus may overlap with portions of electrodes 21 and 22. In regions in each of the sub-pixels PXn that do not overlap with the first dam 40 (i.e., in the upper and lower portions of each of the sub-pixels PXn), the first extension 70A may be configured to extend through electrodes 21 and 22. The second extension 70B of the alignment induction layer 70 can be disposed between the portion of the second dike 45 extending in the second direction DR2 and the outermost electrode disposed at a distance from the center of each of the sub-pixels PXn. Therefore, in a plan view, the alignment induction layer 70 can be configured to surround the area between electrodes 21 and 22 or between the first dikes 40.

[0119] When the alignment induction layer 70 comprises a hydrophobic material, the light-emitting elements 30 can be densely arranged in the areas where the alignment induction layer 70 is not disposed. As described above, each of the sub-pixels PXn may include an emission region EMA in which the light-emitting elements 30 are disposed to emit light. Furthermore, each of the sub-pixels PXn may include an alignment region AA in which the light-emitting elements 30 are densely arranged due to the presence of the alignment induction layer 70 and an unaligned region NAA in which the distribution of the light-emitting elements 30 is relatively low. That is, the display device 10 may include an emission region EMA in each of the sub-pixels PXn, and the emission region EMA may include an alignment region AA in which the light-emitting elements 30 are densely arranged and an unaligned region NAA occupying the entire emission region EMA excluding the alignment region AA. Since the light emitted from the light-emitting elements 30 in the alignment region AA reaches not only the alignment region AA but also the unaligned region NAA, both the alignment region AA and the unaligned region NAA can be included in the emission region EMA.

[0120] The alignment region AA and the non-alignment region NAA can be classified according to the number, distribution, or density of the light-emitting elements 30 per unit area, and the shape and position of the alignment region AA and the non-alignment region NAA can be related to the layout of the alignment induction layer 70. For example, if the alignment induction layer 70 only includes a hydrophobic material, the light-emitting elements 30 can be densely arranged only in the areas where the alignment induction layer 70 is not provided. In this case, the areas where the alignment induction layer 70 is provided and the areas where the light-emitting elements 30 are provided but the alignment induction layer 70 is not provided can be the non-alignment region NAA and the alignment region AA, respectively.

[0121] However, the disclosure is not limited thereto. Optionally, the alignment induction layer 70 may further include a hydrophilic material, and at least a portion of the area in which the alignment induction layer 70 is disposed may be an alignment region AA. The display device 10 may include an alignment region AA and a non-alignment region NAA in each of the sub-pixels PXn, and at least a portion of the alignment induction layer 70 may be disposed in the non-alignment region NAA. The portion of the alignment induction layer 70 including a hydrophobic material may be disposed in the non-alignment region NAA to surround the alignment region AA, and the light-emitting elements 30 may be densely arranged in the alignment region AA.

[0122] The alignment induction layer 70 may be disposed on the first insulating layer 51. The alignment induction layer 70 may be disposed on the first insulating layer 51, which partially covers electrodes 21 and 22, in a region other than the region where the light-emitting element 30 is disposed. For example, in the misalignment region NAA, the alignment induction layer 70 may be disposed on the first insulating layer 51.

[0123] In each of the sub-pixels PXn, only one alignment region AA can be set by the alignment guiding layer 70, but the disclosure is not limited thereto. As described above, the position or shape of the alignment region AA and the non-alignment region NAA can be changed according to the layout of the alignment guiding layer 70. In some embodiments, the alignment guiding layer 70 can be configured to separate the sub-pixels PXn, and each of the sub-pixels PXn may include multiple alignment regions AA.

[0124] The second insulating layer 52 may be partially disposed on the light-emitting element 30 between the first electrode 21 and the second electrode 22. The second insulating layer 52 may be configured to surround a portion of the outer surface of each of the light-emitting elements 30. The portion of the second insulating layer 52 on the light-emitting element 30 may extend in a second direction DR2 between the first electrode 21 and the second electrode 22. For example, the second insulating layer 52 may be formed into a linear pattern or an island pattern in each of the sub-pixels PXn.

[0125] A second insulating layer 52 may be disposed on the light-emitting element 30 to expose a first end and a second end of the light-emitting element 30. The exposed end of each of the light-emitting elements 30 may contact the connecting electrodes 26 and 27. The second insulating layer 52 may be formed by patterning using a typical masking process. The mask used to form the second insulating layer 52 may have a width smaller than the length of the light-emitting element 30, and the second insulating layer 52 may be patterned to expose both ends of each of the light-emitting elements 30. However, the disclosure is not limited thereto.

[0126] The second insulating layer 52 can protect and secure the light-emitting element 30 during the manufacture of the display device 10. In one embodiment, some material of the second insulating layer 52 can be disposed between the bottom surface of the light-emitting element 30 and the first insulating layer 51. As described above, during the manufacture of the display device 10, the second insulating layer 52 can be formed to fill the space between the first insulating layer 51 and the light-emitting element 30. Therefore, during the manufacture of the display device 10, the second insulating layer 52 can be configured to surround the outer surface of each of the light-emitting elements 30 and can protect and secure the light-emitting element 30.

[0127] Connecting electrodes 26 and 27 are disposed on the first electrode 21 and the second electrode 22. Connecting electrodes 26 and 27 may include a first connecting electrode 26 and a second connecting electrode 27, the first connecting electrode 26 being disposed on the first electrode 21 and in contact with the first end of the light-emitting element 30, and the second connecting electrode 27 being disposed on the second electrode 22 and in contact with the second end of the light-emitting element 30.

[0128] The first connecting electrode 26 and the second connecting electrode 27 may extend in each of the sub-pixels PXn along the second direction DR2, spaced apart from each other and facing each other along the first direction DR1. The first connecting electrode 26 and the second connecting electrode 27 may be spaced apart from each other and facing each other in the region where the light-emitting element 30 is disposed (e.g., between the first electrode 21 and the second electrode 22). In some embodiments, the connecting electrodes 26 and 27 may form a linear pattern in each sub-pixel PXn.

[0129] The first connecting electrode 26 and the second connecting electrode 27 can respectively contact the portions of the top surfaces of the first electrode 21 and the second electrode 22 that are exposed due to the absence of the first insulating layer 51. Furthermore, the connecting electrodes 26 and 27 can contact the ends of the light-emitting element 30. In some embodiments, the connecting electrodes 26 and 27 may comprise a conductive material, and the light-emitting element 30 can be electrically connected to the electrodes 21 and 22 by contacting the connecting electrodes 26 and 27. As described above, some semiconductor layers of each of the light-emitting elements 30 can be exposed at both ends of each of the light-emitting elements 30, and the connecting electrodes 26 and 27 can directly contact the exposed semiconductor layers of each of the light-emitting elements 30. The first connecting electrode 26 and the second connecting electrode 27 can extend in the second direction DR2 and can be configured to surround portions of the outer surface of each of the light-emitting elements 30 disposed between the electrodes 21 and 22.

[0130] In one embodiment, the widths of connecting electrodes 26 and 27 may be smaller than the widths of electrodes 21 and 22. Connecting electrodes 26 and 27 may contact the ends of the light-emitting element 30 and cover the sides of electrodes 21 and 22. In a plan view, the first connecting electrode 26 may be disposed on the first electrode 21, spaced apart from each other, and covering both sides of the first electrode 21. The second connecting electrode 27 may be configured to cover the side of the second electrode 22 facing the first electrode 21. The first connecting electrode 26 and the second connecting electrode 27 may contact portions of the top surfaces of the first electrode 21 and the second electrode 22, as well as the ends of the light-emitting element 30.

[0131] Each of the sub-pixels PXn is shown as including two first connecting electrodes 26 and two second connecting electrodes 27, but the disclosure is not limited thereto. The number of first connecting electrodes 26 and second connecting electrodes 27 may vary depending on the number of first electrodes 21 and second electrodes 22 in each of the sub-pixels PXn.

[0132] The connecting electrodes 26 and 27 may comprise conductive materials. For example, connecting electrodes 26 and 27 may comprise ITO, IZO, ITZO, or Al. For example, connecting electrodes 26 and 27 may comprise transparent conductive materials, and light emitted by the light-emitting element 30 may pass through connecting electrodes 26 and 27 toward electrodes 21 and 22. Electrodes 21 and 22 disposed on the inclined side of the first embankment 40 may comprise materials with high reflectivity and may reflect incident light from the first substrate 11 in the upward direction, but the disclosure is not limited thereto.

[0133] A third insulating layer 53 is disposed on the first connecting electrode 26. The third insulating layer 53 electrically insulates the first connecting electrode 26 and the second connecting electrode 27. The third insulating layer 53 may be configured to cover the first connecting electrode 26, but may not be disposed on the end surface of the second end of the light-emitting element 30 so that the light-emitting element 30 can contact the second connecting electrode 27. On the top surface of the second insulating layer 52, the third insulating layer 53 may partially contact the first connecting electrode 26 and the second connecting electrode 27. The side of the third insulating layer 53 where the second electrode 22 is disposed may be aligned with the side of the second insulating layer 52, but the disclosure is not limited thereto. Therefore, the second connecting electrode 27 may be disposed on the second electrode 22, the second insulating layer 52, and the third insulating layer 53. The first connecting electrode 26 may be disposed between the first electrode 21 and the third insulating layer 53, and the second connecting electrode 27 may be disposed on the third insulating layer 53. The first connecting electrode 26 and the second connecting electrode 27 may not contact each other due to the second insulating layer 52 and the third insulating layer 53, but the disclosure is not limited thereto. The third insulating layer 53 may not be disposed.

[0134] The fourth insulating layer 54 can be disposed on the entire surface of the first substrate 11. The fourth insulating layer 54 can protect the components disposed on the first substrate 11 from the influence of the external environment.

[0135] The first insulating layer 51, the second insulating layer 52, the third insulating layer 53, and the fourth insulating layer 54 may comprise inorganic or organic insulating materials. In one embodiment, the first insulating layer 51, the second insulating layer 52, the third insulating layer 53, and the fourth insulating layer 54 may comprise materials such as SiO2. x SiN x SiO x N y Inorganic insulating materials such as Al2O3 or AlN. Optionally, the first insulating layer 51, the second insulating layer 52, the third insulating layer 53, and the fourth insulating layer 54 may comprise organic insulating materials such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylene resin, polyphenylene sulfide resin, benzocyclobutene, caloric resin, siloxane resin, silsesquioxane resin, polymethyl methacrylate, polycarbonate, or polymethyl methacrylate-polycarbonate synthetic resin, but the disclosure is not limited thereto.

[0136] Figure 5 This is a partial cross-sectional view of a display device according to another disclosed embodiment.

[0137] Reference Figure 5The display device 10 may not include the third insulating layer 53. A portion of the second connecting electrode 27 may be directly disposed on the second insulating layer 52. The first connecting electrode 26 and the second connecting electrode 27 may be spaced apart from each other on the second insulating layer 52. Even without the third insulating layer 53, the second insulating layer 52 may include an organic insulating material, thus enabling it to perform the function of fixing the light-emitting element 30. The first connecting electrode 26 and the second connecting electrode 27 may be formed simultaneously through patterning. Except for omitting the third insulating layer 53... Figure 5 Implementation examples and Figure 3 The embodiments are the same.

[0138] In each sub-pixel PXn, the display device 10 may include an alignment induction layer 70, and thus may have an alignment region AA in which light-emitting elements 30 are densely arranged. During the manufacture of the display device 10, when ink with light-emitting elements 30 dispersed therein is sprayed into each region surrounded by the second dike 45, the ink may settle or move to areas in which the alignment induction layer 70 is not disposed. The light-emitting elements 30 disposed between electrodes 21 and 22 may be densely arranged in the alignment region AA formed by the alignment induction layer 70. The display device 10 can reduce the waste of light-emitting elements 30 and can precisely position the light-emitting elements 30 at the desired location in each sub-pixel PXn.

[0139] The light-emitting element 30 may be an LED, and in particular, an inorganic LED having a size of a few micrometers or nanometers and formed of inorganic materials. The inorganic LED can be aligned between two opposing electrodes that form polarities in response to an electric field generated therebetween in a specific direction.

[0140] Figure 6 This is a schematic diagram of a light-emitting element according to a disclosed embodiment.

[0141] Reference Figure 6 The light-emitting element 30 can extend in one direction. The light-emitting element 30 can have a rod shape, a wiring shape, or a tubular shape. In one embodiment, the light-emitting element 30 can have a cylindrical shape or a rod shape. However, there is no particular limitation on the shape of the light-emitting element 30, and the light-emitting element 30 can have various shapes such as a polygonal prism shape (e.g., a cube shape, a cuboid shape, or a hexagonal prism shape) or a shape that extends in one direction and whose outer surface is partially inclined.

[0142] The light-emitting element 30 may include a semiconductor layer doped with impurities of any conductivity type (e.g., p-type or n-type). The semiconductor layer can receive electrical signals applied to it from an external source, thereby emitting light of a specific wavelength. The semiconductor layers included in the light-emitting element 30 may be arranged or stacked sequentially in one direction.

[0143] The light-emitting element 30 may include a first semiconductor layer 31, a second semiconductor layer 32, an active layer 36, an electrode layer 37, and an insulating film 38. To make the light-emitting element 30 visible, Figure 6 A light-emitting element 30 is shown with a portion of the insulating film 38 removed to expose a plurality of semiconductor layers 31 and 32 and an active layer 36. However, as will be described later, the insulating film 38 may be configured to surround the outer surface of the semiconductor layers 31 and 32 and the active layer 36.

[0144] Specifically, the first semiconductor layer 31 can be an n-type semiconductor. For example, in the case where the light-emitting element 30 emits light of a blue wavelength, the first semiconductor layer 31 can include a semiconductor material (i.e., Al). x Ga y In 1-x-y N (where 0 ≤ x ≤ 1, 0 ≤ y ≤ 1, 0 ≤ x + y ≤ 1)). For example, the first semiconductor layer 31 may include at least one of AlGaInN, GaN, AlGaN, InGaN, AlN, and InN doped with an n-type dopant. The first semiconductor layer 31 may be doped with an n-type dopant, and the n-type dopant may be, for example, Si, Ge, Se, or Sn. For example, the first semiconductor layer 31 may be n-GaN doped with n-type Si. The first semiconductor layer 31 may have a length of 1.5 μm to 5 μm, but the disclosure is not limited thereto.

[0145] The second semiconductor layer 32 may be disposed on the active layer 36, which will be described later. The second semiconductor layer 32 may be a p-type semiconductor. When the light-emitting element 30 emits light of blue or green wavelengths, the second semiconductor layer 32 may comprise a semiconductor material (i.e., Al). x Ga y In 1-x-y N (where 0 ≤ x ≤ 1, 0 ≤ y ≤ 1, 0 ≤ x + y ≤ 1)). For example, the second semiconductor layer 32 may include at least one of AlGaInN, GaN, AlGaN, InGaN, AlN, and InN doped with a p-type dopant. The second semiconductor layer 32 may be doped with a p-type dopant, and the p-type dopant may be, for example, Mg, Zn, Ca, or Ba. In one embodiment, the second semiconductor layer 32 may be p-GaN doped with p-type Mg. The second semiconductor layer 32 may have a length of 0.05 μm to 0.10 μm, but the disclosure is not limited thereto.

[0146] The first semiconductor layer 31 and the second semiconductor layer 32 are shown as being formed as a single layer, but the disclosure is not limited thereto. Alternatively, in some embodiments, each of the first semiconductor layer 31 and the second semiconductor layer 32 may include more than one layer, depending on the material of the active layer 36 (such as a capping layer or a tensile strain barrier reduction (TSBR) layer).

[0147] An active layer 36 is disposed between a first semiconductor layer 31 and a second semiconductor layer 32. The active layer 36 may comprise a single quantum well structure material or a multi-quantum well structure material. When the active layer 36 comprises a material with a multi-quantum well structure, the active layer 36 may have a structure in which multiple quantum layers and multiple well layers are alternately stacked. The active layer 36 can emit light by causing electron-hole pairs to recombine according to an electrical signal applied to it via the first semiconductor layer 31 and the second semiconductor layer 32. For example, when the active layer 36 emits light of a blue wavelength, the quantum layer may comprise a material such as AlGaN or AlGaInN. Specifically, when the active layer 36 has a multi-quantum well structure in which multiple quantum layers and multiple well layers are alternately stacked, the quantum layer may comprise a material such as AlGaN or AlGaInN, and the well layer may comprise a material such as GaN or AlInN. In one embodiment, when the active layer 36 comprises AlGaInN as its quantum layer and AlInN as its well layer, the active layer 36 may emit blue light with a center wavelength of 450 nm to 495 nm.

[0148] However, the disclosure is not limited thereto. Optionally, the active layer 36 may have a structure in which semiconductor materials with large band gaps and semiconductor materials with small band gaps are stacked alternately, or may include group III or group V semiconductor materials depending on the wavelength of the light to be emitted. There is no particular limitation on the type of light emitted by the active layer 36. The active layer 36 may emit red or green light as needed, instead of blue light. The active layer 36 may have a length from 0.05 μm to 0.10 μm, but the disclosure is not limited thereto.

[0149] Light can be emitted not only from the circumferential surface of the light-emitting element 30 along its length, but also from both sides of the light-emitting element 30. There is no particular limitation on the direction of light emitted from the active layer 36.

[0150] Electrode layer 37 may be an ohmic connection electrode, but the disclosure is not limited thereto. Optionally, electrode layer 37 may be a Schottky connection electrode. Light-emitting element 30 may include at least one electrode layer 37. Light-emitting element 30 is shown as including one electrode layer 37, but the disclosure is not limited thereto. Optionally, light-emitting element 30 may include more than one electrode layer 37, or may not have an electrode layer 37. However, the following description of light-emitting element 30 can also be directly applied to having more than one electrode layer 37 or having an electrode layer 37. Figure 6 The light-emitting element 30 has different structures.

[0151] When the light-emitting element 30 is electrically connected to an electrode (or connecting electrode) in the display device 10, the electrode layer 37 can reduce the resistance between the light-emitting element 30 and the electrode (or connecting electrode). The electrode layer 37 may include a conductive metal. For example, the electrode layer 37 may include at least one of Al, Ti, In, Au, Ag, ITO, IZO, and ITZO. Furthermore, the electrode layer 37 may include a semiconductor material doped with an n-type dopant or a p-type dopant. The electrode layer 37 may have a length of 0.05 μm to 0.10 μm, but the disclosure is not limited thereto.

[0152] An insulating film 38 is configured to surround the outer surfaces of the semiconductor layer and the electrode layer. In one embodiment, the insulating film 38 may be configured to at least surround the outer surface of the active layer 36 and may extend in the direction along which the light-emitting element 30 extends. The insulating film 38 may protect other elements of the light-emitting element 30. For example, the insulating film 38 may be formed to surround the sides of other elements of the light-emitting element 30, but expose the two ends of the light-emitting element 30 in the longitudinal direction.

[0153] The insulating film 38 is shown extending along the length of the light-emitting element 30 to cover the sides of the layers of the light-emitting element 30 from the first semiconductor layer 31 to the electrode layer 37, but the disclosure is not limited thereto. The insulating film 38 may cover only some of the outer surfaces of the semiconductor layers (including the active layer 36), or it may cover only a portion of the outer surface of the electrode layer 37 to expose a portion of the outer surface of the electrode layer 37. Furthermore, the insulating film 38 may have a circular dome surface near at least one end of the light-emitting element 30.

[0154] The insulating film 38 may have a thickness of 10 nm to 1.0 μm, but the disclosure is not limited thereto. Preferably, the insulating film 38 may have a thickness of about 40 nm.

[0155] The insulating film 38 may include materials such as SiO2 x SiN x SiO x N y AlN x or AlO x For example, it is an insulating material. The insulating film 38 can prevent any short circuits that may occur when the active layer 36 is placed in direct contact with the electrodes that transmit electrical signals directly to the light-emitting element 30. In addition, since the insulating film 38 includes the active layer 36 to protect the outer surface of the light-emitting element 30, any degradation of the emission efficiency of the light-emitting element 30 can be prevented.

[0156] Furthermore, in some embodiments, the outer surface of the insulating film 38 may be surface-treated. During the manufacture of the display device 10, the light-emitting element 30 may be sprayed onto the electrode while dispersed in a predetermined ink. Here, the surface of the insulating film 38 may be hydrophobically or hydrophilically treated to keep the light-emitting element 30 dispersed in the ink and prevent it from agglomerating with other light-emitting elements 30.

[0157] The length h of the light-emitting element 30 can be in the range of 1 μm to 10 μm or 2 μm to 6 μm, preferably in the range of 3 μm to 5 μm. Furthermore, the diameter of the light-emitting element 30 can be in the range of 30 nm to 700 nm, and the aspect ratio of the light-emitting element 30 can be from 1.2 to 100. However, the disclosure is not limited thereto. Multiple light-emitting elements 30 included in the display device 10 can have different diameters depending on the composition of their respective active layers 36. Preferably, the diameter of the light-emitting element 30 can be about 500 nm.

[0158] The method of manufacturing the display device 10 will be described below.

[0159] Figures 7 to 12 This is a cross-sectional view illustrating a method of manufacturing a display device according to a disclosed embodiment.

[0160] Reference Figure 7 A target substrate is prepared, and electrodes 21 and 22 are formed on the target substrate. Electrodes 21 and 22 may include a first electrode 21 and a second electrode 22, with the second electrode 22 spaced apart from and facing the first electrode 21. Furthermore, a plurality of first dikes 40 may be further disposed between the first electrode 21 and the second electrode 22 and the target substrate. Although not specifically shown, the target substrate may include a first substrate 11 and a plurality of circuit elements formed of a plurality of conductive layers and a plurality of insulating layers. For convenience, the first substrate 11 and the circuit elements are simply shown and described as the target substrate.

[0161] Subsequently, a first insulating layer 51 and a second dike 45 disposed on the first insulating layer 51 are formed on electrodes 21 and 22. Electrodes 21 and 22, the first insulating layer 51, the first dike 40, and the second dike 45 can be formed by typical deposition or masking processes. The first insulating layer 51 can be configured to cover all electrodes 21 and 22 and can be partially removed later before the formation of connecting electrodes 26 and 27. The first insulating layer 51 can be later patterned to expose the top surfaces of electrodes 21 and 22, and thus can have... Figure 3 The structure shown is illustrated. The layout and structure of the first insulating layer 51 are as described above. A description of how each element of the display device 10 is formed will be omitted; instead, a detailed description of the formation order of the elements of the display device 10 will be provided.

[0162] Subsequently, refer to Figure 8 An alignment guiding layer 70 is formed on a portion of the first insulating layer 51. The alignment guiding layer 70 can be disposed on the first insulating layer 51 in areas other than the region between electrodes 21 and 22. The alignment guiding layer 70 can be spaced apart from the outermost electrode portion disposed at the outermost distance from the center of each sub-pixel PXn.

[0163] In one embodiment, the alignment-inducing layer 70 can be formed as a self-assembled monolayer (SAM). The SAM can be formed by self-assembling monomolecules on a target surface. The alignment-inducing layer 70 can be formed by depositing hydrophobic monomolecules on the first insulating layer 51 and bonding the monomolecules together. The formation of the alignment-inducing layer 70 can be performed by depositing hydrophobic monomolecules on the first insulating layer 51. Here, the monomolecules of the alignment-inducing layer 70 can be bonded to each other and also to the material of the first insulating layer 51. For example, the first insulating layer 51 may comprise SiO2. x In this case, hydroxyl groups (-OH) bonded to silicon (Si) can be exposed on the surface of the first insulating layer 51. Here, the alignment-inducing layer 70 can be formed by depositing a monomolecule (e.g., (Si(CH3)3)2NH) on the surface of the first insulating layer 51 and bonding it to the hydroxyl groups (-OH). For example, (Si(CH3)3)2NH, as the monomolecule material forming the alignment-inducing layer 70, can bond to oxygen exposed on the surface of the first insulating layer 51, and the alignment-inducing layer 70 can be formed as a monolayer comprising (Si(CH3)3)2NH bonded to oxygen. The alignment-inducing layer 70 formed as a monolayer comprising (Si(CH3)3)2NH can have hydrophobic properties.

[0164] However, there are no particular limitations on the formation of the alignment-inducing layer 70. Alternatively, in some embodiments, the alignment-inducing layer 70 can be obtained by forming a monolayer on the entire surface of the first insulating layer 51 and modifying the surface of the monolayer.

[0165] Subsequently, refer to Figure 9 and Figure 10 The ink S, including the light-emitting element 30, is sprayed onto the target substrate into the area surrounded by the second dike 45. The light-emitting element 30 can be sprayed in a state dispersed in the solvent of the ink S. In one embodiment, the light-emitting element 30 can be prepared in a state dispersed in the ink S and can be sprayed onto the target substrate by printing using an inkjet printing apparatus (not shown).

[0166] The ink S ejected by printing using an inkjet printing device can be evenly spread and settle in the area surrounded by the second dike 45. The second dike 45 can prevent the ink S from overflowing between different sub-pixels PXn. Some of the ink S can settle in the area where the alignment induction layer 70 is formed, and some of the ink S can settle in the area where the alignment induction layer 70 is not formed.

[0167] The display device 10 can guide the ink S, which has light-emitting elements 30 dispersed therein, to move or settle at a specific location. As described above, the solvent of the ink S can be hydrophilic, and the alignment induction layer 70 can include a hydrophobic material. When the hydrophilic solvent settles on the alignment induction layer 70 which includes a hydrophobic material, the ink S can move to an area where the alignment induction layer 70 is not disposed due to the chemical repulsion between the hydrophilic solvent and the hydrophobic material.

[0168] The solvent of ink S can form interfaces not only with the first insulating layer 51, electrodes 21 and 22, and alignment induction layer 70, but also with air. The solvent can move to minimize the surface energy of the interface, and the interface formed by the hydrophilic solvent and the hydrophobic alignment induction layer 70 has high surface energy. The solvent of ink S can move to minimize the area of ​​the interface formed with the alignment induction layer 70, and the ink S sprayed onto the target substrate can move and settle in areas where the alignment induction layer 70 is not located.

[0169] Therefore, ink S with light-emitting elements 30 dispersed therein can move or settle in the region where the alignment induction layer 70 is not formed (i.e., the region between electrodes 21 and 22). Most of the light-emitting elements 30 can later be disposed on electrodes 21 and 22 in the region not superimposed with the alignment induction layer 70.

[0170] Reference Figure 11 The light-emitting element 30 is positioned on electrodes 21 and 22 by applying alignment signals to electrodes 21 and 22. When the alignment signals are applied to electrodes 21 and 22, an electric field is generated on the ink S sprayed onto electrodes 21 and 22. Once an electric field is generated on electrodes 21 and 22, the light-emitting element 30 dispersed in the ink S can receive the force from the electric field. Then, the orientation and position of the light-emitting element 30 can be continuously changed, and the light-emitting element 30 can be positioned on the first electrode 21 and the second electrode 22.

[0171] Due to the alignment induction layer 70, the ink S can be moved to a specific position, and most of the light-emitting elements 30 can be disposed on electrodes 21 and 22 in the area where the ink S has been moved. The light-emitting elements 30 can be aligned between the first electrode 21 and the second electrode 22, such that their two ends can be electrically connected to the first electrode 21 and the second electrode 22. The alignment induction layer 70 can be configured such that the area surrounding electrodes 21 and 22 is spaced apart from each other, and the light-emitting elements 30 can be aligned between electrodes 21 and 22. Light-emitting elements 30 disposed in areas other than between electrodes 21 and 22 will not be electrically connected to the first electrode 21 or the second electrode 22, and will ultimately not emit light in the display device 10. These light-emitting elements 30 may be lost in each sub-pixel PXn. The alignment induction layer 70 can guide the movement of the ink S between electrodes 21 and 22, and can minimize the number of light-emitting elements 30 that fail to be electrically connected to electrodes 21 and 22 and are lost.

[0172] Subsequently, refer to Figure 12 Once the light-emitting element 30 is aligned between electrodes 21 and 22, the solvent of the ink S is removed, and a second insulating layer 52 is formed. Solvent removal can be performed using a typical heat treatment process or a typical light irradiation process. Either heat treatment or light irradiation can be performed to selectively remove the solvent without damaging the light-emitting element 30. The second insulating layer 52 can be fixed to the aligned light-emitting element 30 between electrodes 21 and 22. Once the second insulating layer 52 is formed, the initial alignment position of the light-emitting element 30 can be maintained later without changing it.

[0173] Subsequently, multiple connecting electrodes 26 and 27, a third insulating layer 53 and a fourth insulating layer 54 can be formed to obtain the display device 10.

[0174] The formation of the display device 10 may include forming an alignment induction layer 70 and guiding ink S with light-emitting elements 30 dispersed therein to specific locations. The light-emitting elements 30 may be densely arranged in areas where the alignment induction layer 70 is not formed (i.e., in alignment regions AA). Since the display device 10 includes the alignment induction layer 70, the number of light-emitting elements 30 lost during the manufacture of the display device 10 can be minimized, and the emission concentration can be improved by densely arranging the light-emitting elements 30 at specific locations.

[0175] The display device 10 according to other disclosed embodiments will be described below.

[0176] Figure 13 This is a plan view of a sub-pixel of a display device according to another disclosed embodiment.

[0177] Reference Figure 13In the display device 10_1, the alignment induction layer 70_1 can be configured to partially cover the outermost electrode along the direction in which it extends. For example, the alignment induction layer 70_1 can be configured to intersect with a plurality of electrodes 21 and 22, and the second extension 70B can be configured to cover the outer side of the outermost electrode. Figure 13 Implementation examples and Figure 2 The difference in this embodiment lies in the layout of the alignment induction layer 70_1. This will be described below. Figure 13 The embodiments primarily focus on and Figure 2 Differences in the implementation examples.

[0178] At least one end of each of the plurality of light-emitting elements 30 may be disposed on one of the first electrode 21 or the second electrode 22, and the light-emitting elements 30 may be aligned in one direction between the first electrode 21 and the second electrode 22. When the light-emitting elements 30 are aligned between the electrodes 21 and 22, during the manufacture of the display device 10_1, the alignment induction layer 70_1 may be configured such that ink S having the light-emitting elements 30 dispersed therein may be located between the electrodes 21 and 22. The alignment induction layer 70_1 may be configured to cover the outer side of the outermost electrode, for example, the side of the outermost electrode spaced apart from and facing the second dike 45. The alignment region AA in which the alignment induction layer 70_1 is not disposed may be positioned to include the space between the electrodes 21 and 22, and the light-emitting elements 30 may be disposed in the alignment region AA between the electrodes 21 and 22.

[0179] The second extension 70B of the alignment induction layer 70_1 can be configured to partially overlap with the electrodes 21 and 22 extending in the second direction DR2 and the first dam 40. Since the alignment induction layer 70_1 is configured to partially cover the outermost electrode in the second direction DR2, the display device 10_1 can guide the ink S with the light-emitting elements 30 dispersed therein to settle or move to the area between the electrodes 21 and 22.

[0180] Furthermore, as described above, the alignment induction layer 70 may include not only portions containing hydrophobic materials but also portions containing hydrophilic materials. A portion of the alignment induction layer 70 having the same chemical polarity as ink S may be disposed between electrodes 21 and 22 to form an alignment region AA, and a portion of the alignment induction layer 70 having a different chemical polarity than ink S may be disposed in the remaining portion of the sub-pixel PXn to form an misalignment region NAA.

[0181] Figure 14 This is a plan view of a sub-pixel of a display device according to another disclosed embodiment. Figure 15 It is along Figure 14 A sectional view taken by line V-V'.

[0182] Reference Figure 14 and Figure 15 The alignment guiding layer 70_2 of the display device 10_2 may include a first portion 71 and a second portion 72, wherein the first portion 71 comprises a hydrophilic material and the second portion 72 comprises a hydrophilic material. The alignment guiding layer 70_2 may be disposed in the sub-pixel PXn in the entire area surrounded by the second dike 45, the second portion 72 may be disposed between electrodes 21 and 22, and the first portion 71 may be disposed in the remaining portion of the sub-pixel PXn. The alignment guiding layer 70_2 of the display device 10_2 may include portions having the same chemical polarity as the ink S having the light-emitting element 30 dispersed therein and portions having a different chemical polarity than the ink S, and thus may be able to effectively guide the ink S to settle or move to a specific location.

[0183] The alignment guiding layer 70_2 may include a first portion 71 and a second portion 72, and may be disposed substantially over the entire surface of the sub-pixel PXn to expose the top surfaces of electrodes 21 and 22. That is, the alignment guiding layer 70_2 may be arranged in the same shape as the first insulating layer 51.

[0184] The first portion 71 of the alignment induction layer 70_2 may include a hydrophobic material and may be configured to partially surround the region between electrodes 21 and 22. The second portion 72 may be disposed on the portion of sub-pixel PXn where the first portion 71 is not disposed, primarily in the region between electrodes 21 and 22. Similar to the first insulating layer 51, the second portion 72 may be disposed between electrodes 21 and 22 to cover the region where electrodes 21 and 22 are spaced apart from each other and face each other. In one embodiment, the light-emitting element 30 may be disposed directly on the second portion 72 of the alignment induction layer 70_2, but not on the first portion 71. The alignment region AA and the misalignment region NAA of sub-pixel PXn may be formed to correspond to the second portion 72 and the first portion 71 of the alignment induction layer 70_2, respectively.

[0185] The alignment-inducing layer 70_2 can be formed by depositing hydrophobic and hydrophilic materials, but the disclosure is not limited thereto. Alternatively, in one embodiment, the alignment-inducing layer 70_2 can be formed by depositing a material whose surface properties change upon light irradiation and performing a masking process to apply light.

[0186] Figures 16 to 18 It shows the manufacturing process. Figure 14 A cross-sectional view of the method of displaying the device.

[0187] Reference Figure 16A substrate layer 70' is formed on a target substrate in which a first dam 40, electrodes 21 and 22, and a first insulating layer 51 are formed. Subsequently, through surface treatment, the substrate layer 70' can form a partially hydrophilic and partially hydrophobic alignment-inducing layer 70_2. There are no particular limitations on the method of treating the surface of the substrate layer 70'. Hydrophilic or hydrophobic materials can be deposited on the surface of the substrate layer 70', or the surface of the substrate layer 70' can be modified by plasma treatment.

[0188] In one embodiment, the substrate layer 70' may include a light-induced surface control (PISC) material whose surface is modified by the application of light, and the formation of the alignment-inducing layer 70_2 may include applying light only to specific areas. The substrate layer 70' may become hydrophilic or hydrophobic in response to light applied thereto, and the alignment-inducing layer 70_2 may be formed using a photo-irradiation process with a mask.

[0189] Reference Figure 17 and Figure 18 A mask is placed on a substrate layer 70', and an alignment-inducing layer 70_2 with different chemical polarities from one region to another is formed by applying UV light. The substrate layer 70' can be surface-modified by UV light, thus making it chemically hydrophilic or hydrophobic, and the UV-irradiated portion and the unirradiated portion of the substrate layer 70' can have different properties. In one embodiment, the substrate layer 70' may include a hydrophobic material, and the UV-irradiated portion of the substrate layer 70' can be modified to have hydrophilic properties. During the formation of the alignment-inducing layer 70_2, the mask used for surface modification by UV light irradiation can be positioned to correspond to the region where the light-emitting element 30 will be disposed (e.g., the region between electrodes 21 and 22).

[0190] The portion of the substrate layer 70' superimposed on the region between electrodes 21 and 22 can be irradiated with UV light, thus making this portion hydrophilic. Conversely, the remaining portion of the substrate layer 70' can be hydrophobic without UV irradiation. The alignment induction layer 70_2 can include a first portion 71 and a second portion 72 depending on which portion of the alignment induction layer 70_2 is irradiated with UV light, and can form alignment regions AA in which the light-emitting elements 30 are densely arranged. Since the alignment induction layer 70_2 includes a hydrophobic first portion 71 and a hydrophilic second portion 72, the areas where ink S is guided to settle or move during the manufacturing of the display device 10_2 can be clearly distinguished. As a result, the number of light-emitting elements 30 lost due to their placement in the misalignment region NAA can be further reduced.

[0191] When the display device 10 includes an alignment induction layer 70, the light-emitting elements 30 can be densely arranged in the area defined by the alignment induction layer 70, and each sub-pixel PXn can include an alignment region AA and a non-alignment region NAA. To electrically connect the light-emitting elements 30 to electrodes 21 and 22, the alignment region AA can include the area between electrodes 21 and 22, and the non-alignment region NAA may not include the area between electrodes 21 and 22. Optionally, in some embodiments, a portion of the area between electrodes 21 and 22 can correspond to the alignment region AA, and a portion of the area between electrodes 21 and 22 can correspond to the non-alignment region NAA. That is, depending on the layout of the alignment induction layer 70, each sub-pixel PXn can include multiple alignment regions AA, and the non-alignment region NAA can be disposed between multiple alignment regions AA.

[0192] Figure 19 This is a plan view of a sub-pixel of a display device according to another disclosed embodiment. Figure 20 It is along Figure 19 A sectional view taken by line X1-X1'. Figure 21 It is along Figure 19 The sectional view taken by line X2-X2'. Figure 20 It is a cross-sectional view of the misaligned region NAA between two adjacent aligned regions AA, taken along the first direction DR1. Figure 21 It is a cross-sectional view of the non-aligned region NAA between two adjacent aligned regions AA, taken along the second direction DR2.

[0193] Reference Figures 19 to 21 In the display device 10_3, in the sub-pixel PXn, the alignment induction layer 70_3 may be partially disposed in the region between the plurality of electrodes 21 and 22. The emission region EMA of the sub-pixel PXn may include a plurality of alignment regions AA, and the alignment induction layer 70_3 may be disposed between the alignment regions AA to form a misalignment region NAA. Figures 19 to 21 Implementation examples and Figure 2 The difference in this embodiment is that the alignment induction layer 70_3 is configured to form a relatively large number of alignment regions AA in each sub-pixel PXn. This will be described below. Figures 19 to 21 The embodiments primarily focus on and Figure 2 Differences in the implementation examples.

[0194] The alignment induction layer 70_3 may surround the first dam 40 or the region between electrodes 21 and 22, and may be at least partially disposed between electrodes 21 and 22. The alignment induction layer 70_3 may include a plurality of first extensions 70A, and the first extensions 70A may extend through electrodes 21 and 22 extending in the second direction DR2. Some of the first extensions 70A of the alignment induction layer 70_3 may extend through the first dam 40 to be partially disposed between electrodes 21 and 22. Therefore, the alignment induction layer 70_3 can divide the region between electrodes 21 and 22, and a plurality of alignment regions AA can be formed in the region surrounded by the alignment induction layer 70_3.

[0195] The alignment-inducing layer 70_3 can be arranged by forming a first extension 70A that extends through the first dam 40 and removing a portion of the first extension 70A during exposure of the top surfaces of electrodes 21 and 22. Therefore, the portion of the first extension 70A extending through the first dam 40 on the top surfaces of electrodes 21 and 22 can be removed in the region between electrodes 21 and 22.

[0196] The alignment region AA may include the area between electrodes 21 and 22, and may be arranged in one direction between electrodes 21 and 22. For example, the alignment region AA of sub-pixel PXn may include a first alignment region AA1, a second alignment region AA2, and a third alignment region AA3, and the first alignment region AA1, the second alignment region AA2, and the third alignment region AA3 may be arranged in a second direction DR2. The alignment induction layer 70_3 may be disposed between the alignment regions AA to form a misalignment region NAA.

[0197] Since each sub-pixel PXn includes multiple alignment regions AA, multiple regions in which the light-emitting elements are densely arranged can be formed between electrodes 21 and 22. Due to the alignment induction layer 70_3, the alignment region AA can be set to include the region between electrodes 21 and 22, but if only one alignment region AA is set in each sub-pixel PXn to have a large area, the light-emitting elements 30 can be arranged in high density only in a part of the emission region EMA.

[0198] For example, according to Figure 2 In one embodiment, the alignment induction layer 70 can be configured to surround the region between electrodes 21 and 22 or the first dam 40 to form an alignment region AA, and the alignment region AA can have a large area. Multiple light-emitting elements 30 can be arranged in an arbitrary distribution within the alignment region AA. The light-emitting elements 30 can be densely arranged only in a portion of the alignment region AA, and therefore can have an irregular distribution. Sub-pixels PXn with unevenly distributed light-emitting elements 30 will have different luminous amounts from one location to another within the emission region EMA.

[0199] In the display device 10_3, the alignment induction layer 70_3 can be configured to partially surround the area between electrodes 21 and 22, such that each sub-pixel PXn can include multiple alignment regions AA. The multiple alignment regions AA can have relatively small sizes, and the light-emitting elements 30 disposed in each of the multiple alignment regions AA can have a uniform distribution. Therefore, each sub-pixel PXn of the display device 10_3 can emit a uniform amount of light, and there is no difference in the amount of light emitted from one position to another in the emission region EMA.

[0200] Figure 22 It shows the manufacturing process. Figure 19 A cross-sectional view of the method of displaying the device. Figure 22 It is a section taken along the second direction DR2, in which are arranged Figure 19 A cross-sectional view of the region of the first extension 70A of the alignment guiding layer 70_3 of the display device 10_3.

[0201] Reference Figure 22 When the alignment induction layer 70_3 of the display device 10_3 is configured to partially surround the area between electrodes 21 and 22, a plurality of alignment regions AA can be formed. During the manufacture of the display device 10_3, when ink S having light-emitting elements 30 dispersed therein is sprayed into each sub-pixel PXn, the ink S can settle or move to areas in which the alignment induction layer 70_3 is not disposed. When the alignment induction layer 70_3 divides each sub-pixel PXn into a plurality of regions, the ink S sprayed into each sub-pixel PXn can settle or move to each of the plurality of regions. The ink S may include uniformly distributed light-emitting elements 30, and the light-emitting elements 30 may be uniformly distributed in each of the alignment regions AA separated by the alignment induction layer 70_3. Since the display device 10_3 includes a plurality of alignment regions AA, any differences in the light emitted from each sub-pixel PXn can be minimized.

[0202] Simultaneously, at least one end of each of the light-emitting elements 30 disposed between electrodes 21 and 22 can be electrically connected to a first electrode 21. Since the light-emitting elements 30 are electrically connected to the first electrode 21, the light-emitting elements 30 can be connected in parallel with each other. In this case, if one of the light-emitting elements 30 is defective and the first electrode 21 and the second electrode 22 are short-circuited due to the defective light-emitting element 30, the electrical signal applied to the first electrode 21 and the second electrode 22 can only flow through the defective light-emitting element 30. If the light-emitting elements 30 are connected in parallel, a sub-pixel PXn may be unable to emit light due to the short circuit of the light-emitting element 30. To solve this problem, the display device 10 can be configured via an alignment induction layer 70_4 (see... Figure 23Each sub-pixel PXn is divided into multiple alignment regions AA, and multiple light-emitting elements 30 can be connected in series in each of the alignment regions AA.

[0203] Figure 23 This is a plan view of a sub-pixel of a display device according to another disclosed embodiment. Figure 24 It is along Figure 23 The sectional views taken by lines X3-X3', X4-X4', and X5-X5'. Figure 24 It is a cross-sectional view of each of the light-emitting elements 30A, 30B and 30C located in the first alignment region AA1, the second alignment region AA2 and the third alignment region AA3, from one end to the other.

[0204] Reference Figure 23 and Figure 24 Each sub-pixel PXn of the display device 10_4 may include multiple alignment regions AA (i.e., a first alignment region AA1, a second alignment region AA2, and a third alignment region AA3), and different groups of connecting electrodes 26_4, 27_4, 28_4, and 29_4 may be disposed in the alignment regions AA. The display device 10_4 and Figure 19 The difference between the display device 10_4 and its counterpart is that the display device 10_4 includes connecting electrodes 26_4, 27_4, 28_4, and 29_4 with different structures. These will be described below. Figure 23 and Figure 24 The embodiments primarily focus on and Figure 19 Differences in the implementation examples.

[0205] Figure 23 The alignment guiding layer 70_4 of the display device 10_4 can have the same as Figure 19 The display device 10_3 has a shape similar to its counterpart, and may have a shape similar to... Figure 14 The display device 10_2 has a similar structure to its counterpart. Meanwhile, for clarity, details are omitted. Figure 23 The hydrophilic portion of the image. The alignment induction layer 70_4 can be disposed in each sub-pixel PXn to surround some regions within each sub-pixel PXn. The regions defined by the alignment induction layer 70_4 can form alignment regions AA. For example, each sub-pixel PXn may include a first alignment region AA1, a second alignment region AA2, and a third alignment region AA3.

[0206] Multiple light-emitting elements 30 can be disposed in each of the alignment regions AA, and can contact the connecting electrodes 26_4, 27_4, 28_4, and 29_4 disposed in the alignment regions AA. The light-emitting elements 30 may include a first light-emitting element 30A disposed in the first alignment region AA1, a second light-emitting element 30B disposed in the second alignment region AA2, and a third light-emitting element 30C disposed in the third alignment region AA3. The ends of the first light-emitting element 30A, the second light-emitting element 30B, and the third light-emitting element 30C can be electrically connected to the same connecting electrodes 26_4, 27_4, 28_4, and 29_4, respectively, and can be connected in parallel with each other.

[0207] The display device 10_4 may include a first connecting electrode 26_4, a second connecting electrode 27_4, a third connecting electrode 28_4, and a fourth connecting electrode 29_4. The first connecting electrode 26_4 and the second connecting electrode 27_4 are connected to one of the electrodes 21_4 and 22_4 and one end of each of the light-emitting elements 30. The third connecting electrode 28_4 and the fourth connecting electrode 29_4 are not in contact with the electrodes 21_4 and 22_4, but are in contact with one end of each of the light-emitting elements 30.

[0208] The first connecting electrode 26_4 can be disposed in the third alignment region AA3 and can contact the first electrode 21_4 and the first end of the third light-emitting element 30C. The first connecting electrode 26_4 can transmit an electrical signal applied to the first electrode 21_4 that contacts the first conductive pattern CDP in the first contact hole CT1 to the first end of the third light-emitting element 30C. The first connecting electrode 26_4 can extend in the second direction DR2 and can be disposed in the third alignment region AA3. Two separate first connecting electrodes 26_4 can be disposed in the third alignment region AA3.

[0209] The second connecting electrode 27_4 can be disposed in the first alignment region AA1 and can contact the second electrode 22_4 and the second end of the first light-emitting element 30A. The second connecting electrode 27_4 can transmit an electrical signal applied to the second electrode 22_4, which is in contact with the second voltage line VL2 in the second contact hole CT2, to the second end of the first light-emitting element 30A. The second connecting electrode 27_4 can extend in the second direction DR2 and can be disposed in the first alignment region AA1. Two separate second connecting electrodes 27_4 can be disposed in the first alignment region AA1.

[0210] The first connecting electrode 26_4 and the second connecting electrode 27_4 can be disposed in the alignment region AA and can contact the end of the light-emitting element 30 and electrodes 21_4 and 22_4. In addition to the first connecting electrode 26_4 and the second connecting electrode 27_4, the display device 10_4 may also include a third connecting electrode 28_4 and a fourth connecting electrode 29_4 disposed in multiple alignment regions and in contact only with the light-emitting element 30.

[0211] The fourth connecting electrode 29_4 contacts the first end of the first light-emitting element 30A disposed in the first alignment region AA1 and the second end of the second light-emitting element 30B disposed in the second alignment region AA2. The third connecting electrode 28_4 contacts the first end of the second light-emitting element 30B disposed in the second alignment region AA2 and the second end of the third light-emitting element 30C disposed in the third alignment region AA3. The third connecting electrode 28_4 may include a portion extending in the second direction DR2 and a portion extending in the first direction DR1. The portion of the third connecting electrode 28_4 extending in the second direction DR2 may be disposed in the third alignment region AA3 and the second alignment region AA2, and the portion of the third connecting electrode 28_4 extending in the first direction DR1 may connect to the portion of the third connecting electrode 28_4 extending in the second direction DR2 and may be disposed between the third alignment region AA3 and the second alignment region AA2. The fourth connecting electrode 29_4 may have substantially the same shape as the third connecting electrode 28_4 and may be disposed in the second alignment region AA2 and the first alignment region AA1. Two separate third connection electrodes 28_4 and two separate fourth connection electrodes 29_4 can be set in each sub-pixel PXn.

[0212] The third connecting electrode 28_4 and the fourth connecting electrode 29_4 may not be directly connected to electrodes 21_4 and 22_4, but can be electrically connected to electrodes 21_4 and 22_4 through the light-emitting element 30. The electrical signal applied from the second electrode 22_4 through the second connecting electrode 27_4 can be transmitted to the second light-emitting element 30B through the first light-emitting element 30A and the fourth connecting electrode 29_4. The electrical signal can be transmitted to the third light-emitting element 30C through the second light-emitting element 30B and the third connecting electrode 28_4. Similarly, the electrical signal applied from the first electrode 21_4 through the first connecting electrode 26_4 can be transmitted to the second light-emitting element 30B through the third light-emitting element 30C and the third connecting electrode 28_4. The electrical signal can be transmitted to the first light-emitting element 30A through the second light-emitting element 30B and the fourth connecting electrode 29_4. Since the light-emitting elements 30 disposed in the alignment area AA of each sub-pixel PXn are electrically connected through multiple connecting electrodes 26_4, 27_4, 28_4 and 29_4, the first light-emitting elements 30A, the second light-emitting elements 30B and the third light-emitting elements 30C disposed in the first alignment area AA1, the second alignment area AA2 and the third alignment area AA3 respectively can be connected in series.

[0213] If one of the first light-emitting elements 30A is short-circuited, no electrical signal can be transmitted to the first light-emitting element 30A disposed in the first alignment region AA1. However, since the electrical signal can still be transmitted to the light-emitting elements disposed in each of the second alignment region AA2 and the third alignment region AA3, light can still be emitted. That is, the display device 10_4 can include multiple light-emitting elements 30 disposed in one of the multiple alignment regions AA and connected in series in each sub-pixel PXn. Therefore, even if one of the multiple light-emitting elements 30 is defective, the display device 10_4 can still emit light via the other light-emitting elements 30. Furthermore, since the multiple light-emitting elements 30 are connected in series, the emission efficiency of the display device 10_4 can be further improved.

[0214] Simultaneously, each of the plurality of first electrodes 21 can contact the first conductive pattern CDP through the first contact hole CT1, and thus can be electrically connected to the driving transistor DT. A light-emitting element 30 disposed between one first electrode 21 and one second electrode 22 can be connected in parallel with a light-emitting element 30 disposed between another first electrode 21 and a second electrode 22, but the disclosure is not limited thereto. In some embodiments, the display device 10 may further include electrodes not directly connected to circuit elements disposed below the first planarization layer 19, and the light-emitting elements 30 disposed between the electrodes can be connected in series. Furthermore, the plurality of first electrodes 21 can be partially separated from each other between the first alignment region AA1 and the second alignment region AA2 and between the second alignment region AA2 and the third alignment region AA3. A second electrode 22 can be partially separated from each other between the first alignment region AA1 and the second alignment region AA2 and between the second alignment region AA2 and the third alignment region AA3.

[0215] Figure 25 This is a plan view of a sub-pixel of a display device according to another disclosed embodiment.

[0216] Reference Figure 25 The display device 10_5 may further include a first electrode 21 and a second electrode 22, and may also include a third electrode 23 disposed between the first electrode 21 and the second electrode 22. Furthermore, the connecting electrodes 26, 27, and 28 may also include a third connecting electrode 28 disposed on the third electrode 23. A first diaphragm 40 may also be disposed between the third electrode 23 and the first planarization layer 19, and a plurality of light-emitting elements 30 may be disposed between the first electrode 21 and the third electrode 23 and between the third electrode 23 and the second electrode 22. The display device 10_5 and Figure 2 The difference between this and its counterpart is that each sub-pixel PXn also includes a third electrode 23 and a third connecting electrode 28. The third electrode 23 will be described below.

[0217] The third electrode 23 is disposed between the first electrode 21 and the second electrode 22. Multiple first dikes 40 (e.g., three first dikes 40) can be disposed on the first planarization layer 19, and the first electrode 21, the third electrode 23, and the second electrode 22 can be sequentially arranged on the first dikes 40. The third electrode 23 can extend in the second direction DR2. Unlike the first electrode 21 and the second electrode 22, the third electrode 23 can extend in the second direction DR2, but it can be configured not to overlap with the portion of the second dike 45 extending in the first direction DR1, but rather to be spaced apart from it. That is, the length of the third electrode 23 in the second direction DR2 can be smaller than the length of the first electrode 21 and the length of the second electrode 22, and the third electrode 23 can be configured not to extend beyond the boundary with the adjacent sub-pixel PXn.

[0218] The light-emitting element 30 can be disposed between the first electrode 21 and the third electrode 23, and between the third electrode 23 and the second electrode 22. The third connecting electrode 28 can have the same shape as the first connecting electrode 26 and the second connecting electrode 27, and can be disposed on the third electrode 23. One first connecting electrode 26 and one second connecting electrode 27 can be disposed in each sub-pixel PXn, and multiple third connecting electrodes 27 can be disposed in each sub-pixel PXn. However, the disclosure is not limited thereto.

[0219] The light-emitting element 30 disposed between the first electrode 21 and the third electrode 23 can contact the first connecting electrode 26 and the third connecting electrode 28, and is therefore electrically connected to the first electrode 21 and the third electrode 23. The light-emitting element 30 disposed between the third electrode 23 and the second electrode 22 can contact the third connecting electrode 28 and the second connecting electrode 27, and is therefore electrically connected to the third electrode 23 and the second electrode 22.

[0220] Unlike the first electrode 21 and the second electrode 22, the third electrode 23 can be directly connected to the circuit element layer without contact holes. Electrical signals applied to the first electrode 21 and the second electrode 22 can be transmitted to the third electrode 23 via the first connecting electrode 26, the second connecting electrode 27, and the light-emitting element 30. In other words, the light-emitting element 30 disposed between the first electrode 21 and the third electrode 23 can form a series connection with the light-emitting element 30 disposed between the third electrode 23 and the second electrode 22. Since the display device 10_5 also includes the third electrode 23, a series connection can be formed between the light-emitting elements 30, and the emission efficiency of each sub-pixel PXn can be further improved.

[0221] Meanwhile, the electrodes 21 and 22 of the display device 10 do not necessarily have to extend in one direction. The shapes of the electrodes 21 and 22 are not particularly limited, as long as they are spaced apart from each other and face each other to form an area in which the light-emitting element 30 is disposed. In some embodiments, the electrodes 21 and 22 may have a curved shape, and one of the electrodes 21 and 22 may be configured to surround the other electrode.

[0222] Figure 26 This is a plan view of a sub-pixel of a display device according to another disclosed embodiment.

[0223] Reference Figure 26 At least a portion of the first electrode 21_6 and the second electrode 22_6 of the display device 10_6 may have a curved shape, and the curved portion of the first electrode 21_6 may be spaced apart from the curved portion of the second electrode 22_6 and face the curved portion of the second electrode 22_6. Figure 26 The display device 10_6 and Figure 2The difference in the display device 10 lies in the shape of the first electrode 21_6 and the second electrode 22_6. This will be described below. Figure 26 The embodiments primarily focus on and Figure 2 Differences in the implementation examples.

[0224] The first electrode 21_6 can be disposed on the entire surface of the sub-pixel PXn and can include multiple holes HOL. For example, the first electrode 21_6 may include a first hole HOL1, a second hole HOL2, and a third hole HOL3 arranged along the second direction DR2, but the disclosure is not limited thereto. Optionally, the first electrode 21_6 may include more than three holes HOL, fewer than three holes HOL, or only one hole HOL. The first electrode 21_6 will be described below as including a first hole HOL1, a second hole HOL2, and a third hole HOL3.

[0225] In one embodiment, the first hole HOL1, the second hole HOL2, and the third hole HOL3 may have a circular shape in a plan view. Therefore, the first electrode 21_6 may have a curved region formed by the holes HOL, and may face the second electrode 22_6 in the curved region, but the disclosure is not limited thereto. The shapes of the first hole HOL1, the second hole HOL2, and the third hole HOL3 are not particularly limited, as long as they provide space for the second electrode 22_6 to be arranged. For example, the first hole HOL1, the second hole HOL2, and the third hole HOL3 may have an elliptical shape or a polygonal shape such as a rectangle in a plan view.

[0226] Multiple second electrodes 22_6 can be disposed in sub-pixel PXn. For example, three second electrodes 22_6 can be disposed in sub-pixel PXn to correspond to the first hole HOL1, second hole HOL2, and third hole HOL3 of the first electrode 21_6. The second electrodes 22_6 can be located in the first hole HOL1, second hole HOL2, and third hole HOL3 surrounded by the first electrode 21_6.

[0227] In one embodiment, the aperture HOL of the first electrode 21_6 may have a curved shape, and the second electrode 22_6 may also have a curved shape and may be spaced apart from and facing the first electrode 21_6. The first electrode 21_6 may include an aperture HOL having a circular shape in a plan view, and the second electrode 22_6 may also have a circular shape in a plan view. The curved side of the first electrode 21_6 in the aperture HOL may be spaced apart from and facing the curved outer side of the second electrode 22_6. For example, the first electrode 21_6 may be positioned around the outer side of the second electrode 22_6.

[0228] The alignment induction layer 70_6 can be configured to cover the first electrode 21_6 and the second electrode 22_6, but expose the gap between the first electrode 21_6 and the second electrode 22_6. For example, the alignment induction layer 70_6 can be configured to expose the portion of the sub-pixel PXn where the first electrode 21_6 and the second electrode 22_6 are spaced apart from each other and face each other, but cover the rest of the sub-pixel PXn. Therefore, the alignment region AA can be formed in the region between the first electrode 21_6 and the second electrode 22_6 where the alignment induction layer 70_6 is not disposed, and the non-alignment region NAA can be formed in the rest of the sub-pixel PXn.

[0229] The light-emitting element can be disposed in the alignment region AA between the first electrode 21_6 and the second electrode 22_6. At least one end of each of the light-emitting elements 30 can be disposed on the portion of the sub-pixel PXn where the first electrode 21_6 and the second electrode 22_6 are spaced apart from each other and face each other. Since the alignment induction layer 70_6 is not disposed in the portion of the sub-pixel PXn where the first electrode 21_6 and the second electrode 22_6 are spaced apart from each other and face each other, ink S can settle or move to the region between the first electrode 21_6 and the second electrode 22_6. The light-emitting element 30 can be disposed in the region between the first electrode 21_6 and the second electrode 22_6 where the alignment induction layer 70 is not disposed.

[0230] The first connecting electrode 26_6 and the second connecting electrode 27_6 can be configured to contact the first end and the second end of the light-emitting element 30, the first electrode 21_6, and the second electrode 22_6, respectively. The first connecting electrode 26_6 can be disposed along the hole HOL of the first electrode 21_6 and can have an arc shape with a predetermined thickness in a planar view. The second connecting electrode 27_6 can be configured to cover the second electrode 22_6 and can have a circular shape in a planar view. However, the disclosure is not limited thereto. Optionally, in some embodiments, the first connecting electrode 26_6 and the second connecting electrode 27_6 can have substantially the same shape as the first electrode 21_6 and the second electrode 22_6, respectively, or can be configured to correspond only to the portions of the light-emitting element 30, the first electrode 21_6, and the second electrode 22_6 of the sub-pixel PXn that are in contact with each other.

[0231] The display device 10_6 may include a second electrode 22_6 having a circular shape and a first electrode 21_6 configured to surround the second electrode 22_6. A light-emitting element 30 may be arranged along the curved outer side of the second electrode 22_6. Since the light-emitting element 30 extends in one direction and is arranged along the curved outer side of the second electrode 22_6, it can be arranged to be oriented in different directions. The sub-pixel PXn can emit light in various directions depending on the direction the light-emitting element 30 faces. Because the first electrode 21_6 and the second electrode 22_6 of the display device 10_6 have curved shapes, the light-emitting element 30 disposed between the first electrode 21_6 and the second electrode 22_6 can be arranged to face different directions, thus improving the side visibility of the display device 10_6.

[0232] Figure 27 This is a plan view of the pixels of a display device according to another disclosed embodiment. For convenience, Figure 27 The layout of multiple sub-pixels PXn and the layout of the alignment-inducing layer 70 are shown.

[0233] Reference Figure 27 The display device 10_7 may not include the second dike 45. The second dike 45 not only defines the boundary between adjacent sub-pixels PXn, but also prevents ink S from overflowing between adjacent sub-pixels PXn during the manufacturing of the display device 10_7. The display device 10_7 may include an alignment induction layer 70, which can guide the ink S to settle or move to a specific location. Once the ink S with the light-emitting elements 30 dispersed therein is sprayed into the area defined by the alignment induction layer 70, the ink S can move to a specific location due to the chemical reaction between the ink S and the alignment induction layer 70. If the ink S can be precisely sprayed at each specific location, the presence of the alignment induction layer 70 can prevent the ink S from overflowing between adjacent sub-pixels PXn. The display device 10_7 may not include the second dike 45, while the alignment induction layer 70 can prevent the ink S from overflowing into other sub-pixels PXn. Because the second dike 45 is not provided, the manufacturing of the display device 10_7 can be simplified, and the area of ​​each sub-pixel PXn can be reduced, which can be advantageous for achieving a high-resolution display device.

[0234] Similarly, the display device 10 may include an alignment induction layer 70, and thus be able to separate different regions (e.g., different sub-pixels PXn) without the aid of a structure such as a second dike 45. Since the ink S sprayed into each particular region can move to the region defined by the alignment induction layer 70, a structure such as a second dike 45 is not required.

[0235] Figure 28 This is a plan view of a sub-pixel of a display device according to another disclosed embodiment.

[0236] Reference Figure 28 The display device 10_8 may include a plurality of sub-pixels PXn (where n is an integer from 1 to 4) in the area surrounded by the second dike 45. The second dike 45 may be configured to surround the pixel PX, which may include a plurality of sub-pixels PXn separated from each other by the alignment induction layer 70_8.

[0237] In a pixel PX surrounded by a second dam 45, an alignment-inducing layer 70_8 can be configured to extend along a first direction DR1 and a second direction DR2. The region defined by the alignment-inducing layer 70_8 and the second dam 45 can be called a sub-pixel PXn. A first sub-pixel PX1, a second sub-pixel PX2, a third sub-pixel PX3, and a fourth sub-pixel PX4 can be disposed in the region surrounded by the second dam 45. The boundaries between the first sub-pixel PX1, the second sub-pixel PX2, the third sub-pixel PX3, and the fourth sub-pixel PX4 can be defined by the alignment-inducing layer 70_8, and structures such as the second dam 45 may not be disposed between the first sub-pixel PX1, the second sub-pixel PX2, the third sub-pixel PX3, and the fourth sub-pixel PX4. Each of the sub-pixels PXn can include a plurality of electrodes 21 and 22, a first dam 40, and a light-emitting element 30, and can emit light of a specific wavelength. In one embodiment, at least some of the first sub-pixel PX1, the second sub-pixel PX2, the third sub-pixel PX3, and the fourth sub-pixel PX4 may include groups of light-emitting elements that emit light of different colors, and thus may emit light of different colors, but the disclosure is not limited thereto. Sub-pixels PXn in pixel PX may include groups of light-emitting elements 30 that emit light of the same color.

[0238] When sub-pixels PXn are separated by a structure in the region surrounded by the second dike 45, ink S needs to be precisely sprayed into each region defined by that structure. The smaller the size of the sub-pixels PXn, the more likely errors will occur when spraying ink S into each specific region, and the more likely ink S will settle in undesirable areas. However, when sub-pixels PXn are separated by an alignment induction layer 70_8 instead of by other structures (such as... Figure 28 In the display device 10_8, even if there is an error in the ink S ejection position, the ink S can be guided to settle or move to each desired area due to the alignment induction layer 70_8. That is, since the display device 10_8 includes the alignment induction layer 70_8, the size of each area separated by the alignment induction layer 70_8, or the size of the sub-pixel PXn, can be reduced. Furthermore, even if an error related to the ejection of ink S occurs, the ink S with the light-emitting elements 30 dispersed therein can be precisely guided at each desired position. The display device 10_8 can improve the processing margin for ink S ejection and can facilitate the realization of an ultra-high resolution display device with small sub-pixels PXn.

[0239] In concluding this detailed description, those skilled in the art will understand that many changes and modifications can be made to the preferred embodiments without substantially departing from the principles of the invention. Therefore, the preferred embodiments of the invention disclosed are used only in a general and descriptive sense and not for limiting purposes.

Claims

1. A display device, the display device comprising: A pixel region includes multiple aligned regions and an unaligned region occupying the remainder of the pixel region; Multiple electrodes extend in a predetermined direction in the alignment region, the multiple electrodes being spaced apart from each other; A plurality of light-emitting elements are disposed between the plurality of electrodes in the plurality of alignment regions, such that at least one end of each of the plurality of light-emitting elements is placed on one of the plurality of electrodes; An alignment-inducing layer is disposed at least partially in the misalignment region; as well as Multiple first dikes are disposed in the alignment region, spaced apart from each other and thus stacked with the multiple electrodes. In this configuration, at least a portion of the alignment-inducing layer is arranged to surround the plurality of first dikes.

2. The display device according to claim 1, wherein, The alignment-inducing layer includes a first portion comprising a hydrophobic material, and The first portion is configured to surround the plurality of alignment regions.

3. The display device according to claim 2, further comprising: Multiple connecting electrodes are disposed in the multiple alignment areas to cover a portion of the multiple electrodes and the ends of the multiple light-emitting elements.

4. The display device according to claim 2, wherein, The alignment-inducing layer is configured such that the first portion partially covers the outermost electrode from the center of the pixel region along the predetermined direction.

5. The display device according to claim 2, wherein, The plurality of alignment regions include a first alignment region and a second alignment region, the first alignment region and the second alignment region being spaced apart from each other in the predetermined direction, and The alignment induction layer is partially disposed between the first alignment region and the second alignment region.

6. The display device according to claim 5, wherein, The number of light-emitting elements disposed in the first alignment region and the second alignment region is greater than the number of light-emitting elements disposed between the first alignment region and the second alignment region.

7. The display device according to claim 5, wherein, The plurality of electrodes are partially separated from each other between the first alignment region and the second alignment region.

8. The display device according to claim 2, wherein, The alignment-inducing layer further includes a second portion comprising a hydrophilic material, and The second part is also provided in the plurality of alignment areas.

9. The display device according to claim 8, wherein, The plurality of light-emitting elements are directly disposed on the second part in the plurality of alignment regions.

10. The display device according to claim 1, further comprising: The second dike is set to surround the pixel region.

11. The display device according to claim 10, wherein, The plurality of alignment zones are spaced apart from each other in the area surrounded by the second dike. The alignment guiding layer is disposed between the plurality of alignment regions, and The plurality of light-emitting elements are disposed in the plurality of alignment regions, but the groups of light-emitting elements in different alignment regions emit light of different wavelengths.

12. A display device, the display device comprising: First base; Multiple first dikes are set on the first base and spaced apart from each other; Multiple electrodes are disposed on the multiple first dikes and spaced apart from each other; An alignment induction layer is disposed on the first substrate, such that at least a portion of the alignment induction layer is disposed in a region other than the region between the plurality of electrodes; as well as A plurality of light-emitting elements are disposed between the plurality of electrodes, such that at least one end of each of the plurality of light-emitting elements rests on the plurality of electrodes, and the plurality of light-emitting elements are not superimposed on at least a portion of the alignment induction layer. In this configuration, at least a portion of the alignment-inducing layer is arranged to surround the plurality of first dikes.

13. The display device according to claim 12, wherein, The alignment-inducing layer includes a first portion comprising a hydrophobic material, and The first part is configured not to overlap with the plurality of light-emitting elements.

14. The display device according to claim 13, wherein, The alignment-inducing layer is configured such that the first portion covers the outermost electrode from the center of the first substrate.

15. The display device according to claim 13, wherein, The alignment-inducing layer further includes a second portion comprising a hydrophilic material. The second part is disposed between the plurality of electrodes, and The plurality of light-emitting elements are configured to be stacked with the second part.

16. The display device according to claim 12, further comprising: A first insulating layer is configured to cover portions of the plurality of electrodes. The alignment guiding layer is disposed on the first insulating layer.

17. The display device according to claim 16, further comprising: A second insulating layer is disposed between the plurality of electrodes to cover at least a portion of the plurality of light-emitting elements.

18. The display device according to claim 16, wherein, The first insulating layer and the alignment induction layer are configured to expose portions of the top surface of the plurality of electrodes on the first embankment.

19. The display device according to claim 18, further comprising: Multiple connecting electrodes are in contact with the exposed portion of the top surface of the multiple electrodes and one end of each of the multiple light-emitting elements.

Images