Power conversion devices and fault analysis methods

Abstract

The power conversion device (1) of the embodiment includes a main circuit (10), a power-on control unit (25), and an analysis unit (24). The main circuit includes multiple switching elements (Q1 to Q4), which can convert DC power into multiphase AC power by switching the multiple switching elements on and off, supply the multiphase AC power to the AC load (2) connected to the output side, and output the detection result of the element short-circuit current flowing through each of the multiple switching elements. The power-on control unit energizes the multiple switching elements for a predetermined time based on any of a predetermined multiple analysis test conduction modes. The analysis unit analyzes the integrity of the main circuit using the load current flowing from the main circuit to the AC load, the phase voltage output by the main circuit, and the data regarding the element short-circuit current flowing through each switching element during the predetermined energization time.

Description

Technical Field

[0001] This invention relates to power conversion devices and fault analysis methods. Background Technology

[0002] A power conversion device has a main circuit comprising multiple components (semiconductor switching elements). The robustness of the power conversion device depends on the robustness of each component contained in the main circuit. Methods for testing the robustness of each component individually are known, but because individual testing requires both disassembly and reconstruction of the main circuit, the robustness of the main circuit cannot always be easily confirmed.

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 2004-357437 Summary of the Invention

[0006] The problem that the invention aims to solve

[0007] The problem to be solved by the present invention is to provide a power conversion device and fault analysis method that can detect the integrity of the main circuit with higher accuracy.

[0008] Methods used to solve problems

[0009] The power conversion device of the technical solution includes a main circuit, a power-on control unit, and an analysis unit. The main circuit includes multiple switching elements, capable of converting DC power into multi-phase AC power by switching these elements on and off, supplying the multi-phase AC power to an AC load connected to the output side, and outputting the detection results of the short-circuit current flowing through each of the multiple switching elements. The power-on control unit energizes the multiple switching elements for a predetermined time based on any of a pre-set multiple analysis test conduction modes. The analysis unit analyzes the integrity of the main circuit using data such as the load current flowing from the main circuit to the AC load, the phase voltage output by the main circuit, and the data regarding the short-circuit current flowing through each switching element during the predetermined energizing time. Attached Figure Description

[0010] Figure 1 This is a structural diagram of the main circuit of the power conversion device in the embodiment.

[0011] Figure 2 This is a diagram illustrating the main circuit of the power conversion device used to explain the implementation method.

[0012] Figure 3A This is a structural diagram of the component short-circuit current detection circuit in the implementation method.

[0013] Figure 3B This is a structural diagram of the component short-circuit current detection circuit in the implementation method.

[0014] Figure 4 This is a structural diagram of the power conversion device according to the implementation method.

[0015] Figure 5 This is a diagram used to illustrate the detector used in the implementation method.

[0016] Figure 6 This is a flowchart of the analytical processing of the main circuit in the implementation method.

[0017] Figure 7 This diagram illustrates the process for determining the power-receiving condition in the implementation method.

[0018] Figure 8 This is a flowchart illustrating the process of determining short-circuit faults in switching elements and the operating status of voltage detectors in an embodiment.

[0019] Figure 9 This diagram illustrates the process of detecting the results of voltage Vdet and short-circuit current OCI by turning on the switching element Q1 alone in an embodiment.

[0020] Figure 10 It is used to explain Figure 9 The diagrams showing the various events are shown.

[0021] Figure 11 This diagram illustrates the process of detecting the results of voltage Vdet and short-circuit current OCI by turning on switch element Q2 after switch element Q1 in an embodiment.

[0022] Figure 12 It is used to explain Figure 11 The diagrams showing the various events are shown.

[0023] Figure 13 It is used to explain Figure 8 The diagram shows the process of combining the results of steps 11 and 13 to make a judgment.

[0024] Figure 14 This diagram illustrates the short-circuit fault determination process for switching elements Q1 and Q4 in the implementation method.

[0025] Figure 15 It is used to explain Figure 14 The diagrams showing the various events are shown.

[0026] Figure 16 This diagram illustrates the determination and processing of open-circuit faults in the phase unit of the implementation method.

[0027] Figure 17 It is used to explain Figure 16 The diagram shows the events. Detailed Implementation

[0028] The power conversion device and fault analysis method according to the embodiments will be described below. In the following description, the electrical connection sheet will sometimes be referred to as a "connection". Furthermore, "based on XX" as used in this specification means "at least based on XX", and also includes cases where it is based on other elements besides XX. Moreover, "based on XX" is not limited to the direct use of XX, but also includes cases based on XX after calculation or processing. "XX" is any element (e.g., any information).

[0029] (First Embodiment)

[0030] Figure 1 This is a structural diagram of the main circuit 10 of the power conversion device 1 according to the embodiment. Figure 2 This is a diagram illustrating the main circuit 10 of the power conversion device 1 used to explain the implementation method. Figure 3A and Figure 3B This is a structural diagram of the component short-circuit current detection circuit in the implementation method. Figure 4 This is a structural diagram of the power conversion device 1 according to the embodiment.

[0031] Figure 1 and Figure 4 The power conversion device 1 shown converts direct current power into multiphase alternating current power, which is then supplied to the motor 2 to drive the motor 2. For example, the motor 2 is a three-phase alternating current motor, which is an example of an alternating current load.

[0032] The power conversion device 1, for example, has a main circuit 10 and a control device 20.

[0033] like Figure 1As shown, the main circuit 10 has bridge arms UA, VA, WA, UB, VB, and WB. Without distinguishing between bridge arms UA, VA, WA, UB, VB, and WB, they are simply referred to as "each bridge arm". For the positive power supply terminal of each bridge arm, a voltage DCP is supplied to the positive side via a first DC bus; for the negative power supply terminal of each bridge arm, a voltage DCN is supplied to the negative side via a second DC bus. Both the input and output sides of bridge arms UB, VB, and WB, as well as the input side of bridge arms UA, VA, and WA, are connected to the neutral point NP. The output sides of bridge arms UA, VA, and WA are connected to the unshown windings of the U-phase, V-phase, and W-phase of motor 2 via the output terminals (not shown) of each phase and the AC bus. The output terminal (not shown) of bridge arm UA and the U-phase winding of motor 2 are connected by the first AC bus; the output terminal (not shown) of bridge arm VA and the V-phase winding of motor 2 are connected by the second AC bus; and the output terminal (not shown) of bridge arm WA and the W-phase winding of motor 2 are connected by the third AC bus. Current detectors HCT are installed on the first and third AC buses. The current detectors HCT detect the current flowing through the first and third AC buses. Figure 1 In the case of configuring two current detectors (CTs) as shown, it is preferable to calculate the phase current Iv based on the phase currents Iu and Iw detected by the two current transformers respectively. Figure 1 The number and configuration of the current detectors (CTs) shown are an example and are not limited thereto. It is preferred to configure them to be able to detect the current of 2 or 3 AC buses.

[0034] Each of the first to third AC buses is equipped with a voltage detector VDET to detect the phase voltage. The phase voltages of phases U, V, and W are represented by voltages Vu, Vv, and Vw, respectively.

[0035] exist Figure 2 The image below shows an example of the bridge arms included in the main circuit 10. Figure 2 The bridge arm UA shown has, for example, semiconductor switching elements Q1 to Q4, diodes D1 to D4, diodes DP and DN. Each bridge arm is constructed similarly to bridge arm UA. Each bridge arm includes semiconductor switching elements Q1 to Q4 connected in series. Semiconductor switching elements Q1 to Q4 are an example of four semiconductor switching elements. Each bridge arm is provided for each phase.

[0036] The semiconductor switching elements Q1 to Q4 in bridge arm UA are, for example, IGBTs. The type of semiconductor switching element is not limited to IGBTs; it can also be a MOSFET, etc. Semiconductor switching elements Q1 to Q4 are connected in series. The emitter and collector of semiconductor switching element Q1 are connected in parallel with a reverse-connected diode D1. Similarly, semiconductor switching elements Q2 to Q4 are connected in parallel with diodes D2 to D4. Semiconductor switching elements Q1 and Q2 are located in the positive arm, and semiconductor switching elements Q3 and Q4 are located in the negative arm.

[0037] The bridge arm UA has an input terminal TIUA and an output terminal TOUA.

[0038] Input terminal TIUA is connected to the anode of diode DP and the cathode of diode DN. The cathode of diode DP is connected to the junction of the emitter of semiconductor switching element Q2 and the collector of semiconductor switching element Q3. The anode of diode DN is connected to the junction of the emitter of semiconductor switching element Q3 and the collector of semiconductor switching element Q4.

[0039] The output terminal TOUA is connected to the emitter of semiconductor switching element Q2, the collector of semiconductor switching element Q3, the anode of diode D2, and the cathode of diode D3. Furthermore, the output terminal TOUA is connected to a voltage divider resistor used as a voltage detector VDET. The voltage detector VDET detects the voltage at the output terminal TOUA, in other words, the voltage Vu acting on the U-phase winding of motor 2.

[0040] The voltage detector VDET includes a resistor divider with a specified ratio. The voltage detector VDET can replace the output voltage Vu and output a voltage Vuk divided according to the above ratio as the voltage at the output terminal TOUA. The same applies to the V phase and W phase. In the following description, for the sake of simplicity, the voltage Vu with the above ratio set to 1 will be used.

[0041] The above description pertains to bridge arm UA, but the same applies to bridge arms VA and WA.

[0042] exist Figure 3A and Figure 3B The following describes two embodiments for the detection of short-circuit current flowing through a switching element.

[0043] Figure 3AThe circuit shown includes a switching element Q1, a driving circuit DR for driving the switching element Q1, and a short-circuit current detection circuit OCD. The short-circuit current detection circuit OCD is connected, for example, between the emitter and gate (control terminal) of the switching element Q1, and outputs a signal OCI corresponding to the magnitude of the short-circuit current to the switching element Q1 based on the potential difference between the emitter and gate.

[0044] Figure 3B The circuit shown includes a switching element Q1 and a drive circuit DR that drives the switching element Q1. The switching element Q1 outputs a signal OCI corresponding to the magnitude of the short-circuit current.

[0045] Reference Figure 4 The control device 20 will be described.

[0046] The control device 20 includes a PWM unit 21, a selection unit 22, a pulse pattern generation unit 23, a parsing unit 24, and a controller 25. The pulse pattern generation unit 23 and the controller 25 are examples of a power-on control unit.

[0047] The PWM unit 21 modulates the voltage reference based on the carrier signal to generate gating pulses GP1 to be supplied to each bridge arm. The PWM unit 21 adjusts the gating pulses for each semiconductor switching element based on the dead time setting so that no through current flows through each bridge arm.

[0048] Selection unit 22 selects either the gating pulse GP1 generated by PWM unit 21 or the gating pulse GP2 generated by pulse mode generation unit 23 (described later), and outputs the selected gating pulse GP3. When the gate blocking signal is 1, selection unit 22 restricts the output of gating pulse GP3 based on gating pulse GP1.

[0049] The pulse mode generation unit 23 generates a gating pulse GP2 based on any one of a plurality of pre-set analytical test conduction modes to energize the switching elements Q1 to Q4 of each bridge arm for a specified time.

[0050] For example, the conduction mode for analytical tests predetermines the correspondence between the analytical test items and their order. In this case, the pulse mode generation unit 23 generates a gating pulse GP2 corresponding to the selected analytical test item. This conduction mode for analytical tests differs from the conduction modes of the normal switching elements Q1 to Q4 that convert DC power into multiphase AC power. For example, the gating pulse defined by the conduction mode for analytical tests is defined as a pulse width that determines the energizing time based on the permissible characteristics of each switching element. Preferably, the data of such multiple conduction modes for analytical tests is tabulated and stored in a storage area of ​​a storage unit (not shown). The pulse mode generation unit 23 preferably reads the data from the aforementioned table to generate the gating pulse GP2.

[0051] The conduction modes used in this analytical test are specified under the premise of a failure in any one of the switching elements Q1 to Q4 of each bridge arm. The order in which each conduction mode is applied in this analytical test is specified so that even if any one switching element fails, the failure will not have a ripple effect. Specifically, the order in which each conduction mode is applied in this analytical test is specified so that the failure of any one switching element will not cause further failures in other switching elements.

[0052] Analysis unit 24 acquires the load currents Iu, Iv, and Iw flowing through motor 2 (AC load) from main circuit 10, the phase voltages Vu, Vv, and Vw output from main circuit 10, and data regarding the element short-circuit currents flowing through each switching element Q1 to Q4 within main circuit 10 during a predetermined energization time. Analysis unit 24 uses the acquired data to analyze the integrity of main circuit 10. Details of the analysis process will be described later.

[0053] The controller 25 receives instructions from the host device and generates various signals related to the control of the motor 2. For example, the controller 25 uses signals described later. Figure 5 The feedback signal shown generates a voltage reference, a dead-time setting for the gating pulses applied to the switching elements Q1 to Q4 within the main circuit 10, and a gate blocking signal. The controller 25 supplies the voltage reference and dead-time setting to the PWM unit. The controller 25 also supplies the gate blocking signal to the selection unit.

[0054] Furthermore, the controller 25 controls the selection unit 22, the pulse pattern generation unit 23, and the analysis unit 24 to analyze the state of the main circuit 10 in a bridge-arm unit according to a pre-set order regarding the items of the desired analysis test. The controller 25 obtains the analysis results regarding the soundness of the main circuit 10 from the analysis unit 24.

[0055] Figure 5 This is a diagram used to illustrate the detector used in the implementation method.

[0056] Figure 5 The overview includes items such as detectors and functions, detection signals, and remarks. The section on detectors and functions indicates the type of each detector and details its function. The section on detection signals indicates the signals detected by the detectors.

[0057] For example, the current detector HCT detects the phase current Iu of phase U and the phase current Iv of phase V. The controller 25 can use the detection results obtained by the current detector HCT as feedback signals for current control (phase U output current FBK, phase V output current FBK).

[0058] The voltage detector VDET detects the phase voltage Vu of phase U, the phase voltage Vv of phase V, and the phase voltage Vw of phase W. The controller 25 can use the detection results obtained by the voltage detector VDET as feedback signals (phase U output voltage FBK, phase V output voltage FBK, phase W output voltage FBK) to control the main circuit 10.

[0059] The component short-circuit current detection circuit OCD acts as a Vce detection circuit to detect short circuits when the switching elements Q1 and Q4 of each bridge arm are turned on.

[0060] Reference Figures 6 to 16 The analysis and processing of the diagnosis of the main circuit 10 are explained.

[0061] (Summary of parsing and processing)

[0062] First, a summary of the parsing process will be given.

[0063] (1) In the initial analysis and processing stage, it is assumed that all components (semiconductor switching elements) included in the main circuit 10 are unreliable. The aforementioned "unreliable component" means that the component may not be in a state of normal function. Therefore, the control device 20 uses the detection results of each detector to determine whether each object part is intact.

[0064] (2) Assume that detectors such as the current detector HCT and the voltage detector VDET are also unreliable at the beginning of the analysis process. The term "detector unreliable" means that the detector may not be functioning properly. In particular, when the detector output is 0, it cannot be distinguished whether the 0 is due to a malfunction or an actual detected value. Therefore, it is judged as unreliable. In contrast, if the detector is functioning correctly, it should output the value that the detector outputs after the detected value is 0. When the control device 20 detects a value that should be output from the detector, since it is not a malfunction like the detector outputting 0, it judges the detector as functioning correctly.

[0065] (3) If a short-circuit fault is detected in switching elements Q1 and Q4, the control device 20 will interrupt the test related to the analysis process during this stage. The control device 20 will output a statement indicating that the test was not completed due to the interruption of the test for items that were not implemented or parts that could not be tested during the analysis process.

[0066] For example, secondary failures may occur if testing continues. Furthermore, if the aforementioned testing has not been explicitly interrupted, it is possible that the situation will not be known, and secondary failures may occur when attempting to power on or test the device. Prevention is key to avoiding further damage due to the occurrence of such secondary failures.

[0067] (4) After confirming that no component in the main circuit 10 is short-circuited, the control device 20 attempts to conduct the components and tests to ensure that no open-circuit fault occurs in the components.

[0068] (5) To simplify the structure of the main circuit 10, the detection of short-circuit faults in switching elements Q2 and Q3 can be omitted. When this is omitted, the control device 20 does not individually control switching elements Q2 and Q3 to the ON state during a short-circuit test. For example, if switching element Q2 is turned on alone when switching elements Q1 and Q3 are short-circuited, a short-circuit current may flow, causing a secondary fault. During a short-circuit test, by generally prohibiting the individual control of switching elements Q2 and Q3 to the ON state, damage is prevented from escalating. Furthermore, if it is determined that neither switching elements Q2 nor Q3 is short-circuited, the aforementioned fault current will not flow, so the control device 20 can individually control switching elements Q2 and Q3 to the ON state.

[0069] Based on the above basic principles, the control device 20 performs analytical processing of the main circuit.

[0070] (Details of the parsing and processing)

[0071] Figure 6 This is a flowchart of the analytical processing of the main circuit 10 in relation to the implementation method.

[0072] The controller 25 performs the main circuit analysis and processing in the following four stages.

[0073] Step 0: Determining the power receiving status

[0074] Step 1X: Determining the short-circuit fault of switching elements Q2 and Q3 and the operating status of the voltage detector.

[0075] Step 2X: Determining short-circuit faults in switching elements Q1 and Q4

[0076] Step 3X: Determining Open Circuit Faults in Phase Units

[0077] The following is a detailed explanation of the processing at each stage.

[0078] (Step 0: Determining the power supply status)

[0079] Reference Figure 7 The procedure for determining the power receiving status is explained. Figure 7 This diagram illustrates the process for determining the power-receiving condition in the implementation method. Figure 7The table shown represents an example of the criteria for determining the power receiving status. This table includes Event No., Power Receivable, Vdet, OCI Detection, Foreseeable Events, and Continuability. The Event No. item contains identification information that identifies the event detected by controller 25. The Power Receivable item indicates whether receiving DC power results in power receiving ("Yes") or not ("No"). The Vdet item indicates the magnitude of the phase voltage detected by the voltage detector. The OCI Detection item covers all switching elements Q1 to Q4 within the main circuit 10, and sets "None" to the case where no short-circuit current is detected in switching elements Q1 to Q4. The Foreseeable Events item lists events that can be considered based on the results of each item (Power Receivable, Vdet, and OCI Detection). In this column, the markings "Dx", "Qx", etc. (x is a number) omit the designation of diode Dx and switching element Qx. In the Continuability item, as an example of determination, a state where there is no problem and continuation is possible is marked with "◎", and a state where continuation is not possible is marked with "×".

[0080] The controller 25 first performs the determination process for the DC power receiving status.

[0081] Conditions under which DC power cannot be received include when all switching elements Q1, Q2, and Q3 are short-circuited; when all switching elements Q2, Q3, and Q4 are short-circuited; when both switching element Q1 and diode DP are short-circuited; or when both switching element Q4 and diode DN are short-circuited. Furthermore, conditions under which DC power cannot be received include when there is an abnormality in the rectifier circuit (REC) of the DC power supply device (not shown), and when the output DC voltage does not rise even if power is detected at the input side of the DC power supply device.

[0082] On the other hand, when DC power can be received, the following test items are performed to determine the situation.

[0083] For example, when the controller 25 does not output the strobe pulse GP3, if the voltage detector VDET detects a voltage above the specified value, it is determined that there may be a short circuit in two of the switching elements Q1 to Q4 and diodes DN and DP, and the power supply to the main circuit 10 and the various tests accompanying the analysis process are terminated.

[0084] As shown in the line with event number "001" (referred to as event 001, and so on), if the device is energized, the voltage Vdet is 0V (volts), and no overcurrent detection value OCI is detected, the controller 25 determines that the component outputting the DC voltage has not experienced a short circuit fault (DC short circuit). In this case, the controller 25 can continue to energize the main circuit 10. However, based on the detection results at this stage, since the voltage Vdet is 0V (volts), the voltage detector VDET may be faulty, as mentioned above.

[0085] As shown in event 002, in the absence of power, controller 25 infers a short-circuit fault at the location shown below. In this case, controller 25 restricts the continued power supply to the main circuit 10. Furthermore, the fault inferred from the above event is any one of the following: the rectifier circuit "REC" of the DC power supply device (not shown) is short-circuited; switching elements Q1 to Q3 are short-circuited; switching elements Q2 to Q4 are short-circuited; switching element Q1 and diode DP are short-circuited; or switching element Q4 and diode DN are short-circuited.

[0086] As shown in event 003, if the circuit is energized, Vdc is detected as voltage Vdet, and no overcurrent detection value OCI is detected, the controller 25 infers that switching elements Q1 and Q2 are in a short-circuit state. In this case, the controller 25 restricts the continued energization of the main circuit 10.

[0087] As shown in event 004, if the circuit is energized, -Vdc is detected as voltage Vdet, and no overcurrent detection value OCI is detected, the controller 25 infers that switching elements Q3 and Q4 are in a short-circuit state. In this case, the controller 25 restricts the continued energization of the main circuit 10.

[0088] (Step 1X: Determining the short-circuit fault of switching elements Q2 and Q3 and the operation status of the voltage detector)

[0089] Reference Figures 8 to 13 The process for determining short-circuit faults in switching elements Q2 and Q3 and the operation status of voltage detectors is explained.

[0090] Figure 8 This is a flowchart illustrating the process of determining short-circuit faults in switching elements Q2 and Q3 and the operating status of the voltage detector in an embodiment.

[0091] The controller 25 performs the following five stages to determine the short-circuit fault of switching elements Q2 and Q3 and the operating status of the voltage detector. In each of the following steps 11 to 14, the controller 25 controls the pulse mode generation unit 23 and the analysis unit 24, and obtains the analysis result of the state of the main circuit 10 from the analysis unit 24.

[0092] Step 11: Turn on the switching element Q1 alone and check the status of the voltage Vdet and short-circuit current OCI.

[0093] For example, the pulse pattern generation unit 23 outputs a gating pulse GP2 that turns on the switching element Q1 alone. The analysis unit 24 analyzes the state of the main circuit 10 under the above conditions.

[0094] Step 12: Turn on the switching element Q4 alone and check the results of the voltage Vdet and short-circuit current OCI.

[0095] For example, the pulse pattern generation unit 23 outputs a gating pulse GP2 that turns on the switching element Q4 alone. The analysis unit 24 analyzes the state of the main circuit 10 under the above conditions.

[0096] Step 13: Next, switching element Q1 turns on switching element Q2, and the status of the detection results of voltage Vdet and short-circuit current OCI is checked.

[0097] For example, the pulse mode generation unit 23 outputs a gating pulse GP2 that turns on switching element Q2 in addition to switching element Q1. The analysis unit 24 analyzes the state of the main circuit 10 under the above conditions.

[0098] Step 14: Next, switching element Q4 turns on switching element Q3, and the status of the detection results of voltage Vdet and short-circuit current OCI is checked.

[0099] For example, the pulse mode generation unit 23 outputs a gating pulse GP2 that turns on switching element Q3 in addition to switching element Q4. The analysis unit 24 analyzes the state of the main circuit 10 under the above conditions.

[0100] Step 15: Analysis of the situation and results

[0101] The parsing unit 24 uses the parsing results from steps 11 to 14 to parse the state of the main circuit 10.

[0102] According to the above-described analysis process sequence, from among the pre-set multiple analysis test conduction modes, the analysis using the first analysis test conduction mode that turns on switching elements Q1 or Q4 (steps 11 and 12) is performed before the analysis using the second analysis test conduction mode that turns on switching elements Q1 and Q2 or switching elements Q3 and Q4 (steps 13 and 14). This prevents the spread of faults.

[0103] The detailed parsing and processing of each of the above segments will be explained in turn.

[0104] (Step 11: Turn on the switching element Q1 alone and check the status of the voltage Vdet and short-circuit current OCI.)

[0105] Figure 9This diagram illustrates the process of detecting the results of voltage Vdet and short-circuit current OCI by turning on the switching element Q1 alone in an embodiment. Figure 9 The table shown illustrates an example of the criteria for determining whether switching element Q1 is turned on independently. This table includes Event No., Vdet, OCI detection, foreseeable events, and whether the process can continue. In the "whether the process can continue" category, as an example of the determination, a state where there are no problems and the process can continue is marked with "◎", a state where there are minor problems in some areas but the process can continue is marked with "〇", and a state where the process cannot continue is marked with "×". Figure 10 It is used to explain Figure 9 The diagrams showing the various events are shown.

[0106] Next, the controller 25 determines the short-circuit faults of switching elements Q2 and Q3 and the operating status of the voltage detector. In this stage of the test, the controller 25 turns on switching element Q1 alone and determines that switching elements Q2, Q3, and diode DP are not short-circuited.

[0107] As shown in event 111, when the voltage Vdet is 0V (volts) and no overcurrent detection value OCI is detected, all events other than events 112 and 113 described later are included in the hypothetical events. In this case, the controller 25 can continue to power on the main circuit 10. That is, as... Figure 10 As shown in (a), if the switching elements Q2, Q3 and diode DP are not short-circuited, then even if the switching element Q1 is turned on alone, no short-circuit current will flow.

[0108] As shown in event 112, if an overcurrent detection value OCI is detected regardless of the voltage Vdet, the analysis unit 24 determines that either "switching elements Q2 and Q3" or diode DP is in a short-circuit state. In this case, the controller 25 does not continue to use the main circuit 10. That is, if the above situation is in place, then as... Figure 10 As shown in (b), a short-circuit current flows through the input terminal TIUA side by simply turning on the switching element Q1 alone.

[0109] As shown in event 113, if Vdc is detected as voltage Vdet and no overcurrent detection value OCI is detected, the analysis unit 24 determines that "switching element Q2" is in a short-circuit state. In this case, the controller 25 continues to use the main circuit 10. That is, if the above situation is in place, then as... Figure 10 As shown in (c), a short-circuit current flows through the output terminal TOUA side by simply turning on the switching element Q1 alone.

[0110] (Step 12: Check the status of voltage Vdet and short-circuit current OCI by turning on the switching element Q4 alone.)

[0111] Then, the controller 25 replaces the switching element Q1 and turns on the switching element Q4 alone to perform the same test.

[0112] The controller 25 performs the parsing and processing of steps 11 and 12 on phases U, V, and W, and sequentially on all the bridge arms in each phase.

[0113] (Step 13: Turn on switch Q2 after switch Q1 and check the results of voltage Vdet and short-circuit current OCI)

[0114] Figure 11 This diagram illustrates the process of detecting the results of voltage Vdet and short-circuit current OCI by turning on switch element Q2 after switch element Q1 in an embodiment.

[0115] Figure 11 The table shown represents an example of the criteria for determining when switching element Q2 is turned on after switching element Q1. Figure 12 It is used to explain Figure 11 The diagram shows the events. Additionally, it is assumed that when switching element Q2 is turned on after switching element Q1, switching element Q1 is kept on while switching element Q2 is turned on.

[0116] Analysis unit 24 turns on switch element Q2 after switch element Q1 to detect the status of the detection results of voltage Vdet and short-circuit current OCI. Therefore, the detection results of voltage Vdet and short-circuit current OCI change as follows.

[0117] As shown in event 131, if Vdc is detected as voltage Vdet and no overcurrent detection value OCI is detected, the analysis unit 24 determines that all events other than events 132 and 133 (described later) are included in the hypothetical events. In this case, the controller 25 can continue to power on the main circuit 10. That is, as... Figure 12 As shown in (a), if the switching elements Q2, Q3 and diode DP are not short-circuited, and if the switching elements Q1 and Q2 are turned on, no short-circuit current will flow, and the output voltage Vdc will be output at the output terminal TOUA.

[0118] As shown in event 132, if the voltage Vdet cannot be detected, but the overcurrent detection value OCI is detected, the analysis unit 24 determines that "switching element Q3" is in a short-circuit state. If the above situation applies, then... Figure 12As shown in (b), a short-circuit current flows through the input terminal TIUA simply by turning on the switching elements Q1 and Q2. In this case, the controller 25 does not continue to use the main circuit 10.

[0119] As shown in event 133, when the voltage Vdet is 0V and no overcurrent detection value OCI is detected, the analysis unit 24 determines that one of the following is true: "Switch element Q1" is in the off state, "Switch element Q2" is in the off state, "Both switch elements Q1 and Q2" are in the off state, or an abnormal condition has occurred in the voltage measuring instrument VDET. If one of the above conditions is met, then... Figure 12 As shown in (c), even when switching elements Q1 and Q2 are turned on, the voltage at the output terminal TOUA is 0V, and no short-circuit current is generated. In this case, the controller 25 continues to use the main circuit 10.

[0120] Furthermore, in the analysis process of step 14, the controller 25 replaces the switching elements Q1 and Q2 in the analysis process of step 13, and turns on the switching elements Q4 and Q3 to perform the same test.

[0121] The controller 25 performs the parsing and processing of steps 13 and 14 on phases U, V, and W, and sequentially on all bridge arms in each phase.

[0122] If the results of steps 11 and 13 above are combined and organized, then it is possible to perform... Figure 13 The determination shown is omitted. However, combining the results of steps 12 and 14 will yield the same result.

[0123] Figure 13 It is used to explain Figure 8 The diagram shows the process of combining the results of steps 11 and 13 to make a judgment. Figure 13 The table shown illustrates an example of the decision criteria when combining the results of steps 11 and 13 for judgment. This table includes the event number for step 11, the event number for step 13, conceivable events, and whether the process can continue.

[0124] If event 131 of step 13 is detected in event 111 of step 11, the analysis unit 24 determines that the switching element Q3 is not short-circuited and the voltage detector VDET is functioning normally. In this case, the controller 25 can continue to be powered as there is no problem with the main circuit 10.

[0125] Similarly, in the case of detecting event 132 in step 13, the parsing unit 24 determines that the main circuit 10 cannot continue to be used because the switching element Q3 is short-circuited.

[0126] Similarly, if event 133 in step 13 is detected, the analysis unit 24 determines that one of the following is true: "switching element Q1" is in the off state, "switching element Q2" is in the off state, "both switching elements Q1 and Q2" are in the off state, or an abnormal condition has occurred in the voltage measuring instrument VDET. In this case, the controller 25 continues to use the main circuit 10.

[0127] If event 112 in step 11 is detected, parsing unit 24 does not perform the parsing process in step 13. This result is the same as that of event 112 in step 11.

[0128] If event 131 of step 13 is detected in event 113 of step 11, the parsing unit 24 determines that switching element Q2 is short-circuited. In this case, the controller 25 continues to use the main circuit 10. In event 113 of step 11, event 132 of step 13 will not be detected, resulting in the same outcome as event 112 of step 11. If event 133 of step 13 is detected in event 113 of step 11, the parsing unit 24 determines that "switching element Q1" is in an open state and "switching element Q2" is in a short-circuited state. In this case, the controller 25 continues to use the main circuit 10.

[0129] To put it another way, in each of steps 11 and 13, if the units digit of the event number, such as No. XX1, is "1", the parsing unit 24 determines that neither of the switching elements Q2 nor Q3 is short-circuited, and determines that the voltage detector VDET is functioning normally.

[0130] (Step 2X: Determining the short circuit fault of switching elements Q1 and Q4)

[0131] Next, refer to Figure 14 and Figure 15 The method for determining and handling short-circuit faults in switching elements Q1 and Q4 is explained.

[0132] Figure 14 This diagram illustrates the short-circuit fault determination process for switching elements Q1 and Q4 in the implementation method. Figure 14 The table shown represents an example of the criteria for determining short-circuit faults in switching elements Q1 and Q4. This table includes Event No., Vdet, conceivable events, and whether the process can continue. Figure 15 It is used to explain Figure 14 The diagrams showing the various events are shown.

[0133] Next, the controller 25 determines whether switching element Q1 is short-circuited. In this stage of the test, the controller 25 turns on switching element Q2 alone to determine if switching element Q1 is not short-circuited. Furthermore, this step of the test is permitted only if switching elements Q2 and Q3 are not short-circuited and the voltage detector VDET functions normally (the voltage Vdet, as detected by the voltage detector VDET, is within the desired range).

[0134] Analysis unit 24 determines the voltage Vdet when the switching element Q2 is turned on alone.

[0135] For example, as shown in event 211, when the voltage Vdet is 0V (volts) (refer to...) Figure 15 In (a) of the above, the analysis unit 24 determines that the switching element Q1 is in a "non-short circuit" state and is not in a short circuit state. Therefore, it determines that there is no problem with the main circuit 10 and continues to power on the main circuit 10. That is, as shown in (a) of the above. Figure 15 As shown in (a), if the switching element Q1 is functioning normally, even if the switching element Q2 is turned on, no short-circuit current will flow, and 0V will be output at the output terminal TOUA.

[0136] As shown in event 212, in the case where Vdc is detected as voltage Vdet (refer to...) Figure 15 In (b) of the above, the analysis unit 24 determines that "switching element Q1" is in a short-circuit state. In this case, the analysis unit 24 determines that the main circuit 10 cannot continue to be used.

[0137] Based on the above processing results, among all the events whose event numbers have a unit digit of 1, it can be determined that the switching elements Q1 and Q4 of the bridge arm are short-circuited. The controller 25 sequentially implements the processing of each of the above steps in each bridge arm of UA, UB, VA, VB, WA, and WB.

[0138] Through the processes shown in Steps 1X to 2X above, it can be identified that all components are free from short circuits. Therefore, in the next step, the windings of motor 2 connected to the output terminals of each phase are energized to verify that no open circuit fault has occurred in the main circuit 10.

[0139] (Step 3X: Determining the open circuit fault of the phase unit)

[0140] Reference Figure 16 and Figure 17 The method for determining and handling open-circuit faults in phase units is explained.

[0141] Figure 16 This diagram illustrates the determination and processing of open-circuit faults in the phase unit of the implementation method. Figure 16The table shown represents an example of the criteria for determining an open-circuit fault in a phase unit. This table includes Iu, Iw, conceivable events, and whether the fault can continue. Figure 17 It is used to explain Figure 16 The diagram shows the events.

[0142] If both the main circuit 10 and the motor 2 are in good working order, when the controller 25 allows current to flow from the output terminal TOUA of the U phase of the main circuit 10 through the winding of the U phase of the motor 2, this current also flows through the winding of the W phase of the motor 2 and returns at the output terminal TOUA of the W phase of the main circuit 10. In the determination and processing of open circuit faults in this phase unit, the controller 25 controls each switching element to energize the U-W phase, and detects the state of the main circuit 10 by detecting the status of the phase currents Iu and Iw.

[0143] When both phase currents Iu and Iw are detected, the analysis unit 24 makes a determination as follows. For example, it determines that none of the components (switching components) in the current path have an open-circuit fault. In other words, all components in the current path are not disconnected. Furthermore, it can be determined that both current detectors HCT are functioning normally. In this case, the controller 25 can continue to power on the main circuit 10.

[0144] If either phase current Iu or Iw is detected, the analysis unit 24 makes a determination as follows. For example, none of the components (switching components) in the current path are open-circuit faulted. In other words, all components in the current path are not disconnected. However, if one of the two current detectors HCT is determined to be faulty and outputs 0 as a current value, the other current detector HCT functions. In this case, the controller 25 can continue to power on the main circuit 10.

[0145] If the detected values ​​of phase currents Iu and Iw are both 0, the analysis unit 24 determines that one of the following events has occurred. For example, one or more components (switching components) in the current path have an open-circuit fault. In other words, one or more components in the current path are disconnected. Both current detectors HCTs are faulty, and the output value is 0. Examples of events that result in an output disconnection include a disconnection between the main circuit 10 and the motor 2, or a disconnection of the wiring from the current detectors HCTs to the control device 20. In this case, the controller 25 can continue to energize the main circuit 10.

[0146] Through the above processing, abnormal conditions of each component in the main circuit 10 and the generation of abnormal conditions of the detectors related to the main circuit 10 can be detected by executing the analysis processing, and the integrity of the main circuit 10 can be detected with higher accuracy.

[0147] Furthermore, by analyzing the presence or absence of short-circuit current in each component during the analytical process, it is possible to identify whether the main circuit 10 can continue to operate. For example, regarding the bridge arms of the 3-level type, such as... Figure 9 As shown, it can be determined that the main circuit 10 can continue to be used when a short-circuit fault is detected in the switching element Q2 alone. Thus, even if a fault exists, it is possible to identify, through the simple analytical processing method described in the embodiment, whether the main circuit 10 can continue to be used without immediate interruption, based on the fault's condition. Therefore, the shutdown period of the power conversion device 1 can be adjusted according to the severity of the fault. Furthermore, it is preferable to plan maintenance in a manner that allows for rapid operation even when it is determined that the main circuit 10 can continue to be used.

[0148] Through the above processing, if a fault is detected in the main circuit 10, the controller 25 can output the result of the judgment to the outside. In this case, the output information preferably includes information used to identify the bridge arm where the fault was detected and the event number of the event detected in each stage of the processing. The output target can be either a higher-level control device (not shown) or a terminal device (not shown) used for maintenance and repair work on the main circuit 10.

[0149] At least a portion of the control device 20 in the above-described embodiments can be implemented by a software functional unit that performs functions by executing programs through a processor such as a CPU, or it can be implemented entirely by a hardware functional unit such as an LSI.

[0150] According to at least one embodiment described above, the power conversion device 1 includes a main circuit 10, a controller 25 (power-on control unit), and an analysis unit 24. The main circuit 10 includes switching elements Q1 to Q4, which convert DC power into multiphase AC power by switching the elements Q1 to Q4 on and off, supplying AC power to the motor 2 (AC load) connected to the output side, and outputting the detection result of the element short-circuit current flowing through each switching element Q1 to Q4. The controller 25 energizes the switching elements Q1 to Q4 for a predetermined time based on any one of a plurality of pre-set analytical test conduction modes. The analysis unit 24 analyzes the integrity of the main circuit 10 using the load current flowing from the main circuit 10 to the motor 2, the phase voltage (voltage Vdet) output by the main circuit 10, and data regarding the element short-circuit current flowing through each switching element Q1 to Q4 during the predetermined time of energization. Therefore, the integrity of the main circuit 10 can be detected with higher accuracy.

[0151] Several embodiments of the present invention have been described, but these embodiments are merely illustrative and not intended to limit the scope of the invention. These embodiments can be implemented in a wide variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope or spirit of the invention, as well as in the scope of the invention as described in the claims and its equivalents.

[0152] For example, the structure of the main circuit 10 is not limited to a 3-level type; it can also be a 2-level type. The analysis unit 24 can add the DC power supply voltage value to the detection item within the desired range.

[0153] The controller 25 preferably performs the above-described analysis process while the power conversion device 1 is stopped. As a result, even if a problem is detected in a part of the main circuit 10 and it is determined that it can continue to be used, maintenance is planned in a way that allows for rapid implementation in order to prevent the power conversion device 1 from stopping.

[0154] When distinguishing the potentials of the neutral point on the DC side and the neutral point on the AC side of the main circuit 10, it is preferable to connect the output sides of the bridge arms UB, VB, and WB to the neutral point on the AC side.

[0155] Label Explanation

[0156] 1…Power conversion device; 2…Motor; 10…Main circuit; 20…Control device; 21…PWM unit; 22…Selection unit; 23…Pulse mode generation unit; 24…Analysis unit; 25…Controller; Q1, Q2, Q3, Q4…Switching elements.

Claims

1. A power conversion device, comprising: The main circuit includes multiple switching elements, which can convert DC power into multiphase AC power by switching the multiple switching elements on and off, supply the multiphase AC power to the AC load connected to the output side, and output the detection result of the short-circuit current of the element flowing through each of the multiple switching elements. The power-on control unit, based on any one of a pre-set multiple analytical test conduction modes, energizes the aforementioned multiple switching elements for a specified time; and The analysis unit analyzes the integrity of the main circuit using data on the load current flowing from the main circuit to the AC load, the phase voltage output by the main circuit, and the energization time of the short-circuit current flowing through each switching element at the specified time. The main circuit described above includes four switching elements connected in series. The aforementioned power-on control unit prioritizes the analysis using the first analysis test conduction mode over the analysis using the second analysis test conduction mode from among the aforementioned multiple analysis test conduction modes. The first analysis test conduction mode turns on the first of the four switching elements, while the second analysis test conduction mode turns on both the first and second of the four switching elements. The aforementioned multiple analytical test conduction modes assume the existence of a fault in any of the aforementioned multiple switching elements, specifically the third switching element, and specify the order in which each analytical test conduction mode is applied, ensuring that the fault in the third switching element does not affect the fault in the fourth switching element.

2. The power conversion device as claimed in claim 1, wherein, The conduction modes used in the above-mentioned analytical tests are pre-defined to be different from the conduction modes of the above-mentioned switching elements used in the normal control of converting the above-mentioned DC power into multiphase AC power.

3. The power conversion device as described in claim 1, wherein, The first and second switching elements are located on the same pole side.

4. The power conversion device as claimed in claim 1, wherein, The main circuit described above is a 3-level circuit.

5. A fault analysis method for a power conversion device, comprising the following steps: A main circuit that includes multiple switching elements, converts DC power into multiphase AC power by switching these multiple switching elements on and off, supplies the multiphase AC power to an AC load connected to the output side, and outputs the detection results of the short-circuit current flowing through each switching element. Based on any one of the pre-set conduction modes for analytical testing, the aforementioned multiple switching elements are energized for a specified time. The soundness of the main circuit is analyzed using data on the load current flowing from the main circuit to the AC load, the phase voltage output by the main circuit, and the energization time of the short-circuit current flowing through each of the plurality of switching elements. The main circuit described above includes four switching elements connected in series. From the above multiple analytical test conduction modes, the analysis using the first analytical test conduction mode is prioritized over the analysis using the second analytical test conduction mode. The first analytical test conduction mode turns the first of the four switching elements into the ON state, and the second analytical test conduction mode turns both the first and second of the four switching elements into the ON state. The aforementioned multiple analytical test conduction modes assume the existence of a fault in any of the aforementioned multiple switching elements, specifically the third switching element, and specify the order in which each analytical test conduction mode is applied, ensuring that the fault in the third switching element does not affect the fault in the fourth switching element.

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