多主交换式高速互联背板总线及其控制方法、处理系统

By adopting a star-shaped connection structure between the programmable bus protocol controller, processor, and peripheral modules in the industrial control system, a multi-master switching high-speed interconnect backplane bus is realized, which solves the bus resource limitation and data real-time problem of multi-processor systems, improves bus efficiency and system scalability, and is suitable for a variety of industrial control applications.

CN115525596BActive Publication Date: 2026-07-17XJ ELECTRIC CO LTD +1

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
XJ ELECTRIC CO LTD
Filing Date
2021-06-25
Publication Date
2026-07-17

AI Technical Summary

Technical Problem

In existing industrial control systems, multiprocessor systems suffer from limitations in bus resources, poor data real-time performance, inflexibility, and poor scalability, as well as problems such as bus access conflicts and data asynchrony.

Method used

It adopts a star topology connecting the programmable bus protocol controller, processor, and peripheral modules. It realizes a multi-master switching high-speed interconnect backplane bus through virtual address translation, allowing multiple processors to access and multiple peripheral modules to operate concurrently, reducing the data packet collision rate, improving bus efficiency, and system scalability.

Benefits of technology

It achieves the aggregation of multi-processor computing power, improves bus throughput and system real-time performance, reduces backplane bus complexity, enhances the system's flexible configuration capabilities, and is suitable for various industrial control application scenarios.

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Abstract

本发明公开了一种多主交换式高速互联背板总线及其控制方法、处理系统,其中包括:包括:可编程总线协议控制器;可编程总线协议控制器与处理系统的若干个处理器和若干个外设模块分别电连接,可编程总线协议控制器接收若干个处理器的控制指令,通过对与控制指令相对应的若干个外设模块进行虚拟地址转换,将若干个处理器的一对一、一对多或多对一的并发总线访问转换成虚拟的端到端连接,以提高背板总线的数据传输效率。通过采用可编程总线协议控制器与处理器和外设模块的星型连接结构,解决了多处理器并发访问的总线资源限制问题,降低了数据包碰撞率,允许多个处理器同时发起总线访问或者单处理器同时发起多个外部设备的访问,背板总线的多主访问实现了多处理器算力的聚合。
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