Display panel and display device

Abstract

The application discloses a display panel and a display device. The display panel has a display area, at least part of the display area is multiplexed as a biological information collection area, and the biological information collection area includes a plurality of light emitting devices and a plurality of photoelectric sensors. The display panel includes a substrate, a light emitting device layer and a driving circuit layer. The light emitting device layer is located on one side of the substrate and includes a pixel definition layer with a plurality of pixel openings. The light emitting device is arranged in the corresponding pixel opening. The driving circuit layer is located between the light emitting device layer and the substrate and includes a pixel driving circuit connected to the light emitting device and a sensing signal circuit connected to the photoelectric sensor. The photoelectric sensor is located in the driving circuit layer and includes a first electrode, a light sensing layer and a second electrode arranged in sequence away from the substrate. According to the embodiments provided by the application, the display panel and the display device provided by the application improve the quality of the light emitting device and the photoelectric sensor.

Description

Technical Field

[0001] This application relates to the field of display panels, and more specifically to a display panel and a display device. Background Technology

[0002] In recent years, with the rapid development of display technology, display devices with biometric identification functions have gradually entered people's lives and work. Fingerprint recognition technology, with its unique fingerprint identification feature, has been widely used in applications such as unlocking and secure payment. Among them, photoelectric fingerprint recognition technology is an emerging fingerprint recognition technology that can still accurately identify fingerprints even when there are water stains or dirt on the surface of the finger.

[0003] In existing technologies, photoelectric sensors with fingerprint recognition functions are usually set in the same layer as light-emitting devices used for display. Due to the certain differences in the materials of the two, the different materials may cause interference during the fabrication of light-emitting devices and photoelectric sensors in the same layer, resulting in poor quality of the fabricated light-emitting devices and photoelectric sensors. Summary of the Invention

[0004] This application provides a display panel and a display device, with the aim of improving the quality of light-emitting devices and photoelectric sensors.

[0005] An embodiment of the first aspect of this application provides a display panel having a display area, at least a portion of which is multiplexed as a bio-information acquisition area, the bio-information acquisition area including multiple light-emitting devices and multiple photoelectric sensors; the display panel includes:

[0006] Substrate;

[0007] The light-emitting device layer is located on one side of the substrate. The light-emitting device layer includes a pixel definition layer with multiple pixel openings, and the light-emitting devices are disposed in the corresponding pixel openings.

[0008] The driving circuit layer is located between the light-emitting device layer and the substrate. The driving circuit layer includes a pixel driving circuit connected to the light-emitting device and a sensing signal circuit connected to the photoelectric sensor.

[0009] The photoelectric sensor is located within the driving circuit layer, and the photoelectric sensor includes a first electrode, a photosensitive layer, and a second electrode arranged sequentially in a direction away from the substrate.

[0010] According to an embodiment of the first aspect of this application, the driving circuit layer includes a plurality of metal layers, and the first electrode is located in one of the metal layers.

[0011] According to any of the foregoing embodiments of the first aspect of this application, the plurality of metal layers include a first metal layer, a second metal layer and a third metal layer disposed sequentially along the direction away from the substrate, a first electrode is located on the second metal layer, and the second electrode is connected to a corresponding sensing signal circuit through the third metal layer.

[0012] According to any of the foregoing embodiments of the first aspect of this application, the driving circuit layer further includes a plurality of functional layers, the plurality of functional layers including a first functional layer and a second functional layer, the first electrode being located on the side of the first functional layer closer to the substrate, and the photosensitive layer and the second electrode being located between the first functional layer and the second functional layer.

[0013] The first functional layer has a first opening, and the first electrode is exposed outward from the first opening and in contact with the photosensitive layer;

[0014] The second functional layer has a second opening, and the second electrode is exposed outward from the second opening.

[0015] According to any of the foregoing embodiments of the first aspect of this application, the first functional layer is a first interlayer dielectric layer, and the second functional layer is a passivation layer.

[0016] According to any of the foregoing embodiments of the first aspect of this application, the plurality of functional layers further includes a third functional layer, which is disposed on the side of the second functional layer opposite to the first functional layer and covers the second opening.

[0017] According to any of the foregoing embodiments of the first aspect of this application, the third metal layer is disposed on the side of the third functional layer away from the substrate.

[0018] According to any of the foregoing embodiments of the first aspect of this application, the third functional layer is the first flat layer.

[0019] According to any of the foregoing embodiments of the first aspect of this application, the pixel driving circuit includes a first transistor, the sensing signal circuit includes a second transistor, the gate of the first transistor and the gate of the second transistor are disposed on the same layer, and the active layer of the first transistor and the active layer of the second transistor are disposed on the same layer.

[0020] According to any of the foregoing embodiments of the first aspect of this application, the first metal layer includes a third electrode and the gate of a second transistor, wherein the third electrode is disposed at a distance from the first electrode and forms a capacitor connected in parallel with the photodetector.

[0021] According to any of the foregoing embodiments of the first aspect of this application, the third metal layer further includes a first conductive portion and a second conductive portion connected to the active layer via of the second transistor, one of the first conductive portion and the second conductive portion being connected to the first electrode via, and the other being connected to the sensing signal circuit.

[0022] According to any of the foregoing embodiments of the first aspect of this application, the sensing signal circuit includes a sensing data line and a sensing scan line. The sensing scan line is electrically connected to the gate of the second transistor, the first conductive part is electrically connected to the sensing data line, and the second conductive part is connected to the first electrode through a via.

[0023] According to any of the foregoing embodiments of the first aspect of this application, the first electrode includes a first connection portion and a second connection portion connected together, the projection of the photosensitive layer on the substrate at least partially overlaps with the projection of the first connection portion on the substrate, and the projection of the second connection portion on the substrate at least partially overlaps with the projection of the second conductive portion on the substrate.

[0024] According to any of the foregoing embodiments of the first aspect of this application, the sensing signal circuit further includes a bias signal line, and the second electrode is connected to the bias signal line through a third metal layer.

[0025] According to any of the foregoing embodiments of the first aspect of this application, the plurality of functional layers further includes a fourth functional layer, which is disposed on the side of the third functional layer away from the substrate and covers the third metal layer.

[0026] According to any of the foregoing embodiments of the first aspect of this application, the fourth functional layer is a second flat layer.

[0027] According to any of the foregoing embodiments of the first aspect of this application, the projection of the light-emitting device on the substrate is adjacent to the projection of the photoelectric sensor on the substrate.

[0028] The second aspect of this application also provides a display device, including the display panel provided in any of the embodiments of the first aspect described above.

[0029] In the display panel and display device provided in this application embodiment, by placing the photosensitive sensor in the driving circuit layer, the light-emitting device and the photosensitive sensor are staggered, thereby allowing the photosensitive sensor to be fabricated during the fabrication of the driving circuit layer, and then the light-emitting device to be fabricated on the already fabricated driving circuit layer. This avoids interference between the materials used to fabricate the light-emitting device and the photosensitive sensor during the fabrication process to a certain extent. Compared to setting the photosensitive sensor and the light-emitting device in the same layer, the staggered light-emitting device and photosensitive sensor in this application have better quality. Compared to placing the photosensitive sensor on the outside of the display panel, the display panel provided in this application has both display and photosensitive functions, and the overall thickness is thinner. Since the first electrode, the photosensitive layer, and the second electrode are arranged sequentially along the substrate in a direction away from the substrate, the high external quantum efficiency of the photosensitive sensor is improved, and the leakage current is reduced. Compared to the photosensitive sensor arranged along the thickness direction perpendicular to the display panel, this application can arrange the layers of the driving circuit layer and the light-emitting device layer along the thickness direction, and the layers of the photosensitive sensor arranged along the thickness direction make the fabrication direction consistent. Attached Figure Description

[0030] Other features, objects, and advantages of this application will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings, in which the same or similar reference numerals denote the same or similar features, and the drawings are not drawn to scale.

[0031] Figure 1 This is a schematic diagram of the structure of a display panel provided in the first aspect embodiment of this application;

[0032] Figure 2 This is a cross-sectional structural schematic diagram of a display panel provided in the first aspect embodiment of this application;

[0033] Figure 3 This is a cross-sectional structural schematic diagram of another display panel provided in the first aspect embodiment of this application;

[0034] Figure 4 This is a cross-sectional structural schematic diagram of another display panel provided in the first aspect embodiment of this application;

[0035] Figure 5 This is an equivalent circuit diagram of the pixel driving circuit provided in the first aspect embodiment of this application;

[0036] Figure 6 This is a cross-sectional structural schematic diagram of another display panel provided in the first aspect embodiment of this application;

[0037] Figure 7 This is an equivalent circuit diagram of the photoelectric sensing circuit provided in the first aspect embodiment of this application;

[0038] Figure 8 This is a cross-sectional structural schematic diagram of another display panel provided in the first aspect embodiment of this application;

[0039] Figure 9 This is a schematic diagram of a partial manufacturing process of a display panel provided in the first aspect embodiment of this application;

[0040] Figure 10 This is a schematic diagram of a partial manufacturing process of a display panel provided in the first aspect embodiment of this application;

[0041] Figure 11 This is a schematic diagram of a part of the manufacturing process of a display panel provided in the first aspect of this application.

[0042] Explanation of reference numerals in the attached figures:

[0043] 10. Substrate;

[0044] 20. Driving circuit layer; 201. First functional layer; 201a. First opening; 202. Second functional layer; 203. Third functional layer; 203a. Second opening; 204. Fourth functional layer; 205. Buffer layer; 206. Third metal layer;

[0045] 30. Light-emitting device layer; 31. Pixel aperture; 32. Pixel definition layer;

[0046] 1. Light-emitting devices;

[0047] 2. Photoelectric sensor; 21. First electrode; 22. Photosensitive layer; 23. Second electrode;

[0048] 4a. First transistor; 4b. Second transistor; 41. Active layer; 42. Gate insulating layer; 43. Gate; 44. Second interlayer dielectric layer; 45. First conductive part; 46. Second conductive part; 47. Third conductive part; 48. Fourth conductive part; 5. Third electrode; 6. Conductive structure.

[0049] Specific implementation methods

[0050] The features and exemplary embodiments of various aspects of this application will now be described in detail. To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only configured to explain this application and are not configured to limit this application. For those skilled in the art, this application can be implemented without some of these specific details. The following description of the embodiments is merely to provide a better understanding of this application by illustrating examples of this application.

[0051] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes the element.

[0052] It should be understood that when describing the structure of a component, when referring to a layer or region as being "above" or "on top of" another layer or region, it can mean that it is directly above the other layer or region, or that it contains other layers or regions between it and the other layer or region. Furthermore, if the component is flipped over, that layer or region will be located "below" or "under" the other layer or region.

[0053] In recent years, with the rapid development of display technology, display devices with biometric identification functions have gradually entered people's lives and work. Fingerprint recognition technology, due to the uniqueness of fingerprints, has been widely used in applications such as unlocking and secure payment. Among them, photoelectric fingerprint recognition technology is an emerging fingerprint recognition technology. Even when there are water stains or dirt on the surface of the finger, photoelectric fingerprint recognition technology can still accurately identify fingerprints, and therefore has attracted much attention.

[0054] In existing technologies, photoelectric sensors with fingerprint recognition functions are usually set in the same layer as light-emitting devices used for display. Due to the certain differences in the materials of the two, the different materials may cause interference during the fabrication of light-emitting devices and photoelectric sensors in the same layer, resulting in poor quality of the fabricated light-emitting devices and photoelectric sensors.

[0055] Especially in the case of inorganic photoelectric sensors (PDs) made of inorganic materials, the material used to prepare the inorganic photoelectric sensor is very different from the material used to prepare the light-emitting device. As a result, the influence between different materials is particularly serious during the process of preparing the light-emitting device and the photoelectric sensor in the same layer, which leads to poor quality of the prepared light-emitting device and photoelectric sensor.

[0056] Existing solutions cannot adequately address the technical problems. To resolve these issues, this application provides a display panel and a display device. The following description, in conjunction with the accompanying drawings, will illustrate various embodiments of the display panel and the display device.

[0057] Please see Figure 1 and Figure 2 The display panel 100 has a display area AA, at least a portion of which is reused as a bio-information acquisition area BB. The bio-information acquisition area BB includes multiple light-emitting devices 1 and multiple photoelectric sensors 2.

[0058] It should be noted that the aforementioned reuse of at least a portion of the display area AA as the biometric information collection area BB means that the biometric information collection area BB is located within the display area AA, and at least a portion of the display area AA is used for both screen display and fingerprint recognition. For example, when a portion of the display area AA is reused as the biometric information collection area BB, only a portion of the display area AA is used for fingerprint recognition, such as... Figure 1In the illustrated embodiment, when the entire display area AA is reused as the biometric information collection area BB, the entire area of ​​the display area AA can be used for fingerprint recognition.

[0059] The multiple light-emitting devices 1 can be light-emitting devices 1 capable of emitting light of different colors. For example, they can be red light-emitting devices 1 capable of emitting red light, green light-emitting devices 1 capable of emitting green light, and blue light-emitting devices 1 capable of emitting blue light. Exemplarily, in this application embodiment, organic light-emitting diodes (OLEDs) can be selected to fabricate the above-mentioned light-emitting devices 1. Alternatively, the light-emitting devices 1 can also be configured as micro light-emitting diodes (Micro-LEDs) or quantum light-emitting diodes (QLEDs).

[0060] The photoelectric sensor 2, as a photosensitive element, converts light signals into electrical signals. The processing chip can then generate biological information based on the electrical signals produced by the photoelectric sensor 2. Those skilled in the art can, as needed, place multiple light-emitting devices 1 and multiple photoelectric sensors 2 in the biological information acquisition area BB. It is understood that the more light-emitting devices 1 per unit area, the more detailed the displayed image. Similarly, the more photoelectric sensors 2 per unit area, the richer the collected biological information. One or more photoelectric sensors 2 can be placed between two adjacent light-emitting devices 1. Conversely, one or more light-emitting devices 1 can also be placed between two adjacent photoelectric sensors 2. Those skilled in the art can arrange the light-emitting devices 1 and photoelectric sensors 2 as needed.

[0061] The display panel 100 includes a substrate 10, a driving circuit layer 20, and a light-emitting device layer 30, which can be stacked along the thickness direction of the display panel 100. The substrate 10 can be a silicon substrate or a flexible substrate, such as polyimide. The driving circuit layer 20 and the light-emitting device layer 30 can include multiple layer structures, each of which can be formed by chemical vapor deposition, evaporation, or other methods. Figure 2 The direction indicated by the X-axis is the thickness direction of the display panel 100. Those skilled in the art can start from the substrate 10 and form each layer structure sequentially along the thickness direction X.

[0062] Please refer to the following: Figure 3The light-emitting device layer 30 is located on one side of the substrate 10. The light-emitting device layer 30 includes a pixel definition layer 32 with multiple pixel openings 31, and multiple light-emitting devices 1 are disposed in the corresponding pixel openings 31. The driving circuit layer 20 is located between the light-emitting device layer 30 and the substrate 10. The driving circuit layer 20 includes a pixel driving circuit connected to the light-emitting device 1 and a sensing signal circuit connected to the photoelectric sensor 2. The photoelectric sensor 2 is located in the driving circuit layer 20, and the photoelectric sensor 2 includes a first electrode 21, a photosensitive layer 22 and a second electrode 23 arranged sequentially in a direction away from the substrate 10.

[0063] The following explanation uses photoelectric sensor 2 for fingerprint information acquisition as an example: When a finger touches the screen, the light source shines on the valleys and ridges of the fingerprint, causing reflection. Due to the different reflection angles and intensities of the reflected light from the valleys and ridges, the light is projected onto photoelectric sensor 2, causing a change in its resistance and thus a change in current. This current is transmitted through the sensing signal circuit to an external processing chip, allowing the chip to identify the valleys and ridges of the fingerprint based on the current, thus acquiring the fingerprint information. Since the reflected light needs to act on the photosensitive layer 22 through the second electrode 23, the second electrode 23 is made of a light-transmitting conductive material. The light source used in the process of photoelectric sensor 2 acquiring biometric information can be a light-emitting device 1.

[0064] In the display panel 100 provided in this application, by placing the photosensitive sensor 2 in the driving circuit layer 20, the light-emitting device 1 and the photosensitive sensor 2 are staggered. This allows the photosensitive sensor 2 to be fabricated during the fabrication of the driving circuit layer 20, and then the light-emitting device 1 to be fabricated on the already fabricated driving circuit layer 20. This avoids interference between the materials used to fabricate the light-emitting device 1 and the photosensitive sensor 2 during the fabrication process to a certain extent. Compared to placing the photosensitive sensor 2 and the light-emitting device 1 in the same layer, the staggered arrangement of the light-emitting device 1 and the photosensitive sensor 2 in this application results in better quality. Compared to placing the photosensitive sensor 2 on the outside of the display panel 100, the display panel 100 provided in this application... The 0 has both display and photoelectric sensing functions, and the overall thickness is thinner; since the first electrode 21, the photosensitive layer 22 and the second electrode 23 are arranged sequentially along the substrate 10 towards the driving circuit layer 20, the first electrode 21, the photosensitive layer 22 and the second electrode 23 can be formed sequentially along the thickness direction of the display panel 100, which improves the high external quantum efficiency of the photoelectric sensor 2 and reduces leakage current. Compared with the photoelectric sensor arranged along the thickness direction perpendicular to the display panel 100, this application can arrange the layers of the driving circuit layer 20 and the light-emitting device layer 30 along the thickness direction, and arrange the layers of the photoelectric sensor 2 along the thickness direction, so that the fabrication direction is consistent.

[0065] The driving circuit layer 20 includes multiple metal layers and multiple functional layers, with the first electrode 21 located in one of the metal layers.

[0066] Vias can be provided on the functional layer, and the various metal layers can be connected through the vias to realize different circuit structures in the pixel driving circuit and the sensing signal circuit. The first electrode 21 and the second electrode 23 can be disposed in different metal layers, so that the first electrode 21 and the second electrode 23 can be fabricated in layers, and the first electrode 21 and the second electrode 23 can be arranged sequentially along the thickness direction of the display panel 100.

[0067] In one embodiment, the plurality of metal layers include a first metal layer, a second metal layer, and a third metal layer 206 sequentially disposed along a direction away from the substrate 10. The first electrode 21 is located on the second metal layer, and the second electrode 22 is connected to a corresponding sensing signal circuit through the third metal layer 206. The third metal layer 206 can supply power to the photodetector 2 or transmit the photoelectric signal generated by the photodetector 2 to the processing chip.

[0068] Each functional layer has a different function, and the photosensitive sensor 2 can reuse one or more functional layers, thereby reducing the overall thickness of the display panel 100. In one embodiment, the multiple functional layers include a first functional layer 201 and a second functional layer 202. A first electrode 21 is located on the side of the first functional layer 201 near the substrate 10, and a photosensitive layer 22 and a second electrode 22 are located between the first functional layer 201 and the second functional layer 202. The first functional layer 201 has a first opening 201a, through which the first electrode 21 is exposed and in contact with the photosensitive layer 2. The second functional layer 202 has a second opening 203a, through which the second electrode 22 is exposed.

[0069] The first functional layer 201 and the second functional layer 202 can be made of the same material or different materials. The fabrication sequence of the first functional layer 201 and the second functional layer 202 differs; the first functional layer 201 can be fabricated first, and then the second functional layer 202 can be fabricated on top of the first functional layer 201. The first electrode 21 can be fabricated on a single substrate 10, or it can be fabricated on other functional layers besides the first functional layer 201 and the second functional layer 202. For example, the other functional layer could be a buffer layer 205 disposed on the substrate 10.

[0070] A first functional layer 201 with a first opening 201a can be fabricated on the prepared first electrode 21. Then, a photosensitive layer 22 and a second electrode 23 can be sequentially disposed on the first electrode 21 exposed to the first opening 201a, followed by a second functional layer 202 with a second opening 203a. By providing the first opening 201a, the photosensitive layer 22 can contact the first electrode 21 through the first opening 201a, thereby improving the conductivity between the photosensitive layer 22 and the first electrode 21.

[0071] In one embodiment, the first functional layer 201 is a first interlayer dielectric layer, and the second functional layer 202 is a passivation layer. The first interlayer dielectric layer 201 can be SiNx and / or SiOx, and the passivation layer 202 can be SiNx. Specifically, the first electrode 21 can be fabricated on other functional layers besides the first interlayer dielectric layer 201 and the passivation layer 202, and then the first interlayer dielectric layer 201 covering the first electrode 21 can be formed. Then, a first opening 201a is formed on the first interlayer dielectric layer 201 through an etching process, exposing the first electrode 21 through the first opening 201a. A photosensitive layer 22 and a second electrode 23 are sequentially formed on the first electrode 21 exposed to the first opening 201a. The passivation layer 202 is then covered on the fabricated photosensitive layer 22 and the second electrode 23 to improve the performance of the photosensor 2. Of course, the passivation layer 202 can also cover the first interlayer dielectric layer 201.

[0072] In one embodiment, the plurality of functional layers further includes a third functional layer 203, which is disposed on the side of the second functional layer 202 opposite to the first functional layer 201, and covers the second opening 203a.

[0073] A via can be provided in the third functional layer 203, through which the sensing signal circuit can be electrically connected to the second electrode 23 exposed in the second opening 203a. The third functional layer 203 covers the second opening 203a, and the photoelectric sensor 2 can be encapsulated through the third functional layer 203 to improve the stability of the electrical performance of the photoelectric sensor 2.

[0074] The end of the third functional layer 203 facing away from the substrate 10 may have a flat surface to facilitate the fabrication of other functional layers or metal layers on the third functional layer 203. In one embodiment, the third metal layer 206 is disposed on the side of the third functional layer 203 away from the substrate. That is, only the third functional layer 203 may be filled between the second electrode 21 and the third metal layer 206, thereby reducing the distance between the second electrode 21 and the third metal layer 206.

[0075] Optionally, the third functional layer 203 is a first planarization layer 203. Since the photosensitive layer 22 has a certain thickness, by setting the first planarization layer 203 on the side of the second functional layer 202 away from the first functional layer 201, the end of the first planarization layer 203 facing away from the substrate 10 has a flat surface, facilitating the setting of other functional layers or light-emitting device layers 30 on the first planarization layer 203. The first planarization layer 203 can be an organic film layer.

[0076] Please refer to the following: Figure 4 The display panel 100 has multiple transistors. The pixel driving circuit includes a first transistor 4a, and the sensing signal circuit includes a second transistor 4b. The gates of the first transistor 4a and the second transistor 4b are disposed on the same layer. The active layers of the first transistor 4a and the second transistor 4b are disposed on the same layer.

[0077] The pixel driving circuit contains multiple transistors. The pixel driving circuit can be any one of the following: 2T1C circuit, 3T1C circuit, 3T2C circuit, 7T1C circuit, or 7T2C circuit. In this article, "2T1C circuit" refers to a pixel driving circuit that includes two thin-film transistors (T) and one capacitor (C). Other circuits such as "7T1C circuit", "7T2C circuit", and "9T1C circuit" are deduced accordingly.

[0078] Please see Figure 5 Taking the 7T1C circuit as an example, the pixel driving circuit is connected to the data transmission signal Vdata. Multiple transistors may include a driving transistor T0, whose gate receives the data signal Vdata. The driving transistor T0 provides driving current to the light-emitting device 1. The multiple transistors also include a data writing transistor T1 controlled by control signal S1, used to selectively provide the data signal Vdata; a compensation transistor T2 controlled by control signal S2, used to compensate for the threshold voltage Vth of the driving transistor T0; light-emitting control transistors T3 and T4 controlled by the light-emitting control signal EM, used to selectively allow the light-emitting device 1 to enter the light-emitting stage; a reset transistor T5 controlled by control signal S3, used to provide a reset signal to the gate of the driving transistor T0; and an initialization transistor T6 controlled by control signal S4, used to provide an initialization signal to the anode of the light-emitting device.

[0079] The aforementioned transistor can be an oxide semiconductor transistor, specifically an IGZO (Indium Gallium Zinc Oxide) transistor, or a silicon transistor, specifically an LTPS (Low Temperature Poly-Silicon) transistor, or others.

[0080] The sensing signal circuit can also incorporate one or more transistors as needed. By placing the first transistor 4a and the second transistor 4b on the same layer, the manufacturing process is simplified, allowing the second transistor 4b to be fabricated simultaneously with the first transistor 4a.

[0081] Please see Figure 6 The transistor may include an active layer 41, a gate insulating layer 42 (GI), a gate 43, and a second interlayer dielectric layer 44 (CI). The active layer 41 is disposed on the side of the substrate 10 close to the first functional layer 201. The gate insulating layer 42 covers the active layer 41. The gate 43 is disposed on the side of the gate insulating layer 42 away from the substrate 10. The second interlayer dielectric layer 44 covers the gate 43 and the gate insulating layer 42.

[0082] The active layer 41 can be amorphous silicon (a-Si), p-type doped silicon (p-Si), or a metal oxide. The specific configuration can be chosen flexibly as needed and is not limited here. The metal oxide can be one containing at least one of In, Zn, Ga, and Sn, for example, InGaZnO or InSnZnO. The gate insulating layer 42 can be SiNx and / or SiOx. The second interlayer dielectric layer 44 can be SiNx and / or SiOx. The gate 43 can be molybdenum, copper, or aluminum, etc.

[0083] A gate insulating layer 42 is provided between the gate 43 and the active layer 41. The portion of the active layer 41 located at the projection position of the gate 43 onto the active layer 41 serves as a channel region. Source and drain regions are located on both sides of the channel region, which may include a source region on one side of the channel region and a drain region on the other side. The active layer 41 can be obtained through deposition and etching processes. The source and drain regions can be conductively treated, such as by ion implantation, or by irradiation with UV light or near-UV light.

[0084] The first transistor 4a and the second transistor 4b, which are arranged in the same layer, can have the following characteristics: the active layer 41 of the first transistor 4a and the active layer 41 of the second transistor 4b are arranged in the same layer; the gate 43 of the second transistor 4b and the gate 43 of the second transistor 4b are arranged in the same layer; the third conductive portion 47 and the second conductive portion 46, as well as the first conductive portion 45 and the second conductive portion 46 of the first transistor 4a, are arranged in the same layer. The gate insulating layer 42 of the first transistor 4a and the gate insulating layer 42 of the second transistor 4b are of the same layer structure; and the second interlayer dielectric layer 44 of the first transistor 4a and the second interlayer dielectric layer 44 of the second transistor 4b are of the same layer structure. To further simplify the manufacturing process, the above-mentioned structures arranged in the same layer can be prepared using the same material and through the same steps.

[0085] In another embodiment, the first metal layer further includes a third electrode 5 and a gate 43 of the second transistor 4b, wherein the third electrode 5 is spaced apart from the first electrode 21 and forms a capacitor connected in parallel with the photosensitive layer 22.

[0086] By setting a capacitor, charging and discharging can be achieved during the bio-information acquisition process, providing charge to the photoelectric sensor 2. The first electrode 21 serves as both an electrode of the photoelectric sensor 2 and an electrode in the capacitor. By reusing the first electrode 21, the manufacturing process is simplified. To increase the capacitance formed between the first electrode 21 and the third electrode 5, the relative area between the third electrode 5 and the first electrode 21 can be increased.

[0087] In one embodiment, the third electrode 5 is disposed in the same layer as the gate 43. That is, the third electrode 5 can be fabricated at the same time as the gate 43. The third electrode 5 and the gate 43 are formed on the gate insulating layer 42, and then a second interlayer dielectric layer 44 is disposed to cover the third electrode 5 and the gate 43.

[0088] In another embodiment, the third metal layer 206 further includes a first conductive portion 45 and a second conductive portion 46 connected to the via of the active layer 41. The first conductive portion 45 and the second conductive portion 46 are located in the third metal layer 206. One of the first conductive portion 45 and the second conductive portion 46 is connected to the via of the first electrode 21, and the other is connected to the sensing signal circuit.

[0089] Of the first conductive portion 45 and the second conductive portion 46, one is connected to the source region and serves as the source of the second transistor 4b, and the other is connected to the drain region and serves as the drain of the second transistor 4b. In this application, unless otherwise specified, the first conductive portion 45 can be either the source or the drain, and the second conductive portion 46 can be either the source or the drain, specifically determined by the direction of current flow through the transistor 4.

[0090] Please refer to the following: Figure 7 In another embodiment, the sensing signal circuit includes a sensing data line Vdata and a sensing scan line Scan. The sensing scan line Scan is electrically connected to the gate 43 of the second transistor 4b. The first conductive part 45 is electrically connected to the sensing data line Vdata, and the second conductive part 46 is connected to the first electrode 21 through a via.

[0091] Since the first electrode 21 is disposed in the first functional layer 201 and the second conductive part 46 is disposed on the side of the third functional layer 203 away from the substrate 10, it is necessary to open vias in the first functional layer 201, the second functional layer 202 and the third functional layer 203 to realize the via connection between the first electrode 21 and the second conductive part 46.

[0092] In one embodiment, the first electrode 21 includes a first connection portion and a second connection portion connected together, the projection of the photosensitive layer 22 on the substrate 10 at least partially overlaps with the projection of the first connection portion on the substrate 10, and the projection of the second connection portion on the substrate 10 at least partially overlaps with the projection of the second conductive portion 46 on the substrate 10.

[0093] Optionally, the first functional layer 201 is provided with a first opening 201a and a via. The first opening 201a is used to expose the first connecting part, so that a photosensitive layer 22 in contact with the first connecting part can be formed through the first opening 201a. At least one via on the first functional layer 201 is used to expose the second connecting part, so that the first electrode 21 and the second conductive part 46 can be connected by a via through the via.

[0094] Since the projection of the photosensitive layer 22 onto the substrate 10 at least partially overlaps with the projection of the first connecting portion onto the substrate 10, the photosensitive layer 22 can be directly connected to the first connecting portion along the thickness direction. Since the projection of the second connecting portion onto the substrate 10 at least partially overlaps with the projection of the second conductive portion 46 onto the substrate 10, the second connecting portion and the second conductive portion 46 can be connected vias along the thickness direction. Furthermore, since the photosensitive layer 22, the second electrode 23, and the second conductive portion 46 are not on the same functional layer, the projection of the second conductive portion 46 onto the substrate 10 can partially overlap with the projection of the photosensitive layer 22 onto the substrate 10, and the projection of the second conductive portion 46 onto the substrate 10 can also partially overlap with the projection of the second electrode 23 onto the substrate 10. This reduces the area occupied by each photosensitive sensor 2 in the bio-information acquisition area BB, thereby increasing the distribution density of the photosensitive sensors 2.

[0095] The display panel 100 also includes a bias signal line Vbias, and the second electrode 23 is connected to the bias signal line Vbias through a third metal layer 206.

[0096] The third metal layer 206 also includes a conductive structure 6. The second electrode 23 is connected to the conductive structure 6 through a via, and the conductive structure 6 is electrically connected to the bias signal line Vbias. Similarly, since the photosensitive layer 22 needs to receive external light, the conductive structure 6 can be made of a transparent material to reduce the amount of light blocked by the conductive structure 6 from reaching the photosensitive layer 22. For example, the conductive structure 6 can be made of Ti and / or Al material. Because the conductive structure 6, the first conductive portion 45, and the second conductive portion 46 are used to connect different signal lines, they are spaced apart within the third metal layer 206.

[0097] In some embodiments, the plurality of functional layers further include a fourth functional layer 204, which is disposed on the side of the third functional layer 203 away from the substrate 10 and covers the third metal layer.

[0098] In some embodiments, the third metal layer 206 further includes a third conductive portion 47 and a fourth conductive portion 48 connected to the active layer 41 of the first transistor 4a via. The third conductive portion 47 and the fourth conductive portion 48 are located in the third metal layer 206. Of the first conductive portion 45 and the second conductive portion 46, one is connected to the source region and serves as the source of the first transistor 4a, and the other is connected to the drain region and serves as the drain of the first transistor 4a.

[0099] The fourth functional layer 204 also covers the third conductive portion 47 and the fourth conductive portion 48 of the first transistor 4a. In some embodiments, the third metal layer 206 further includes a conductive structure 6, and the fourth functional layer 204 also covers the conductive structure 6. By setting the fourth functional layer 204 to cover the third metal layer 206, the surface of the fourth functional layer 204 away from the substrate 10 is made flat, which facilitates the further fabrication of the light-emitting device layer 30 on the fourth functional layer 204.

[0100] In one embodiment, the fourth functional layer 204 is a second planarization layer 204, which may be an organic film layer. The second planarization layer 204 may also encapsulate the third metal layer 206 to prevent external gases and liquids from interfering with the operation of each electrode.

[0101] In related technologies, both the light-emitting device 1 and the photodetector 2 are disposed within the light-emitting device layer 30. To ensure that the materials used to fabricate both do not interfere with each other and to prevent the openings in the light-emitting device layer 30 that house both from collapsing, the light-emitting device 1 and the photodetector 2 need to be disposed at a certain distance from each other. Please refer to [link to relevant documentation]. Figure 8 In this application, since the light-emitting device 1 is in the light-emitting device layer 30 and the photoelectric sensor 2 is in the driving circuit layer 20, the projection of the light-emitting device 1 on the substrate 10 is adjacent to the projection of the photoelectric sensor 2 on the substrate 10. That is, when looking down at the display panel 100 along the thickness direction X, there can be no gap between the light-emitting device 1 and the photoelectric sensor 2, thereby increasing the distribution density of the light-emitting device 1 and the photoelectric sensor 2 and improving the resolution of the display panel 100.

[0102] Please see Figure 9 , Figure 10 and Figure 11 To further illustrate the display panel 100 provided in this application, the following example illustrates the manufacturing process of the display panel 100.

[0103] like Figure 9 a. Provide a substrate 10, form a buffer layer 205 on the substrate 10, and then form an active layer 41 on the buffer layer 205;

[0104] like Figure 9b. A gate insulating layer 42 covering the active layer 41 is formed on the buffer layer 205, and a via H11 for connecting to the first conductive part 45 or the second conductive part 46 is formed on the gate insulating layer 42.

[0105] A first metal layer is formed on the gate insulating layer 42, wherein a gate 43 is formed on the gate insulating layer 42 at a distance from the active layer 41, and a third electrode 5 is formed at a distance from the gate 43.

[0106] like Figure 9 c. A second interlayer dielectric layer 44 covering the first metal layer is formed on the gate insulating layer 42, and a via H12 communicating with the via H11 is formed in the second interlayer dielectric layer 44.

[0107] A second metal layer is formed on the second interlayer dielectric layer 44, wherein a first electrode 21 is formed on the second interlayer dielectric layer 44 at a distance from the third electrode 5;

[0108] like Figure 9 d. A first interlayer dielectric layer 201 covering the first metal layer is formed on the second interlayer dielectric layer 44. A first opening 201a and a via H21 exposing the first electrode 21 are formed in the first interlayer dielectric layer 201. A via H13 communicating with the via H12 is formed in the first interlayer dielectric layer 201.

[0109] like Figure 10 a. A photosensitive layer 22 is formed at the location of the first opening 201a, and a second electrode 23 is formed on the photosensitive layer 22;

[0110] A passivation layer 202 covering the photosensitive layer 22 and the second electrode 23 is formed on the second interlayer dielectric layer 44. A via H14 communicating with via H13 and H22 communicating with via H21 are formed in the passivation layer 202. A second opening 203a exposing the second electrode 23 is formed in the passivation layer 202.

[0111] like Figure 10 b. A first planarization layer 203 is formed on the passivation layer 202, and the minimum distance from the surface of the first planarization layer 203 away from the substrate 10 to the substrate 10 is greater than the maximum distance from the surface of the second electrode 23 away from the substrate 10 to the substrate 10. A via H15 communicating with via H14 and H23 communicating with via H22 are formed in the second interlayer dielectric layer 44, and a via H31 exposing the second electrode 23 is formed in the first planarization layer 203.

[0112] like Figure 10c. A third metal layer 206 is formed on the first planarization layer 203, wherein a first conductive portion 45, a second conductive portion 46, and a conductive structure 6 are formed on the first planarization layer 203. The first conductive portion 45 and the second conductive portion 46 are connected to the active layer 41 sequentially through vias H11, H12, H13, H14, and H15, respectively. The conductive structure 6 is connected to the second electrode 23 through via H31. The second conductive portion 46 is also connected to the first electrode 21 sequentially through vias H21, H22, and H23.

[0113] A second planarization layer 204 is formed on the first planarization layer 203, covering the first conductive portion 45, the second conductive portion 46 and the conductive structure 6. A via H41 is formed on the second planarization layer 204 to expose the third conductive portion 47 of the first transistor 4a.

[0114] like Figure 11 A light-emitting device layer 30 is formed on the second planarization layer 204, and the light-emitting device layer 30 is electrically connected to the third conductive part 47 through a via H41.

[0115] Secondly, this application also provides a display device. The display device provided in this application has the relevant structure of the aforementioned display panel 100. Please refer to the display panel 100 provided in the above embodiments. It has all the beneficial effects of the aforementioned display panel 100, which will not be repeated here.

[0116] The embodiments described above are not exhaustive and do not limit the invention to specific examples. Clearly, many modifications and variations can be made based on the above description. These embodiments are selected and specifically described in this specification to better explain the principles and practical applications of this application, thereby enabling those skilled in the art to effectively utilize this application and its modifications. This application is limited only by the claims and their full scope and equivalents.

Claims

1. A display panel, characterized in that, The display panel has a display area, at least a portion of which is reused as a bio-information acquisition area, the bio-information acquisition area including multiple light-emitting devices and multiple photoelectric sensors; The display panel includes: Substrate; A light-emitting device layer is located on one side of the substrate. The light-emitting device layer includes a pixel definition layer with multiple pixel openings, and the light-emitting devices are disposed in the corresponding pixel openings. A driving circuit layer is located between the light-emitting device layer and the substrate. The driving circuit layer includes a pixel driving circuit connected to the light-emitting device and a sensing signal circuit connected to the photoelectric sensor. The pixel driving circuit includes a first transistor. The photoelectric sensor is located within the driving circuit layer, and the photoelectric sensor includes a first electrode, a photosensitive layer, and a second electrode arranged sequentially along a direction away from the substrate. The driving circuit layer includes multiple metal layers, including a first metal layer, a second metal layer and a third metal layer arranged sequentially in a direction away from the substrate. The first electrode is located on the second metal layer, and the second electrode is connected to the corresponding sensing signal circuit through the third metal layer. The first metal layer includes a third electrode and the gate of the first transistor, wherein the third electrode is spaced apart from the first electrode and forms a capacitor connected in parallel with the photosensor.

2. The display panel according to claim 1, characterized in that, The driving circuit layer further includes multiple functional layers, including a first functional layer and a second functional layer. The first electrode is located on the side of the first functional layer closer to the substrate, and the photosensitive layer and the second electrode are located between the first functional layer and the second functional layer. The first functional layer has a first opening, and the first electrode is exposed outward from the first opening and in contact with the photosensitive layer; The second functional layer has a second opening, and the second electrode is exposed outward from the second opening.

3. The display panel according to claim 2, characterized in that, The first functional layer is a first interlayer dielectric layer, and the second functional layer is a passivation layer.

4. The display panel according to claim 2, characterized in that, The plurality of functional layers also includes a third functional layer, which is disposed on the side of the second functional layer opposite to the first functional layer and covers the second opening.

5. The display panel according to claim 4, characterized in that, The third metal layer is disposed on the side of the third functional layer away from the substrate.

6. The display panel according to claim 4, characterized in that, The third functional layer is the first flat layer.

7. The display panel according to claim 1, characterized in that, The pixel driving circuit includes a first transistor, and the sensing signal circuit includes a second transistor. The gates of the first transistor and the second transistor are disposed on the same layer, and the active layers of the first transistor and the second transistor are disposed on the same layer.

8. The display panel according to claim 7, characterized in that, The third metal layer further includes a first conductive portion and a second conductive portion connected to the active layer via of the second transistor, wherein one of the first conductive portion and the second conductive portion is connected to the first electrode via.

9. The display panel according to claim 8, characterized in that, The sensing signal circuit includes a sensing data line and a sensing scan line. The sensing scan line is electrically connected to the gate of the second transistor. The first conductive part is electrically connected to the sensing data line. The second conductive part is connected to the first electrode through a via.

10. The display panel according to claim 8, characterized in that, The sensing signal circuit also includes a bias signal line, and the second electrode is connected to the bias signal line through the third metal layer.

11. The display panel according to claim 4, characterized in that, The plurality of functional layers further includes a fourth functional layer, which is disposed on the side of the third functional layer away from the substrate and covers the third metal layer.

12. The display panel according to claim 11, characterized in that, The fourth functional layer is the second flat layer.

13. The display panel according to claim 1, characterized in that, The projection of the light-emitting device on the substrate is adjacent to the projection of the photoelectric sensor on the substrate.

14. A display device, characterized in that, include: The display panel as described in any one of claims 1-13.

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