A chip configuration method of a power semiconductor module

By replacing the chip in the IGBT module with a MOS chip and connecting it with a diode chip according to the loss conditions, the problem of chip mismatch in IGBT modules under different operating conditions is solved, thereby achieving cost reduction and efficiency improvement.

CN115547851BActive Publication Date: 2026-06-12SHENZHEN HOPEWIND ELECTRIC CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
SHENZHEN HOPEWIND ELECTRIC CO LTD
Filing Date
2022-10-18
Publication Date
2026-06-12

AI Technical Summary

Technical Problem

Existing IGBT modules suffer from chip incompatibility under different operating conditions, resulting in some chips failing to work, wasting resources, failing to fully utilize module performance, and being costly and inefficient.

Method used

Based on the loss characteristics of the IGBT module, the IGBT chip is replaced with a MOS chip and a parallel diode chip under different operating conditions to optimize the chip configuration, reduce wasted power, and improve efficiency.

🎯Benefits of technology

By optimizing chip configuration, the unnecessary power consumption of IGBT chips is reduced, costs are lowered, and the output current capacity and overall efficiency of IGBT modules are improved.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a chip configuration method of a power semiconductor module, judges whether the working condition of a bus to a load is a voltage boosting working condition or a voltage reducing working condition, and calculates the conditions of IGBT chips included in an upper bridge of the IGBT module and IGBT chips included in a lower bridge of the IGBT module; when the working condition of the bus to the load is the voltage reducing working condition, and the loss of the IGBT chips in the IGBT module is less than the loss of diode chips in the IGBT module, the IGBT chips of the lower bridge of the IGBT module are replaced by MOS chips to form a new packaged IGBT module; the chip configuration method of the power semiconductor module is configured according to the loss conditions of the chip types and quantities of the upper bridge or the lower bridge of the IGBT module under the condition of fully calculating the internal loss of the IGBT module, the performance of the internal chips of the IGBT module is fully exerted, the IGBT chips are prevented from doing useless work, and the cost is reduced and the efficiency is improved.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor chip design technology, and in particular to a chip configuration method for a power semiconductor module. Background Technology

[0002] With the continuous development of power semiconductor manufacturing technology, the integration and power density of power devices such as IGBTs are becoming increasingly higher, leading to the emergence of different types of IGBT module packages, including EconoPack, PrimePack, and IHM. In standard module packages, a standard half-bridge structure is generally composed of IGBT chips and diode chips. The upper half-bridge consists of IGBT chips and diode chips, and the lower half-bridge also consists of IGBT chips and diode chips. Figure 1 This is the internal structure layout of a standard packaged IGBT module. 010 represents four power terminals connected to external circuitry, 011 is the IGBT module package housing, 012 is the upper-bridge IGBT chip, and 013 is the upper-bridge diode chip. The lower-bridge layout and connections are basically the same as the upper-bridge.

[0003] Figure 2 The diagram shows the topology of a standard packaged IGBT module in existing technology. When this topology operates in buck or boost mode, the chips in the standard packaged IGBT module are no longer perfectly matched. There are always situations where the lower-bridge IGBT chip completely fails to function, and the actual output current capacity of the module is entirely limited by the lower-bridge diode chip; or the upper-bridge IGBT chip completely fails, and the actual output current capacity of the module is entirely limited by the upper-bridge diode chip. Therefore, this standard packaged IGBT module actually has a certain degree of waste and cannot fully utilize the module's performance. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to propose a chip configuration method for a power semiconductor module. This chip configuration method configures the type and quantity of chips in the upper or lower bridge of the IGBT module according to the loss situation after fully calculating the internal loss of the IGBT module, so as to give full play to the performance of the internal chips of the IGBT module, reduce the useless work of the IGBT chips, reduce costs and improve efficiency.

[0005] To address the aforementioned technical problems, this invention provides a chip configuration method for a power semiconductor module, comprising a standard packaged IGBT module, the standard packaged IGBT module including an IGBT module upper bridge and an IGBT module lower bridge connected in series with the IGBT module upper bridge, and a bus connection point provided between the IGBT module upper bridge and the IGBT module lower bridge; the method includes the following steps: determining whether the bus-to-load operating condition is a boost operating condition or a buck operating condition, and calculating the IGBT chips included in the IGBT module upper bridge and the IGBT module lower bridge; when the bus-to-load operating condition is a buck operating condition... When the IGBT chip loss in the IGBT module is less than the diode chip loss in the IGBT module, the IGBT chip in the lower bridge of the IGBT module is replaced with a MOS chip to form a new packaged IGBT module, and the MOS chip is connected in parallel with the diode chip in the lower bridge of the IGBT module; when the bus-to-load operating condition is a boost operating condition, and the IGBT chip loss in the IGBT module is less than the diode chip loss in the IGBT module, the IGBT chip in the upper bridge of the IGBT module is replaced with a MOS chip to form a new packaged IGBT module, and the MOS chip is connected in parallel with the diode chip in the upper bridge of the IGBT module.

[0006] Preferably, the losses of the IGBT module include IGBT chip conduction losses and IGBT chip switching losses; the losses of the diode chip include diode chip conduction losses and diode chip reverse recovery losses.

[0007] Preferably, in a standard packaged IGBT module, when the bus-to-load operating condition is a step-down condition, the duty cycle within one working cycle affects the IGBT chip on the upper bridge of the IGBT module, but not the IGBT chip on the lower bridge: the IGBT chip on the lower bridge does not work, and only the diode chip on the lower bridge provides freewheeling current.

[0008] Preferably, in a standard packaged IGBT module, when the bus-to-load operating condition is a boost condition, the duty cycle within one working cycle affects the IGBT chip of the lower bridge of the IGBT module, but has no effect on the IGBT chip of the upper bridge of the IGBT module: the IGBT chip of the upper bridge of the IGBT module does not work, and only the diode chip of the upper bridge of the IGBT module provides freewheeling current.

[0009] Preferably, when the bus-to-load operating condition is a step-down condition, the newly packaged IGBT module includes a module package housing, an IGBT module upper bridge and an IGBT module lower bridge housed inside the module package housing; the IGBT module upper bridge includes at least two upper bridge IGBT chips connected in parallel, at least two upper bridge diode chips connected in parallel, and a first DCB substrate, all upper bridge IGBT chips and upper bridge diode chips are disposed on the first DCB substrate, and each upper bridge IGBT chip is anti-parallel to its corresponding upper bridge diode chip; the IGBT module lower bridge includes at least two lower bridge MOS chips connected in parallel, at least two lower bridge diode chips connected in parallel, and a second DCB substrate, all lower bridge MOS chips and lower bridge diode chips are disposed on the second DCB substrate, and each lower bridge MOS chip is anti-parallel to its corresponding lower bridge diode chip.

[0010] Preferably, when the bus-to-load operating condition is a boost condition, the newly packaged IGBT module includes a module package housing, an IGBT module upper bridge and an IGBT module lower bridge housed inside the module package housing; the IGBT module upper bridge includes at least two parallel upper bridge MOS chips, at least two parallel upper bridge diode chips, and a first DCB substrate, all upper bridge MOS chips and upper bridge diode chips are disposed on the first DCB substrate, and each upper bridge MOS chip is anti-parallel to its corresponding upper bridge diode chip; the IGBT module lower bridge includes at least two parallel lower bridge IGBT chips, at least two parallel lower bridge diode chips, and a second DCB substrate, all lower bridge IGBT chips and lower bridge diode chips are disposed on the second DCB substrate, and each lower bridge IGBT chip is anti-parallel to its corresponding lower bridge diode chip.

[0011] Preferably, the conduction loss of the IGBT chip in one cycle is:

[0012]

[0013] Where Ts is the duty cycle of the IGBT module. This refers to the on-time of the IGBT chip in the IGBT module during one operating cycle. This refers to the voltage across the IGBT chip in the IGBT module. This refers to the current flowing through the IGBT chip in the IGBT module.

[0014] Preferably, the conduction loss of the diode chip in one cycle is:

[0015]

[0016] in, This refers to the voltage across the diode chip in the IGBT module. This represents the current flowing through the diode chip in the IGBT module. This refers to the on-time of the IGBT chip in the IGBT module during one operating cycle. The duty cycle of the IGBT module. This refers to the switching frequency of the IGBT module.

[0017] Preferably, the switching loss of the IGBT chip in one cycle is:

[0018]

[0019] in, The power loss of the IGBT chip each time it is turned on. The loss during each turn-off of the IGBT chip, This refers to the switching frequency of the IGBT module.

[0020] Preferably, the reverse recovery loss of the diode chip over one cycle is:

[0021] in, The switching frequency of the IGBT module. This represents the loss during each reverse recovery of the diode.

[0022] After adopting the above method, it is determined whether the bus-to-load operating condition is a boost or buck condition, and the IGBT chips included in the upper and lower bridges of the IGBT module are calculated. When the bus-to-load operating condition is a buck condition, and the loss of the IGBT chip in the IGBT module is less than the loss of the diode chip in the IGBT module, the IGBT chip in the lower bridge of the IGBT module is replaced with a MOS chip to form a new packaged IGBT module. The MOS chip is connected in parallel with the diode chip in the lower bridge of the IGBT module. When the bus-to-load operating condition is a boost condition... If the loss of the IGBT chip in the IGBT module is less than the loss of the diode chip in the IGBT module, then the IGBT chip on the IGBT module bridge is replaced with a MOS chip to form a new packaged IGBT module. The MOS chip is connected in parallel with the diode chip on the IGBT module bridge. This chip configuration method for the power semiconductor module, after fully calculating the internal losses of the IGBT module, configures the type and quantity of chips on the IGBT module bridge or lower bridge according to the loss situation, so as to give full play to the performance of the chips inside the IGBT module, reduce the useless work of the IGBT chip, reduce costs and improve efficiency. Attached Figure Description

[0023] Figure 1A packaging structure diagram of a standard IGBT module in existing technology;

[0024] Figure 2 A topology diagram of a standard packaged IGBT module for existing technology;

[0025] Figure 3 This is a packaging structure diagram of the newly packaged IGBT module for the chip configuration method of the power semiconductor module in Embodiment 7 of the present invention;

[0026] Figure 4 This is a topology diagram of a newly packaged IGBT module for the chip configuration method of a power semiconductor module according to Embodiment 7 of the present invention;

[0027] Figure 5 This is a packaging structure diagram of the newly packaged IGBT module for the chip configuration method of the power semiconductor module in Embodiment 8 of the present invention;

[0028] Figure 6 This is a topology diagram of a newly packaged IGBT module for the chip configuration method of a power semiconductor module according to Embodiment 8 of the present invention. Detailed Implementation

[0029] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0030] Example 1

[0031] This embodiment discloses a chip configuration method for a power semiconductor module, providing a standard packaged IGBT module. The standard packaged IGBT module includes an IGBT module upper bridge and an IGBT module lower bridge connected in series with the IGBT module upper bridge. A bus connection point is provided between the IGBT module upper bridge and the IGBT module lower bridge. The method includes the following steps: determining whether the bus-to-load operating condition is a boost operating condition or a buck operating condition, and calculating the IGBT chips included in the IGBT module upper bridge and the IGBT module lower bridge; when the bus-to-load operating condition is a buck operating condition, and I... If the loss of the IGBT chip in the IGBT module is less than the loss of the diode chip in the IGBT module, then the IGBT chip in the lower bridge of the IGBT module is replaced with a MOS chip to form a new packaged IGBT module. The MOS chip is connected in parallel with the diode chip in the lower bridge of the IGBT module. When the bus-to-load operating condition is a boost condition, and the loss of the IGBT chip in the IGBT module is less than the loss of the diode chip in the IGBT module, then the IGBT chip in the upper bridge of the IGBT module is replaced with a MOS chip to form a new packaged IGBT module. The MOS chip is connected in parallel with the diode chip in the upper bridge of the IGBT module.

[0032] Example 2

[0033] This embodiment is based on Embodiment 1. In this embodiment, the losses of the IGBT module include the IGBT chip conduction loss and the IGBT chip switching loss; the losses of the diode chip include the diode chip conduction loss and the diode chip reverse recovery loss.

[0034] The conduction loss of the IGBT chip during one cycle is:

[0035]

[0036] Where Ts is the duty cycle of the IGBT module, and Ton is the on-time of the IGBT chip in the IGBT module within one duty cycle. This refers to the voltage across the IGBT chip in the IGBT module. This refers to the current flowing through the IGBT chip in the IGBT module.

[0037] In this embodiment, the conduction loss of the diode chip in one cycle is:

[0038]

[0039] in, This refers to the voltage across the diode chip in the IGBT module. This represents the current flowing through the diode chip in the IGBT module. This refers to the on-time of the IGBT chip in the IGBT module during one operating cycle. The duty cycle of the IGBT module. This refers to the switching frequency of the IGBT module.

[0040] The switching loss of the IGBT chip in one cycle is:

[0041]

[0042] in, The power loss of the IGBT chip each time it is turned on. The loss during each turn-off of the IGBT chip, This refers to the switching frequency of the IGBT module.

[0043] The reverse recovery loss of the diode chip over one cycle is:

[0044] in, The switching frequency of the IGBT module. This represents the loss during each reverse recovery of the diode.

[0045] Example 3

[0046] This embodiment is based on Embodiment 1. In this embodiment, in the standard packaged IGBT module, when the bus-to-load operating condition is a step-down condition, the duty cycle within one working cycle affects the IGBT chip of the upper bridge of the IGBT module, but does not affect the IGBT chip of the lower bridge of the IGBT module: the IGBT chip of the lower bridge of the IGBT module does not work, and only the diode chip of the lower bridge of the IGBT module provides freewheeling current.

[0047] Example 4

[0048] This embodiment is based on Embodiment 1. In this embodiment, in the standard packaged IGBT module, when the bus-to-load operating condition is boost condition, the duty cycle within one working cycle affects the IGBT chip of the lower bridge of the IGBT module, but does not affect the IGBT chip of the upper bridge of the IGBT module: the IGBT chip of the upper bridge of the IGBT module does not work, and only the diode chip of the upper bridge of the IGBT module provides freewheeling current.

[0049] Example 5

[0050] This embodiment is based on Embodiment 1. In this embodiment, when the bus-to-load operating condition is a step-down condition, the newly packaged IGBT module includes a module package housing, an IGBT module upper bridge and an IGBT module lower bridge housed inside the module package housing. The IGBT module upper bridge includes at least two parallel upper bridge IGBT chips, at least two parallel upper bridge diode chips, and a first DCB substrate. All upper bridge IGBT chips and upper bridge diode chips are disposed on the first DCB substrate, and each upper bridge IGBT chip is anti-parallel to its corresponding upper bridge diode chip. The IGBT module lower bridge includes at least two parallel lower bridge MOS chips, at least two parallel lower bridge diode chips, and a second DCB substrate. All lower bridge MOS chips and lower bridge diode chips are disposed on the second DCB substrate, and each lower bridge MOS chip is anti-parallel to its corresponding lower bridge diode chip.

[0051] Example 6

[0052] This embodiment is based on Embodiment 1. In this embodiment, when the bus-to-load operating condition is a boost condition, the newly packaged IGBT module includes a module package housing, an IGBT module upper bridge and an IGBT module lower bridge housed inside the module package housing. The IGBT module upper bridge includes at least two parallel upper bridge MOS chips, at least two parallel upper bridge diode chips, and a first DCB substrate. All upper bridge MOS chips and upper bridge diode chips are disposed on the first DCB substrate, and each upper bridge MOS chip is antiparallel to its corresponding upper bridge diode chip. The IGBT module lower bridge includes at least two parallel lower bridge IGBT chips, at least two parallel lower bridge diode chips, and a second DCB substrate. All lower bridge IGBT chips and lower bridge diode chips are disposed on the second DCB substrate, and each lower bridge IGBT chip is antiparallel to its corresponding lower bridge diode chip.

[0053] Example 7

[0054] Please see Figure 3 and Figure 4 , Figure 3 This is a packaging structure diagram of the newly packaged IGBT module for the chip configuration method of the power semiconductor module according to Embodiment 7 of the present invention. Figure 4 This is a topology diagram of a newly packaged IGBT module for the chip configuration method of a power semiconductor module according to Embodiment 7 of the present invention;

[0055] This embodiment is based on Embodiment 5. In this embodiment...

[0056] The IGBT module includes a module package housing 021, four power terminals 020 disposed on the module package housing 021 for connection to external circuits, and an IGBT module upper bridge and an IGBT module lower bridge housed inside the module package housing 021. The IGBT module upper bridge includes three upper bridge IGBT chips 022, three upper bridge diode chips 023, and a first DCB substrate 024. All upper bridge IGBT chips 022 and upper bridge diode chips 023 are disposed on the first DCB substrate 024. The three upper bridge IGBT chips 022 are connected in parallel, the three upper bridge diode chips 023 are connected in parallel, and each upper bridge IGBT chip 022 is connected in anti-parallel with its corresponding upper bridge diode chip 023. The IGBT module lower bridge includes three lower bridge MOS chips 025, three lower bridge diode chips 026, and a second DCB substrate 027.

[0057] In a standard packaged IGBT module, when the bus voltage to the load is stepped down, this step-down operation corresponds to the BUCK circuit in a DC-DC converter. When the voltage across the terminals is fixed and the current is continuous, the duty cycle D is also fixed. The duty cycle here only affects the upper IGBT chip of the IGBT module's upper bridge; the lower IGBT chip only serves as a freewheeling current source. The lower IGBT module consists of a lower IGBT chip and an anti-parallel lower diode chip. Since the IGBT chip cannot conduct in reverse, only the diode chip can provide freewheeling current. In this operating condition, the lower IGBT chip in the standard packaged IGBT module's lower bridge is completely inoperable, and the actual current output capacity of the module is entirely limited by the lower diode chip.

[0058] Taking a 1200V 600A standard packaged IGBT module as an example, under rated operating conditions, the duty cycle is 0.3 and the switching frequency is... It is 2kHz.

[0059] Therefore, the duty cycle of an IGBT module can be calculated as follows:

[0060] When the duty cycle is 0.3, the conduction time of the upper bridge IGBT chip in the IGBT module within one working cycle.

[0061] Therefore, within one cycle, the upper-bridge IGBT chip conducts for 150µs, and the lower-bridge diode freewheels for 350µs. In a standard packaged IGBT module, both the upper and lower bridge IGBTs have 600A upper-bridge IGBT chips and upper-bridge diode chips. Under this condition, the lower-bridge IGBT chip will not operate. Thus, the conduction loss of the IGBT module is:

[0062]

[0063] The above formula represents the sum of the conduction losses of the IGBT chip and the conduction losses of the diode chip.

[0064] Where Ts is the duty cycle of the IGBT module, and Ton is the on-time of the IGBT chip in the IGBT module within one duty cycle. This refers to the voltage across the IGBT chip in the IGBT module. This refers to the current flowing through the IGBT chip in the IGBT module. This refers to the voltage across the diode chip in the IGBT module. This refers to the current flowing through the diode chip in the IGBT module.

[0065] The switching loss of the IGBT module is:

[0066]

[0067] in, The power loss of the IGBT chip each time it is turned on. The loss during each turn-off of the IGBT chip, The switching frequency of the IGBT chip. This represents the reverse recovery loss of the diode chip.

[0068] Therefore, the total loss of a standard IGBT module can be calculated as follows: .

[0069] The heat dissipation capacity of any module has an upper limit, which is the total heat loss of any module. Both have upper limits. Under this operating condition, the conduction time of the IGBT chip is only 150us, while the freewheeling time of the diode chip is as long as 350us. Moreover, the forward voltage drop of the diode chip is generally slightly larger than that of the IGBT chip of the same specification. Therefore, it can be determined that the diode chip loss accounts for more than 70% of the conduction loss. The switching loss and reverse recovery loss are related to the current of the device. Under the rated operating condition, the switching current is fixed, and the switching loss and reverse recovery loss cannot be reduced further.

[0070] In this embodiment, the freewheeling current of the MOS chip and the diode chip is split equally by design, thereby reducing the conduction loss of the diode.

[0071]

[0072] As can be seen from the above formula, when the current is reduced to 1 / 2 of the original, the loss can be reduced to 1 / 4 of the original. This can reduce the proportion of conduction loss when the IGBT module is under bridge freewheeling, thereby reducing the overall loss of the module and improving the current output capability of the IGBT module.

[0073] In this configuration, the freewheeling capability of the IGBT module's lower bridge is significantly improved, eliminating IGBT chip waste. Especially with a small duty cycle, the freewheeling time far exceeds the operating time of the upper bridge switching devices, making it even more crucial to enhance the lower bridge's freewheeling capability. This improves the current output capability under such operating conditions, resulting in cost reduction and increased power density.

[0074] Example 8

[0075] Please see Figure 5 and Figure 6 , Figure 5 This is a packaging structure diagram of the newly packaged IGBT module for the chip configuration method of the power semiconductor module according to Embodiment 8 of the present invention. Figure 6 This is a topology diagram of a newly packaged IGBT module for the chip configuration method of a power semiconductor module according to Embodiment 8 of the present invention;

[0076] This embodiment is based on Embodiment Six.

[0077] The IGBT module includes a module package housing 031, four power terminals 030 disposed on the module package housing 031 for connection to external circuits, and an IGBT module upper bridge and an IGBT module lower bridge housed inside the module package housing 031. The IGBT module upper bridge includes three upper bridge MOS chips 032, three upper bridge diode chips 033, and a first DCB substrate 034. All upper bridge MOS chips 032 and upper bridge diode chips 033 are disposed on the first DCB substrate 034. The three upper bridge MOS chips 032 are connected in parallel, the three upper bridge diode chips 033 are connected in parallel, and each upper bridge IGBT chip 032 is connected in anti-parallel with its corresponding upper bridge diode chip 033. The IGBT module lower bridge includes three lower bridge IGBT chips 035, three lower bridge diode chips 036, and a second DCB substrate 037.

[0078] In a standard packaged IGBT module, when the bus voltage is boosted to the load, this boost operation corresponds to the BOOST circuit in a DC-DC converter. When the voltage across the terminals is fixed and the current is continuous, the duty cycle is also fixed. The duty cycle here only affects the lower-bridge IGBT chip of the IGBT module; the upper-bridge IGBT chip only serves as a freewheeling current source. Since IGBT chips cannot conduct in reverse, freewheeling current can only be provided by diode chips. In this operating condition, the upper-bridge IGBT chip in a standard packaged IGBT module is completely inoperable, and the actual current output capacity of the IGBT module is entirely limited by the upper-bridge diode chip.

[0079] Taking a 1200V 800A standard packaged IGBT module as an example, under rated operating conditions, the duty cycle is 0.4 and the switching frequency is 4kHz.

[0080] Therefore, the duty cycle of an IGBT module can be calculated as follows:

[0081] When the duty cycle is 0.4, the conduction time of the lower-bridge IGBT chip in the IGBT module within one duty cycle.

[0082] Therefore, within one cycle, after the lower-bridge IGBT chip conducts for 100µs, the upper-bridge diode chip freewheels for 150µs. In a standard packaged IGBT module, both the upper and lower bridge IGBT chips have 800A upper-bridge IGBT chips and lower-bridge diode chips. Under this condition, the upper-bridge IGBT chip will not work. Thus, the conduction loss of the IGBT module is:

[0083]

[0084] The above formula represents the sum of the conduction losses of the IGBT chip and the conduction losses of the diode chip.

[0085] Where Ts is the duty cycle of the IGBT module, and Ton is the on-time of the IGBT chip in the IGBT module within one duty cycle. This refers to the voltage across the IGBT chip in the IGBT module. This refers to the current flowing through the IGBT chip in the IGBT module. This refers to the voltage across the diode chip in the IGBT module. This refers to the current flowing through the diode chip in the IGBT module.

[0086] The switching loss of the IGBT module is:

[0087]

[0088] in, The power loss of the IGBT chip each time it is turned on. The loss during each turn-off of the IGBT chip, The switching frequency of the IGBT chip. This represents the reverse recovery loss of the diode chip.

[0089] Therefore, the total loss of a standard IGBT module can be calculated as follows: .

[0090] The heat dissipation capacity of any module has an upper limit, which means that the total loss of any IGBT module has an upper limit. Under this condition, the conduction time of the IGBT chip is only 100us, while the freewheeling time of the diode chip can reach 150us. Moreover, the forward voltage drop of the diode chip is generally slightly larger than that of the IGBT chip of the same specification. Therefore, it can be determined that the diode chip loss accounts for more than 60% of the conduction loss. The switching loss and reverse recovery loss are related to the current of the device. Under rated conditions, the switching current is fixed, and the switching loss and reverse recovery loss cannot be reduced further.

[0091] In this embodiment, the freewheeling current of the MOS chip and the diode chip is split equally by design, thereby reducing the conduction loss of the diode.

[0092]

[0093] As can be seen from the above formula, when the current is reduced to 1 / 2 of the original, the loss can be reduced to 1 / 4 of the original. This can reduce the proportion of conduction loss when the IGBT module is under bridge freewheeling, thereby reducing the overall loss of the module and improving the current output capability of the IGBT module.

[0094] In this configuration, the freewheeling capability of the IGBT module on the bridge is significantly improved, eliminating any waste of IGBT chips. Especially when the duty cycle is small, the freewheeling time far exceeds the operating time of the downstream switching devices, making it even more crucial to enhance the freewheeling capability of the upstream module. This improves the current output capability under such operating conditions, resulting in cost reduction and increased power density.

[0095] The chip configuration method of this power semiconductor module, after fully calculating the internal losses of the IGBT module, configures the type and quantity of chips in the upper or lower bridge of the IGBT module according to the loss situation, so as to give full play to the performance of the internal chips of the IGBT module, reduce the useless work of the IGBT chips, reduce costs and improve efficiency.

[0096] It should be understood that the above are merely preferred embodiments of the present invention and should not be construed as limiting the scope of the patent. Any equivalent structural or procedural transformations made based on the description and drawings of the present invention, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of the present invention.

Claims

1. A chip configuration method for a power semiconductor module, characterized in that, A standard packaged IGBT module is provided, comprising an IGBT module upper bridge and an IGBT module lower bridge connected in series with the IGBT module upper bridge, wherein a bus connection point is provided between the IGBT module upper bridge and the IGBT module lower bridge; the method includes the following steps: determining whether the bus-to-load operating condition is a boost operating condition or a buck operating condition, and calculating the IGBT chips included in the IGBT module upper bridge and the IGBT module lower bridge; when the bus-to-load operating condition is a buck operating condition, and the IGBT chips in the IGBT module... If the loss of the IGBT chip is less than the loss of the diode chip in the IGBT module, then the IGBT chip in the lower bridge of the IGBT module is replaced with a MOS chip to form a new packaged IGBT module. The MOS chip is connected in parallel with the diode chip in the lower bridge of the IGBT module. When the bus-to-load operating condition is a boost condition, and the loss of the IGBT chip in the IGBT module is less than the loss of the diode chip in the IGBT module, then the IGBT chip in the upper bridge of the IGBT module is replaced with a MOS chip to form a new packaged IGBT module. The MOS chip is connected in parallel with the diode chip in the upper bridge of the IGBT module.

2. The chip configuration method for a power semiconductor module according to claim 1, characterized in that, The losses of the IGBT module include IGBT chip conduction losses and IGBT chip switching losses; the losses of the diode chip include diode chip conduction losses and diode chip reverse recovery losses.

3. The chip configuration method for a power semiconductor module according to claim 1, characterized in that, In a standard packaged IGBT module, when the bus-to-load operation is in step-down mode, the duty cycle within one working cycle affects the IGBT chip on the upper bridge of the IGBT module, but not the IGBT chip on the lower bridge: the IGBT chip on the lower bridge is not working, and only the diode chip on the lower bridge provides freewheeling current.

4. The chip configuration method for a power semiconductor module according to claim 1, characterized in that, In a standard packaged IGBT module, when the bus-to-load operation is in boost mode, the duty cycle within one working cycle affects the IGBT chip in the lower bridge of the IGBT module, but not the IGBT chip in the upper bridge: the IGBT chip in the upper bridge does not work, and only the diode chip in the upper bridge of the IGBT module provides freewheeling current.

5. The chip configuration method for a power semiconductor module according to claim 1, characterized in that, When the bus-to-load operation is a step-down operation, the newly packaged IGBT module includes a module package housing, an IGBT module upper bridge and an IGBT module lower bridge housed inside the module package housing; the IGBT module upper bridge includes at least two upper bridge IGBT chips connected in parallel, at least two upper bridge diode chips connected in parallel, and a first DCB substrate, all upper bridge IGBT chips and upper bridge diode chips are disposed on the first DCB substrate, and each upper bridge IGBT chip is anti-parallel to its corresponding upper bridge diode chip; the IGBT module lower bridge includes at least two lower bridge MOS chips connected in parallel, at least two lower bridge diode chips connected in parallel, and a second DCB substrate, all lower bridge MOS chips and lower bridge diode chips are disposed on the second DCB substrate, and each lower bridge MOS chip is anti-parallel to its corresponding lower bridge diode chip.

6. The chip configuration method for a power semiconductor module according to claim 1, characterized in that, When the bus-to-load operation is a boost operation, the newly packaged IGBT module includes a module package housing, an IGBT module upper bridge and an IGBT module lower bridge housed inside the module package housing; the IGBT module upper bridge includes at least two parallel upper bridge MOS chips, at least two parallel upper bridge diode chips, and a first DCB substrate, all upper bridge MOS chips and upper bridge diode chips are disposed on the first DCB substrate, and each upper bridge MOS chip is antiparallel to its corresponding upper bridge diode chip; the IGBT module lower bridge includes at least two parallel lower bridge IGBT chips, at least two parallel lower bridge diode chips, and a second DCB substrate, all lower bridge IGBT chips and lower bridge diode chips are disposed on the second DCB substrate, and each lower bridge IGBT chip is antiparallel to its corresponding lower bridge diode chip.

7. The chip configuration method for a power semiconductor module according to claim 2, characterized in that, The conduction loss of the IGBT chip during one cycle is: , Wherein, Ton represents the on-time of the IGBT chip in the IGBT module within one duty cycle. This refers to the voltage across the IGBT chip in the IGBT module. This refers to the current flowing through the IGBT chip in the IGBT module. This refers to the switching frequency of the IGBT module.

8. The chip configuration method for a power semiconductor module according to claim 2, characterized in that, The conduction loss of the diode chip over one cycle is: , in, This refers to the voltage across the diode chip in the IGBT module. This represents the current flowing through the diode chip in the IGBT module, and Ton represents the on-time of the IGBT chip in one duty cycle. The duty cycle of the IGBT module. This refers to the switching frequency of the IGBT module.

9. The chip configuration method for a power semiconductor module according to claim 2, characterized in that, The switching loss of the IGBT chip in one cycle is: , in, The power loss of the IGBT chip each time it is turned on. The loss during each turn-off of the IGBT chip, This refers to the switching frequency of the IGBT module.

10. The chip configuration method for a power semiconductor module according to claim 2, characterized in that, The reverse recovery loss of the diode chip over one cycle is: , in, The switching frequency of the IGBT module. This represents the loss during each reverse recovery of the diode.