A single-phase power factor correction control method based on multiplier voltage regulating input impedance

By adopting a parallel dual-loop control method based on multiplier voltage regulation, the high cost and complexity of traditional boots PFC are solved, achieving low-cost and simplified single-phase power factor correction, improving the safety and reliability of the circuit system, and maintaining constant input impedance.

CN115549463BActive Publication Date: 2026-07-21GUANGDONG TITAN INTELLIGENT POWER CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
GUANGDONG TITAN INTELLIGENT POWER CO LTD
Filing Date
2022-10-24
Publication Date
2026-07-21

AI Technical Summary

Technical Problem

Traditional single-phase power factor correction technology (boots PFC) has high manufacturing costs, complex implementation, high sampling accuracy requirements, difficult loop debugging, requires additional protection circuits, and has unstable input impedance, making it difficult to stably produce in uninterruptible power supplies (UPS) and large household appliances.

Method used

A parallel dual-loop control method based on multiplier voltage regulation is adopted. By sampling the inductor current, output voltage, and input voltage, and combining the multiplier voltage algorithm loop and voltage loop, a drive signal is generated to control the inductor current. An overcurrent protection mechanism is integrated, reducing sampling points and external components, and simplifying the control loop.

Benefits of technology

It reduces manufacturing costs, simplifies the implementation process, improves the safety and reliability of the circuit system, maintains constant input impedance, reduces power factor degradation, and achieves safe power factor correction.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a single-phase power factor correction control method based on a multiplier voltage regulation input impedance, which is low in manufacturing cost, simple in implementation, reduces power factor deterioration, keeps input impedance constant in the whole operation process, and improves safety and reliability of a circuit system. The application is suitable for the field of power electronics.
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Description

Technical Field

[0001] This invention relates to a single-phase power factor correction control method based on multiplier voltage regulating input impedance. Background Technology

[0002] Power factor correction (PFC) is a power electronics technology that corrects distorted current into sinusoidal current and makes it in phase with the voltage, thereby bringing the power factor close to 1. There are various circuit topologies and methods for implementing PFC, and the choice depends on the specific application. One common topology is single-phase power factor correction (boots PFC), frequently used in uninterruptible power supplies (UPS) and large household appliances.

[0003] A typical boots PFC implementation requires five different sampling points (some schemes can simplify this to three, i.e., sampling the voltage and current of the same node simultaneously), not only the AC voltage V before rectification. AC and current I AC Sampling also requires sampling the inductor current. and the rectified input voltage Finally, the output voltage needs to be sampled. .

[0004] Typical boots PFC uses a dual-loop control loop (consisting of an outer voltage loop and an inner current loop). While single-loop voltage control is easy to design and analyze, it has a slow response and lacks current limiting functionality. The current loop, on the other hand, enhances circuit stability, provides a fast response, eliminates low-frequency waves generated in single voltage modes, and limits overcurrent. However, this dual-loop control is relatively complex to implement (either in circuit or software) and is not easy to debug. Its power factor largely depends on the sampling accuracy before rectification, the performance of the multiplier, and the performance of the control loop, making it difficult to adjust to optimal parameters. In large-scale production, achieving stable operation requires extensive process adjustments. Furthermore, functions such as soft-start, undercurrent / overcurrent protection, and overtemperature protection require additional circuitry and programming.

[0005] In summary, traditional boots PFC has the following disadvantages: 1. Traditional boots PFC solutions require a larger number of components, making it difficult to reduce manufacturing costs, and PFC implementation is relatively difficult; 2. Traditional boots PFC solutions require better sampling accuracy and loop performance to reduce power factor degradation, leading to increased costs and difficulties in loop debugging; 3. Traditional boots PFC solutions require additional detection mechanisms to prevent under- or over-voltage phenomena in the circuit. Summary of the Invention

[0006] The technical problem to be solved by the present invention is to overcome the shortcomings of the prior art and provide a single-phase power factor correction control method based on multiplier voltage adjustment of input impedance, which is low in manufacturing cost, easy to implement, reduces power factor degradation, keeps the input impedance constant throughout the operation process, and improves the safety and reliability of the circuit system.

[0007] This invention includes the following steps: A. Acquiring inductor current through a sampling circuit. Output voltage and input voltage Three parameters; B. The inductor current is controlled separately through the control loop. The output voltage and the input voltage Calculations are performed to obtain the inductor current control value. and multiplier voltage ; C. The inductor current control value and the multiplier voltage The summation within the control loop is output to the PWM generation terminal, where a corresponding drive signal is generated.

[0008] The control loop is a parallel dual loop, including a voltage loop and a multiplier voltage algorithm loop.

[0009] The voltage loop passes through the output voltage. The difference between the target output voltage and the output quantity are calculated and adjusted. Simultaneously, phase detection is used to determine the zero-crossing point of the input AC voltage. Finally, this is compared with the inductor current. The inductor current control value, which is related to the inductor current control, is output after calculation. 。

[0010] The multiplier voltage algorithm loop is used for calculating the overcurrent protection voltage. Once the input voltage... It will automatically shut down when the value is outside the specified range; the multiplier voltage algorithm loop can also be based on the compensated inductor current. and control voltage Calculate the voltage of the multiplier .

[0011] The PWM generation terminal sequentially includes a ramp period trigger signal, an integrator, a comparator, and an SR flip-flop. The inductor current control value... With the multiplier voltage After the summation calculation at the end of the control loop is performed and then divided by zero, the result enters the integrator and finally outputs a drive signal through the Q terminal of the SR flip-flop.

[0012] In step B, the inductor current After calculation by the type-II compensator, the data is input to the voltage loop and the multiplier voltage algorithm loop, respectively. The transfer function of the type-II compensator is: , where R z C is the resistance value of the type II compensator. z C is the first capacitance value of the type II compensator. p This is the second capacitance value of the type II compensator.

[0013] In step B, the input voltage The overcurrent protection voltage is obtained after passing through a first-order filter. The overcurrent protection voltage The calculation formula is: , Among them, K B V is the transformation ratio of the overcurrent protection voltage. ac This is the effective value of the AC voltage.

[0014] In step B, the overcurrent protection voltage The control voltage within the multiplier voltage algorithm loop The multiplier voltage is obtained after combined calculation. The control voltage With output voltage The relation is: , Among them, K c To control the voltage conversion ratio, G e (s) represents the open-loop gain of the system.

[0015] The multiplier voltage The calculus formula is as follows: , Among them, I CS Inductor current The value after calculation using the type II compensator, V control (min) represents the minimum control voltage.

[0016] Beneficial effects: This invention minimizes the number of external components and requires fewer sampling points than typical single-phase power factor correction (boots PFC) techniques, reducing costs and greatly simplifying the PFC implementation process. The invention employs a parallel dual-loop control circuit structure, allowing control of the inductor current and AC voltage V without sampling the rectifier front end. AC Same frequency and phase; This invention reduces the degradation of the power factor by the rectified sinusoidal input voltage through the calculation of the multiplier loop, making the input impedance a constant throughout the operation; The control loop in this invention integrates an undervoltage (overvoltage) protection mechanism, improving the safety and reliability of the circuit system; This invention improves the performance of the circuit by designing an effective compensator to suppress the influence of the output voltage ripple on the control loop. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of a traditional and typical boots PFC system; Figure 2 This is a typical control block diagram of a traditional boots PFC system; Figure 3 This is a circuit diagram of the power correction circuit in this invention; Figure 4 This is a control block diagram in this invention; Figure 5 This is a waveform diagram illustrating the PFC modulation principle of this invention; Figure 6 This is the voltage timing diagram of the multiplier of the present invention; Figure 7 This is a full schematic diagram of the waveforms in an embodiment of the present invention; Figure 8 This is an enlarged schematic diagram of the waveform in an embodiment of the present invention. Detailed Implementation

[0018] like Figure 1 , Figure 2 , Figure 3 , Figure 4 , Figure 5 , Figure 6 , Figure 7 , Figure 8 As shown, the present invention includes the following steps: A. Acquiring inductor current through a sampling circuit. Output voltage and input voltage In this specific embodiment, the sampling circuit is a power correction circuit, which takes three parameters. B. The inductor current is controlled separately through the control loop. The output voltage and the input voltage Calculations are performed to obtain the inductor current control value. and multiplier voltage ; C. The inductor current control value and the multiplier voltage The summation within the control loop is output to the PWM generation terminal, where a corresponding drive signal is generated.

[0019] The control loop is a parallel dual loop, including a voltage loop and a multiplier voltage algorithm loop.

[0020] The voltage loop passes through the output voltage. The difference between the target output voltage and the output quantity are calculated and adjusted. Simultaneously, phase detection is used to determine the zero-crossing point of the input AC voltage. Finally, this is compared with the inductor current. The inductor current control value, which is related to the inductor current control, is output after calculation. 。

[0021] The multiplier voltage algorithm loop is used for calculating the overcurrent protection voltage. Once the input voltage... It will automatically shut down when the value is outside the specified range; the multiplier voltage algorithm loop can also be based on the compensated inductor current. and control voltage Calculate the voltage of the multiplier .

[0022] The PWM generation terminal sequentially includes a ramp period trigger signal, an integrator, a comparator, and an SR flip-flop. The inductor current control value... With the multiplier voltage After the summation calculation at the end of the control loop is performed and then divided by zero, the result enters the integrator and finally outputs a drive signal through the Q terminal of the SR flip-flop.

[0023] like Figure 3 As shown, the circuit topology used in this invention is a boots PFC, a single-phase boost PFC topology. The system in this invention is essentially the same as a typical boots PFC system. Adding some auxiliary circuits such as drivers / bootstraps in practical applications does not change its basic principle. Figure 1 and Figure 3 As shown in the comparison, the power correction circuit of the present invention has an additional diode D on the inductor Lm compared to the typical bootsPFC circuit. This is actually to reduce the impact of surge voltage on the capacitor.

[0024] like Figure 4As shown, the hardware solution in the control block diagram of this invention does not require sampling of the parameters before rectification, and can still sample the AC current before rectification. Control is implemented to correct the distorted current into a sinusoidal current and to make it compatible with the AC voltage. They are in phase. Therefore, the number of sampling points is two fewer than in typical methods (some schemes use only one).

[0025] The parameters that need to be sampled in this invention are Output voltage and input voltage The specific implementation method of the sampling circuit does not affect the implementation process of this invention (some low-cost solutions may use inductor current). and input voltage The data is read from the same node using a sampling and conditioning circuit, and then calculated separately using software methods.

[0026] The control process of this invention is described below. The control loop of this invention begins with the inductor current. The input is a type II compensator, which has three control parameters and its transfer function is as follows: .

[0027] This is a typical Type II compensator with a low-frequency zero and a pole. The compensator is used to reduce the output voltage ripple entering the control loop (the ripple frequency in a 50Hz application is 100Hz). Once the frequency values ​​of the zero and pole to be compensated are determined, the values ​​of the three parameters of this Type II compensator can be determined.

[0028] The control loop of this invention is a parallel double-loop design, with the two algorithm loops being additive. One side is a voltage loop, which has two functions: first, to calculate the difference in the target output voltage and adjust the output quantity, which is a common PI circuit; second, to determine the position of the zero-crossing point of the input AC voltage through phase detection, which is achieved through a division process.

[0029] The voltage loop will eventually output a value related to inductor current control. And add it to the output of the multiplier voltage algorithm loop on the other side.

[0030] On the other side is the multiplier voltage algorithm loop, which also has two functions: one is for calculating the overcurrent protection voltage, once the input voltage... It will automatically shut down when the value exceeds (or falls below) the limit. Secondly, it is based on the compensated inductor current. and control voltage The multiplier voltage is calculated using numerical values. The numerical values ​​and their specific calculation relationships are as follows: , in, It is the inductor current. The values ​​calculated using the Type II compensator. It is the overcurrent protection voltage. It controls the voltage conversion ratio. It controls the voltage. It is the minimum control voltage. It controls the voltage conversion ratio.

[0031] Overcurrent protection voltage Input voltage High-frequency components are removed by first-order filtering, and the scaling factor is then changed. The specific calculation relationships obtained are as follows: , The proportion This is the transformation ratio of the overcurrent protection voltage. The specific value depends on the sampling relationship, as shown in the following formula: , Specific proportional sampling values The selection is not very important and will not be elaborated upon.

[0032] and These are the control voltage and the minimum control voltage, used to adjust the range and magnitude of the output power of this invention. They need to be determined based on the rated output power and the adjustment range. The relationship with the output voltage is as follows: , in, It is the open-loop gain of the system. It controls the voltage conversion ratio. This is the rated output voltage, and the following function is the transfer function of the type II compensator.

[0033] Minimum control voltage It is the control voltage under this output power condition. The minimum value can be determined by adjusting the control voltage. After performing Monte Carlo analysis on the equation to traverse the deviation numbers, we find the value under specific conditions, which is generally 0.3-0.75. Under the same output conditions, it is a constant value.

[0034] Overcurrent protection voltage Once the upper limit is exceeded, the multiplier voltage algorithm loop will automatically enter current limiting mode to restrict further increases in current. Conversely, once the lower limit is exceeded, the multiplier voltage algorithm loop will automatically enter undervoltage mode, at which point the output control value will be 0, thus automatically initiating undervoltage protection.

[0035] The multiplier voltage algorithm loop will eventually output a multiplier voltage value that is phase-dependent with the input voltage. And the output of the voltage loop on the other side. Add them together.

[0036] The part following the adder in the control loop is all PWM generation, which generates the corresponding drive signal based on the control parameters. It consists of the following main parts: The ramp periodic trigger signal is a square wave signal source with a high frequency, commonly used in schemes at 65kHz-150kHz, and a duty cycle of 0.1%. Specifically, it is a narrow pulse signal used to trigger integrators and SR flip-flops.

[0037] Integrator, is Figure 4 The ramp generation function, used to produce a ramp value, varies in its specific implementation depending on the method. In analog circuits, it's implemented using an integrator circuit, while in digital schemes, a counter might be used. It features edge-triggered functionality; upon receiving a ramp period trigger signal, it immediately clears the value to control the number of cycles.

[0038] The comparator compares the value Vref with the value of the ramp wave and outputs the corresponding logic level. The determination of the comparison value Vref is related to the design parameters such as rated power and input impedance, and will affect the power factor (PF) and the range of output power. See the derivation of the input impedance later for details.

[0039] An SR flip-flop is a regular SR flip-flop. When R=1 and S=0, the output Q is set to 1; when R=0 and S=1, the output Q is set to 0; and when R=1 and S=1, the output Q remains unchanged. (This avoids the situation where the output Q is unpredictable when R=0 and S=0).

[0040] This invention is applicable to the field of power electronics technology, and is used for controller design and related circuit design in single-phase power factor correction circuits (boots PFC), as well as the PFC process for implementing continuous current mode (CCM).

Claims

1. A single-phase power factor correction control method based on multiplier voltage regulating input impedance, characterized in that: Includes the following steps: A. Acquiring inductor current through a sampling circuit. Output voltage and input voltage Three parameters; B. The inductor current is controlled separately through the control loop. The output voltage and the input voltage Calculations are performed to obtain the inductor current control value. and multiplier voltage ; Overcurrent protection voltage Within the multiplier voltage algorithm loop and the control voltage The multiplier voltage is obtained after combined calculation. The control voltage With output voltage The relation is: , Among them, K c To control the voltage conversion ratio, G e (s) represents the open-loop gain of the system; C. The inductor current control value and the multiplier voltage The summation within the control loop is output to the PWM generation terminal, where a corresponding drive signal is generated. The control loop is a parallel double loop, including a voltage loop and a multiplier voltage algorithm loop; The multiplier voltage algorithm loop is used for calculating the overcurrent protection voltage. Once the input voltage... It will automatically shut down when the value is outside the specified range; the multiplier voltage algorithm loop can also be based on inductor current. Compensated value I cs and control voltage Calculate the voltage of the multiplier ; The multiplier voltage The calculus formula is as follows: , Among them, I CS Inductor current The value after calculation using the type II compensator, V control (min) represents the minimum control voltage.

2. The single-phase power factor correction control method based on multiplier voltage regulating input impedance according to claim 1, characterized in that: The voltage loop passes through the output voltage. The difference between the target output voltage and the output quantity are calculated and adjusted. Simultaneously, phase detection is used to determine the zero-crossing point of the input AC voltage. Finally, this is compared with the inductor current. The inductor current control value, which is related to the inductor current control, is output after calculation. 。 3. The single-phase power factor correction control method based on multiplier voltage regulating input impedance according to claim 2, characterized in that: The PWM generation terminal sequentially includes a ramp period trigger signal, an integrator, a comparator, and an SR flip-flop. The inductor current control value... With the multiplier voltage After the summation calculation at the end of the control loop is performed and then divided by zero, the result enters the integrator and finally outputs a drive signal through the Q terminal of the SR flip-flop.

4. A single-phase power factor correction control method based on multiplier voltage regulating input impedance according to claim 3, characterized in that: In step B, the inductor current After calculation by the type-II compensator, the data is input to the voltage loop and the multiplier voltage algorithm loop, respectively. The transfer function of the type-II compensator is: , where R z C is the resistance value of the type II compensator. z C is the first capacitance value of the type II compensator. p This is the second capacitance value of the type II compensator.

5. The single-phase power factor correction control method based on multiplier voltage regulating input impedance according to claim 4, characterized in that: In step B, the input voltage The overcurrent protection voltage is obtained after passing through a first-order filter. The overcurrent protection voltage The calculation formula is: , Among them, K B V is the transformation ratio of the overcurrent protection voltage. ac This is the effective value of the AC voltage.