A method for manufacturing an embedded substrate structure with a planarized heat spreading layer

Abstract

The application discloses a manufacturing method of an embedded substrate structure with a flat and smooth heat dissipation layer. The method comprises the following steps: pasting components in a frame mouth, pressing a first dielectric layer, laser drilling blind holes on the first dielectric layer, manufacturing a first pattern on the front and back surfaces of the frame, pressing a second dielectric layer, manufacturing blind holes on the second dielectric layer on the back surface of the frame, removing the second dielectric layer on the back surface of the components, filling copper paste or silver paste conductive heat dissipation material on the back surface of the frame, and grinding after sintering and solidification, so that a large-area and flat heat dissipation layer is obtained, the heat dissipation effect and the overall flatness are improved, and a layer-increasing circuit can be arranged on the back surface heat dissipation layer, so that a wiring layer is provided.

Description

Technical Field

[0001] This invention relates to the field of electronic technology, and in particular to a method for fabricating a flat heat dissipation layer embedded substrate structure. Background Technology

[0002] For current embedded device packaging substrates, the main methods for heat dissipation on the back of the chip include: first, directly preparing a heat dissipation layer on the back of the chip using an additive method; second, performing laser drilling to create holes after laminating a dielectric layer on the back of the chip, and preparing heat dissipation channels by electroplating to fill the holes; and third, removing the dielectric layer on the back of the chip using laser or plasma methods, and preparing a heat dissipation layer on the back of the chip by electroplating.

[0003] When there is only one heat dissipation layer on the back of the chip, a relatively flat heat dissipation layer can be obtained. However, when additional circuitry is required on the back of the chip, the presence of the dielectric layer means that although laser-filled vias can produce a flat heat dissipation layer, the heat dissipation effect is poor due to the limitation of the heat dissipation channels. On the other hand, removing the dielectric layer on the back of the chip using laser or plasma methods and then electroplating the heat dissipation layer will result in pits on the back of the chip, making it impossible to achieve an overall flat effect. Summary of the Invention

[0004] To address the aforementioned technical problems, embodiments of the present invention provide a method for fabricating a flat heat dissipation layer embedded substrate structure.

[0005] The technical solution adopted in the embodiments of the present invention is as follows:

[0006] A method for fabricating a flat heat dissipation layer embedded substrate structure includes the following steps:

[0007] A frame is set up, which includes an opening and copper pillars that are connected vertically.

[0008] Components are attached to the frame, and a first dielectric layer is pressed onto the frame and the components, with the back side of the components facing the same direction as the back side of the frame.

[0009] Laser-drilled blind holes on the first dielectric layer;

[0010] The first pattern is created by electroplating on the front and back of the frame;

[0011] A second dielectric layer is laminated onto both sides of the frame on which the first pattern is fabricated.

[0012] Blind holes are formed and electroplated in the second dielectric layer on the front side of the frame;

[0013] A blind hole is made in the second dielectric layer on the back side of the frame and the second dielectric layer on the back side of the component is removed;

[0014] The back of the frame is filled with a conductive heat dissipation material, and the conductive heat dissipation material is sintered and cured. The conductive heat dissipation material is either silver paste or copper paste.

[0015] The conductive heat dissipation material is ground flat until the second dielectric layer is exposed, thus obtaining the heat dissipation layer on the back of the component.

[0016] As an optional implementation, the method further includes:

[0017] A second pattern is created on the side of the heat dissipation layer away from the frame.

[0018] As an optional implementation, after creating blind holes and electroplating them in the second dielectric layer on the front side of the frame, the method further includes:

[0019] A third pattern is formed on the second medium layer on the front side of the frame.

[0020] As an optional implementation, the method further includes:

[0021] A green oil layer is formed on the second and third patterns.

[0022] As an optional implementation, the process of creating a blind hole in the second dielectric layer on the back side of the frame includes:

[0023] Blind holes are created on the second dielectric layer on the back side of the frame using laser or plasma.

[0024] As an optional implementation, the component includes at least one of an integrated circuit, a passive device, and an active device.

[0025] As an optional implementation, the component includes a single chip or multiple chips stacked back to back.

[0026] As an optional implementation, the components include single-sided terminal devices or double-sided terminal devices.

[0027] As an optional implementation, the materials of the first dielectric layer and the second dielectric layer are resin.

[0028] The method for fabricating a flat heat dissipation layer embedded substrate structure according to an embodiment of the present invention involves attaching components to the frame opening and pressing a first dielectric layer, laser-drilling blind holes on the first dielectric layer, fabricating a first pattern on the front and back of the frame and pressing a second dielectric layer, fabricating blind holes on the second dielectric layer on the back of the frame and removing the second dielectric layer at the back position of the components, filling the back of the frame with conductive heat dissipation material such as copper paste or silver paste, and then grinding it after sintering and curing to obtain a large-area and flat heat dissipation layer, which improves the heat dissipation effect and overall flatness. Furthermore, additional circuitry can be set on the back heat dissipation layer to provide a wiring layer. Attached Figure Description

[0029] Figure 1 This is a flowchart illustrating the fabrication method of the embedded substrate structure for the flat heat dissipation layer according to an embodiment of the present invention.

[0030] Figure 2 This is a schematic diagram of the frame structure of the embedded substrate structure of the flat heat dissipation layer in an embodiment of the present invention;

[0031] Figure 3 This is a schematic diagram of the components and the first dielectric layer of the embedded substrate structure of the flat heat dissipation layer in an embodiment of the present invention;

[0032] Figure 4 This is a schematic diagram of the laser blind hole in the first dielectric layer of the embedded substrate structure of the flat heat dissipation layer in an embodiment of the present invention;

[0033] Figure 5 This is a first schematic diagram of the embedded substrate structure of the flat heat dissipation layer according to an embodiment of the present invention;

[0034] Figure 6 This is a schematic diagram of the second dielectric layer of the embedded substrate structure of the flat heat dissipation layer in an embodiment of the present invention;

[0035] Figure 7 This is a schematic diagram of the second dielectric layer processing in the method for fabricating the embedded substrate structure of the flat heat dissipation layer according to an embodiment of the present invention;

[0036] Figure 8 This is a schematic diagram of the conductive heat dissipation material of the embedded substrate structure of the flat heat dissipation layer in an embodiment of the present invention;

[0037] Figure 9 This is a schematic diagram of the heat dissipation layer of the embedded substrate structure of the flat heat dissipation layer in an embodiment of the present invention;

[0038] Figure 10 This is a second schematic diagram of the embedded substrate structure of the flat heat dissipation layer in an embodiment of the present invention;

[0039] Figure 11 This is a third schematic diagram of the embedded substrate structure of the flat heat dissipation layer in an embodiment of the present invention;

[0040] Figure 12 This is a schematic diagram of the green oil layer of the embedded substrate structure of the flat heat dissipation layer in an embodiment of the present invention.

[0041] Reference numerals: 201, frame; 202, copper pillar; 301, component; 302, first dielectric layer; 501, first pattern; 601, second dielectric layer; 801, conductive heat dissipation material; 901, heat dissipation layer; 1001, second pattern; 1101, third pattern; 1201, green oil layer. Detailed Implementation

[0042] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.

[0043] The terms "first," "second," "third," and "fourth," etc., used in the specification, claims, and accompanying drawings of this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or apparatuses.

[0044] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0045] When there is only one heat dissipation layer on the back of the chip, a relatively flat heat dissipation layer can be obtained. However, when additional circuitry is required on the back of the chip, the presence of the dielectric layer means that although laser-filled vias can achieve a flat heat dissipation layer, the heat dissipation effect is poor due to the limitation of the heat dissipation channels. Removing the dielectric layer on the back of the chip using laser or plasma methods followed by electroplating the heat dissipation layer can result in pits on the back of the chip, failing to achieve an overall flat effect. Therefore, this invention proposes a method for fabricating an embedded substrate structure with a flat heat dissipation layer. This involves attaching components to the frame and pressing a first dielectric layer, laser-drilling blind vias on the first dielectric layer, fabricating a first pattern on the front and back of the frame and pressing a second dielectric layer, creating blind vias on the second dielectric layer on the back of the frame and removing the second dielectric layer at the location of the components, filling the back of the frame with conductive heat dissipation material such as copper or silver paste, and then sintering, curing, and grinding to obtain a large-area, flat heat dissipation layer. This improves the heat dissipation effect and overall flatness, and additional circuitry can be set on the back heat dissipation layer, providing a wiring layer.

[0046] like Figure 1 As shown, this embodiment of the invention proposes a method for fabricating a flat heat dissipation layer embedded substrate structure, which includes the following steps S101-S109:

[0047] S101, Set the frame;

[0048] Among them, reference Figure 2 The frame includes a frame 201 and copper pillars 202 that are open at the top and bottom.

[0049] S102. Attach the component 301 to the frame 201 and press the first dielectric layer 302 onto the front side of the frame and the component 301.

[0050] Among them, reference Figure 3 The back of component 301 faces the same direction as the back of the frame.

[0051] Component 301 includes at least one of integrated circuits, passive devices, and active devices. Optionally, in some embodiments, component 301 may be a radio frequency or logic chip, or a capacitor, resistor, inductor, etc.

[0052] In one embodiment of the present invention, component 301 includes a single chip or multiple chips stacked back to back; in another embodiment of the present invention, component 301 includes a single-sided terminal device or a double-sided terminal device, for example, it can be single-sided conductive, or double-sided conductive, or single-sided heat dissipation, etc.

[0053] The material of the first dielectric layer 302 is resin. In the embodiments of the present invention, the first dielectric layer 302 is either ABF or PID.

[0054] S103, Laser blind holes are drilled on the first dielectric layer 302;

[0055] Among them, the laser blind holes on the first dielectric layer 302 are as follows Figure 4 As shown.

[0056] S104. The first graphic 501 is made on the front and back of the frame by electroplating;

[0057] Specifically, refer to Figure 5 In an embodiment of the present invention, a first pattern 501 is formed by electroplating on the laser blind hole of the first dielectric layer 302 on the front side of the frame and on the back side of the frame.

[0058] S105. Press a second dielectric layer 601 onto the two sides of the frame on which the first graphic 501 is fabricated.

[0059] Among them, reference Figure 6 The material of the second dielectric layer 601 is resin. In the embodiments of the present invention, the second dielectric layer 601 is either ABF or PID.

[0060] S106. A blind hole is fabricated and electroplated in the second dielectric layer 601 on the front side of the frame.

[0061] S107. A blind hole is made in the second dielectric layer 601 on the back side of the frame and the second dielectric layer 601 on the back side of the component 301 is removed.

[0062] Among them, reference Figure 7 In an embodiment of the present invention, blind holes are fabricated on the second dielectric layer 601 on the back side of the frame by laser or plasma.

[0063] S108. Fill the back of the frame with conductive heat dissipation material 801 and sinter and solidify the conductive heat dissipation material 801.

[0064] Among them, the conductive heat dissipation material 801 is either silver paste or copper paste.

[0065] S109. Grind the conductive heat dissipation material 801 until the second dielectric layer 601 is exposed to obtain the heat dissipation layer 901 on the back of the component 301.

[0066] Specifically, in this embodiment of the invention, copper paste or silver paste is used as the conductive heat dissipation material 801. After filling the conductive heat dissipation material 801 and sintering and curing, a smooth heat dissipation layer 901 is obtained by grinding. (Refer to...) Figure 9 The heat dissipation layer 901 in this embodiment of the invention has a large area, which improves the heat dissipation effect. At the same time, a wiring layer can be added on the heat dissipation layer 901 to provide a wiring layer. Because the heat dissipation layer 901 in this embodiment of the invention has a large area and is flat, it can balance the overall structure of the embedded substrate structure and improve the warping phenomenon of the finished product.

[0067] The method for fabricating the embedded substrate structure of the flat heat dissipation layer in this embodiment of the invention further includes the following steps:

[0068] Reference Figure 10 A second graphic 1001 is made on the side of the heat dissipation layer 901 away from the frame;

[0069] Reference Figure 11 A third graphic 1101 is fabricated on the second medium layer 601 on the front of the frame;

[0070] Reference Figure 12 A green oil layer 1201 is made on the second pattern 1001 and the third pattern 1101.

[0071] In summary, the method for fabricating the embedded substrate structure of the flat heat dissipation layer according to the embodiments of the present invention involves attaching components to the frame opening and pressing a first dielectric layer, laser-drilling blind holes on the first dielectric layer, fabricating a first pattern on the front and back of the frame and pressing a second dielectric layer, fabricating blind holes on the second dielectric layer on the back of the frame and removing the second dielectric layer at the back position of the components, filling the back of the frame with conductive heat dissipation material such as copper paste or silver paste, and then grinding it after sintering and curing to obtain a large-area and flat heat dissipation layer, which improves the heat dissipation effect and overall flatness. Furthermore, additional circuitry can be set on the back heat dissipation layer, providing a wiring layer.

[0072] The above is a detailed description of the preferred embodiments of the present invention. However, the present invention is not limited to the embodiments described. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present invention. All such equivalent modifications or substitutions are included within the scope defined by the claims of this application.

Claims

1. A method for fabricating a flat heat dissipation layer embedded substrate structure, characterized in that, Includes the following steps: A frame is set up, which includes an opening and copper pillars that are connected vertically. Components are attached to the frame, and a first dielectric layer is pressed onto the front side of the frame and the components, with the back side of the components facing the same direction as the back side of the frame. Laser-drilled blind holes on the first dielectric layer; The first pattern is created by electroplating on the front and back of the frame; A second dielectric layer is laminated onto both sides of the frame on which the first pattern is fabricated. Blind holes are formed and electroplated on the second dielectric layer on the front side of the frame; a third pattern is formed on the second dielectric layer on the front side of the frame. A blind hole is made in the second dielectric layer on the back side of the frame and the second dielectric layer on the back side of the component is removed; Blind holes are created in the second dielectric layer on the back side of the frame by laser or plasma. The back of the frame is filled with a conductive heat dissipation material, and the conductive heat dissipation material is sintered and cured. The conductive heat dissipation material is either silver paste or copper paste. The conductive heat dissipation material is ground flat until the second dielectric layer is exposed, thus obtaining a heat dissipation layer on the back of the component; a large area and a flat heat dissipation layer can be obtained by grinding; a second pattern is formed on the side of the heat dissipation layer away from the frame; The materials of the first dielectric layer and the second dielectric layer are resin.

2. The method for fabricating a flat heat dissipation layer embedded substrate structure according to claim 1, characterized in that, The method further includes: A green oil layer is formed on the second and third patterns.

3. The method for fabricating a flat heat dissipation layer embedded substrate structure according to claim 1, characterized in that, The components include at least one of integrated circuits, passive devices, and active devices.

4. The method for fabricating a flat heat dissipation layer embedded substrate structure according to claim 3, characterized in that, The components include a single chip or multiple chips stacked back to back.

5. The method for fabricating a flat heat dissipation layer embedded substrate structure according to claim 3, characterized in that, The components include single-sided terminal devices or double-sided terminal devices.

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