Hierarchical hybrid quantum architecture for quantum computing applications

Abstract

A quantum system includes a qubit array comprising a plurality of qubits. A bus resonator is coupled between at least one pair of qubits in the qubit array. A switch is coupled between at least one pair of qubits.

Description

Technical Field

[0001] This disclosure generally relates to superconducting devices, and more specifically, to the integration of control logic in quantum arrays. Background Technology

[0002] Superconducting quantum computing is the realization of a quantum computer in superconducting electronic circuits. Quantum computing studies the application of quantum phenomena in information processing and communication. Various models of quantum computing exist, with the most popular models including the concepts of qubits and quantum gates. A qubit is a generalization of a bit having two possible states, but can be in a quantum superposition of both states. A quantum gate is a generalization of logic gates, but describes the transformation that one or more qubits will undergo after a gate is applied to them, given the initial state of one or more qubits.

[0003] Currently, a challenge in scaling quantum processors comprising multiple qubits is controlling the interactions between them. Coupling between superconducting qubits (such as microwave crosstalk) can be mitigated by detuning their center frequencies. Instead of changing the qubits to their coupling constants, effective coupling can be reduced by making the qubit energies non-degenerate. However, as superconducting qubits scale to larger systems, the increasingly dense spectrum of qubit transition frequencies makes suppressing residual coupling more challenging. Furthermore, rearranging the center frequencies of the qubits is not only challenging but can also lead to state leakage. Summary of the Invention

[0004] According to an exemplary embodiment, a quantum system includes a qubit array comprising a plurality of qubits. A bus resonator is coupled between at least one pair of qubits in the qubit array. A switch is coupled between at least one pair of qubits in the qubit array.

[0005] In one embodiment, the switch is integrated with a coupled resonator having a Josephson junction (JJ).

[0006] In one embodiment, the switch includes a gate coupled to an electronic system, which can be regulated by a voltage on the gate.

[0007] In one embodiment, the electronic system is configured to change the inductance based on the voltage on the gate.

[0008] In one embodiment, the gate is configured to adjust the switching between (i) a low-inductance state having a first critical current and (ii) a high-inductance state having a second critical current, wherein the second critical current is lower than the first critical current.

[0009] In one embodiment, the switch has a first state that supports overcurrent and a second state that supports high resistance and does not have overcurrent.

[0010] In one embodiment, the voltage on the gate is operable to change the inductance of JJ.

[0011] In one embodiment, the switch comprises two or more superconductors separated by an electronic system.

[0012] In one embodiment, the electronic system includes graphene.

[0013] In one embodiment, the switch is a voltage-controlled overcurrent switch.

[0014] In one embodiment, for at least one qubit in the qubit array, a switch is coupled between the at least one qubit and the readout resonator of the qubit array.

[0015] In one embodiment, a combination of switches between qubit pairs and between qubits and readout resonators is configured to multiplex individual qubits in the array such that each qubit is controlled individually and independently of the qubit frequency.

[0016] In one embodiment, the qubit array is part of a plurality of qubit arrays in a first layer. Each of the plurality of qubit arrays in the first layer is isolated by one or more switches.

[0017] In one embodiment, there is an asymmetry in the qubit array between at least two of the multiple layers.

[0018] In one embodiment, the quantum system includes multiple layers, each layer having at least one array of qubits separated from adjacent layers by one or more switches.

[0019] In one embodiment, two or more qubits in the qubit array have substantially similar qubit frequencies.

[0020] In one embodiment, multiple layers are stacked on top of each other using a bump-bonding method.

[0021] In one embodiment, at least one qubit in the qubit array is turned off by the at least one switch.

[0022] According to one embodiment, a method of controlling a quantum system includes providing a qubit array having a plurality of qubits. A bus resonator is coupled between each pair of qubits in the qubit array. At least one of the following: (i) at least one pair of qubits in the qubit array is separated by a Josephson junction (JJ) switch, or (ii) at least one qubit in the qubit array is separated from a readout resonator by a second JJ switch.

[0023] In one embodiment, the inductance of the electronic system of the gate of the JJ switch is changed by applying a voltage to the gate of the JJ switch.

[0024] In one embodiment, two or more superconductors are separated by an electronic system of JJ switches.

[0025] In one embodiment, individual qubits are multiplexed by a plurality of switches, including a JJ switch and a second JJ switch in the array, such that each qubit is controlled individually and independently of the qubit frequency.

[0026] In one embodiment, the qubit array is stacked in multiple layers. Each qubit in these multiple layers is individually controlled by multiple switches and is independent of the qubit frequency.

[0027] According to one embodiment, a qubit system includes a qubit array comprising a plurality of qubits. A bus resonator is coupled between each pair of adjacent qubits in the qubit array. At least one of the following: (i) a switch is coupled between each pair of qubits in the qubit array, or (ii) for at least one qubit of the qubit array, a switch is coupled between the at least one qubit and a readout resonator of the qubit array.

[0028] In one embodiment, the switches are integrated with a coupled resonator having a Josephson junction (JJ). Each switch includes a gate coupled to an electronic system that can be regulated by a voltage on the gate. The electronic system is configured to change the inductance of the JJ based on the voltage on the gate.

[0029] In one embodiment, a combination of switches between qubit pairs and between qubits and readout resonators is configured to multiplex individual qubits in the array such that each qubit is controlled individually and independently of the qubit frequency.

[0030] These and other features will become clear from the following detailed description of illustrative embodiments thereof, which will be read in conjunction with the accompanying drawings. Attached Figure Description

[0031] The accompanying drawings are illustrative of embodiments. They do not show all embodiments. Other embodiments may be used additionally or alternatively. Details that may be clear or unnecessary may be omitted to save space or for more efficient description. Some embodiments may be practiced with additional components or steps and / or without all components or steps shown. When the same reference numerals appear in different drawings, they refer to the same or similar components or steps.

[0032] Figure 1 An example architecture for a qubit array is shown.

[0033] Figure 2 This is an example architecture of a qubit array with isolation between the qubits and the corresponding readout resonators, consistent with the illustrative embodiment.

[0034] Figure 3 This is an example architecture of a qubit array with isolation between different types of components, consistent with the illustrative embodiments.

[0035] Figure 4 An example three-dimensional multiplexing architecture consistent with the illustrative embodiments is shown.

[0036] Figure 5 A three-dimensional multiplexing architecture with asymmetry between different layers is shown.

[0037] Figure 6 The illustrated embodiments are consistent with those used for implementation. Figures 2 to 6 An example switch.

[0038] Figure 7 A top view is shown, consistent with the illustrative embodiment, of a switch that can be used to provide an interruption between two qubits and / or between a qubit and a readout resonator.

[0039] Figure 8 This is a side cross-sectional view of a semiconductor structure that can be used as a Josephson junction switch, consistent with the illustrative embodiment.

[0040] Figure 9 This is a side cross-sectional view of a quantum well heterostructure used as a JJ switch, consistent with the illustrative embodiment.

[0041] Figure 10 This is a side cross-sectional view of a Josephson junction switch consistent with the illustrative embodiment, which has an epitaxial superconductor structure on top of the barrier.

[0042] Figure 11 This is a side cross-sectional view of a Josephson junction switch consistent with the illustrative embodiment, wherein the superconducting structure is directly constructed on top of the semiconductor substrate.

[0043] Figure 12 A side cross-sectional view of a Josephson junction switch is provided, which has a graphene layer between two superconducting structures, the graphene layer being deposited on an insulating substrate. Detailed Implementation

[0044] Overview

[0045] In the following detailed description, numerous specific details are illustrated by way of example to provide a thorough understanding of the relevant teachings. However, it should be clear that this teaching can be practiced without such details. In other cases, well-known methods, processes, components, and / or circuits have been described at a relatively high level without detail to avoid unnecessarily obscuring aspects of this teaching.

[0046] This disclosure generally relates to superconducting devices, and more specifically to the integration of control logic within and between quantum arrays. The electromagnetic energy associated with a qubit can be stored in a so-called Josephson junction (JJ) and in capacitive and inductive elements used to form the qubit. In one example, to read out the qubit state, a microwave signal is applied to a microwave readout cavity coupled to the qubit at a cavity frequency (sometimes referred to herein as the qubit frequency). The transmitted (or reflected) microwave signal passes through multiple thermally isolated stages and a low-noise amplifier for blocking or reducing noise and improving the signal-to-noise ratio. The amplitude and / or phase of the returned / output microwave signal carry information about the qubit state, such as whether the qubit has phase-shifted to the ground or excited state. The microwave signal carrying quantum information about the qubit state is typically weak (e.g., on the order of a few microwave photons). To measure this weak signal, low-noise quantum-limited amplifiers (QLAs) (such as Josephson amplifiers and traveling-wave parametric amplifiers (TWPAs)) can be used as preamplifiers (i.e., the first amplification stage) at the output of a quantum system to amplify the quantum signal while adding a minimum amount of noise dictated by quantum mechanics to improve the signal-to-noise ratio of the output chain. In addition to Josephson amplifiers, certain Josephson microwave components using Josephson amplifiers or Josephson mixers (such as Josephson circulators, Josephson isolators, and Josephson mixers) can also be used in scalable quantum processors.

[0047] The ability to include more qubits is significant for realizing the potential of quantum computers. To increase the computational power and reliability of quantum computers, improvements are needed along two main dimensions. First, is the qubit count itself. The more qubits in a quantum processor, the more states can be manipulated and stored in principle. Second, is a low error rate, which relates to accurately manipulating qubit states and performing sequential operations that provide consistent results rather than unreliable data. Therefore, to improve the fault tolerance of quantum computers, a large number of physical qubits should be used to store logical qubits. In this way, local information is delocalized, making the quantum computer less susceptible to local errors and the performance of measurements in the eigenbase of the qubits, similar to parity checking in classical computers, thus advancing to more fault-tolerant qubits.

[0048] In principle, quantum error-correcting codes enable reliable large-scale quantum computing. Codes such as surface codes are currently advantageous because they can be implemented in a two-dimensional array of qubits, where each of these qubits is constrained to interact only with its neighbors. This constraint means that each logical qubit is encoded into a patch of physical qubits, the diameter of which must increase with increasing error-correcting capability. In this case, hundreds or thousands of physical qubits can be used for each logical qubit. In one embodiment, the proposed architecture relaxes this constraint and allows a small number of physically distant qubits to interact. In such systems, where the interactions are described by a graph of small constant degrees, more efficient families of quantum error-correcting codes can be achieved. For example, quantum extender codes can encode many logical qubits into the same block of high-speed code so that the overhead can asymptotically approach a small constant.

[0049] Now for reference Figure 1 It illustrates an example architecture for a qubit array. For example, qubit array 100 could be based on a surface code architecture, which would... Figure 1 The qubits, represented by circles, are placed on a planar two-dimensional (2D) grid (sometimes referred to herein as a lattice). By way of example only and not limitation, the qubit array is a 3×3 lattice of 9 qubits arranged in a lattice, while it will be understood that other sizes and configurations are also supported in the teachings of this paper. Each of the qubits 102(1) through 102(9) communicates using a coplanar waveguide (CPW) resonator, sometimes referred to herein as a bus resonator. Figure 1 The solid lines represent the pairs of qubits. Each pair of qubits (e.g., 116) is coupled together via capacitive coupling. These bus resonators can be used, for example, to entangle two or more qubits (such as qubit pair 116).

[0050] Quantum bit states are used in Figure 1 The readings are measured using the resonant readout lines (sometimes referred to herein as readout resonators), indicated by dashed lines. In one embodiment, the readout resonator is a CPW. These readout resonators are used to determine the state of the corresponding qubit.

[0051] As previously mentioned, it would be beneficial for each qubit 102(1) to 102(9) in the lattice to have a different qubit frequency in order to maintain the signal integrity of each qubit. For example, qubit 102(1) could have a qubit frequency of 5 GHz, qubit 102(2) could have a qubit frequency of 5.5 GHz, qubit 102(3) could have a qubit frequency of 5.7 GHz, and so on. In this way, the non-entangled state of each individual qubit can be easily achieved, and frequency collisions can be avoided between qubits (e.g., qubit 116). Without different qubit frequencies, microwave crosstalk between two qubits (e.g., qubit pair 116) may suffer from frequency collisions and lead to low performance of the quantum computer. However, current manufacturing processes may not be able to achieve sufficient control over the qubit frequencies of each individual qubit 102(1) to 102(9) in the qubit array 100.

[0052] Therefore, this paper teaches the provision of isolation between qubits while accommodating qubits in a qubit array with substantially similar qubit frequencies, thereby reducing the sensitivity to semiconductor process capabilities in controlling qubit frequencies. Qubits in the array can be decoupled from each other, thus providing significantly reduced microwave crosstalk while avoiding frequency conflicts. With this teaching, qubits in the array can remain unentangled even with substantially similar qubit frequencies. Furthermore, the coherence time of the qubits is improved.

[0053] Example Hybrid Quantum Architecture

[0054] Figure 2 This is an example architecture 200 of a qubit array having isolation between the qubits and their corresponding readout resonators, consistent with the illustrative embodiment. Architecture 200 has the same characteristics as... Figure 1 The features discussed in the architecture are similar to those in the previous discussion, so for the sake of brevity, they will not be repeated here. This is merely an example and not a limitation. Figure 2 The qubit arrays 202(1) to 202(9) are lattices comprising nine interconnected qubits. Each qubit is coupled together via a bus resonator represented by solid lines. Figure 1 compared to, Figure 2 The architecture 200 includes switches (e.g., 208(1) to 208(4)) located between the readout lines (sometimes referred to as readout resonators in this document) represented by dashed lines and the corresponding qubits (e.g., 202(1) to 202(9)).

[0055] For example, to access qubit 202(1), switch 208(1) can be activated by an appropriate signal (e.g., a predetermined voltage), while the remaining switches 208(2) to 208(9) are not activated. In this way, a single readout line can be used to access all qubits in the array via the corresponding switch, thereby mitigating microwave crosstalk, even if the qubit frequencies are substantially similar in one or more qubits in the qubit array. In one embodiment, there is a readout resonator (not shown) for the central qubit 202(5), which can be accessed, for example, using a bump bonding technique. Thus, some readout resonators (such as the central qubit 202(5) readout resonator) can reside substantially on separate layers.

[0056] See now Figure 3 This is an example architecture 300, consistent with the illustrative embodiment, of a qubit array having isolation between different types of components. Architecture 300 has the same characteristics as in... Figure 1 and Figure 2 The features discussed in the context are similar to those discussed elsewhere, and therefore will not be repeated here for the sake of brevity. Architecture 300 includes switches between pairs of qubits, in Figure 3 The qubits are represented as hollow squares 302(1) to 302(12). For example, qubits 202(1) and 202(2) are separated by switch 302(1). Although architecture 300 is depicted as having JJ switches (i.e., solid black squares) between the readout resonator and the qubits, in various embodiments, JJ switches 302(1) to 302(12) may also be located in an architecture without JJ switches between the readout resonator and the qubits 202(1) to 202(9). In some embodiments, the switches between qubits (302(1) to 302(12)) and / or the switches between the qubits and the readout resonator (i.e., in the hollow squares) are hollow squares 302(1) to 302(12). Figure 3 The qubit (represented by a solid black square in the diagram) is a Josephson junction (JJ). The combination of switches in architecture 300 provides multiplexing of the corresponding qubits 202(1) to 202(9). For example, the input / output (I / O) lines can be split and divided into many I / O lines, thereby creating a tree structure. Switches can turn access to various lines on or off, thus enabling or disabling control of the qubits. Thus, through multiplexing, a combination of switches can be used to excite a specific qubit without any interference from adjacent qubits, even if the qubits have substantially similar qubit frequencies.

[0057] The teachings in this paper are not limited to two-dimensional configurations. In fact, the quantum architectures discussed in this paper can also be applied to multi-layer architectures. Figure 4 An example three-dimensional (3D) multiplexing architecture 400 consistent with the illustrative embodiment is shown. Figure 4In the example, symmetry exists not only within each array of layers but also between layers. For instance, each layer can comprise multiple arrays of qubits, such as... Figure 4 Layer 1 contains 401(1) to 401(3). Each qubit array may include switches (e.g., JJ) between readout resonators and / or between qubits. Each of the qubit arrays 401(1) to 401(3) is placed in a row and spaced equally from each other. Essentially similar symmetry layers are... Figure 4 The qubit arrays are stacked on top of each other on layers 2 and 3. In some embodiments, separate patches may exist for each qubit array, or all qubit arrays may be connected together by switches for full multiplexing (not shown). With the help of the teachings herein, symmetric 3D qubit arrays with multiplexed readouts can be realized while protecting each qubit and between qubits from external noise, even if at least some of the qubits have substantially similar qubit frequencies.

[0058] It should be noted that in various embodiments, symmetry is not required within or between layers. In this respect, Figure 5 A non-symmetric 3D multiplexing architecture 500 is illustrated between different layers. For example, each layer can have an independent arrangement and / or a different number of qubit arrays, as shown in... Figure 5 The diagram shows the relationship between layers 1 and 2. Layer 1 has two qubit arrays 501(1) and 501(2), while layer 2 has three qubit arrays 502(1), 502(2), and 502(3). Additionally, as shown... Figure 5 As shown in the qubit arrays 503(1) to 503(3) of layer 3, the qubit arrays on the common layer do not even need to be symmetric. Furthermore, although each qubit array 501(1) to 503(3) is shown to have a common lattice (e.g., 3×3), the lattices can be different between layers or even within layers. Thus, this paper teaches support for multi-layer qubit architectures that are asymmetric not only between layers but also within each layer. In one embodiment, multi-layer qubit arrays are stacked using a bump-bonded manner.

[0059] Architectures 200 to 500 provide increased coherence time (e.g., the lifetime of quantum states) even if the qubit frequencies of one or more qubits are substantially similar. Furthermore, qubits with unwanted transition frequencies can be shut down using a multiplexing architecture provided by switches placed at strategically chosen locations as discussed herein, thereby avoiding crosstalk emanating from them. In one example, a faulty or simply unwanted qubit can be shut down using a combination of switches discussed herein.

[0060] Example switch

[0061] Figure 6 The illustrated embodiments are consistent with those used for implementation. Figures 2 to 6 An example switch. For example, in Figure 2 In this context, switch 600 can be used to implement switches 208(1) to 208(8). According to another example, in... Figure 3 In this context, switch 600 can be used to implement switches 302(1) to 302(12). Figure 6 The switch 600 is in the form of a gate voltage-controlled switch integrated with a coupled resonator. Switch 600 includes a gate 606 overlapping two superconducting structures 608 and 610. When an appropriate voltage is applied to the gate 606, a gate-adjustable electronics system 604 creates a path between the two superconducting structures 608 and 610. In one embodiment, switch 600 is a Josephson junction (JJ) comprising two or more superconductors (e.g., 608 and 610) coupled via a weak link provided by the gate-adjustable electronics system 604. In various configurations, the weak link of the gate-adjustable electronics system 604 may include a short portion (SNS) of a non-superconducting metal, or a physical contraction (SsS) that weakens superconductivity at the contact point. In one embodiment, switch 600 has an adjustable Josephson inductance, thereby providing an adjustable JJ.

[0062] Now for reference Figure 7 It shows a top view of the switch 700 with additional details, consistent with the illustrative embodiment. Figure 7 In the example, switch 700 includes a gate 710 overlapping with two superconducting structures 712 and 714. Switch 700 may be a JJ substantially surrounded by a ground plane 702. Structure 704 represents a top view of a portion of a coplanar waveguide bus. The coplanar waveguide includes a ground plane and a center conductor. Figure 7 The waveguide shown includes a JJ switch. Figure 7 In the example, the gate-adjustable electronic system, outlined by dashed line 704, forms a 'T' shape, the purpose of which is to use a portion of the electronic system as a connection to ground. In various embodiments, a notch in the ground plane is not strictly necessary, and other geometries can be used. The notch is used to indicate the portion of the electronic system forming a contact to ground. Each superconducting structure 712 and 714 leads to the corresponding qubit.

[0063] Therefore, a portion of the gate-adjustable electronic system 704 in the gate portion 710 (e.g., semiconductor, graphene, etc.) interrupts the superconducting resonator circuitry at a critical location to form a switch. In various embodiments, the critical location may include between qubit pairs and / or between a qubit and a readout resonator. For example, the voltage applied to the (e.g., metal) gate 710 regulates the JJ switch between a low-inductance state with a high (≈1-10 μA) critical current and a high-inductance state with a low (≈10 nA) critical current.

[0064] The switch described in this paper has a fast switching time through adjustable strong ZZ coupling. By way of example only and not limitation, a switching time of 1 ns can be achieved using a switch with a resistance of about 1 Kohm and a capacitance of 1 pF.

[0065] In one embodiment, the switch discussed herein is a voltage-controlled overcurrent switch. In contrast, flux-controlled switches rely on current. The use of current can lead to additional crosstalk on the qubit chip, additional thermal load on the cryostat, and / or potentially significant additional overhead in terms of the structures (such as wire coils) required to generate the flux. By using a voltage-controlled overcurrent switch, these problems associated with flux-based methods can be avoided.

[0066] The foregoing explanation of the switch's prominent location and top view may facilitate a higher-level discussion of an example cross-section of the switch. For this purpose, Figures 8 to 12 Different side-view cross-sectional views of various example switches that can be used to implement the JJ switch discussed in this article are provided. More specifically, Figure 8 This is a side cross-sectional view of a semiconductor structure that can be used as a JJ switch, consistent with the illustrative embodiment. The semiconductor structure 800 includes an insulating substrate 802. A semiconductor 820 is present, separating two superconductors deposited on the insulating substrate 802. In one embodiment, the semiconductor 820 (sometimes referred to herein as an electronic system) is indium arsenide (InAs).

[0067] Figure 9 This is a side cross-sectional view of a quantum well heterostructure used as a JJ switch, consistent with the illustrative embodiment. In one embodiment, the semiconductor structure 900 includes a quantum well 920 made of InAs and barriers 910 and 930 made of InGaAs. Barrier 910 separates two superconducting structures deposited on top of the quantum well 920. By using the quantum well 920, higher mobility can be achieved, enabling the transfer of more electrons between these superconducting elements. In other embodiments, other semiconductors can be used. For example, the semiconductor structure may be made of a germanium (Ge) layer 920 sandwiched between barriers 910 and 930 comprising germanium-silicon (SiGe).

[0068] Figure 10 This is a side cross-sectional view of a JJ switch consistent with the illustrative embodiment, which has an epitaxial superconductor structure 1040 on top of a barrier 1010. A first barrier layer 1030 is present. A quantum well 1020 is constructed on top of the barrier layer 1010. Two epitaxial superconductor segments 1040 are present, separated by an insulator 1050.

[0069] In one embodiment, the quantum well 1020 of the semiconductor structure 1000 is made of InAs, and the barriers 1030, 1030 are made of InGaAs. A barrier 910 separates the two superconducting structures deposited on top of the quantum well 920. For example, the semiconductor quantum well layer 1020 may be made of germanium (Ge), and the barriers 1010, 1030 may comprise silicon germanium (SiGe).

[0070] See now Figure 11 , Figure 11 This is a side cross-sectional view of a JJ switch 1100 consistent with the illustrative embodiment, wherein the superconducting structure 1110 is directly constructed on top of the semiconductor substrate 1130. For example, such a JJ switch 1100 can be implemented to simplify and reduce the cost of semiconductor processes in manufacturing the switch. In one embodiment, a graphene layer can be used to further enhance the performance of the JJ switch. Figure 12 A side cross-sectional view of a JJ switch is provided, which has a graphene layer 1210 between two superconductor structures 1220, the graphene layer 1210 being deposited on an insulating substrate 1230.

[0071] in conclusion

[0072] Various embodiments of this teaching have been described for illustrative purposes, but are not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein has been chosen to best explain the principles of the embodiments, their practical application, or technical improvements relative to technologies found in the market, or to enable those skilled in the art to understand the embodiments disclosed herein.

[0073] While the foregoing has described what is considered the best state and / or other examples, it should be understood that various modifications may be made therein, and the subject matter disclosed herein may be implemented in various forms and examples, and this teaching is applicable to many applications, only some of which are described herein. The appended claims are intended to claim protection for any and all applications, modifications, and variations that fall within the true scope of this teaching.

[0074] The components, steps, features, purposes, benefits, and advantages discussed herein are illustrative only. They, and the discussions associated with them, are not intended to limit the scope of protection. While various advantages have been discussed herein, it will be understood that not all embodiments are necessarily intended to include all advantages. Unless otherwise stated, all measurements, values, ratings, positions, amplitudes, dimensions, and other specifications set forth in this specification (including in the following claims) are approximate and not precise. They are intended to have a reasonable range of functionality associated with them and consistent with functionality customary in the art to which they pertain.

[0075] Many other embodiments are also conceived. These include embodiments with fewer, additional, and / or different components, steps, features, purposes, benefits, and advantages. These also include embodiments in which components and / or steps are arranged and / or ordered differently.

[0076] Although the foregoing has been described in conjunction with exemplary embodiments, it should be understood that the term "exemplary" means only as an example, and not as best or optimal. Nothing else stated or described above is intended or should be construed as causing any contribution or public equivalent of any component, step, feature, purpose, benefit, advantage, or feature, whether or not it is recited in the claims.

[0077] It should be understood that the terms and expressions used herein have their general meanings as assigned to the corresponding queries and fields of study, unless otherwise specified herein. Relational terms such as "first" and "second" may be used merely to distinguish one entity or action from another, without necessarily requiring or implying any actual such relationship or order between these entities or actions. The terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but may also include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element beginning with "a" or "an" does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes that element.

[0078] This abstract of the disclosure is provided to allow the reader to quickly determine the nature of the technical disclosure. It is submitted with the understanding that it is not intended to interpret or limit the scope or meaning of the claims. Furthermore, as can be seen from the above detailed description, various features are combined in various embodiments for the purpose of simplification. The method of this disclosure should not be construed as reflecting an intention to have more features than expressly recited in each claim of the claimed embodiments. Rather, as reflected in the following claims, the inventive subject matter lies in fewer than all features of a single disclosed embodiment. Therefore, the following claims are hereby incorporated into the detailed description, wherein each claim is independently claimed as a separate subject matter.

Claims

1. A quantum system, comprising: A qubit array that includes multiple qubits; A bus resonator, said bus resonator being coupled between at least one pair of qubits in the plurality of qubits in the qubit array; as well as A switch, said switch being coupled between the at least one pair of qubits, wherein: The switch includes a gate coupled to an electronic system, the electronic system being adjustable by a voltage on the gate, and The switch comprises two superconductors separated by the electronic system, with their distant ends coupled to the at least one pair of qubits, and a gate overlapping the proximal ends of the two superconductors, wherein the electronic system is configured to generate a link coupling between the two superconductors in response to a voltage on the gate, wherein: The switch includes a coupled resonator with a Josephson junction (JJ), and The switch is integrated with the bus resonator.

2. The quantum system according to claim 1, wherein, The electronic system is configured to change the inductance based on the voltage on the gate.

3. The quantum system according to claim 1, wherein, The gate is configured to regulate the electronic system between (i) a low-inductance state with a first critical current and (ii) a high-inductance state with a second critical current, wherein the second critical current is lower than the first critical current.

4. The quantum system according to any one of claims 1 to 3, wherein: The switch has a first state that supports overcurrent; and The switch has a second state that supports high resistance and does not have overcurrent.

5. The quantum system according to any one of claims 1 to 3, wherein, The voltage on the gate is configured to change the inductance of the JJ.

6. The quantum system according to any one of claims 1 to 3, wherein, The switch comprises three or more superconductors separated by the electronic system.

7. The quantum system according to any one of claims 1 to 3, wherein, The electronic system includes graphene.

8. The quantum system according to any one of claims 1 to 3, wherein, The switch is a voltage-controlled overcurrent switch.

9. The quantum system according to any one of claims 1 to 3, wherein the quantum system further comprises a second switch coupled between the at least one qubit in the qubit array and a readout resonator of the qubit array for at least one qubit.

10. The quantum system according to claim 9, wherein, Combinations of switches between given pairs of qubits and between qubits and readout resonators are configured to multiplex individual qubits in the qubit array, such that each qubit in the qubit array is controlled individually and independently of the qubit frequency.

11. The quantum system according to any one of claims 1 to 3, wherein: The qubit array is part of a plurality of qubit arrays in the first layer; and Each of the plurality of qubit arrays in the first layer is isolated by one or more additional switches.

12. The quantum system according to claim 11, wherein, There is an asymmetry in the qubit array between at least two of the multiple layers.

13. The quantum system according to claim 11, wherein, The quantum system comprises multiple layers, each layer having at least one array of qubits separated from adjacent layers by one or more additional switches.

14. The quantum system according to any one of claims 1 to 3, wherein, Two or more qubits in the qubit array have substantially similar qubit frequencies.

15. The quantum system according to claim 11, wherein, The first and second layers are stacked on top of each other by means of bumps.

16. A method for controlling a quantum system, comprising: Provides a qubit array with multiple qubits; A bus resonator is coupled between each pair of qubits in the qubit array; At least one of the following: At least one pair of qubits in the qubit array is separated by a first Josephson junction JJ switch, and a first electronic system coupled to the first gate of the first JJ switch is used to create a link coupling between the first pair of superconductors separated by the first electronic system, wherein the far ends of the first pair of superconductors are respectively coupled to the at least one pair of qubits, and the first gate overlaps with the near ends of the first pair of superconductors, or At least one qubit in the qubit array is separated from the readout resonator by a second JJ switch, and a second electronic system coupled to the second gate of the second JJ switch is used to create a link coupling between the second pair of superconductors separated by the second electronic system by applying a voltage, wherein the far ends of the second pair of superconductors are coupled to the at least one qubit and the readout resonator respectively, and the second gate overlaps with the near ends of the second pair of superconductors.

17. The method of claim 16, further comprising changing the inductance of the first electronic system by applying a voltage to the first gate of the first JJ switch.

18. The method according to any one of claims 16 to 17, further comprising separating three or more superconductors via a first electronic system of the first JJ switch.

19. The method according to any one of claims 16 to 17, further comprising multiplexing individual qubits in the qubit array by means of a plurality of switches, the plurality of switches including a first JJ switch and a second JJ switch in the qubit array, such that each qubit in the qubit array is individually controlled and independent of the qubit frequency.

20. The method according to any one of claims 16 to 17, further comprising: Stack multiple qubit arrays on multiple layers; as well as Each qubit in the multiple layers is controlled individually through multiple switches, independent of the qubit frequency.

21. A quantum system comprising: A qubit array that includes multiple qubits; A bus resonator, which is coupled between each pair of adjacent qubits in the qubit array; as well as At least one of the following: The switch is coupled between each pair of qubits in the qubit array; or For at least one qubit in the qubit array, the switching between the at least one qubit and the readout resonator of the qubit array, wherein: Each switch includes a gate coupled to an electronic system, the electronic system being adjustable by a voltage on the gate; and Each switch comprises two superconductors separated by the electronic system, the distant ends of the two superconductors respectively coupled to the at least one pair of qubits or respectively coupled to the at least one qubit and the readout resonator, and the gate overlaps with the close ends of the two superconductors, wherein the electronic system is configured to generate a link coupling between the two superconductors in response to the voltage on the gate, wherein: The switch is integrated with a coupled resonator having a Josephson junction (JJ).

22. The quantum system according to claim 21, wherein: The electronic system is configured to change the inductance of JJ based on the voltage on the gate.

23. The quantum system according to any one of claims 21 to 22, wherein, Combinations of switches between given pairs of qubits and between qubits and readout resonators are configured to multiplex individual qubits in the qubit array such that each qubit in the qubit array is controlled individually, independent of the qubit frequency.

Images