Balance board circuit control method, device, electronic equipment and readable storage medium
Patent Information
- Application Number
- CN202211119992.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-09-14
- Publication Date
- 2026-09-01
- Estimated Expiration
- 2042-09-14
AI Technical Summary
[0003]本申请提供了一种平衡板电路控制方法、装置、电子设备及可读存储介质,旨在解决现有技术中平衡板出现偏压的技术问题
[0036]本申请提出的一种平衡板电路控制方法、装置、电子设备及可读存储介质,其中,平衡板电路控制方法包括:获取平衡板电路的采样平衡板电流,并根据所述采样平衡板电流得到平衡板电流偏差;将所述平衡板电流偏差输入到准PR控制器,得到前馈参数;以及,根据所述前馈参数生成控制信号,并将所述控制信号发送至所述平衡板电路。本申请通过对平衡板电流进行采集,使得能够通过得到的平衡板电流偏差来反映正母线电压与负母线电压之间的偏压情况,并通过准PR控制器基于平衡板电流偏差对控制信号进行矫正以使得得到的控制信号能够使得正母线电压与负母线电压平衡,同时准PR控制器对交流信号跟踪效果较佳,因此,能够进一步提高控制信号的有效性。
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Figure CN115562413B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of circuit control, and more particularly to a method, apparatus, electronic device, and readable storage medium for controlling a balance plate circuit. Background Technology
[0002] The existing balance board control mode controls the positive and negative bus voltages by controlling the upper and lower IGBT thyristors. Theoretically, the neutral current is 0. However, in practical applications, the neutral current is not 0 due to the imbalance of the three-phase currents, which causes the positive and negative bus voltages to be biased, affecting the normal operation of the circuit. Summary of the Invention
[0003] This application provides a method, apparatus, electronic device, and readable storage medium for controlling a balance plate circuit, aiming to solve the technical problem of bias voltage in the balance plate in the prior art.
[0004] To solve the above-mentioned technical problems, or at least partially solve them, this application provides a method for controlling a balanced board circuit, the method comprising the following steps:
[0005] Obtain the sampled balance plate current of the balance plate circuit, and obtain the balance plate current deviation based on the sampled balance plate current;
[0006] The current deviation of the balance plate is input to the quasi-PR controller to obtain the feedforward parameters;
[0007] A control signal is generated based on the feedforward parameters, and the control signal is sent to the balance plate circuit.
[0008] Optionally, the step of obtaining the balance plate current deviation based on the sampled balance plate current includes:
[0009] Obtain the given balance plate current;
[0010] The difference between the given balance plate current and the sampled balance plate current is taken as the balance plate current deviation.
[0011] Optionally, the step of obtaining a given balancing plate current includes:
[0012] Obtain the three-phase current values, positive bus voltage, and negative bus voltage;
[0013] Determine the neutral current based on the three-phase current values;
[0014] The given balance plate current is obtained based on the neutral current, the positive bus voltage, and the negative bus voltage.
[0015] Optionally, the step of obtaining the given balance plate current based on the neutral current, the positive bus voltage, and the negative bus voltage includes:
[0016] Determine whether the neutral current is greater than 0 or less than 0;
[0017] If the neutral current is greater than 0, then the ratio of the product of the neutral current and the negative bus voltage to the positive bus voltage is taken as the given balance plate current.
[0018] If the neutral current is less than 0, the ratio of the product of the neutral current and the positive bus voltage to the negative bus voltage is taken as the given balance plate current.
[0019] Optionally, the step of generating a control signal based on the feedforward parameters includes:
[0020] The average positive voltage of the positive bus voltage and the average negative voltage of the negative bus voltage are obtained within a preset period, and the difference between the average positive voltage and the average negative voltage is taken as the average voltage deviation.
[0021] The average voltage deviation is input to the PI controller to obtain stable parameters;
[0022] The control signal is generated based on the stability parameters and the feedforward parameters.
[0023] Optionally, the step of generating the control signal based on the stability parameter and the feedforward parameter includes:
[0024] The duty cycle is obtained by standardizing the sum of the stability parameter and the feedforward parameter;
[0025] The control signal is generated based on the duty cycle.
[0026] Optionally, the step of generating a control signal based on the feedforward parameters and sending the control signal to the balance plate circuit includes:
[0027] The first duty cycle of the first switch transistor and the second duty cycle of the second switch transistor in the balance plate circuit are determined based on the feedforward parameters.
[0028] A first control signal is generated based on the first duty cycle, and a second control signal is generated based on the second duty cycle;
[0029] The first control signal is sent to the first switching transistor, and the second control signal is sent to the second switching transistor.
[0030] To achieve the above objectives, this application also provides a balance plate circuit control device, the balance plate circuit control device comprising:
[0031] The first acquisition module is used to acquire the sampled balance plate current of the balance plate circuit, and to obtain the balance plate current deviation based on the sampled balance plate current.
[0032] The first execution module is used to input the current deviation of the balance plate into the quasi-PR controller to obtain feedforward parameters;
[0033] The first generation module is used to generate a control signal based on the feedforward parameters and send the control signal to the balance plate circuit.
[0034] To achieve the above objectives, this application also provides an electronic device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the computer program is executed by the processor, it implements the steps of the balance plate circuit control method as described above.
[0035] To achieve the above objectives, this application also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the balance plate circuit control method described above.
[0036] This application discloses a method, apparatus, electronic device, and readable storage medium for controlling a balance plate circuit. The method includes: acquiring a sampled balance plate current of the balance plate circuit and obtaining a balance plate current deviation based on the sampled balance plate current; inputting the balance plate current deviation to a quasi-PR controller to obtain feedforward parameters; and generating a control signal based on the feedforward parameters and sending the control signal to the balance plate circuit. This application, by acquiring the balance plate current, enables the obtained balance plate current deviation to reflect the bias between the positive and negative bus voltages. The quasi-PR controller corrects the control signal based on the balance plate current deviation, ensuring that the obtained control signal balances the positive and negative bus voltages. Furthermore, the quasi-PR controller has better AC signal tracking performance, thus further improving the effectiveness of the control signal. Attached Figure Description
[0037] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.
[0038] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0039] Figure 1 This is a flowchart illustrating the first embodiment of the balance board circuit control method of this application;
[0040] Figure 2 This is a basic structural diagram of the balance plate circuit in the balance plate circuit control method of this application;
[0041] Figure 3 This is a schematic diagram of the overall process of the balance board circuit control method of this application;
[0042] Figure 4 This is a control block diagram of the balance board circuit control method of this application;
[0043] Figure 5 This is a schematic diagram of the module structure of the electronic device of this application. Detailed Implementation
[0044] It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit this application. To enable those skilled in the art to better understand the solutions of this application, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this application.
[0045] This application provides a method for controlling a balance board circuit, referring to... Figure 1 , Figure 1 This is a flowchart illustrating the first embodiment of the balanced plate circuit control method of this application. The method includes the following steps:
[0046] Step S10: Obtain the sampled balance plate current of the balance plate circuit, and obtain the balance plate current deviation based on the sampled balance plate current.
[0047] This application relates to a balance plate circuit control device, which is connected to the balance plate circuit; the balance plate circuit is used in an AC / DC converter circuit. See the basic structural diagram of the balance plate circuit in this embodiment. Figure 2 The balanced plate circuit includes a first switching transistor Q1, a second switching transistor Q2, and an inductor L1. The first capacitor C1 and the second capacitor C2 are the DC-side capacitors of the inverter circuit (the specific inverter circuit is not shown in the figure).
[0048] The input terminal of the first switch Q1 is connected to the positive terminal of the first capacitor C1, which is connected to the DC positive bus of the inverter circuit. The negative terminal of the first capacitor C1 is connected to the neutral line N of the three-phase power supply. The output terminal of the first switch Q1 is connected to the input terminal of the second switch Q2 and the first terminal of the inductor L1. The output terminal of the second switch Q2 is connected to the negative terminal of the second capacitor C2, which is connected to the DC negative bus of the inverter circuit. The positive terminal of the second capacitor C2 is connected to the neutral line N of the three-phase power supply. The second terminal of the inductor L1 is connected to the neutral line N of the three-phase power supply. The control terminals of the first switch Q1 and the second switch Q2 are connected to the output terminal of the balance plate circuit control device (not shown).
[0049] Where A, B, and C represent three-phase power supplies.
[0050] In this embodiment, the switching transistor is an IGBT, but MOSFETs or other switching devices can also be used depending on actual needs.
[0051] It should be noted that the above only illustrates the basic structure of the balanced board circuit. Based on this, the circuit structure can be adjusted according to actual needs. The following will all refer to... Figure 2 The structure is explained.
[0052] Generally, when the three-phase currents are balanced, the neutral current is 0, and there is no bias voltage. However, when there is an overall DC component in the three-phase current, the neutral current will not be 0, resulting in a bias voltage phenomenon. Bias voltage refers to the problem that the positive bus voltage (i.e., the voltage of the first capacitor) and the negative bus voltage (i.e., the voltage of the second capacitor) are not equal.
[0053] In terms of control, the first switch Q1 and the second switch Q2 are not turned on at the same time. When the first switch Q1 is turned on, energy is transferred from the positive bus voltage to the negative bus voltage. When the second switch Q2 is turned on, energy is transferred from the negative bus voltage to the positive bus voltage.
[0054] To achieve bus voltage balance, the control logic of the balancing plate circuit is as follows:
[0055] When the neutral current is positive, its direction is from left to right. At this time, the negative bus voltage drops, and by turning on the first switch Q1, energy is transferred from the positive bus voltage to the negative bus voltage, achieving bus voltage balance. According to the law of conservation of energy, at this time:
[0056] V busn ×Curr_N=V busp ×Curr_IBL
[0057] Among them, V busn The negative bus voltage, V buspCurr_N is the positive bus voltage, Curr_N is the neutral current, and Curr_IBL is the balance plate current; the balance plate current is the given balance plate current.
[0058] When the neutral current is negative, its direction is from right to left. At this time, the positive bus voltage drops, and by turning on the second switch Q2, energy is transferred from the negative bus voltage to the positive bus voltage, achieving bus voltage balance. According to the law of conservation of energy, at this time:
[0059] V busp ×Curr_N=V busn ×Curr_IBL
[0060] As can be seen from the above control logic, there is a certain correlation between the balance plate current and the neutral wire current. Therefore, the bias voltage can be controlled by controlling the balance plate current.
[0061] See below for further details. Figure 3 Step S10 includes the following steps:
[0062] Step S11: Obtain the given balance plate current;
[0063] Step S12: The difference between the given balance plate current and the sampled balance plate current is taken as the balance plate current deviation.
[0064] Given a target balance plate current, the sampled balance plate current is the real-time current of inductor L1. The balance plate current deviation is used to characterize the difference between the sampled balance plate current and the target balance plate current. It should be noted that the sampled balance plate current can be obtained by setting appropriate sampling devices, such as current sensors, or by calculating using other circuit parameters.
[0065] Step S20: Input the current deviation of the balance plate into the quasi-PR controller to obtain the feedforward parameters;
[0066] The neutral current consists of a current with a fundamental frequency of 150Hz. In practical applications, the currents at 150Hz and 300Hz are the main components. Traditional proportional-integral (PI) controllers are not good at tracking AC quantities, while quasi-proportional resonant (PR) controllers can increase the open-loop gain, increase control accuracy, and reduce the steady-state error of the system. The feedforward parameters obtained by the quasi-PR controller can have a strong tracking performance for the current deviation of the balance plate.
[0067] In this embodiment, the transfer function of the quasi-PR controller is:
[0068]
[0069] Where Kp1 is the first proportionality coefficient, Kr is the resonance coefficient, Wc is the frequency band, Wo is the resonant angular velocity, and s is the Laplace transform.
[0070] Step S30: Generate a control signal based on the feedforward parameters and send the control signal to the balance plate circuit.
[0071] Since the feedforward parameters obtained through the quasi-PR controller have strong tracking performance for the current deviation of the balance plate, the positive and negative bus voltages can be accurately stabilized under the control of the control signal generated based on the feedforward parameters, so as to eliminate the bias problem.
[0072] This embodiment collects the current of the balance plate, enabling the current deviation to reflect the bias between the positive and negative bus voltages. A quasi-PR controller corrects the control signal based on the balance plate current deviation, ensuring voltage stability between the positive and negative bus voltages under grid-connected charging, discharging, and off-grid half-wave load conditions, thus avoiding bias problems. Furthermore, the quasi-PR controller has excellent AC signal tracking performance, further improving the effectiveness of the control signal and ensuring stable system operation.
[0073] Furthermore, in the second embodiment of the balanced board circuit control method proposed in the first embodiment of this application, step S11 includes the following steps:
[0074] Step S111: Obtain the three-phase current values, positive bus voltage, and negative bus voltage;
[0075] Step S112: Determine the neutral current based on the three-phase current values;
[0076] Step S113: Obtain the given balance plate current based on the neutral current, positive bus voltage, and negative bus voltage.
[0077] According to the three-phase electrical principle, the neutral current is the sum of the three-phase currents, specifically:
[0078] Curr_N = -(I a +I b +I c )
[0079] Where Curr_N is the neutral current, I a I b I c Each is a phase current.
[0080] Furthermore, as can be seen from the aforementioned analysis, there is a correlation between the neutral current, the balance plate current, the positive bus voltage, and the negative bus voltage. Therefore, the ideal balance plate current, i.e., the given balance plate current, can be obtained from the neutral current, the positive bus voltage, and the negative bus voltage.
[0081] It is understandable that the three-phase current value, positive bus voltage, and negative bus voltage can be obtained by setting corresponding detection devices, such as voltage sensors and current sensors.
[0082] Further, step S113 includes the following steps:
[0083] Step S1131: Determine whether the neutral wire current is greater than 0 or less than 0;
[0084] Step S1132: If the neutral current is greater than 0, then the ratio of the product of the neutral current and the negative bus voltage to the positive bus voltage is taken as the given balance plate current.
[0085] Step S1133: If the neutral current is less than 0, then the ratio of the product of the neutral current and the positive bus voltage to the negative bus voltage is taken as the given balance plate current.
[0086] From the aforementioned control logic, the current model of the balanced plate circuit can be obtained as follows:
[0087] When Curr_N>0, turn on the first switching transistor Q1 and set the balance plate current (using a scalar):
[0088] Curr IBL =V busn *Curr N / V busp
[0089] When Curr_N<0, turn on the second switch Q2 and set the balance plate current (scalar value):
[0090] Curr IBL =V busp *Curr N / V busn
[0091] Based on the current model of the balance plate described above, we can obtain the calculation method for a given balance plate current under different directions of the neutral current.
[0092] This embodiment can accurately obtain a given balance plate current.
[0093] Furthermore, in the third embodiment of the balanced board circuit control method proposed in the first embodiment of this application, step S30 includes the following steps:
[0094] Step S31: Obtain the average positive voltage of the positive bus voltage and the average negative voltage of the negative bus voltage within a preset period, and use the difference between the average positive voltage and the average negative voltage as the average voltage deviation.
[0095] Step S32: Input the average voltage deviation into the PI controller to obtain stable parameters;
[0096] Step S33: Generate the control signal based on the stability parameter and the feedforward parameter.
[0097] See Figure 4 When controlling the balance plate circuit based on the balance plate current, static errors can occur due to sampling accuracy or leakage current, thus affecting the control accuracy. In this embodiment, the average voltage deviation between the positive and negative bus voltages is obtained within a preset period, and a proportional-integral (PI) controller is used to track the average voltage deviation to obtain a stable parameter. This stable parameter eliminates static errors and improves the control accuracy of the control signal. The specific value of the preset period can be set according to the actual application scenario; in this embodiment, the preset period is 20ms.
[0098] In this embodiment, the transfer function of the PI controller is:
[0099]
[0100] Where Kp2 is the second proportional coefficient and Ki is the integral coefficient.
[0101] After obtaining the stable parameters, the control signal is generated by combining the stable parameters with the feedforward parameters.
[0102] Further, step S33 includes the following steps:
[0103] Step S331: Standardize the sum of the stable parameter and the feedforward parameter to obtain the duty cycle;
[0104] Step S332: Generate the control signal according to the duty cycle.
[0105] The sum of the stability parameter and the feedforward parameter constitutes the specific control parameter. Since the duty cycle ranges from 0 to 1, the control parameter needs to be standardized to this range, i.e., the duty cycle is obtained through standardization. Specifically, standardization is as follows:
[0106]
[0107] Where D is the duty cycle, P is the sum of the stability parameter and the feedforward parameter, and k is the normalization coefficient. The specific value of k is set according to the bias voltage tolerance of the actual circuit. For example, if the maximum allowable bias voltage of the actual circuit is 50V, then k = 50.
[0108] After obtaining the duty cycle, a control signal is generated based on the duty cycle and sent to the balance plate circuit.
[0109] This embodiment can accurately obtain the duty cycle, and then generate a control signal based on the duty cycle.
[0110] Furthermore, in the fourth embodiment of the balanced board circuit control method proposed in the first embodiment of this application, step S30 includes the following steps:
[0111] Step S34: Determine the first duty cycle of the first switch Q1 and the second duty cycle of the second switch Q2 of the balance plate circuit according to the feedforward parameters.
[0112] Step S35: Generate a first control signal based on the first duty cycle, and generate a second control signal based on the second duty cycle.
[0113] Step S36: Send the first control signal to the first switch Q1 and send the second control signal to the second switch Q2.
[0114] Depend on Figure 2 It can be seen that the balancing board circuit balances the positive bus voltage and the negative bus voltage by controlling the on / off state of the first switch Q1 and the second switch Q2. Therefore, the control signal for the balancing board circuit is used to control the first switch Q1 and the second switch Q2. Specifically, the signal controlling the on / off state of the first switch Q1 is the first control signal, and the signal controlling the on / off state of the second switch Q2 is the second control signal. It can be understood that the first switch Q1 and the second switch Q2 maintain one on and one off at the same time, so the sum of the duty cycles of the first switch Q1 and the second switch Q2 is 1. In practical applications, the first duty cycle or the second duty cycle is determined by the feedforward parameter. Whether the feedforward parameter directly affects the first duty cycle or the second duty cycle can be set according to the actual application needs. Taking the example where the feedforward parameter directly affects the first duty cycle, after obtaining the first duty cycle, the difference between 1 and the first duty cycle is taken as the second duty cycle. Then, the first control signal is generated based on the first duty cycle, and the second control signal is generated based on the second duty cycle.
[0115] It is understood that the scheme for generating control signals based on stability parameters and feedforward parameters in the foregoing embodiments can be implemented with reference to this embodiment, and will not be described again here.
[0116] This embodiment can generate control signals based on actual application circuits.
[0117] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this application. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to this application.
[0118] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of this application.
[0119] This application also provides a balance plate circuit control device for implementing the above-described balance plate circuit control method, the balance plate circuit control device comprising:
[0120] The first acquisition module is used to acquire the sampled balance plate current of the balance plate circuit, and to obtain the balance plate current deviation based on the sampled balance plate current.
[0121] The first execution module is used to input the current deviation of the balance plate into the quasi-PR controller to obtain feedforward parameters;
[0122] The first generation module is used to generate a control signal based on the feedforward parameters and send the control signal to the balance plate circuit.
[0123] This balance plate circuit control device collects the balance plate current, enabling it to reflect the bias between the positive and negative bus voltages through the obtained balance plate current deviation. The quasi-PR controller corrects the control signal based on the balance plate current deviation, ensuring that the control signal balances the positive and negative bus voltages. Furthermore, the quasi-PR controller has excellent AC signal tracking performance, thus further improving the effectiveness of the control signal.
[0124] It should be noted that the first acquisition module in this embodiment can be used to execute step S10 in this application embodiment, the first execution module in this embodiment can be used to execute step S20 in this application embodiment, and the first generation module in this embodiment can be used to execute step S30 in this application embodiment.
[0125] Furthermore, the first acquisition module includes:
[0126] The first acquisition submodule is used to acquire the given balance plate current;
[0127] The first execution submodule is used to take the difference between the given balance plate current and the sampled balance plate current as the balance plate current deviation.
[0128] Furthermore, the first acquisition submodule includes:
[0129] The first acquisition unit is used to acquire the three-phase current value, positive bus voltage, and negative bus voltage;
[0130] The first determining unit is used to determine the neutral current based on the three-phase current values;
[0131] The first execution unit is used to obtain the given balance plate current based on the neutral line current, the positive bus voltage, and the negative bus voltage.
[0132] Furthermore, the first execution unit includes:
[0133] The first judgment subunit is used to determine whether the neutral wire current is greater than 0 or less than 0;
[0134] The first execution subunit is configured to, if the neutral line current is greater than 0, use the ratio of the product of the neutral line current and the negative bus voltage to the positive bus voltage as the given balance plate current.
[0135] The second execution subunit is used to take the ratio of the product of the neutral line current and the positive bus voltage to the negative bus voltage as the given balance plate current if the neutral line current is less than 0.
[0136] Furthermore, the first generation module includes:
[0137] The second acquisition submodule is used to acquire the average positive voltage of the positive bus voltage and the average negative voltage of the negative bus voltage within a preset period, and to use the difference between the average positive voltage and the average negative voltage as the average voltage deviation.
[0138] The second execution submodule is used to input the average voltage deviation into the PI controller to obtain stable parameters;
[0139] The first generation submodule is used to generate the control signal based on the stability parameters and the feedforward parameters.
[0140] Furthermore, the first generation submodule is configured to include:
[0141] The second execution unit is used to standardize the sum of the stable parameter and the feedforward parameter to obtain the duty cycle;
[0142] The first generation unit is used to generate the control signal according to the duty cycle.
[0143] Furthermore, the first generation module includes:
[0144] The first determining submodule is used to determine the first duty cycle of the first switch transistor and the second duty cycle of the second switch transistor of the balance plate circuit according to the feedforward parameters.
[0145] The second generation submodule is used to generate a first control signal according to the first duty cycle and a second control signal according to the second duty cycle;
[0146] The first transmitting submodule is used to transmit the first control signal to the first switching transistor and the second control signal to the second switching transistor.
[0147] It should be noted that the examples and application scenarios implemented by the above modules and corresponding steps are the same, but are not limited to the content disclosed in the above embodiments. It should also be noted that the above modules, as part of the device, can be implemented in software or hardware, wherein the hardware environment includes a network environment.
[0148] Reference Figure 5 In terms of hardware structure, the electronic device may include components such as a communication module 10, a memory 20, and a processor 30. In the electronic device, the processor 30 is connected to both the memory 20 and the communication module 10. The memory 20 stores a computer program, which is executed by the processor 30. When the computer program is executed, it implements the steps of the above-described method embodiments.
[0149] The communication module 10 can connect to external communication devices via a network. The communication module 10 can receive requests from the external communication devices and can also send requests, instructions, and information to the external communication devices. The external communication devices can be other electronic devices, servers, or IoT devices, such as televisions, etc.
[0150] The memory 20 can be used to store software programs and various data. The memory 20 may primarily include a program storage area and a data storage area. The program storage area may store the operating system, at least one application program required for a function (such as obtaining the sampled balance plate current of the balance plate circuit), etc.; the data storage area may include a database, and may store data or information created based on system usage. Furthermore, the memory 20 may include high-speed random access memory, and may also include non-volatile memory, such as at least one disk storage device, flash memory device, or other volatile solid-state storage device.
[0151] The processor 30 is the control center of the electronic device. It connects various parts of the electronic device via various interfaces and lines. By running or executing software programs and / or modules stored in the memory 20, and by calling data stored in the memory 20, it performs various functions and processes data, thereby providing overall monitoring of the electronic device. The processor 30 may include one or more processing units; optionally, the processor 30 may integrate an application processor and a modem processor. The application processor mainly handles the operating system, user interface, and applications, while the modem processor mainly handles wireless communication. It is understood that the modem processor may not be integrated into the processor 30.
[0152] although Figure 5 Not shown, but the above electronic device may also include a circuit control module for connecting to a power supply to ensure the normal operation of other components. Those skilled in the art will understand that... Figure 5 The electronic device structure shown does not constitute a limitation on the electronic device and may include more or fewer components than shown, or combine certain components, or have different component arrangements.
[0153] This application also proposes a computer-readable storage medium having a computer program stored thereon. The computer-readable storage medium may be... Figure 5 The memory 20 in the electronic device may also be at least one of ROM (Read-Only Memory) / RAM (Random Access Memory), magnetic disk, optical disk, etc. The computer-readable storage medium includes several instructions to cause a terminal device with a processor (which may be a television, automobile, mobile phone, computer, server, terminal, or network device, etc.) to execute the methods described in the various embodiments of this application.
[0154] In this application, the terms "first," "second," "third," "fourth," and "fifth" are used for descriptive purposes only and should not be construed as indicating or implying relative importance. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.
[0155] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.
[0156] Although embodiments of this application have been shown and described above, the scope of protection of this application is not limited thereto. It is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, and substitutions to the above embodiments within the scope of this application, and such changes, modifications, and substitutions should all be covered within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A method for controlling a balanced plate circuit, characterized in that, The method includes: The method involves obtaining a sampled balance board current of a balance board circuit and calculating the balance board current deviation based on the sampled balance board current. The step of calculating the balance board current deviation based on the sampled balance board current includes: obtaining a given balance board current and using the difference between the given balance board current and the sampled balance board current as the balance board current deviation. The step of obtaining the given balance board current includes: obtaining three-phase current values, positive bus voltage, and negative bus voltage; determining the neutral current based on the three-phase current values; and obtaining the given balance board current based on the neutral current, positive bus voltage, and negative bus voltage. The step of obtaining the given balance board current based on the neutral current, positive bus voltage, and negative bus voltage includes: Determine whether the neutral current is greater than 0 or less than 0; If the neutral current is greater than 0, then the ratio of the product of the neutral current and the negative bus voltage to the positive bus voltage is taken as the given balance plate current. If the neutral current is less than 0, the ratio of the product of the neutral current and the positive bus voltage to the negative bus voltage is taken as the given balance plate current. The current deviation of the balance plate is input to the quasi-PR controller to obtain the feedforward parameters; A control signal is generated based on the feedforward parameters, and the control signal is sent to the balance plate circuit.
2. The balance plate circuit control method as described in claim 1, characterized in that, The step of generating a control signal based on the feedforward parameters includes: The average positive voltage of the positive bus voltage and the average negative voltage of the negative bus voltage are obtained within a preset period, and the difference between the average positive voltage and the average negative voltage is taken as the average voltage deviation. The average voltage deviation is input to the PI controller to obtain stable parameters; The control signal is generated based on the stability parameters and the feedforward parameters.
3. The balance plate circuit control method as described in claim 2, characterized in that, The step of generating the control signal based on the stability parameter and the feedforward parameter includes: The duty cycle is obtained by standardizing the sum of the stability parameter and the feedforward parameter; The control signal is generated based on the duty cycle.
4. The balance plate circuit control method as described in claim 1, characterized in that, The step of generating a control signal based on the feedforward parameters and sending the control signal to the balance plate circuit includes: The first duty cycle of the first switch transistor and the second duty cycle of the second switch transistor in the balance plate circuit are determined based on the feedforward parameters. A first control signal is generated based on the first duty cycle, and a second control signal is generated based on the second duty cycle; The first control signal is sent to the first switching transistor, and the second control signal is sent to the second switching transistor.
5. A balance board circuit control device, characterized in that, The balance plate circuit control device includes: The first acquisition module is used to acquire the sampled balance board current of the balance board circuit and obtain the balance board current deviation based on the sampled balance board current; wherein, obtaining the balance board current deviation based on the sampled balance board current includes: acquiring a given balance board current, and using the difference between the given balance board current and the sampled balance board current as the balance board current deviation; acquiring the given balance board current includes: acquiring three-phase current values, positive bus voltage, and negative bus voltage; determining the neutral current based on the three-phase current values; obtaining the given balance board current based on the neutral current, positive bus voltage, and negative bus voltage, wherein obtaining the given balance board current based on the neutral current, positive bus voltage, and negative bus voltage includes: Determine whether the neutral current is greater than 0 or less than 0; If the neutral current is greater than 0, then the ratio of the product of the neutral current and the negative bus voltage to the positive bus voltage is taken as the given balance plate current. If the neutral current is less than 0, the ratio of the product of the neutral current and the positive bus voltage to the negative bus voltage is taken as the given balance plate current. The first execution module is used to input the current deviation of the balance plate into the quasi-PR controller to obtain feedforward parameters; The first generation module is used to generate a control signal based on the feedforward parameters and send the control signal to the balance plate circuit.
6. An electronic device, characterized in that, The electronic device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program, when executed by the processor, implements the steps of the balance plate circuit control method as described in any one of claims 1 to 4.
7. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the balance plate circuit control method as described in any one of claims 1 to 4.
Citation Information
Patent Citations
Bus balance bridge voltage-sharing control method and device
CN112271909A