A low power fast transient response LDO circuit

Abstract

The application relates to the technical field of integrated circuits, and discloses a low-power fast transient response LDO circuit, a low-power large-swing rate error amplification circuit module, a dynamic transient detection sub-threshold swing rate enhancement circuit module, an LDO bias circuit module and an operational amplifier bias circuit module, the low-power large-swing rate error amplification circuit module comprises a low-power large-swing rate error amplification circuit module input end, the dynamic transient detection sub-threshold swing rate enhancement circuit module comprises a dynamic transient detection swing rate enhancement circuit, a dynamic transient ripple detection circuit bias input end, a sub-threshold swing rate enhancement circuit SW1 and a sub-threshold swing rate enhancement circuit SW2, and the dynamic transient detection swing rate enhancement circuit comprises a dynamic transient detection circuit input end. The low-power fast transient response LDO circuit, the operational amplifier utilizes a cross-coupling structure to realize high gain under single-stage operational amplification, utilizes a differential FVF structure to realize large-swing rate current under a transient process, and improves the voltage stabilizing performance and transient response of the LDO.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, specifically to a low-power, fast transient response (LDO) circuit. Background Technology

[0002] With the rapid development and increasing demand for mixed-signal (MS / ADC) chips, extremely high requirements have been placed on key performance indicators such as low power consumption, high integration, and fast transient response in power management. Low-dropout (LDO) linear regulators (LDOs) are widely used in power management systems of various MS / ADC chips due to their advantages such as low complexity, low cost, and strong ripple suppression capability. MS / ADC chips place extremely high demands on the transient response of LDOs. Traditional designs often achieve fast transient response by using large external capacitors or increasing the input circuit current to broaden the bandwidth. These methods reduce circuit integration and stability, and increase circuit power consumption.

[0003] The purpose of this invention is to provide a low-power, fast transient response LDO circuit, which features low power consumption and fast transient response. Summary of the Invention

[0004] The purpose of this invention is to provide a low-power, fast transient response LDO circuit to solve the problems mentioned in the background art.

[0005] To achieve the above objectives, the present invention provides the following technical solution: a low-power fast transient response (LDO) circuit, comprising a low-power large slew rate error amplifier circuit module, a dynamic transient detection subthreshold slew rate enhancement circuit module, an LDO bias circuit module, and an operational amplifier bias circuit module. The low-power large slew rate error amplifier circuit module includes an input terminal. The dynamic transient detection subthreshold slew rate enhancement circuit module includes a dynamic transient detection slew rate enhancement circuit, a dynamic transient ripple detection circuit bias input terminal, a subthreshold slew rate enhancement circuit SW1, and a subthreshold slew rate enhancement circuit SW2. The dynamic transient detection slew rate enhancement circuit includes a dynamic transient detection circuit input terminal. The LDO bias circuit module includes an LDO bias generation circuit input terminal and an output terminal V. BIAS1 and output terminal V BIAS2 .

[0006] The low-power, high-slew rate error amplifier circuit module includes a non-inverting input and an inverting input. The non-inverting input of the low-power, high-slew rate error amplifier circuit module is connected to the LDO output voltage V. OUT The inverting input of the low-power, high-slew-rate error amplifier circuit module is connected to the reference voltage, and the dynamic bias input is connected to the output I of the operational amplifier bias circuit module. DYThe output of the low-power, high-slew rate error amplifier circuit is connected to the gate of the LDO power transistor; the input of the dynamic transient detection circuit in the dynamic transient detection slew rate enhancement circuit is connected to the LDO output voltage V. OUT A dynamic transient ripple detection circuit is proposed to control the subthreshold slew rate enhancement switching transistor of the power transistor gate, so as to realize rapid ripple detection and power transistor slew rate enhancement under transient conditions.

[0007] Preferably, the low-power high-slew rate error amplifier circuit receives the output ripple from the LDO output voltage and converts the output ripple into a dynamic slew rate current, which is used to charge and discharge the LDO power transistor to improve the LDO transient response.

[0008] Preferably, the dynamic transient detection subthreshold slew rate enhancement circuit receives the ripple voltage from the LDO output and amplifies and shapes the ripple voltage. The processed signal is applied to the subthreshold slew rate enhancement circuit connected to the gate of the power transistor. This circuit will therefore be turned on in transient situations, improving the transient response capability of the LDO. The LDO bias generation circuit provides bias for the LDO. The operational amplifier uses a cross-coupling structure to achieve high gain in a single-stage operational amplifier and uses a differential FVF structure to achieve a large slew rate current in transient processes, improving the voltage regulation performance and transient response of the LDO.

[0009] Preferably, the operational amplifier bias circuit module generates a signal to turn on the dynamic bias of the operational amplifier, further increasing the LDO slew rate current and improving the LDO transient response. Without transient ripple triggering, the module consumes only a weak static current, achieving low power consumption.

[0010] Preferably, the dynamic transient detection circuit has two input terminals, and the two output terminals of the dynamic transient detection circuit are respectively connected to the subthreshold slew rate enhancement circuit SW1 and the subthreshold slew rate enhancement circuit SW2.

[0011] Preferably, the input terminal of the LDO bias generation circuit is connected to the reference voltage V. ref The input terminal of the LDO bias generation circuit is connected to the output terminal V. BIAS1 Output terminal V BIAS2 It is connected to the bias input of the dynamic transient ripple detection circuit.

[0012] Compared with the prior art, the present invention provides a low-power, fast transient response LDO circuit, which has the following advantages:

[0013] 1. This low-power fast transient response LDO circuit utilizes a cross-coupling structure to achieve high gain in a single-stage operational amplifier and a differential FVF structure to achieve a large slew rate current during transient processes, thereby improving the voltage regulation performance and transient response of the LDO.

[0014] 2. This low-power fast transient response LDO circuit proposes a dynamic transient ripple detection circuit to control the subthreshold slew rate enhancement switching transistor of the power transistor gate, thereby realizing fast ripple detection and power transistor slew rate enhancement under transient conditions. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort:

[0016] Figure 1 This is the overall circuit integration diagram of the present invention;

[0017] Figure 2 This is a diagram of the low-power, high-slew rate operational amplifier module of the present invention;

[0018] Figure 3 This is a schematic diagram of the LDO bias generation circuit module of the present invention. Detailed Implementation

[0019] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0020] Please see Figure 1-3 This invention provides a technical solution: a low-power fast transient response (LDO) circuit, comprising a low-power large slew rate error amplifier module, a dynamic transient detection subthreshold slew rate enhancement circuit module, an LDO bias circuit module, and an operational amplifier bias circuit module. The low-power large slew rate error amplifier module includes an input terminal. The dynamic transient detection subthreshold slew rate enhancement circuit module includes a dynamic transient detection slew rate enhancement circuit, a dynamic transient ripple detection circuit bias input terminal, a subthreshold slew rate enhancement circuit SW1, and a subthreshold slew rate enhancement circuit SW2. The dynamic transient detection slew rate enhancement circuit includes a dynamic transient detection circuit input terminal. The LDO bias circuit module includes an LDO bias generation circuit input terminal and an output terminal V. BIAS1 and output terminal V BIAS2 .

[0021] The low-power, high-slew rate error amplifier circuit module has an input terminal including a non-inverting terminal and an inverting terminal. The non-inverting terminal of the low-power, high-slew rate error amplifier circuit module is connected to the LDO output voltage V. OUTThe inverting input of the low-power, high-slew-rate error amplifier circuit module is connected to the reference voltage, and the dynamic bias input is connected to the output I of the operational amplifier bias circuit module. DY The output of the low-power, high-slew rate error amplifier circuit is connected to the gate of the LDO power transistor; the input of the dynamic transient detection circuit in the dynamic transient detection slew rate enhancement circuit is connected to the LDO output voltage V. OUT A dynamic transient ripple detection circuit is proposed to control the subthreshold slew rate enhancement switch of the power transistor gate, achieving rapid ripple detection and power transistor slew rate enhancement under transient conditions. A low-power, high-slew rate error amplifier circuit receives the output ripple from the LDO output voltage and converts it into a dynamic slew rate current. This dynamic slew rate current is used to charge and discharge the LDO power transistor, improving the LDO's transient response. The dynamic transient detection subthreshold slew rate enhancement circuit receives the ripple voltage from the LDO output terminal and amplifies and shapes it. The processed signal is then applied to the subthreshold slew rate enhancement circuit connected to the power transistor gate, causing this circuit to conduct under transient conditions, thus improving the LDO's transient response capability. The LDO bias generation circuit provides bias to the LDO. The operational amplifier (op-amp) utilizes a cross-coupling structure to achieve high gain in a single-stage op-amp and a differential FVF structure to achieve a large slew rate current during transient processes, improving the LDO's voltage regulation performance and transient response. The op-amp bias circuit module generates a signal to conduct the op-amp's dynamic bias, further increasing the LDO slew rate current and improving the LDO's transient response. Without transient ripple triggering, this module consumes only a small amount of quiescent current, achieving low power consumption. The dynamic transient detection circuit has two inputs, and the outputs of the two dynamic transient detection circuits are connected to the subthreshold slew rate enhancement circuits SW1 and SW2, respectively. The LDO bias generation circuit input is connected to the reference voltage V. ref The input terminal of the LDO bias generation circuit is connected to the output terminal V. BIAS1 Output terminal V BIAS2 Connected to the bias input of the dynamic transient ripple detection circuit

[0022] In actual operation, when this device is in use, the low-power high slew rate error amplifier circuit receives the output ripple from the LDO output voltage and converts it into a dynamic slew rate current. This dynamic slew rate current is used to charge and discharge the LDO power transistor, improving the LDO transient response. In addition, the op-amp bias circuit module generates a signal to turn on the op-amp's dynamic bias, further increasing the LDO slew rate current and improving the LDO transient response. Without transient ripple triggering, this module consumes only a weak static current, achieving low power consumption. The dynamic transient detection subthreshold slew rate enhancement circuit receives the ripple voltage from the LDO output terminal and amplifies and shapes it. The processed signal acts on the subthreshold slew rate enhancement circuit connected to the power transistor gate, thus turning on the circuit in transient situations and improving the LDO transient response capability. The LDO bias generation circuit provides bias for the LDO.

[0023] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0024] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A low-power, fast transient response (LDO) circuit, comprising a low-power, high-slew rate operational amplifier module, a dynamic transient detection subthreshold slew rate enhancement circuit module, an LDO bias generation circuit module, and an operational amplifier dynamic bias circuit module, characterized in that: The low-power high-slew rate operational amplifier module includes an input terminal for the low-power high-slew rate operational amplifier module. The dynamic transient detection subthreshold slew rate enhancement circuit module includes a dynamic transient detection slew rate enhancement circuit, a dynamic transient ripple detection circuit, a subthreshold slew rate enhancement circuit SW1, and a subthreshold slew rate enhancement circuit SW2. The dynamic transient detection slew rate enhancement circuit includes an input terminal for the dynamic transient detection circuit. The LDO bias generation circuit module includes an input terminal for the LDO bias generation circuit and an output terminal V. BIAS1 and output terminal V BIAS2 ; The LDO bias generation circuit provides a reference voltage V. REF It also provides the gate voltage for PM14; the LDO bias generation circuit outputs V BIAS1 NM15 and M in the dynamic transient detection subthreshold slew rate enhancement circuit FB The gate of the LDO bias generation circuit outputs V. BIAS2 Connect the gate of PM11 in the dynamic transient detection subthreshold slew rate enhancement circuit; In the dynamic transient detection subthreshold slew rate enhancement circuit, the gate and drain of NM12 are connected, generating a voltage DN, which provides the gate bias voltage for SW1 and NM15 in the operational amplifier dynamic bias circuit; in the dynamic transient detection subthreshold slew rate enhancement circuit, the gate and drain of NM13 are connected, generating a voltage V. UP The gate bias voltage is provided for NM16 in the operational amplifier dynamic bias circuit; the drains of PM13 and NM14 in the dynamic transient detection subthreshold slew rate enhancement circuit are connected to generate voltage UP, which provides the gate bias voltage for SW2; the LDO output voltage V OUT Connect to the sources of NM15 and PM11 in the dynamic transient detection subthreshold slew rate enhancement circuit; In the operational amplifier dynamic bias circuit, NM18 replicates the current of NM17, and the current I generated at the output of the operational amplifier dynamic bias circuit is... DY Directly input to a low-power, high-slew-rate operational amplifier module; The low-power, high-slew rate operational amplifier module includes a non-inverting input and an inverting input. The inverting input of the low-power, high-slew rate operational amplifier module is connected to the LDO output voltage V. OUT The non-inverting input of the low-power, high-slew rate operational amplifier module is connected to the reference voltage V. REF The dynamic bias input of the low-power, high-slew rate operational amplifier module is connected to the output of the operational amplifier dynamic bias circuit, and the output of the low-power, high-slew rate operational amplifier module is connected to the gate of the LDO power transistor MP; the input of the dynamic transient detection circuit in the dynamic transient detection slew rate enhancement circuit is connected to the LDO output voltage V. OUT .

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