Device and method for detecting packet loss and error codes of can chip

Abstract

This invention discloses a CAN chip packet loss and bit error detection device and method. The device includes: an MCU, which connects to the transmitting and receiving CAN chip under test via the MCU's CAN_TX and CAN_RX pins to achieve high-speed signal transmission and reception; two voltage boosting modules and two adjustable potentiometers for adjusting the operating voltage of the transmitting and receiving CAN chips respectively; a voltage display module for displaying the output voltage of the voltage boosting modules; a main control device for signal transmission with the MCU via USB; and a main control program for running on the main control device. The main control program is used to set the CAN operating frequency, the format of transmitted data, the number of transmitted data packets, and the transmission interval. Based on the set characteristics of the transmitted data, it compares the received current data to determine and process packet loss and bit error of the transmitting and receiving chips.

Description

Technical Field

[0001] This invention belongs to the field of chip manufacturing technology, specifically relating to a CAN chip packet loss and bit error detection device and method. Background Technology

[0002] In integrated circuit manufacturing, testing for packet loss and bit errors typically requires specialized equipment. Taking CAN chips as an example, after the chip is fabricated and shipped, its signal transmission performance needs to be tested. These tests include signal transmission stability, accuracy, and timeliness. Simultaneously, it's necessary to verify the chip's ability to transmit signals under different technical and environmental parameters. Packet loss and bit error testing is a category of CAN chip adaptability testing.

[0003] Typically, this requires the use of a corresponding MCU, motherboard, or communication module. The most common testing method involves installing the chip onto a board used in a real-world production environment. The MCU or other peripheral devices on the board send signals to a dedicated instrument or device, which then receives and analyzes these signals to calculate packet loss and bit errors during signal transmission. This test requires sending or receiving a certain number of data packets with specific characteristics within a fixed timeframe, and then statistically analyzing these sent or received packets to determine if packet loss or bit errors occurred during transmission.

[0004] The above tests have the following main problems: (1) They require specialized instruments and equipment. The packet loss and bit error rate test of CAN chip usually requires a specialized CAN signal analyzer. Such instruments are also called CAN boxes. They are relatively easy to use, but the disadvantage is that there are many types of CAN boxes on the market, and their quality varies. The quality of the core component in its hardware structure, namely the standard CAN chip, directly affects the accuracy of the test. If there is a problem with the chip, it will directly affect the test results. (2) The receiving detection is relatively complicated and there are interference factors. As mentioned above, if you want to test the receiving capability of the CAN chip, you need to use a specific signal source to receive the signal through CAN and then forward it to the tester. There is a receiving and forwarding process during this period. Therefore, if the data obtained by the analyzer is wrong, it is difficult to determine whether it is a problem with the CAN chip receiving or a problem with the sending (forwarding) link. Therefore, this test has certain interference judgment factors. (3) The highest operating frequency supported is only 1Mbps. Most commercially available CAN analyzers only support a maximum operating frequency of 1M BPS. There are very few analyzers that can support more than 1M BPS. The reason is that the market positioning of these analyzers is basically the industrial or automotive repair market, and their operating frequency is basically below 500kBPS. As a chip R&D company, more stringent testing conditions and standards are required. In extreme testing, the operating frequency must be at least 2M BPS. (4) It is impossible to differentiate the voltage of the chip during operation (receive and transmit states). Under normal circumstances, the voltage of the CAN chip must be constant during operation, and the chip operating voltage of the CAN nodes in the same network is basically the same. However, performance testing often requires simulating some extreme situations, such as adjusting the operating voltage to the upper or lower limit to observe the chip's operating performance. Currently available instruments and equipment cannot do this. (5) Receiving and transmitting cannot be tested synchronously. Since it is necessary to use a CAN analyzer to receive signals, it is impossible to perform packet loss and bit error testing between chips directly (as mentioned above, receiving tests are subject to forwarding interference testing factors). Summary of the Invention

[0005] In view of the above-mentioned problems, the present invention provides a CAN chip packet loss and error detection device and method, which can directly realize the signal reception test of the CAN chip without the need for the chip to receive and then forward the signal.

[0006] To solve the above-mentioned technical problems, the present invention adopts the following technical solution:

[0007] One embodiment of the present invention provides a CAN chip packet loss and bit error detection device, comprising:

[0008] The MCU connects to the transmit and receive CAN chip under test via its CAN_TX and CAN_RX pins to achieve high-speed signal transmission and reception.

[0009] Two voltage boost / buck modules and two adjustable potentiometers are used to adjust the operating voltage of the transmitting and receiving CAN chips respectively;

[0010] The voltage display module is used to display the output voltage of the voltage boost / buck module;

[0011] The main control device transmits signals to the MCU via USB; the main control program runs in the main control device and is used to set the CAN operating frequency, the format of the transmitted data, the number of transmitted data, and the transmission interval. Based on the set characteristics of the transmitted data, it compares the received current data to realize the judgment and processing of packet loss and bit error of the receiving and transmitting chips.

[0012] In one possible design, the high-speed signal transmission and reception process of the CAN chip connection includes: the main control device sends a signal to the MCU via USB communication; the MCU generates a regular signal, modulates it through the CAN_FD protocol, and sends the signal to the transmitting CAN chip CAN-A via the CAN_TX pin; the CAN-A chip sends the signal to the CAN terminal (CAN_HIGH–CAN_LOW) of the receiving CAN chip CAN-B via the CAN terminal (CAN_HIGH–CAN_LOW); at this time, the CAN bus is working.

[0013] During each packet transmission process, the MCU performs the following operations in sequence: records the TXD data of the transmitting CAN chip; collects and records the RXD data of the received CAN chip; collects and records the RXD data of the transmitting CAN chip; after comparison and marking, the data is transmitted back to the main control device by the MCU via USB.

[0014] In one possible design, the format and characteristics of the transmitted data are preset as follows:

[0015] Two flag bits are reserved in the CAN chip data segment, which are 00 by default. When the transmission check detects that the transmitted data is inconsistent with the standard data, the flag bit is set to 01; at the same time, when the transmission check detects that the transmitted data has not received a reception response, the flag bit is set to 10.

[0016] The data is sent in a sequence of data packets in a loop. In each loop, the ID number of the data packet increases and decreases cyclically from 0 to 2047, and the data segment content within the data packet starts from 0 and increments by 1.

[0017] In one possible design, packet loss analysis includes:

[0018] Compare the set standard number of packets sent, verify the actual number of data packets sent and received, and calculate the total number of lost packets and the packet loss rate;

[0019] Based on the data flags in the transmitted data, we can count the data that failed to be transmitted and the data that was successfully transmitted and received, and perform preliminary data sorting.

[0020] Transmitted data packets are arranged by transmission time, and received data packets are arranged by reception time. Each transmitted data packet is matched sequentially based on its ID, comparing the data values ​​within its segments to further determine the specific number and content range of any lost packets.

[0021] In one possible design, error analysis includes:

[0022] Transmitted data packets are arranged according to their transmission time, and received data packets are arranged according to their reception time. Each transmitted data packet is matched sequentially based on its ID, while simultaneously comparing the data values ​​within the transmitted data packet segments. Data packets that differ between the two sides are recorded, and the bit error rate is calculated bit by bit based on these differences.

[0023] Another aspect of this invention provides a method for detecting packet loss and bit error rate in a CAN chip, comprising:

[0024] A CAN chip packet loss and bit error detection device is set up. The CAN chip packet loss and bit error detection device includes an MCU, two voltage boost / pull modules, two adjustable potentiometers, a voltage display module, and a main control device.

[0025] Connect the CAN_TX and CAN_RX pins of the MCU to the CAN chip under test to achieve high-speed signal transmission and reception.

[0026] Two voltage boost / buck modules and two adjustable potentiometers are used to adjust the operating voltage of the transmitting and receiving CAN chips respectively;

[0027] A voltage display module is set up to display the output voltage of the voltage boost / pull module;

[0028] Signal transmission between the host device and the MCU is achieved via USB;

[0029] The main control program runs in the main control device. The main control program is used to set the CAN operating frequency, the format of the transmitted data, the number of transmitted data, and the transmission interval. Based on the set characteristics of the transmitted data, it compares the received data to realize the judgment and processing of frame loss and bit error of the receiving and transmitting chips.

[0030] In one possible design, the high-speed signal transmission and reception process of the CAN chip connection includes: the main control device sends a signal to the MCU via USB communication; the MCU generates a regular signal, modulates it through the CAN_FD protocol, and sends the signal to the transmitting CAN chip CAN-A via the CAN_Tx pin; the CAN-A chip sends the signal to the CAN terminal (CAN_HIGH–CAN_LOW) of the receiving CAN chip CAN-B via the CAN terminal (CAN_HIGH–CAN_LOW); at this time, the CAN bus is working.

[0031] During each packet transmission process, the MCU performs the following operations in sequence: records the TXD data of the transmitting CAN chip; collects and records the RXD data of the received CAN chip; collects and records the RXD data of the transmitting CAN chip; after comparison and marking, the data is transmitted back to the main control device by the MCU via USB.

[0032] In one possible design, the format and characteristics of the transmitted data are preset as follows:

[0033] Two flag bits are reserved in the CAN chip data segment, which are 00 by default. When the transmission check detects that the transmitted data is inconsistent with the standard data, the flag bit is set to 01; at the same time, when the transmission check detects that the transmitted data has not received a reception response, the flag bit is set to 10.

[0034] The data is sent in a sequence of data packets in a loop. In each loop, the ID number of the data packet increases and decreases cyclically from 0 to 2047, and the data segment content within the data packet starts from 0 and increments by 1.

[0035] In one possible design, packet loss analysis includes: arranging sent data packets according to their sending time and received data packets according to their receiving time, and matching them one by one in sequence based on the ID of the sent data packets to compare the data values ​​within the data segments of the sent data packets.

[0036] In one possible design, error analysis includes:

[0037] Transmitted data packets are arranged according to their transmission time, and received data packets are arranged according to their reception time. Each transmitted data packet is matched sequentially based on its ID, while simultaneously comparing the data values ​​within the transmitted data packet segments. Data packets that differ between the two sides are recorded, and the bit error rate is calculated bit by bit based on these differences.

[0038] The present invention has the following beneficial effects:

[0039] (1) Signal transmission and reception testing of CAN chips can be performed without the need for special equipment.

[0040] (2) The transmission and reception test can be performed directly between CAN chips without the need for the chip to receive and then forward the signal.

[0041] (3) Supports verification of data sent by the transmitting chip. Commercially available test kits typically use received data to check the correctness of transmission during transmission testing. If the transmitting chip itself has a problem, the received signal will also be incorrect. However, this method cannot determine whether the problem lies in transmission or reception. This embodiment of the invention uses the RXD pin of the transmitting chip for detection. The RXD pin is the bus signal. By monitoring this signal and verifying it against the original transmitted data, the normality of the transmitting chip can be immediately determined, and the presence of a problem with the receiving chip can also be identified.

[0042] (4) It supports frequencies above 1M BPS and uses the CAN_FD protocol to transmit, modulate, receive, and demodulate data, which solves the problem that most dedicated devices do not support communication frequencies above 1M BPS. Through the embodiments of the present invention, the working communication frequency can be increased to above 4M.

[0043] (5) The problem of the non-adjustable operating voltage of the tested chip has been solved. The operating voltage of the chip can be adjusted to observe the chip's operation at the critical point of the nominal operating voltage in the datasheet.

[0044] (6) It can realize packet loss and bit error testing of CAN chip transmission and reception synchronously. Attached Figure Description

[0045] Figure 1 This is a schematic diagram of the CAN chip packet loss and bit error detection device according to an embodiment of the present invention;

[0046] Figure 2 This is a flowchart illustrating the steps of the CAN chip packet loss and bit error detection method according to an embodiment of the present invention. Detailed Implementation

[0047] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0048] See Figure 1The diagram shows a schematic of the CAN chip packet loss and bit error detection device according to an embodiment of the present invention. It includes an MCU, two adjustable potentiometers, a voltage display module, and a main control device. The MCU's CAN_TX and CAN_RX pins are connected to the transmitting and receiving CAN chips under test to achieve high-speed signal transmission and reception. Two voltage boosting modules and two adjustable potentiometers are used to adjust the operating voltage of the transmitting and receiving CAN chips respectively. By adjusting the chip's operating voltage, the chip's operation at the nominal operating voltage threshold in the datasheet can be observed, improving testing flexibility and facilitating the simulation of CAN's operating state under different environments. The voltage display module displays the output voltage of the voltage boosting modules; here, it is designed with two LED digital tube driver chips to drive the LED digital tubes to display the voltage from the MCU. The main control device transmits signals to the MCU via USB. The main control program runs on the main control device and sets the CAN operating frequency, data format, number of data packets, and transmission interval. Based on the set characteristics of the transmitted data, it compares the received data to determine and process frame loss and bit errors in the transmitting and receiving chips.

[0049] In one embodiment of the present invention, the high-speed signal transmission and reception process of the CAN chip connection includes: the main control device sends a signal to the MCU via USB communication; the MCU generates a regular signal, modulates it using the CAN_FD protocol, and sends the signal to the transmitting CAN chip CAN-A; the CAN-A chip sends the signal to the CAN terminals (CAN_HIGH–CAN_LOW) of the receiving CAN chip CAN-B via the CAN terminals (CAN_HIGH–CAN_LOW); at this time, the CAN bus is working. The use of the CAN_FD protocol for data transmission modulation and reception demodulation solves the problem that most dedicated devices do not support communication frequencies above 1 Mbps, and can increase the CAN operating frequency to the upper limit of the CAN chip's operating frequency, that is, can increase the working communication frequency to above 4 Mbps.

[0050] Simultaneously, the MCU performs the following operations in sequence: records the TXD data of the transmitting CAN chip (standard transmitted data); acquires and records the RXD data of the receiving CAN chip (actually received data); and acquires and records the RXD data of the transmitting CAN chip (actually transmitted data with the receive response bit). After comparison and marking, the data is transmitted back to the host device by the MCU via USB. With the above settings, the signal reception test of the CAN chip can be directly realized, without the need for signal forwarding after chip reception.

[0051] After all data transmission and reception are completed, the main control device compares the transmitted and received data one by one to confirm whether there are any packet loss errors during transmission or reception.

[0052] In one embodiment of the present invention, the format and characteristics of the transmitted data are preset as follows:

[0053] Two flag bits are reserved for the CAN chip data segment, with a default value of 00. When the transmission check detects that the transmitted data is inconsistent with the standard data, the flag bit is set to 01; conversely, when the transmission check detects that no response has been received for the transmitted data, the flag bit is set to 10. The data transmission method is to send a sequence of data packets in a loop. In each loop, the ID number of the data packet increments and decrements cyclically from 0 to 2047 (the maximum length of the CAN_FD standard frame ID). The data segment content within the data packet starts from 0 and increments by 1 continuously (since CAN_FD supports 64-bit data per packet, the maximum increment value can theoretically be ignored).

[0054] In one embodiment of the present invention, packet loss analysis includes:

[0055] Compare the set standard number of packets sent to the actual number of packets sent and received, and calculate the total number of lost packets and the packet loss rate.

[0056] Based on the data flags in the transmitted data, we can count the data that failed to be transmitted and the data that was successfully transmitted and received, and perform preliminary data processing.

[0057] Transmitted data packets are arranged by transmission time, and received data packets are arranged by reception time. Each transmitted data packet is matched sequentially based on its ID, comparing the data values ​​within its segments to further determine the specific number and content range of any lost packets.

[0058] In one embodiment of the present invention, error analysis includes:

[0059] Transmitted data packets are arranged according to their transmission time, and received data packets are arranged according to their reception time. Each transmitted data packet is matched sequentially based on its ID, while simultaneously comparing the data values ​​within the transmitted data packet segments. Data packets that differ between the two sides are recorded, and the bit error rate is calculated bit by bit based on these differences.

[0060] In one embodiment of the present invention, the voltage display module comprises an LED digital tube and a digital tube driving circuit. It has the advantages of simple structure and intuitive display.

[0061] In one embodiment of the present invention, the CAN chip is inserted into the circuit board using an SOP8 programming card socket. The CAN chip is inserted using an SOP8 programming card socket, rather than soldered onto the circuit board, facilitating the replacement of the chip under test during testing. The programming card socket is an 8-pin socket with 8 pins on the bottom that are soldered to the corresponding traces on the circuit board. The upper end is a spring-loaded pressure plate socket with 8 pairs of interlocking copper tabs corresponding to each pin of the chip under test. The spring pressure plate is opened, the chip is inserted, and then pressed down and locked. Under the action of the spring pressure plate, each chip pin is pressed down and connected to the circuit by the interlocking copper tabs.

[0062] In one embodiment of the present invention, the CAN_HIGH and CAN_LOW buses between the transmitting CAN chip and the receiving CAN chip are connected using automotive twisted-pair cables. The length exceeds 15 meters to ensure the upper limit of the single-wire harness length for simulating a real in-vehicle environment.

[0063] In one embodiment of the present invention, each CAN chip under test is powered individually. It can be powered directly via USB 5V or 12V, with voltage controlled by an adjustable potentiometer and a voltage boost / buck module to ensure the chip's power supply voltage remains within its nominal range.

[0064] For the corresponding device embodiment, see [link to embodiment]. Figure 2 The diagram shows a flowchart of the CAN chip packet loss and bit error detection method according to an embodiment of the present invention, including the following steps:

[0065] See also Figure 1 A CAN chip packet loss and bit error detection device is set up. The CAN chip packet loss and bit error detection device includes an MCU, two voltage boost / buck modules, two adjustable potentiometers, a voltage display module, and a main control device.

[0066] Connect the CAN_TX and CAN_RX pins of the MCU to the CAN chip under test to achieve high-speed signal transmission and reception.

[0067] Two adjustable potentiometers are set up to adjust the operating voltage of the CAN receiving and transmitting chips respectively; by adjusting the chip's operating voltage, the chip's operation at the nominal operating voltage threshold in the datasheet is observed, which improves the flexibility of the test and is beneficial for simulating the CAN's working state under different environments.

[0068] A voltage display module is set up to display the output voltage of the voltage boosting module; here, two LED digital tube driver chips are designed to be used by the MCU to drive the LED digital tube to display the voltage.

[0069] Signal transmission between the host device and the MCU is achieved via USB; the host program runs in the host device and is used to set the CAN operating frequency, the format of the transmitted data, the number of transmitted data, and the transmission interval. Based on the set characteristics of the transmitted data, the current received data is compared with the previous data to realize the judgment and processing of frame loss and bit error of the receiving and transmitting chips.

[0070] In one embodiment of the present invention, the high-speed signal transmission and reception process of the CAN chip connection includes: the main control device sends a signal to the MCU via USB communication; the MCU generates a regular signal, modulates it using the CAN_FD protocol, and sends the signal to the transmitting CAN chip CAN-A; the CAN-A chip sends the signal to the CAN terminals (CAN_HIGH–CAN_LOW) of the receiving CAN chip CAN-B via the CAN terminals (CAN_HIGH–CAN_LOW); at this time, the CAN bus is working. The use of the CAN_FD protocol for data transmission modulation and reception demodulation solves the problem that most dedicated devices do not support communication frequencies above 1 Mbps, and can increase the CAN operating frequency to the upper limit of the CAN chip's operating frequency, that is, can increase the working communication frequency to above 4 Mbps.

[0071] Simultaneously, the MCU performs the following operations in sequence: records the TXD data of the transmitting CAN chip (standard transmitted data); acquires and records the RXD data of the receiving CAN chip (actually received data); and acquires and records the RXD data of the transmitting CAN chip (actually transmitted data with the receive response bit). After comparison and marking, the data is transmitted back to the host device by the MCU via USB. With the above settings, the signal reception test of the CAN chip can be directly realized, without the need for signal forwarding after chip reception.

[0072] After all data transmission and reception are completed, the main control device compares the transmitted and received data one by one to confirm whether there are any packet loss errors during transmission or reception.

[0073] In one embodiment of the present invention, the format and characteristics of the transmitted data are preset as follows:

[0074] Two flag bits are reserved in the CAN chip data segment, which are 00 by default. When the transmission check detects that the transmitted data is inconsistent with the standard data, the flag bit is set to 01; at the same time, when the transmission check detects that the transmitted data has not received a reception response, the flag bit is set to 10.

[0075] The data transmission method is to send a sequence of data packets in a loop. In each loop, the ID number of the data packet is incremented and decremented from 0 to 2047 (the maximum length of the CAN_FD standard frame ID). The data segment content in the data packet starts from 0 and increments by 1 continuously (since CAN_FD supports 64-bit data per packet, the maximum limit of the increment value can theoretically be ignored).

[0076] In one embodiment of the present invention, packet loss analysis includes:

[0077] Compare the set standard number of packets sent to the actual number of packets sent and received, and calculate the total number of lost packets and the packet loss rate.

[0078] Based on the data flags in the transmitted data, we can count the data that failed to be transmitted and the data that was successfully transmitted and received, and perform preliminary data processing.

[0079] Transmitted data packets are arranged by transmission time, and received data packets are arranged by reception time. Each transmitted data packet is matched sequentially based on its ID, comparing the data values ​​within its segments to further determine the specific number and content range of any lost packets.

[0080] In one embodiment of the present invention, error analysis includes:

[0081] Transmitted data packets are arranged according to their transmission time, and received data packets are arranged according to their reception time. Each transmitted data packet is matched sequentially based on its ID, while simultaneously comparing the data values ​​within the transmitted data packet segments. Data packets that differ between the two sides are recorded, and the bit error rate is calculated bit by bit based on these differences.

[0082] The CAN chip packet loss and error detection method described above allows for signal transmission and reception testing of CAN chips without the need for dedicated equipment. Transmission and reception testing can be performed directly between CAN chips, eliminating the need for chip reception followed by signal forwarding. It supports verification of data transmitted by the transmitting chip. Commercially available test kits typically use received data to check the correctness of transmission during transmission testing. If the transmitting chip itself has a problem, the received signal will also be incorrect, but this method cannot determine whether the problem lies in transmission or reception. This invention uses the RXD pin of the transmitting chip for testing. The RXD pin is the bus signal. By monitoring this signal and verifying it against the original transmitted data, the normality of the transmitting chip can be immediately determined, and the presence of a problem with the receiving chip can also be identified. It supports frequencies above 1 Mbps, employing the CAN_FD protocol for data transmission modulation and reception demodulation, solving the problem that most dedicated equipment does not support communication frequencies above 1 Mbps. This invention allows for increasing the working communication frequency to above 4 Mbps. It also solves the problem of the unadjustable operating voltage of the tested chip. The chip's operating voltage can be adjusted, and its operation at the critical point of the nominal operating voltage in the datasheet can be observed. It can perform packet loss and bit error testing simultaneously during the transmission and reception of CAN chips.

[0083] It should be understood that the exemplary embodiments described herein are illustrative and not restrictive. Although one or more embodiments of the invention have been described in conjunction with the accompanying drawings, those skilled in the art will understand that various changes in form and detail may be made without departing from the spirit and scope of the invention as defined by the appended claims.

Claims

1. A CAN chip packet loss error code detection device, characterized in that, include: The MCU connects to the transmit and receive CAN chip under test via its CAN_TX and CAN_RX pins to achieve high-speed signal transmission and reception. During each packet transmission process, the MCU is also used to perform the following operations in sequence: record the TXD data of the transmitting CAN chip; collect and record the RXD data of the received CAN chip; collect and record the RXD data of the transmitting CAN chip; after the data is compared and marked, the MCU transmits it back to the main control device via USB. Two voltage boost / buck modules and two adjustable potentiometers are used to adjust the operating voltage of the transmitting and receiving CAN chips respectively; The voltage display module is used to display the output voltage of the voltage boost / buck module; The main control device transmits signals to the MCU via USB; the main control program runs in the main control device and is used to set the CAN operating frequency, the format of the transmitted data, the number of transmitted data, and the transmission interval. Based on the set characteristics of the transmitted data, it compares the received current data to realize the judgment and processing of packet loss and bit error of the receiving and transmitting chips.

2. The CAN chip packet loss error code detection device of claim 1, wherein, The process of connecting the CAN chip for sending and receiving signals to achieve high-speed signal transmission and reception includes: the main control device sends a signal to the MCU via USB communication, the MCU generates a regular signal, modulates it through the CAN_FD protocol, and sends the signal to the transmitting CAN chip CAN-A via the CAN_TX pin. The CAN-A chip sends the signal to the receiving CAN chip CAN-B via CAN_HIGH–CAN_LOW, and at this time the CAN bus is working.

3. The CAN chip packet loss error detection apparatus of claim 1, wherein, The format and characteristics of the data to be sent are preset as follows: Two flag bits are reserved in the CAN chip data segment, which are 00 by default. When the transmission check detects that the transmitted data is inconsistent with the standard data, the flag bit is set to 01; at the same time, when the transmission check detects that the transmitted data has not received a reception response, the flag bit is set to 10. The data is sent in a sequence of data packets in a loop. In each loop, the ID number of the data packet increases and decreases cyclically from 0 to 2047, and the data segment content within the data packet starts from 0 and increments by 1.

4. The CAN chip packet loss and bit error detection device as described in claim 1, characterized in that, Packet loss analysis includes: Compare the set standard number of packets sent, verify the actual number of data packets sent and received, and calculate the total number of lost packets and the packet loss rate; Based on the data flags in the transmitted data, we can count the data that failed to be transmitted and the data that was successfully transmitted and received, and perform preliminary data sorting. Data packets are arranged according to their sending time, and received data packets are arranged according to their receiving time. Each data packet is matched sequentially based on its ID, and the data values ​​within the data segments of the sent data packets are compared. This further determines the specific number and content range of the lost packets.

5. The CAN chip packet loss and bit error detection device as described in claim 1, characterized in that, Error analysis includes: Data packets are arranged according to their sending time, and data packets are arranged according to their receiving time. The data packets are matched one by one based on their IDs, and the data values ​​within the data segments of the sent data packets are compared. Data packets that are different on both sides are recorded, and the differences are calculated bit by bit to obtain the bit error rate.

6. A method for detecting packet loss and bit error rate in a CAN chip, characterized in that, include: A CAN chip packet loss and bit error detection device is set up. The CAN chip packet loss and bit error detection device includes an MCU, two voltage boosting modules, two adjustable potentiometers, a voltage display module, and a main control device. Connect the CAN_TX and CAN_RX pins of the MCU to the CAN chip under test to achieve high-speed signal transmission and reception. During each packet transmission process, the MCU performs the following operations in sequence: records the TXD data of the transmitting CAN chip; collects and records the RXD data of the received CAN chip; collects and records the RXD data of the transmitting CAN chip; after the data is compared and marked, the MCU transmits it back to the main control device via USB. Two voltage boost / buck modules and two adjustable potentiometers are used to adjust the operating voltage of the transmitting and receiving CAN chips respectively; A voltage display module is set up to display the output voltage of the voltage boost / pull module; Signal transmission between the host device and the MCU is achieved via USB; The main control program runs in the main control device. The main control program is used to set the CAN operating frequency, the format of the transmitted data, the number of transmitted data, and the transmission interval. Based on the set characteristics of the transmitted data, it compares the received data to realize the judgment and processing of frame loss and bit error of the receiving and transmitting chips.

7. The CAN chip packet loss and bit error detection method as described in claim 6, characterized in that, The process of connecting the CAN chip for sending and receiving signals to achieve high-speed signal transmission and reception includes: the main control device sends a signal to the MCU via USB communication, the MCU generates a regular signal, modulates it through the CAN_FD protocol, and sends the signal to the transmitting CAN chip CAN-A via the CAN_Tx pin. The CAN-A chip sends the signal to the receiving CAN chip CAN-B via CAN_HIGH–CAN_LOW, and the CAN bus is working at this time.

8. The CAN chip packet loss and bit error detection method as described in claim 6, characterized in that, The format and characteristics of the data to be sent are preset as follows: Two flag bits are reserved in the CAN chip data segment, which are 00 by default. When the transmission check detects that the transmitted data is inconsistent with the standard data, the flag bit is set to 01; at the same time, when the transmission check detects that the transmitted data has not received a reception response, the flag bit is set to 10. The data is sent in a sequence of data packets in a loop. In each loop, the ID number of the data packet increases and decreases cyclically from 0 to 2047, and the data segment content within the data packet starts from 0 and increments by 1.

9. The CAN chip packet loss and bit error detection method as described in claim 6, characterized in that, Packet loss analysis includes: sorting sent data packets by sending time and receiving data packets by receiving time, matching them one by one based on the ID of the sent data packets, and comparing the data values ​​within the data segments of the sent data packets.

10. The CAN chip packet loss and bit error detection method as described in claim 6, characterized in that, Error analysis includes: Data packets are arranged according to their sending time, and data packets are arranged according to their receiving time. The data packets are matched one by one based on their IDs, and the data values ​​within the data segments of the sent data packets are compared. Data packets that are different on both sides are recorded, and the differences are calculated bit by bit to obtain the bit error rate.

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