A design method for a CAT 6A return loss standard

Abstract

This invention discloses a design method for a CAT6A return loss standard, comprising: based on a first relationship between return loss and resistance; and based on the impedance influence of capacitance and inductance, constructing a second relationship; and based on the second relationship, designing PCB traces, adjusting the trace length and spacing to make ωL≈1 / (ωC) to offset the influence of capacitance and inductance; where ω represents angular velocity, which is related to the signal transmission frequency; L represents parasitic inductance; and C represents parasitic capacitance. This method can complete the optimized design of the CAT6A return loss standard. The design process is simple and efficient, and the return loss standard designed based on this method can solve the problem of insufficient measurement results in the high-frequency band in the prior art.

Description

Technical Field

[0001] This invention relates to the field of communication technology, and in particular to a design method for a CAT 6A return loss standard. Background Technology

[0002] Following the design principles of JJF 1494, the basic idea behind constructing a return loss standard is to insert a resistor of a specific value in series within a single wire pair, thereby forming an impedance-mismatched loop. For example... Figure 1 As shown, the relationship between return loss and resistance is:

[0003]

[0004] In the formula, RL represents the return loss, in dB. i Z O These are the input and output impedances, respectively. For a cable analyzer, the input impedance is fixed at 100Ω. The resistor connected in series in the standard changes the output impedance. Calculations using the above formula are correct at low frequencies.

[0005] However, if a standard is constructed according to this formula, its return loss value exhibits strong randomness and uncontrollability at high frequencies. For example, if an 82-ohm resistor is inserted in series between each of the four wire pairs, the measured return loss value is as follows... Figure 2 As shown, the horizontal axis represents frequency in MHz, and the vertical axis represents return loss in dB. It is evident that although the resistance inserted between each wire pair is the same, the measurement results between different wire pairs differ significantly. This measurement result introduces excessive randomness and uncontrollability into the standard value.

[0006] Therefore, it is necessary to develop a new type of high-frequency return loss standard to overcome the shortcomings of existing technologies in high-frequency measurement results. Summary of the Invention

[0007] The purpose of this invention is to provide a design method for a CAT 6A return loss standard. The standard obtained based on this design method can solve the problem of insufficient measurement results in the high-frequency band in the prior art.

[0008] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0009] This invention provides a design method for a CAT 6A return loss standard, comprising the following steps:

[0010] S1. Based on the first relationship between return loss and resistance, and considering the impedance effects of capacitance and inductance, construct the second relationship.

[0011] S2. Based on the second relationship, design the PCB traces and adjust the trace length and trace spacing to make ωL≈1 / (ωC) to offset the influence of capacitance and inductance; where ω represents angular velocity, which is related to the signal transmission frequency; L represents parasitic inductance, and C represents parasitic capacitance.

[0012] Furthermore, based on the first relationship between return loss and resistance, and considering the impedance effects of capacitance and inductance, a second relationship is constructed, including:

[0013] The first equation establishing the relationship between return loss and resistance is:

[0014]

[0015] In the formula, RL is the return loss, in dB; Z i Z O These are the input and output impedances, respectively.

[0016] Considering the impedance effects of capacitance and inductance, a second relationship can be constructed as follows:

[0017] Z(ω)=R+i(ωL-1 / ωC)

[0018] In the formula, Z(ω) is the output impedance value, R is the output impedance resistance value, and i is the imaginary part.

[0019] Further, step S2 includes: optimizing the PCB traces according to a preset method; the specific optimization method includes:

[0020] The connecting lines of the four pairs of wires are of the same width;

[0021] The areas enclosed by the traces and solder joints of the four line pairs are equal.

[0022] Furthermore, it also includes:

[0023] S3. Connect the four wire pairs to the two physical ports of the network analyzer in sequence, and test the return loss parameters according to the preset formula to complete the return loss calibration of the four wire pairs of the PCB.

[0024] Furthermore, the preset formula is:

[0025]

[0026] In the formula, S dd11 The parameter represents the return loss parameter. S represents the differential signal. The subscripts 1 and 3 of the S parameter are the two physical ports of the network analyzer. Ports 1 and 3 constitute the logic port of a differential signal, which tests the return loss between line pairs.

[0027] Compared with the prior art, the present invention has the following beneficial effects:

[0028] This invention provides a design method for a CAT 6A return loss standard, comprising: establishing a first relationship between return loss and resistance; constructing a second relationship based on the impedance effects of capacitance and inductance; and designing PCB traces based on the second relationship, adjusting the trace length and spacing to make ωL≈1 / (ωC) to offset the effects of capacitance and inductance; where ω represents angular velocity, which is related to the signal transmission frequency; L represents parasitic inductance; and C represents parasitic capacitance. This method can optimize the design of a CAT 6A return loss standard, and the design process is simple and efficient. The return loss standard designed based on this method can solve the problem of insufficient measurement results in the high-frequency band in the prior art. Attached Figure Description

[0029] Figure 1 This is a schematic diagram of a return loss circuit in the prior art;

[0030] Figure 2 This is a schematic diagram showing the return loss measurement results after connecting an 82Ω resistor.

[0031] Figure 3 A flowchart illustrating the design method for the CAT 6A return loss standard;

[0032] Figure 4 This is a schematic diagram showing the return loss measurement results after adjusting the wire length and wire spacing and connecting to an 82Ω resistor.

[0033] Figure 5 A circuit diagram for designing PCB traces to compensate for the effects of parasitic capacitance and inductance;

[0034] Figure 6 for Figure 5 A schematic diagram showing the return loss measurement results of the designed PCB circuit board traces after connecting to an 82Ω resistor;

[0035] Figure 7 PCB circuit diagrams for each return loss standard;

[0036] Figure 8a A schematic diagram showing the measured and calibrated values ​​of a typical cable analyzer for a return loss standard with a nominal value of 6dB.

[0037] Figure 8b A schematic diagram showing the measured and calibrated values ​​of a typical cable analyzer for a return loss standard with a nominal value of 8dB.

[0038] Figure 8c A schematic diagram showing the measured and calibrated values ​​of a typical cable analyzer for a return loss standard with a nominal value of 11dB.

[0039] Figure 8d A schematic diagram showing the typical cable analyzer measurement and calibration values ​​for a return loss standard with a nominal value of 14.4 dB;

[0040] Figure 8e A schematic diagram showing the typical cable analyzer measurement and calibration values ​​for a return loss standard with a nominal value of 21.7 dB;

[0041] Figure 9a This is a graph showing the difference measured by a typical cable analyzer for a return loss standard with a nominal value of 6dB.

[0042] Figure 9b This is a graph showing the difference measured by a typical cable analyzer for a return loss standard with a nominal value of 8dB.

[0043] Figure 9c This is a graph showing the difference measured by a typical cable analyzer for a return loss standard with a nominal value of 11dB.

[0044] Figure 9d The graph shows the difference measured by a typical cable analyzer for a return loss standard with a nominal value of 14.4 dB.

[0045] Figure 9e This is a graph showing the difference measured by a typical cable analyzer for a return loss standard with a nominal value of 21.7 dB. Detailed Implementation

[0046] To make the technical means, creative features, objectives and effects of this invention easier to understand, the invention will be further described below in conjunction with specific embodiments.

[0047] In the description of this invention, it should be noted that the terms "upper," "lower," "inner," "outer," "front end," "rear end," "both ends," "one end," and "the other end," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0048] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installed," "equipped with," "connected," etc., should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be a connection within two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0049] Reference Figure 3As shown, the present invention provides a design method for a CAT 6A return loss standard, comprising the following steps:

[0050] S1. Establish the first relationship between return loss and resistance; and based on the impedance effects of capacitance and inductance, construct the second relationship.

[0051] S2. Based on the second relationship, design the PCB traces and adjust the trace length and trace spacing to make ωL≈1 / ωC to offset the effects of capacitance and inductance; where ωL represents parasitic inductance and ωC represents parasitic capacitance.

[0052] This method can optimize the design of the CAT 6A return loss standard. The design process is simple and efficient. The return loss standard based on this design can solve the problem of insufficient measurement results in the high-frequency band in the existing technology.

[0053] The following is a detailed explanation of each of the above steps:

[0054] In step S1, the relationship between return loss and resistance is given by the first equation:

[0055]

[0056] In the formula, RL represents the return loss, in dB. i Z O These are the input and output impedances, respectively. For a cable analyzer, the input impedance is fixed at 100Ω, and the resistors connected in series in the standard change the output impedance. However, if the standard is constructed according to this formula, its return loss value exhibits strong randomness and uncontrollability at high frequencies. For example, if an 82-ohm resistor is connected in series between each of the four wire pairs, the measured return loss value is as follows... Figure 2 As shown, although the resistance in series between each wire pair is the same, the measurement results between different wire pairs are significantly different. This measurement result brings too much randomness and uncontrollability to the standard value.

[0057] The reason for this phenomenon is the influence of parasitic capacitance and inductance between PCB traces. When considering the impedance effect after considering capacitance and inductance:

[0058] Therefore, in step S2, the second relation is used to represent...

[0059] Z(ω)=R+i(ωL-1 / ωC)

[0060] In the formula, Z(ω) is the output impedance value, R is the output impedance resistance value, and i is the imaginary part. ω represents the angular velocity, which is related to the signal transmission frequency; L represents the parasitic inductance, and C represents the parasitic capacitance. The generation of parasitic inductance and capacitance is an inherent property of traces and is not easily eliminated at the physical level, but it can be utilized using the above formula ωL and... The subtraction relationship between them mathematically cancels each other out. Parasitic inductance is mainly determined by the PCB trace length, while parasitic capacitance is mainly determined by the PCB trace spacing. By adjusting the trace length and spacing to make ωL≈1 / ωC, the effects of capacitance and inductance are offset. The adjusted traces are as follows. Figure 4 As shown, however, this type of routing is not perfect for certain impedances. For example... Figure 4 The results show a significant improvement in consistency between the wire pairs, but the 36-pair wire has considerable differences from other wire pairs in some frequency bands. The reason for this is that the 36-pair wire has a significantly different contact geometry from other wire pairs, making it difficult to achieve complete consistency with other wire pairs on the PCB trace.

[0061] In step S2, considering various factors such as trace length, width, spacing, location, and corner shape (parasitic capacitance and inductance are related to trace shape, such as corners, vias, and other detailed factors), and combining theoretical analysis and extensive experiments, the trace design was further optimized in the following way:

[0062] 1) Ensure that the width of the connecting lines for the four wire pairs is the same;

[0063] 2) Ensure that the areas enclosed by the traces and solder joints of the four line pairs are equal or approximately equal. The final PCB circuit board routing design should look like this: Figure 5 As shown, the final measurement results are as follows: Figure 6 As shown.

[0064] Based on the calibration requirements of the cable analyzer, five return loss standards with nominal values ​​of 6, 8, 11, 14.4, and 21.7 dB were formed by connecting resistors of different resistance values ​​in series. After optimization, the circuit diagrams of the five return loss standards are shown below. Figure 7 As shown.

[0065] Furthermore, such as Figure 3 As shown, the method also includes:

[0066] S3. Connect the four wire pairs to the two physical ports of the network analyzer in sequence, and test the return loss parameters according to the preset formula to complete the return loss calibration of the four wire pairs of the PCB.

[0067] Similar to the insertion loss parameter, the return loss is calibrated to the network analyzer. Unlike the insertion loss, the return loss parameter is characterized by the Sdd11 parameter:

[0068]

[0069] In the formula, the subscripts 1 and 3 of the S-parameter represent the two physical ports (Port 1, 3) of the network divider. Port 1 and 3 constitute the logic port of a differential signal, thereby testing the return loss of the differential device.

[0070] This step involves measuring the return loss parameters of each of the four line pairs. When the results are consistent, the return loss standard designed based on the method of this invention can completely solve the shortcomings of existing technologies in measuring high-frequency bands. When there are differences between the results, the corresponding line pairs are adjusted appropriately according to the trace length, width, spacing, position, and corner shape until the four results are basically consistent.

[0071] To further illustrate the advantages of the CAT 6A return loss standard based on the design method of this invention, its application is verified:

[0072] According to IEC 61935, the calibration of cable analyzers needs to be performed near the limits, and the limits for return loss are as follows: Figure 2 As shown by the bottom line, within the 0–500MHz range, the limit decreases from approximately 20dB to approximately 6dB, exhibiting a clear decreasing trend with frequency. As mentioned earlier, the standard developed in this invention covers the limit range between 6 and 21.7dB. It should be noted that although the standard designed in this invention covers the nominal value range of 6–21.7dB, when calibrating the cable analyzer, it is not necessary to test at all ranges (6–21.7dB) at every frequency point. The selection of measurement points only needs to meet the requirements of IEC 61935 and be chosen near the limit. This is because cable analyzer manufacturers also follow the requirements of IEC 61935 when designing and manufacturing the standard, meeting the accuracy requirements near the limit. The test results below also verify the above analysis. The specific test points selected are shown in Table 1.

[0073] Table 1. Return Loss Measurement Points

[0074]

[0075]

[0076] Similar to other tests, the measurement was performed using the industry-leading FLUKE DSX cable analyzer and its calibration value (VNA). The specific measurement results are as follows: Figures 8a-8e As shown. For clarity, the difference results are also presented graphically, as shown below. Figures 9a-9e As shown in Table 2, all differences are less than 2.7 dB for all measurement points. Furthermore, the standard IEC 61935 requires a maximum permissible error of 3–4.1 dB for return loss of cable analyzers (increasing with frequency). As can be seen, all differences are less than the maximum permissible error (most differences are much smaller), as shown in Table 2, thus validating this standard and method.

[0077] Table 2:

[0078]

[0079]

[0080] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.

Claims

1. A design method for a CAT 6A return loss standard, characterized in that, Includes the following steps: S1. Based on the first relationship between return loss and resistance, and considering the impedance effects of capacitance and inductance, construct the second relationship. The first relationship between return loss and resistance is: In the formula, RL is the return loss, in dB; These are the input and output impedances, respectively. The second relation is: In the formula, R is the output impedance value, and R is the output impedance resistance value; i is the imaginary part; S2. Based on the second relationship, design the PCB traces, and adjust the trace length and trace spacing to make ωL≈1 / (ωC) to counteract the effects of capacitance and inductance; where ω represents angular velocity, which is related to the signal transmission frequency; L represents parasitic inductance, and C represents parasitic capacitance; Step S2 includes: optimizing the PCB traces according to a preset method; the specific optimization method includes: the connection line width of the four wire pairs is the same; the area enclosed by the traces and solder joints of the four wire pairs is equal; S3. Connect the four wire pairs sequentially to the two physical ports of the network analyzer, and test the return loss parameters according to the preset formula to complete the return loss calibration of the four wire pairs on the PCB; the preset formula is: In the formula, The parameter represents the return loss parameter. S represents the differential signal. The subscripts 1 and 3 of the S parameter are the two physical ports of the network analyzer. Ports 1 and 3 constitute the logic port of a differential signal, which tests the return loss between line pairs.

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