Display panel and display device
By setting up fan-out lines of multiple branch lines on the fan-out area of the display panel, the current on the power signal line is allocated, which solves the heating problem caused by high current density in the narrow border design, and improves the refresh frequency of the display panel.
Patent Information
- Application Number
- CN202211217601.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-09-30
- Publication Date
- 2025-03-28
- Estimated Expiration
- 2042-09-30
AI Technical Summary
The prior art display panels have high connection trace current density due to the narrow border, resulting in heating problems, which limits the refresh frequency of medium and large-size display screens.
By setting at least two branch lines in the fan-out trace connected to the power supply signal line on the fan-out zone, the current on the power supply signal line is distributed to transmit on different traces, thereby reducing the current density.
It effectively reduces the current density of the power supply signal line in the fanout area in the narrow frame design of medium and large display panels, reduces the heating problem caused by excessive temperature rise, and increases the refresh frequency.
Smart Images

Figure CN115581089B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of display technology, and in particular to a display panel and a display device. Background Art
[0002] As consumers pursue more portable and visually appealing display products, extremely narrow edges or even full-screen displays have become a new trend in the development of organic light-emitting diode (OLED) products.
[0003] In Active-matrix organic light-emitting diode (AMOLED) circuits, especially in notebooks (NB), in order to ensure the smoothness and display effects of games, movies, office and other scenes, the demand for narrow borders is getting higher and higher, and at the same time, the data refresh frequency is required to be higher and higher. For large-size display screens of AMOLED, the load of the data line becomes the main factor limiting the refresh frequency. In addition, since the border is too narrow, the current density of the connecting wiring will be high, resulting in heating problems. In order to ensure the product usage experience of the display device, it is urgent to improve the structure of the display panel to effectively solve this technical problem. Summary of the invention
[0004] The technical solution of the present invention aims to provide a display panel and a display device, which are used to solve the problem of the display panel in the prior art that the current density of the connection wiring is high and generates heat due to the narrow frame.
[0005] One embodiment of the present invention provides a display panel, comprising a display area and a non-display area adjacent to an edge of the display area, the non-display area comprising a fan-out area, the display area being provided with at least one power signal line, the fan-out area being provided with at least one fan-out wiring, wherein:
[0006] A first fan-out line among the at least one fan-out line is connected to a first power signal line among the at least one power signal line, and at least a portion of the line segments of the first fan-out line include at least two branches, and the at least two branches are respectively arranged around the display area and connected at one position of the fan-out area.
[0007] Optionally, in the display panel, a dam portion is provided on the non-display area and is arranged around the display area, wherein a first branch line of the at least two branch lines is located on a side of the dam portion close to the display area, and a second branch line of the at least two branch lines except the first branch line is located on a side of the dam portion away from the display area.
[0008] Optionally, in the display panel, the first branch line and the second branch line are metal wirings located in different layers; or,
[0009] At least one of the first branch line and the second branch line includes at least two layers of metal routing lines connected to each other.
[0010] Optionally, in the display panel, the display area includes a base substrate and a driving unit located on the base substrate, the driving unit includes at least two mutually insulated source and drain metal layers, wherein the metal routing is in the same layer as one of the source and drain metal layers.
[0011] Optionally, in the display panel, the display area comprises a base substrate, a shielding layer located on the base substrate, and a driving unit located on the shielding layer, wherein the driving unit comprises a gate layer and at least two mutually insulated source and drain metal layers;
[0012] Wherein, the first branch line is a metal routing line located in one of the source-drain metal layers; or, the first branch line includes metal routing lines that are interconnected and are in the same layer as at least two layers of the source-drain metal layers;
[0013] The second branch line is a metal wiring located in the shielding layer; or, the second branch line is a metal wiring located in the gate layer.
[0014] Optionally, in the display panel, the first fan-out routing also includes a third branch line that passes through the dam portion, connects the first branch line and the second branch line and extends in a direction away from the display area, wherein the third branch line is in the same layer as a first source-drain metal layer among at least two source-drain metal layers, and the first source-drain metal layer is the source-drain metal layer among the at least two source-drain metal layers that is the shortest distance from the base substrate.
[0015] Optionally, in the display panel, the display area includes an arc-shaped boundary and a straight boundary connected to the arc-shaped boundary, wherein the at least two branches are arranged around the arc-shaped boundary and extend to the straight boundary and are connected on one side of the straight boundary.
[0016] Optionally, in the display panel, a routing width of the first branch line is greater than a routing width of the second branch line.
[0017] Optionally, in the display panel, the display area includes a plurality of data lines arranged in parallel, the fan-out wiring further includes a plurality of parallel second fan-out wirings, and the plurality of second fan-out wirings are electrically connected to the plurality of data lines in a one-to-one correspondence;
[0018] The display area includes a base substrate and a driving unit located on the base substrate, the driving unit includes at least two mutually insulated source and drain metal layers, and each data line is located in one of the source and drain metal layers; wherein two adjacent second fan-out lines are respectively located in different source and drain metal layers.
[0019] Optionally, in the display panel, a dam portion surrounding the display area is provided on the non-display area, and the second fan-out wiring is located on a side of the dam portion close to the display area;
[0020] The fan-out routing also includes a plurality of parallel third fan-out routings, the plurality of third fan-out routings are connected to the plurality of second fan-out routings in a one-to-one correspondence, and each of the third fan-out routings passes through the dam portion and extends in a direction away from the display area.
[0021] Optionally, in the display panel, the display area further comprises a shielding layer located between the base substrate and the driving unit, and the driving unit comprises at least two gate layers insulated from each other;
[0022] The third fan-out routing is in the same layer as the shielding layer; or the third fan-out routing is in the same layer as one of the gate layers, or the third fan-out routing includes multiple layers of routing that are interconnected and in the same layer as at least two gate layers.
[0023] Optionally, in the display panel, the display area includes a plurality of data lines arranged in parallel, the fan-out wiring further includes a plurality of parallel second fan-out wirings, and the plurality of second fan-out wirings are electrically connected to the plurality of data lines in a one-to-one correspondence;
[0024] Wherein, the display area includes a base substrate and a driving unit located on the base substrate, and the driving unit includes at least two gate layers insulated from each other;
[0025] Along the arrangement direction of the multiple second fan-out routings, the multiple second fan-out routings include multiple routing groups, the number of second fan-out routings in each routing group is the same as the number of the gate layers, and the second fan-out routings in each routing group are on the same layer as one of the gate layers, and at least two second fan-out routings in each routing group are on the same layer as the gate layers of different layers.
[0026] One embodiment of the present invention further provides a display device, comprising a display panel as described in any one of the above items. At least one of the above technical solutions in the specific embodiment of the present invention has the following beneficial effects:
[0027] The display panel described in the embodiment of the present invention sets the fan-out line connected to the power signal line on the fan-out area from one to multiple, so that the current on the power signal line is distributed and transmitted on different lines, so as to achieve the effect of reducing the current density, thereby reducing the problem of excessive temperature rise and heat generation caused by the high current density of the power signal line on the fan-out area in the narrow frame design of medium and large-sized display panels. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Figure 1 is a schematic diagram of a planar structure of a display panel according to an embodiment of the present invention;
[0029] Figure 2 A partial structural schematic diagram of one implementation mode of a display panel according to an embodiment of the present invention;
[0030] Figure 3 A partial structural schematic diagram of another implementation manner of the display panel according to an embodiment of the present invention;
[0031] Figure 4 is a schematic cross-sectional structure diagram of a display area of a display panel according to an embodiment of the present invention;
[0032] Figure 5 A schematic cross-sectional structure diagram of two branches of a first fan-out routing line in the first embodiment of the display panel according to the embodiment of the present invention;
[0033] Figure 6 A schematic cross-sectional structure diagram of two branches of a first fan-out line in a second implementation mode of a display panel according to an embodiment of the present invention;
[0034] Figure 7 A schematic cross-sectional structure diagram of two branches of a first fan-out wiring in a third embodiment of a display panel according to an embodiment of the present invention;
[0035] Figure 8 A schematic cross-sectional structure diagram of two branches of a first fan-out routing line in a fourth implementation mode of a display panel according to an embodiment of the present invention;
[0036] Fig. 9 It is a schematic diagram of the planar structure of the second fan-out wiring in the first embodiment of the display panel according to the embodiment of the present invention;
[0037] Fig.10 A schematic cross-sectional structure diagram of a second fan-out wiring in one implementation manner of a display panel according to an embodiment of the present invention;
[0038] Fig.11 A schematic diagram of a planar structure of a second fan-out wiring in a second implementation mode of a display panel according to an embodiment of the present invention;
[0039] Fig.12 A schematic cross-sectional structure diagram of a second fan-out wiring in another implementation manner of the display panel according to an embodiment of the present invention;
[0040] Fig.13 It is a schematic diagram of the planar structure of the second fan-out wiring in the third implementation mode of the display panel according to the embodiment of the present invention. DETAILED DESCRIPTION
[0041] In order to make the technical problems, technical solutions and advantages to be solved by the present invention more clear, a detailed description will be given below with reference to the accompanying drawings and specific embodiments.
[0042] The terms “on”, “formed on” and “disposed on” in the present invention may mean that one layer is directly formed or disposed on another layer, or may mean that one layer is indirectly formed or disposed on another layer, i.e., there are other layers between the two layers.
[0043] It should be noted that, although the terms "first", "second", etc. may be used herein to describe various parts, components, elements, regions, layers and / or parts, these parts, components, elements, regions, layers and / or parts should not be limited by these terms. Instead, these terms are used to distinguish one part, component, element, region, layer and / or part from another.
[0044] In the present invention, unless otherwise specified, the term "same-layer arrangement" used means that two layers, parts, components, elements or parts can be formed by the same preparation process (such as patterning process, etc.), and the two layers, parts, components, elements or parts are generally formed of the same material. For example, two or more functional layers are arranged in the same layer, which means that these functional layers arranged in the same layer can be formed using the same material layer and the same preparation process, thereby simplifying the preparation process of the display panel.
[0045] In the present invention, unless otherwise specified, the expression "patterning process" generally includes the steps of photoresist coating, exposure, development, etching, photoresist stripping, etc. The expression "one-time patterning process" means a process of forming a patterned layer, component, member, etc. using one mask.
[0046] In the present invention, in order to solve the problem of the prior art display panel that the current density of the connecting wiring is high and generates heat due to the narrow frame, an embodiment of the present invention provides a display panel, and the fan-out wiring connected to the power signal line on the fan-out area is set from one to multiple, so that the current on the power signal line is distributed and transmitted on different wirings to achieve the effect of reducing the current density, so as to reduce the problem of excessive temperature rise and heat generation due to the high current density of the power signal line on the fan-out area in the narrow frame design of medium and large-sized display panels.
[0047] Figure 1 This is a schematic diagram of the planar structure of a display panel in an embodiment of the present invention, wherein the display panel 100 includes a display area 110 and a non-display area 120 adjacent to an edge of the display area 110, wherein the non-display area 120 includes a fan-out area 121, wherein a pad area 130 is provided on a side of the non-display area 120 and the fan-out area 121 away from the display area 110.
[0048] At least one power signal line 111 is arranged on the display area 110, and optionally, the power signal line 111 includes a VSS signal line and / or a VDD signal line. The fan-out area 121 is provided with at least one fan-out routing, wherein the power signal line 111 is connected to the pad area 130 through the fan-out routing, and is electrically connected to a corresponding pin of a driving IC (not shown in the figure) on the pad area 130, so as to input a power signal to the power signal line 111 of the display area 110 through the driving IC.
[0049] In the embodiment of the present invention, combined with Figure 1 and Figure 2 As shown, a first fan-out routing line 1211 in at least one fan-out routing line is connected to a first power signal line 1111 in at least one power signal line 111, wherein at least a portion of the line segments of the first fan-out routing line 1211 include at least two branch lines 12111, and the at least two branch lines 12111 are respectively arranged around the display area 110 and connected at one position of the fan-out area 121.
[0050] Compared with the prior art, the fan-out area of the display panel described in this embodiment has a fan-out line connected to the power signal line as one line, which is converted into at least two branches, so that the current on the power signal line is distributed and transmitted in different lines to achieve the effect of reducing the current density.
[0051] In one embodiment, optionally, Figure 1 and Figure 2 As shown, the display area 110 includes an arc-shaped boundary 1101 and a straight boundary 1102 connected to the arc-shaped boundary 1101, wherein two branches 12111 are arranged around the arc-shaped boundary 1101 and extend to the straight boundary 1102 and are connected on one side of the straight boundary 1102. Optionally, at least two branches 12111 are also connected on one side of the arc-shaped boundary 1101.
[0052] Among them, the arc-shaped boundary 1101 is usually located at the adjacent edge corner of the display area 110. By adopting this implementation, the first fan-out line 1211 located at the arc-shaped boundary and connected to the first power signal line 1111 is transformed from one branch line to two branches, so as to solve the problem of high current density and excessive temperature rise at the edge corner of the display area 110 in the narrow-frame display panel.
[0053] In one embodiment of the present invention, optionally, the first power signal line 1111 is a VSS signal line, that is, the first fan-out routing 1211 is a routing line connected to the VSS signal line. It should be noted that the first power signal line 1111 is not limited to being a VSS signal line, for example, it can also be a VDD signal line. In the following implementation of the embodiment of the present invention, taking the first power signal line 1111 as a VSS signal line as an example, the specific implementation structure of the first fan-out routing 1211 is described in detail. The implemented structure is also applicable to the case where the first power signal line 1111 is a VDD signal line, and will not be repeated here.
[0054] like Figure 1 , and combined with Figure 2 As shown, a dam portion 300 is provided on the non-display area 120 and is arranged around the display area 110, wherein a first branch line 1 of the at least two branch lines 12111 is located on a side of the Dam portion 300 close to the display area, and a second branch line 2 of the at least two branch lines except the first branch line is located on a side of the Dam portion 300 away from the display area 110.
[0055] In this implementation, the first branch line 1 is arranged on the inner side of the Dam portion 300 (that is, on the side close to the display area 110), and the other branches except the first branch line 1 (each branch line can be called the second branch line 2) are arranged on the outer side of the Dam portion 300 (that is, on the side away from the display area 110). In this way, only one first branch line 1 is arranged inside the Dam portion 300 to ensure the narrow frame design requirement of the display panel.
[0056] Among them, the Dam part 300 is arranged on the non-display area and around the display area 110, and is used to be combined with the packaging film of the display device to realize the packaging of the display panel to block the flow of the organic film constituting the packaging film, thereby preventing the organic film from being exposed to the outside of the display device or penetrating into the pad area.
[0057] like Figure 2 As shown in one embodiment, a first branch line 1 is arranged inside the Dam portion 300, and a second branch line 2 is arranged outside the Dam portion 300. Figure 3 As shown, a first branch line 1 is arranged inside the Dam portion 300 , and two second branch lines 2 are arranged outside the Dam portion 300 .
[0058] It should be noted that in the above embodiment, the number of second branch lines 2 disposed outside the Dam portion 300 is only for illustration and is not limited to the above embodiment.
[0059] Combination Figure 2 and Figure 3As shown, the first fan-out routing 1211 further includes a third branch line 3 that passes through the Dam portion 300 , connects the first branch line 1 and the second branch line 2 , and extends in a direction away from the display area 110 .
[0060] By providing the third branch line 3, the first branch line 1 and the second branch line 2 are connected, so that the first branch line 1 and the second branch line 2 are short-circuited into the same fan-out routing.
[0061] Among them, optionally, in an embodiment of the present invention, the third branch line 3 extends in the non-display area 120 in a direction away from the display area 110, and the extending direction is toward the direction of the setting connection port of the display device for inputting a power signal on the display area 110.
[0062] In the embodiment of the present invention, optionally, the routing width of the first branch line 1 is greater than the routing width of the second branch line 2, for example, the routing width of the first branch line 1 is twice the routing width of the second branch line 2, for example, the routing width of the first branch line 1 is 400um, and the routing width of the second branch line 2 is 200um, and this size is only for example and is not limited to this. It should be noted that the routing width of the first branch line 1 and the second branch line 2 is the width perpendicular to the extension direction of the routing length.
[0063] By adopting this implementation mode, by setting the routing width of the first branch line 1 to be larger than the routing width of the second branch line 2, the current density on the first branch line 1 arranged on the inner side of the Dam part 300 is lower than the current density on the second branch line 2, so as to effectively reduce the current density of the power signal line at the frame of the display panel and avoid the problem of excessive temperature rise.
[0064] In the embodiment of the present invention, the first branch line 1 and the second branch line 2 are metal routing lines located in different layers; or,
[0065] At least one of the first branch line 1 and the second branch line 2 includes at least two layers of metal wiring connected to each other.
[0066] In one embodiment of the present invention, optionally, the first branch line 1 and the second branch line 2 respectively use one of the at least two source-drain metal layers of the display area 110 for routing, that is, the first branch line 1 and the second branch line 2 are respectively on the same layer as one of the source-drain metal layers, and / or, at least one of the first branch line 1 and the second branch line 2 uses at least two layers of source-drain metal layer routing, that is, at least one of the first branch line 1 and the second branch line 2 is formed by multi-layer routing, including metal routings that are interconnected and on the same layer as at least two source-drain metal layers.
[0067] like Figure 4 The cross-sectional structure diagram of the display area 110 in the embodiment of the present invention is shown below in combination with Figure 4The display area structure of the display panel in the present invention is described.
[0068] Optionally, the display panel is an OLED display panel, and the display area 110 includes a base substrate 140 and a driving unit 150 located on the base substrate 140 , wherein the driving unit 150 is formed as a plurality of thin film transistor arrays.
[0069] Optionally, the base substrate 140 is made of a flexible insulating material, and the material of the base substrate 140 can be transparent, semi-transparent or opaque. Figure 4 A first insulating layer 141 is arranged on the base substrate 140, and the first insulating layer 141 covers the entire surface of the base substrate 140. Optionally, a shielding LS layer 142 is arranged on the first insulating layer 141, and a buffer layer 143 is arranged on the LS layer 142, wherein the buffer layer 143 covers the entire base substrate 140 on which the LS layer 142 is arranged.
[0070] The shielding LS layer 142 may be made of a light-shielding metal material. In one embodiment, the shielding LS layer 142 may be formed as a bottom shielding metal BSM, which may be connected to one of the electrodes of the upper thin film transistor to form a standby gate.
[0071] Alternatively, if Figure 4 As shown, the driving unit 150 includes an active layer 151 disposed on the buffer layer 143, a first gate insulating layer 152 covering the active layer 151, a first gate layer 153 formed on the first gate insulating layer 152, a second gate insulating layer 154 disposed on the first gate layer 153, a second gate layer 155 formed on the second gate insulating layer 154, an interlayer insulating layer 156 disposed on the second gate layer 155, a first source-drain metal layer 157 formed on the interlayer insulating layer 156, a second insulating layer 158 disposed on the first source-drain metal layer 157, a first planarizing layer 159 disposed on the second insulating layer 158, a second source-drain metal layer 160 formed on the first planarizing layer 159, a second planarizing layer 161 disposed on the second source-drain metal layer 160, a third source-drain metal layer 162 formed on the second planarizing layer 161, and a third planarizing layer 163 disposed on the third source-drain metal layer 162.
[0072] Among them, Figure 4As shown, the first gate layer 153 includes a first gate 1531, which is located above the active layer 151; the first source-drain metal layer 157 includes a first data line electrode 1571 and a second data line electrode 1572, wherein the first data line electrode 1571 and the second data line electrode 1572 are formed as the source and drain of the first gate 1531, and the first data line electrode 1571 and the second data line electrode 1572 are electrically connected to the active layer 151 through vias penetrating the interlayer insulating layer 156, the second gate insulating layer 154 and the first gate insulating layer 152, respectively.
[0073] Optionally, the second gate layer 155 includes a second gate 1551 , and the second data line electrode 1572 is located above the second gate 1551 .
[0074] In addition, a third data line electrode 1601 is arranged on the second source-drain metal layer 160, and the third data line electrode 1601 is electrically connected to the first data line electrode 1571 by via holes penetrating the first flat layer 159 and the second insulating layer 158 in sequence; the third source-drain metal layer 162 includes a fourth data line electrode 1621, and the fourth data line electrode 1621 is electrically connected to the third data line electrode 1601 by via holes penetrating the second flat layer 161.
[0075] The display panel 100 further includes a light emitting unit 400 disposed on the driving unit 150. Figure 4 As shown, the light emitting unit 400 includes an anode layer 410 , a pixel defining layer 420 , a light emitting layer 430 and a cathode layer 440 sequentially arranged on the third planar layer 163 , wherein the anode layer 410 is electrically connected to the fourth data line electrode 1621 through a via hole penetrating the third planar layer 163 .
[0076] In this embodiment, signals are input to the first gate electrode 1531 , the second gate electrode 1551 and the first data line electrode 1571 , the second data line electrode 1572 , the third data line electrode 1601 and the fourth data line electrode 1621 respectively to control the light emitting state of the light emitting unit 400 .
[0077] It should be noted that the implementation structure of the display panel in the above-mentioned embodiment of the present invention is only for illustration and is not limited thereto.
[0078] In one embodiment of the display panel of the present invention, the first branch line 1 and the second branch line 2 are metal wirings located in different layers, wherein the metal wirings are in the same layer as one of the first source-drain metal layer 157, the second source-drain metal layer 160, and the third source-drain metal layer 162. Figures 1 to 5As shown, optionally, in the fan-out area 121, the metal routing of the first branch line 1 is in the same layer as the first source-drain metal layer 157, that is, the first branch line 1 is made on the interlayer insulating layer 156, and is made using the same composition process as the first data line electrode 1571 and the second data line electrode 1572; the metal routing of the second branch line 2 is in the same layer as the third source-drain metal layer 162, that is, it is made on the second flat layer 161, and is made using the same composition process as the fourth data line electrode 1621.
[0079] Among them, the first branch line 1 is not limited to being able to be on the same layer with the first source-drain metal layer 157, for example, it can also be on the same layer with one of the second source-drain metal layer 160 and the third source-drain metal layer 162; similarly, the second branch line 2 is not limited to being able to be on the same layer with the third source-drain metal layer 162, it can also be on the same layer with one of the first source-drain metal layer 157 and the second source-drain metal layer 160, as long as it can be ensured that the first branch line 1 and the second branch line 2 are in different layers.
[0080] Experiments have shown that when the first branch line 1 and the second branch line 2 are respectively routed using one of the source and drain metal layers, the VSS current density inside the Dam portion 300 can be reduced to two thirds of the original value compared to setting only one fan-out route connected to the VSS line.
[0081] In another embodiment, at least one of the first branch line 1 and the second branch line 2 includes at least two layers of metal wiring connected to each other, that is, at least one of the first branch line 1 and the second branch line 2 is a multi-layer wiring, that is, at least one of the first branch line 1 and the second branch line 2 includes metal wiring connected to each other and in the same layer as at least two source and drain metal layers. Figure 6 , and combined with Figure 4 As shown, in the fan-out area 121, the first branch line 1 uses a single layer of routing, such as the metal routing of the first branch line 1 is on the same layer as the third source-drain metal layer 162; the second branch line 2 uses multiple layers of routing, such as the second branch line 2 includes a first metal routing 21, a second metal routing 22 and a third metal routing 23 which are interconnected and are on the same layer as the first source-drain metal layer 157, the second source-drain metal layer 160 and the third source-drain metal layer 162 respectively.
[0082] Optionally, when there are multiple second branch lines 2, the manufacturing structures of the multiple second branch lines 2 are the same, so as to simplify the manufacturing process.
[0083] In the embodiment of the present invention, by adopting this implementation mode, a first branch line 1 is arranged inside the Dam portion 300 and at least two second branch lines 2 are arranged outside the Dam portion 300, so as to effectively reduce the VSS current density inside the Dam portion 300.
[0084] It should be noted that the above Figure 6The specific implementation method of using multi-layer routing for at least one of the first branch line 1 and the second branch line 2 is shown for illustrative purposes only and is not limited thereto. For example, the first branch line 1 can be a multi-layer routing and the second branch line 2 can be a single-layer routing. Each implementation method is not illustrated separately here.
[0085] In another embodiment of the present invention, see Figure 4 As shown, the first branch line 1 is a metal wiring located in one of the source and drain metal layers; or, the first branch line 1 includes metal wirings that are interconnected and are in the same layer as at least two source and drain metal layers;
[0086] The second branch line 2 is a metal wiring located in the LS layer 142; or, the second branch line 2 is a metal wiring located in the gate layer.
[0087] For example, one implementation method is as follows: Figure 7 As shown, the first branch line 1 is a multi-layer wiring, such as a first metal wiring 11, a second metal wiring 12 and a third metal wiring 13 which are interconnected and are in the same layer as the first source-drain metal layer 157, the second source-drain metal layer 160 and the third source-drain metal layer 162 respectively; the metal wiring of the second branch line 2 is in the same layer as the LS layer 142. With this embodiment, the VSS current density inside the Dam portion 300 can also be reduced by utilizing the characteristic that the resistivity of the LS layer 142 is equivalent to the resistivity of the source-drain metal layer.
[0088] Another embodiment, such as Figure 8 As shown, the first branch line 1 is a single layer, such as the metal wiring of the first branch line 1 is in the same layer as the first source-drain metal layer 157; the second branch line 2 is also a single layer, and when the gate layer is multi-layered, in the embodiment of the present invention, the metal wiring of the second branch line 2 can be in the same layer as the first gate layer 153, or can also be in the same layer as the second gate layer 155. With this implementation, the resistivity of the material of the gate layer is higher than that of the material of the source-drain metal layer, so as to achieve the effect of reducing the VSS current density inside the Dam portion 300.
[0089] In the embodiment of the present invention, optionally, the third branch line 3 connecting the first branch line 1 and the second branch line 2 is in the same layer as the first source-drain metal layer of the at least two source-drain metal layers, and the first source-drain metal layer is the source-drain metal layer with the shortest distance from the substrate among the at least two source-drain metal layers. Figure 4 As shown, the third branch line 3 is in the same layer as the first source-drain metal layer 157. In this embodiment, the third branch line 3 passing through the Dam portion 300 is routed in the same layer as the first source-drain metal layer 157 to ensure packaging reliability.
[0090] The display panel according to the embodiment of the present invention is as follows: Figure 1As shown, the display area 110 includes a plurality of data lines 30 arranged in parallel, wherein the fan-out lines arranged on the fan-out area 121 also include a plurality of parallel second fan-out lines 1212, and the plurality of second fan-out lines 1212 are electrically connected to the plurality of data lines 30 in a one-to-one correspondence, so that the data signal for image display in the display area 110 is transmitted to each data line 30 through the second fan-out lines 1212.
[0091] In the fan-out area 121 , a plurality of second fan-out wirings 1212 are sequentially arranged along the first direction X and are spaced apart from each other.
[0092] In the embodiment of the present invention, combined with Figure 4 As shown, among the multiple data lines 30 in the display area 110, each data line 30 is located in one of the source-drain metal layers (one of the first source-drain metal layer 157, the second source-drain metal layer 160, and the third source-drain metal layer 162). Among them, corresponding to the second fan-out wiring 1212 connected to each data line 30 in a one-to-one correspondence, the multiple second fan-out wirings 1212 are respectively arranged in a staggered manner, and specifically, two adjacent second fan-out wirings 1212 are respectively located in different source-drain metal layers.
[0093] With this implementation, the second fan-out wiring 1212 of the fan-out area 121 is made of the same layer of material as the data line. Compared with the prior art that uses the same layer of material as the gate, the second fan-out wiring 1212 is made of the same layer of material as the source and drain metal layer with a lower resistivity, which can greatly reduce the resistance of the second fan-out wiring 1212. In addition, two adjacent second fan-out wirings 1212 are located in different layers, which can reduce the setting density of the second fan-out wiring, so as to increase the refresh frequency of the display panel. Experiments have shown that using the same layer of material as the source and drain metal layer to make the second fan-out wiring 1212 can increase the refresh frequency of the display panel from 60Hz to about 100Hz. The smaller the screen, the more the refresh frequency increases.
[0094] In one implementation, a plurality of second fan-out traces 1212 are respectively located in the first source-drain metal layer 157 and the second source-drain metal layer 160, and are alternately arranged in the first source-drain metal layer 157 and the second source-drain metal layer 160 as an example. Fig. 9 and Fig.10 As shown, the plurality of second fan-out lines 1212 include a first portion 4 extending along a second direction and a second portion 5 extending along a third direction, wherein the first portion 4 may correspond to a bent portion of the non-display area, and the second portion 5 extends in a direction away from the display area 110 to extend to the pad area 130 and be electrically connected to the control IC.
[0095] In the embodiment of the present invention, Fig.10As shown, among the two adjacent second fan-out wirings 1212, one of the first fan-out wirings 1212 and the first source-drain metal layer 157 is in the same layer, and the first source-drain metal layer 157 is in the same layer. Figure 4 As shown, that is, it is made on the interlayer insulating layer 156, and optionally, the first data line electrode 1571 and the second data line electrode 1572 of the first source-drain metal layer 157 are made by the same composition process; another first fan-out wiring 1212 is in the same layer as the second source-drain metal layer 160, that is, it is made on the first flat layer 159, and optionally, it is made by the same composition process as the third data line electrode 1601 of the second source-drain metal layer 160.
[0096] It should be noted that the multiple second fan-out routings 1212 are not limited to being able to adopt only a setting structure that is respectively on the same layer as the first source-drain metal layer 157 and the second source-drain metal layer 160, and is staggered in the first source-drain metal layer 157 and the second source-drain metal layer 160, wherein each of the multiple second fan-out routings 1212 is respectively on the same layer as one of the first source-drain metal layer 157, the second source-drain metal layer 160 and the third source-drain metal layer 162, and two adjacent second fan-out routings 1212 are located in different layers, which are all within the protection scope of the present invention.
[0097] In one implementation of the embodiment of the present invention, optionally, the Dam portion 300 is disposed on the first portion 4 of the plurality of second fan-out traces 1212 to facilitate a narrow frame design of the display device.
[0098] The display panel according to the embodiment of the present invention, in another implementation manner, Fig.11 As shown, the Dam portion 300 is disposed on the second portion 5 of the plurality of second fan-out routing lines 1212, wherein the second fan-out routing lines 1212 disposed according to the above implementation structure are located on the side of the Dam portion 300 close to the display area 110. The fan-out routing lines further include a plurality of parallel third fan-out routing lines 1213, the plurality of third fan-out routing lines 1213 are connected to the plurality of second fan-out routing lines 1212 in a one-to-one correspondence, and each third fan-out routing line 1213 passes through the Dam portion 300 and extends in a direction away from the display area.
[0099] In the embodiment of the present invention, combined with Figure 4 As shown, optionally, the third fan-out trace 1213 and the LS layer 142 are in the same layer.
[0100] In this embodiment, in the fan-out area 121, each fan-out routing line connected to the data line of the display area includes a second fan-out routing line 1212 and a third fan-out routing line 1213. On the inner side of the Dam portion 300, each of the plurality of second fan-out routing lines 1212 is in the same layer as one of the first source-drain metal layer 157, the second source-drain metal layer 160, and the third source-drain metal layer 162, and two adjacent second fan-out routing lines 1212 are located on different layers. When passing through the Dam portion 300, , a third fan-out routing 1213 on the same layer as the LS layer 142 is used for connection, wherein the resistivity of the LS layer 142 is equivalent to the resistivity of the material of the source and drain metal layer, which is approximately 0.052Ω. In this way, in addition to ensuring the refresh frequency of the display device, since the material of the LS layer 142 passes through the Dam portion 300, an inorganic layer protection such as an insulating layer and an interlayer insulating layer is provided above the LS layer 142, which can effectively prevent water vapor from penetrating the LS layer into the interior of the Dam portion 300, which is beneficial to improving reliability and does not require the addition of a new film layer.
[0101] In the embodiment of the present invention, optionally, the distance between the connection point between the second fan-out wiring 1212 and the third fan-out wiring 1213 and the Dam portion 300 is greater than 50 um.
[0102] In another implementation manner of the display panel described in the embodiment of the present invention, the third fan-out wiring 1213 and the gate layer of the display area are in the same layer.
[0103] The driving unit includes at least two mutually insulated gate layers, wherein the third fan-out routing is in the same layer as one of the gate layers, or the third fan-out routing includes multiple layers of routing that are interconnected and in the same layer as at least two gate layers.
[0104] With this implementation, when passing through the Dam portion 300, a third fan-out routing 1213 which is on a different layer from the second fan-out routing 1212 is used for connection. For example, the third fan-out routing 1213 may be on the same layer as the LS layer 142 or on the same layer as the gate layer. In this way, the upper inorganic layer is used for protection to block the entry of water vapor from above. This can prevent the packaging reliability problem caused by water vapor entering the inner side of the Dam portion 300 along the edge of the second fan-out routing 1212 when the second fan-out routing 1212 passes through the Dam portion 300.
[0105] One implementation method, such as Figure 4 Combined with Fig.12As shown, taking the gate layer of the display area 110 including the first gate layer 152 and the second gate layer 155 as an example, the third fan-out wiring 1213 includes two layers of wiring that are interconnected and are respectively on the same layer as the first gate layer 152 and the second gate layer 155, and the two layers of wiring are interconnected through vias penetrating the second gate insulation layer 154.
[0106] Similarly, when the display area 110 includes more than two gate layers, the third fan-out wiring may include multiple layers of wiring that are interconnected and are in the same layer as at least two gate layers. For specific implementation structures, please refer to Fig.12 As shown, each implementation structure will not be described in detail here.
[0107] In another implementation manner of the display panel according to the embodiment of the present invention, when the driving unit includes at least two gate layers insulated from each other, as shown in FIG. Fig.13 As shown, along the arrangement direction of the second fan-out routing 1212, the plurality of second fan-out routings 1212 include a plurality of routing groups 6, the number of the second fan-out routings 1212 in each routing group 6 is the same as the number of the gate layers, and the second fan-out routings 1212 in each routing group 6 are on the same layer as one of the gate layers, and at least two second fan-out routings 1212 in each routing group 6 are on the same layer as gate layers of different layers, respectively.
[0108] Take the driving unit including three gate layers as an example. Fig.13 As shown, a routing group 6 includes three second fan-out routings 1212, wherein the first second fan-out routing 1212 arranged in sequence is on the same layer as the first gate layer, the second second fan-out routing 1212 is on the same layer as the second gate layer, and the third second fan-out routing 1212 is on the same layer as the third gate layer. In this way, the second fan-out routing 1212 of each routing group 6 is arranged in this manner, forming a structure in which multiple routing groups 6 are arranged in sequence, and multiple second fan-out routings 1212 use different gate layers for alternating routing.
[0109] With this implementation, when the driving unit includes at least two mutually insulated gate layers, multiple second fan-out routings are routed alternately using different gate layers. In this way, the thicker dielectric layers between the multiple gate layers are utilized to reduce the lateral capacitance between the data lines, thereby achieving high-frequency display and narrow frame effects.
[0110] Another aspect of the embodiments of the present invention further provides a display device, wherein the display device comprises a display panel according to any one of the above implementation structures.
[0111] In the embodiment of the present invention, combined with Figures 1 to 13 , a specific implementation structure of a display device using the display panel described in the embodiment of the present invention can be obtained, which will not be described in detail here.
[0112] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary personnel in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.
Claims
1. A display panel, comprising a display area and a non-display area adjacent to an edge of the display area, the non-display area comprising a fan-out area, the display area being provided with at least one power signal line, the fan-out area being provided with at least one fan-out wiring, characterized in that: A first fan-out line of the at least one fan-out line is connected to a first power signal line of the at least one power signal line, and at least a portion of the line segment of the first fan-out line includes at least two branches, and the at least two branches are respectively arranged around the display area and connected at one position of the fan-out area; The non-display area is provided with a dam portion surrounding the display area, wherein a first branch line of the at least two branch lines is located on a side of the dam portion close to the display area, and a second branch line of the at least two branch lines except the first branch line is located on a side of the dam portion away from the display area; The routing width of the first branch line is greater than the routing width of the second branch line.
2. The display panel according to claim 1, characterized in that: The first branch line and the second branch line are metal routing lines located in different layers; or, At least one of the first branch line and the second branch line includes at least two layers of metal routing lines connected to each other.
3. The display panel according to claim 2, characterized in that: The display area includes a base substrate and a driving unit located on the base substrate, the driving unit includes at least two mutually insulated source and drain metal layers, wherein the metal wiring is in the same layer as one of the source and drain metal layers.
4. The display panel according to claim 2, characterized in that: The display area includes a base substrate, a shielding layer located on the base substrate, and a driving unit located on the shielding layer, wherein the driving unit includes a gate layer and at least two mutually insulated source and drain metal layers; Wherein, the first branch line is a metal routing line located in one of the source-drain metal layers; or, the first branch line includes metal routing lines that are interconnected and are in the same layer as at least two layers of the source-drain metal layers; The second branch line is a metal wiring located in the shielding layer; or, the second branch line is a metal wiring located in the gate layer.
5. The display panel according to claim 3 or 4, characterized in that: The first fan-out routing also includes a third branch line that passes through the dam portion, connects the first branch line and the second branch line, and extends in a direction away from the display area, wherein the third branch line is in the same layer as a first source-drain metal layer of at least two source-drain metal layers, and the first source-drain metal layer is the source-drain metal layer of the at least two source-drain metal layers that is the shortest distance from the substrate.
6. The display panel according to claim 1, characterized in that: The display area includes an arc-shaped boundary and a straight boundary connected to the arc-shaped boundary, wherein the at least two branch lines are arranged around the arc-shaped boundary and extend to the straight boundary and are connected at one side of the straight boundary.
7. The display panel according to claim 1, characterized in that: The display area includes a plurality of data lines arranged in parallel, the fan-out wiring further includes a plurality of parallel second fan-out wirings, and the plurality of second fan-out wirings are electrically connected to the plurality of data lines in a one-to-one correspondence; The display area includes a base substrate and a driving unit located on the base substrate, the driving unit includes at least two mutually insulated source and drain metal layers, and each data line is located in one of the source and drain metal layers; wherein two adjacent second fan-out lines are respectively located in different source and drain metal layers.
8. The display panel according to claim 7, characterized in that: The non-display area is provided with a dam portion surrounding the display area, and the second fan-out wiring is located on a side of the dam portion close to the display area; The fan-out routing also includes a plurality of parallel third fan-out routings, the plurality of third fan-out routings are connected to the plurality of second fan-out routings in a one-to-one correspondence, and each of the third fan-out routings passes through the dam portion and extends in a direction away from the display area.
9. The display panel according to claim 8, characterized in that: The display area further includes a shielding layer located between the base substrate and the driving unit, and the driving unit includes at least two gate layers insulated from each other; The third fan-out routing is in the same layer as the shielding layer; or the third fan-out routing is in the same layer as one of the gate layers, or the third fan-out routing includes multiple layers of routing that are interconnected and in the same layer as at least two gate layers.
10. The display panel according to claim 1, characterized in that: The display area includes a plurality of data lines arranged in parallel, the fan-out wiring further includes a plurality of parallel second fan-out wirings, and the plurality of second fan-out wirings are electrically connected to the plurality of data lines in a one-to-one correspondence; Wherein, the display area includes a base substrate and a driving unit located on the base substrate, and the driving unit includes at least two gate layers insulated from each other; Along the arrangement direction of the plurality of second fan-out routings, the plurality of second fan-out routings include a plurality of routing groups, the number of the second fan-out routings in each routing group is the same as the number of the gate layers, and the second fan-out routings in each routing group are on the same layer as one of the gate layers, and at least two second fan-out routings in each routing group are on the same layer as different layers of the gate layers.
11. A display device, characterized in that: A display panel comprising any one of claims 1 to 10.
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