Magnetoresistive random access memory and method of making the same

Abstract

A magnetic random access memory and a method for fabricating the same are disclosed. The magnetic random access memory includes a conductive plug in a substrate, wherein an upper edge of the conductive plug has a convex portion extending outward on one side and a concave portion recessing inward on another side. The magnetic random access memory also includes a storage cell having a lower electrode electrically connected to the conductive plug, a magnetic tunnel junction (MTJ) interface on the lower electrode, and an upper electrode on the MTJ interface. A bottom surface of the storage cell completely overlaps a top surface of the conductive plug.

Description

[0001] This application is a divisional application of Chinese invention patent application (application number: 201810076594.2, application date: January 26, 2018, invention title: magnetoresistive random access memory and method of manufacturing the same). Technical Field

[0002] This invention relates to a magnetoresistive random access memory, and more specifically, to a magnetoresistive random access memory that provides a large alignment window and a method for manufacturing the same. Background Technology

[0003] Magnetic random access memory (MRAM) is a type of non-volatile memory that has the potential to replace current dynamic random access memory (DRAM) as the standard memory in computer devices. In particular, using MRAM as non-volatile memory will ultimately enable computer systems to function instantly, thus saving the time required for traditional computers to transfer boot settings data from the hard drive to volatile DRAM during startup.

[0004] Magnetic memory elements, also known as tunneling magnetoresistive (TMR) elements, typically contain ferromagnetic layers separated by non-magnetic layers (barrier layers) arranged in a magnetic tunnel junction (MTJ) configuration. Digital data is stored in the magnetic memory element in the form of the magnetization vector directions of the ferromagnetic layers. More specifically, one ferromagnetic layer in the magnetic memory element has its magnetic moment magnetically pinned, called the reference layer, while the magnetic moment of the other ferromagnetic layer can freely change between the same direction and opposite direction as the reference layer's magnetization, called the free layer. Its direction can be changed by applying an external magnetic field to the character lines or bit lines. The orientation of the magnetic moment of the free layer is what we know as the parallel state and antiparallel state, where the parallel state means that the free layer and the reference layer have the same magnetic alignment, and the antiparallel state means that they have opposite magnetic alignment.

[0005] In typical magnetic random access memory (MRM), magnetic memory cells are electrically connected to underlying metal layers (such as character lines) via conductive plugs. During fabrication, non-magnetic and ferromagnetic layers are first stacked onto the conductive plugs, and then patterned into multiple memory cells using photolithography. Each memory cell corresponds to and is electrically connected to a conductive plug below. However, as semiconductor device dimensions shrink, the alignment window in photolithography becomes increasingly smaller. In such cases, the formed memory cells can easily shift from their intended positions and fail to fully connect to the underlying conductive plugs. This results in increased contact resistance and decreased tunneling magnetoresistance, leading to poor device performance. Summary of the Invention

[0006] In view of the problem of insufficient alignment window that occurs in the above-mentioned magnetic memory manufacturing process, the present invention proposes an improved magnetic memory structure and its manufacturing method, which increases the alignment window in the manufacturing process by increasing the contact area between the conductive plug and the magnetic tunnel penetration surface material layer, thereby avoiding the problem of poor contact between the subsequently formed memory cell and the conductive plug.

[0007] One object of the present invention is to provide a magnetoresistive random access memory, comprising a substrate, a conductive plug located within the substrate, wherein one side of the upper edge of the conductive plug has an outwardly extending protrusion and the other side of the upper edge has an inwardly recessed portion, and a storage cell comprising a lower electrode electrically connected to the conductive plug, a magnetic tunneling interface located on the lower electrode, and an upper electrode located on the magnetic tunneling interface, wherein the bottom surface of the storage cell completely overlaps with the top surface of the conductive plug.

[0008] Another object of the present invention is to provide a method for manufacturing a magnetoresistive random access memory, the steps of which include providing a substrate, forming a conductive plug in the substrate, wherein the upper edge of the conductive plug has an outwardly extending protrusion, sequentially forming a lower electrode material layer, a magnetic tunneling surface material layer, and an upper electrode material layer on the substrate and the conductive plug, and performing an anisotropic etching process to pattern the lower electrode material layer, the magnetic tunneling surface material layer, and the upper electrode material layer to form a magnetic storage cell located on the conductive plug, wherein the anisotropic etching process etches the conductive plug and the substrate to form recessed regions on the substrate on both sides of the magnetic storage cell.

[0009] These and other objects of the present invention will become more apparent to the reader after reading the following detailed description of preferred embodiments, which are illustrated in various figures and drawings. Attached Figure Description

[0010] This specification includes accompanying drawings, which form part of the document, to provide the reader with a further understanding of embodiments of the invention. These drawings depict some embodiments of the invention and, together with the description herein, illustrate its principles. In these drawings:

[0011] Figures 1-5 This is a schematic diagram of the manufacturing process of a magnetic storage element according to a preferred embodiment of the present invention.

[0012] It should be noted that all illustrations in this specification are for illustrative purposes. For clarity and ease of illustration, the size and scale of the components in the illustrations may be exaggerated or reduced. Generally, the same reference symbols in the illustrations are used to indicate corresponding or similar component features in modified or different embodiments.

[0013] Explanation of main component symbols

[0014] 100 base

[0015] 102 Lower metal layer

[0016] 104 cap layer

[0017] 106 dielectric layer

[0018] 107 Contact Hole

[0019] 108 Conductive plugs

[0020] 108a Protruding part

[0021] 108b Depression

[0022] 110 Magnetic Storage Units

[0023] 112 Lower electrode material layer (lower electrode)

[0024] 114 Magnetic tunnel interface

[0025] 116 Upper electrode material layer (upper electrode)

[0026] 120 Depression area

[0027] 122 Lining

[0028] 124 dielectric layer

[0029] 126 Upper metal layer

[0030] P1 Photolithography Etching Process Detailed Implementation

[0031] In the following detailed description of the invention, element symbols will be indicated as part of the accompanying illustrations and will be represented in a manner specific to which the embodiments may be practiced. Such embodiments will provide sufficient detail for those skilled in the art to implement them. For clarity of illustration, the thickness of some elements may be exaggerated in the illustrations. The reader should understand that other embodiments may be utilized in the invention, or structural, logical, and electrical changes may be made without departing from the described embodiments. Therefore, the following detailed description is not intended to be construed as limiting; rather, the embodiments included therein will be defined by the appended claims.

[0032] Before describing the preferred embodiments, specific terminology will be used throughout this specification. For example, the term "etching" is generally used to describe a fabrication process that patterns a material, such that at least some of the material remains after the fabrication process is completed. It should be understood that the process of etching silicon involves patterning a photoresist layer on the silicon material and then removing the silicon areas not protected by the photoresist layer. Thus, the silicon areas protected by the photoresist layer remain after the etching process is completed. However, in other examples, etching may refer to a fabrication process that does not use a photoresist layer, but in which at least a portion of the target material layer remains after the etching process is completed. Since the photoresist layer is removed after the etching process in most cases, it is not specifically shown in the illustrations of this specification unless otherwise specified.

[0033] In existing magnetoresistive random access memory (MRAM), the storage bits are coupled to vertically adjacent interconnect structures, such as metal wires or metal blocks, via interconnect structures such as conductive vias. However, misalignment of the conductive vias due to manufacturing limitations can affect the resistance of the interconnect structures, potentially leading to short circuits between adjacent interconnect structures.

[0034] To address this problem, this invention proposes a magnetoresistive random access memory (RAM) that provides a large alignment window and a method for its fabrication. Figures 1-5 This illustrates the manufacturing process of a magnetic storage element according to a preferred embodiment of the present invention. Please refer to... Figure 1First, a substrate 100 is provided, such as an inner layer dielectric (ILD) or an inter-metal dielectric (IMD), the material of which can be a low dielectric constant material such as undoped silicate glass or silicon oxide. A lower metal layer 102, such as a metal line, is formed in the substrate 100, the material of which can be copper or aluminum. In this embodiment of the invention, the lower metal layer 102 can be a source line, which is located between and parallel to the character lines. The lower metal layer 102 can also be a bit line corresponding to each magnetic memory cell, which extends parallel to each other and is orthogonal to the character lines laterally. In other embodiments, the lower metal layer 102 may not be a metal line, but a polysilicon gate or a metal gate, depending on the layer in which the magnetic memory cell is located. A capping layer 104, or dielectric protection layer, is formed on the substrate 100 and the lower metal layer 102, the material of which can be silicon carbonitride (SiCN) or silicon nitride (SiN). The capping layer 104 can be used as an etch stop layer during subsequent fabrication processes.

[0035] Rereference Figure 1 A dielectric layer 106 is formed above the capping layer 104, such as another intermetallic dielectric layer. Its material can be the same as the underlying substrate, such as a low-dielectric-constant material like undoped silicate glass or silicon oxide. Contact holes 107 are pre-formed in the dielectric layer 106, which can be formed using existing photolithography etching processes, which will not be explained in detail here. The contact holes 107 extend from above the dielectric layer 106, through the capping layer 104, to the underlying metal layer 102, and their sidewalls taper slightly from top to bottom. It should be noted that in this embodiment of the invention, the contact holes 107 are intentionally made with a larger opening shape, such as... Figure 1 The outer edge shown has an outwardly extending portion 108a. A conductive metal material, such as copper or tungsten, is then filled into the contact hole 107, followed by a chemical mechanical polishing process to form a conductive plug 108 structure as shown. A barrier layer (not shown) or other layered structure may also be formed on the outer side of the conductive plug 108; the material can be titanium, titanium nitride, tantalum, etc. In this embodiment of the invention, one side of the upper edge of the formed conductive plug 108 has an outwardly extending protrusion 108a, making its opening larger than that of a typical plug, thus providing greater alignment window for subsequent manufacturing processes. The outline of the contact hole 107 with the protrusion 108a can be formed by any suitable existing means, such as multiple etching or using spacers to block specific areas during the etching step. Since the method of forming this contact hole is not the focus of this invention, its details will not be described further.

[0036] Please refer to Figure 2 After forming the conductive plug 108 in the dielectric layer 106, a lower electrode material layer 112, a magnetic tunnel junction (MTJ) 114, and an upper electrode material layer 116 are sequentially formed on the dielectric layer 106 and the conductive plug 108. This stacked structure of three material layers constitutes the magnetic storage cell 110 of the present invention. The lower electrode material layer 112 is in direct contact with the conductive plug 108 below it, and its material can be titanium, titanium nitride, tantalum, tantalum nitride, or a combination of the above materials. The magnetic tunnel junction 114 is located above the lower electrode material layer 112 and may include a multilayer structure such as a reference layer, a barrier layer, and a free layer. In this embodiment of the invention, the free layer has variable magnetic poles, which represent data units. For example, the variable magnetic poles changing between a first state and a second state represent binary "0" and "1," respectively. The reference layer is magnetically secured, and its magnetic poles remain fixed. The barrier layer provides electrical insulation between the free layer and the reference layer, but still allows electrons to tunnel through under appropriate conditions. The free layer can be made of iron-platinum (FePt) or cobalt-iron-boron (CoFeB), and the reference layer can be made of a multilayer structure of cobalt, nickel, ruthenium, etc. Since the focus of this invention is not on the structure of the magnetic tunneling interface of the magnetic storage cell, it will not be described in detail here, and these details will not be specifically shown in the figures to avoid obscuring the focus of this invention. The upper electrode material layer 116 is located on the magnetic tunneling interface 114, and its material is the same as that of the lower electrode material layer 112, such as titanium, titanium nitride, tantalum, tantalum nitride, or a combination of the above materials.

[0037] Please refer to Figure 3 After forming the stacked structure of the lower electrode material layer 112, the magnetic tunneling interface 114, and the upper electrode material layer 116, a photolithography etching process P1 is performed to pattern the stacked structure of the lower electrode material layer 112-magnetic tunneling interface 114-upper electrode material layer 116 to form the magnetic memory cell 110. In the actual fabrication process, because the alignment accuracy of the photomask in this step has reached the limit of the machine, it is difficult for the patterned magnetic memory cell 110 to be perfectly aligned with the conductive plug 108 below. It will more or less shift to a certain side, which is the problem of insufficient alignment margin mentioned in the prior art. For this problem, the existing solution is generally to increase the area of ​​the lower electrode 112 in the bottommost layer of the magnetic memory cell 110 so that it can cover the entire conductive plug 108. However, this approach will greatly increase the layout area required for a single magnetic memory cell 110, which is not conducive to increasing the memory capacity per unit area.

[0038] Rereference Figure 3The embodiments of the present invention differ from the prior art in that they increase the contact area by forming a conductive plug 108 structure with a protruding portion 108a protruding horizontally outward from the outer edge, thus eliminating the need to increase the area of ​​the lower electrode 112 of the magnetic storage cell 110 as in the prior art. Figure 3 As shown, due to the protruding part 108a, the magnetic storage cell 110 can still completely overlap with the conductive plug 108 below even if the alignment is offset. Therefore, the contact resistance of the storage cell will not increase due to the smaller contact area, thus causing a decrease in tunneling magnetic resistance.

[0039] Rereference Figure 3 Another advantage of this invention is that the formed magnetic storage cell 110 has a self-alignment effect. This is because the photolithography etching process P1 defining the magnetic storage cell 110 causes an over-etch effect on the unmasked area below, thus forming a recessed region 120 around the magnetic storage cell 110. In this embodiment, the conductive plug 108 is also subject to over-etching. As can be seen from the figure, the exposed part on the other side of the conductive plug 108 due to the offset of the magnetic storage cell 110 is etched, forming a recessed part 108b, which together constitutes the recessed region 120. Through this self-aligned over-etching effect, the area above the conductive plug 108 that does not overlap with the magnetic storage cell 110 is removed, meaning that this approach does not increase the layout area required for a single magnetic storage cell.

[0040] Please refer to Figure 4 After the magnetic storage cell 110 is formed, a conformal substrate 122 is formed on the magnetic storage cell 110 and the dielectric layer 106 to cover the entire magnetic storage cell 110 structure. The material of the substrate 122 can be silicon carbide (SiC) or tetraethyl orthosilicate (TEOS), etc. Then, a dielectric layer 124 is deposited on the substrate 122, such as another intermetallic dielectric layer. The material can be an ultra-low dielectric constant material, such as undoped silicate glass, fluorine-doped silicon dioxide, carbon-doped silicon dioxide, porous silicon dioxide, spin-coated polymer dielectrics, such as polynorbornenes, benzocyclobutene, hydrosilsesquioxane (HSQ), or methylsilsesquioxane (MSQ), etc.

[0041] Please refer to Figure 5After the dielectric layer 124 is formed, an upper metal layer 126, such as a metal wire, is formed above the magnetic storage cell 110 in the dielectric layer 124. The metal layer 126 can be made of copper or aluminum. The liner 122 between the upper metal layer 126 and the magnetic storage cell 110 is removed, so that the upper metal layer 126 is electrically connected to the upper electrode 116 of the magnetic storage cell 110. In other embodiments, the upper electrode 116 may also be electrically connected to the upper metal layer 126 via another conductive plug.

[0042] The above description is only a preferred embodiment of the present invention. All equivalent changes and modifications made in accordance with the claims of the present invention should be included within the scope of the present invention.

Claims

1. A magnetoresistive random access memory, characterized in that, Include: Base; A conductive plug is located within the base and has a flat top surface. The upper edge of the conductive plug has a recessed portion and a protruding portion on opposite sides. The slope of the sidewall of the protruding portion is different from the slope of the bottom sidewall of the conductive plug. The flat top surface does not overlap with the recessed portion in the vertical direction, but a portion of the flat top surface overlaps with the protruding portion in the vertical direction. A magnetic storage cell includes a lower electrode electrically connected to the conductive plug, a magnetic tunneling interface located on the lower electrode, and an upper electrode located on the magnetic tunneling interface, wherein the bottom surface of the magnetic storage cell completely overlaps with the flat top surface of the conductive plug. A conformal liner is located on the surface of the recessed portion and on the sidewall of the magnetic storage cell, wherein the conformal liner is not located on the top surface of the upper electrode; as well as An upper metal layer is electrically connected to the upper electrode, wherein the upper metal layer contacts the top surface of the upper electrode.

2. The magnetoresistive random access memory of claim 1 further includes a dielectric layer located on the conformal substrate.

3. The magnetoresistive random access memory as claimed in claim 1, wherein the conductive plug is electrically connected to a lower metal layer.

4. The magnetoresistive random access memory as claimed in claim 1, wherein the upper electrode, the magnetic tunneling interface, and the upper electrode of the magnetic storage cell completely overlap each other.

5. The magnetoresistive random access memory as claimed in claim 1, wherein the substrate on both sides of the memory cell has a recessed region, and the surface of the recessed region and the surface of the recessed portion of the magnetic memory cell are a continuous curved surface.

6. A method for manufacturing a magnetoresistive random access memory, characterized in that, Include: Provide a base; A conductive plug is formed in the substrate. The conductive plug has a flat top surface and a protruding portion. The slope of the sidewall of the protruding portion is different from the slope of the bottom sidewall of the conductive plug. A lower electrode material layer, a magnetic tunneling interface material layer, and an upper electrode material layer are sequentially formed on the substrate and the conductive plug. An anisotropic etching process is used to pattern the lower electrode material layer, the magnetic tunneling surface material layer, and the upper electrode material layer to form a magnetic storage cell located on the conductive plug. The anisotropic etching process etches the conductive plug and the substrate, forming a recessed portion on the side of the upper edge of the conductive plug opposite to the protrusion and recessed areas on the substrate on both sides of the magnetic storage cell. In this way, the flat top surface does not overlap with the recessed portion in the vertical direction, but a portion of the flat top surface overlaps with the protrusion in the vertical direction. A conformal liner is formed on the surface of the recessed portion and on the sidewall of the magnetic storage cell, wherein the conformal liner is not located on the top surface of the upper electrode; as well as An upper metal layer is formed, which is electrically connected to the upper electrode, wherein the upper metal layer contacts the top surface of the upper electrode.

7. The method of manufacturing a magnetoresistive random access memory as described in claim 6, wherein the surface of the recessed portion of the conductive plug and the surface of the recessed region of the substrate are a continuous curved surface.

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