Data transmission system and data transmission method

Abstract

The application relates to a data transmission system and a data transmission method, the data transmission system comprising: a first device and a second device, the first device being connected with the second device through a bus; the first device storing or reading target data in an address of a to-be-accessed bus address space; wherein the address of the to-be-accessed bus address space is mapped into a target physical storage address in a physical storage space; the physical storage space being a storage space on a memory of the second device; and the second device reading or storing the target data in the target physical storage address by accessing an address of a virtual space according to a mapping relationship between the address of the virtual space and the target physical storage address through an application program. The data transmission system can improve the safety of a data transmission process and improve the data transmission efficiency between the first device and the second device.

Description

Technical Field

[0001] This application relates to the field of data transmission technology, and in particular to a data transmission system and a data transmission method. Background Technology

[0002] With the continuous improvement of medical technology, more and more medical equipment has been popularized in major hospitals.

[0003] Taking ultrasound equipment as an example, ultrasound equipment is divided into ultrasound data acquisition equipment and ultrasound imaging equipment. In application, these two devices need to interact via data exchange to achieve their functions. When acquiring data through the ultrasound data acquisition equipment, it collects the diagnostic data of the patient. This diagnostic data is the patient's personal privacy data, and ensuring its security is crucial. After acquiring the diagnostic data, the ultrasound data acquisition equipment needs to send it to the ultrasound imaging equipment for imaging, so that doctors can make diagnoses based on the resulting images. However, if the data transmission time between the ultrasound data acquisition equipment and the ultrasound imaging equipment is too long, it will reduce diagnostic efficiency.

[0004] Therefore, it is urgent to improve the security and efficiency of data transmission between ultrasound data acquisition equipment and ultrasound image imaging equipment. Summary of the Invention

[0005] Therefore, it is necessary to provide a data transmission system and method to address the aforementioned technical problems, which can improve the security and efficiency of data transmission between ultrasound data acquisition devices and ultrasound image imaging devices.

[0006] In a first aspect, this application provides a data transmission system, which includes: a first device and a second device, wherein the first device and the second device are connected via a bus;

[0007] The first device is used to store or read target data in the address of the bus address space to be accessed; the address of the bus address space to be accessed is mapped to the target physical storage address in the physical storage space; the physical storage space is the storage space on the memory of the second device;

[0008] The second device is used to access the address of the virtual space through the application based on the mapping relationship between the address of the virtual space and the target physical storage address, and to read or store the target data in the target physical storage address.

[0009] In one embodiment, if the first device stores target data in an address in the bus address space to be accessed, the second device accesses the address in the virtual space through the application and reads the target data in the target physical storage address.

[0010] If the first device reads the target data from the address in the bus address space to be accessed, the second device accesses the address in the virtual space through the application program and stores the target data in the target physical storage address.

[0011] In one embodiment, the second device includes an IOMMU and an MMU;

[0012] The second device is used to map the address of the bus address space to be accessed to the target physical storage address in the physical storage space through the IOMMU; and to map the address of the virtual space to the target physical storage address through the MMU.

[0013] In one embodiment, data is transmitted between the first device and the second device via DMA;

[0014] The first device is used to write the target data into the bus address space to be accessed after initiating a DMA transfer request for the target data, and write the target data into the target physical memory address through DMA. After the writing is completed, it sends an interrupt signal to the second device.

[0015] The second device is used to read or store target data by accessing the address of the virtual space through the application based on the interrupt signal.

[0016] In one embodiment, the second device includes a user space and a kernel space; the user space includes the VFIO driver framework.

[0017] The second device interacts directly with the first device through the kernel space, and implements the driver program for the first device in user space through the VFIO driver framework.

[0018] In one embodiment, the bus is a PCIe bus, and the bus address space to be accessed is the Bar space in the PCIe bus address space.

[0019] In one embodiment, both the virtual space and the bus address space are ring spaces.

[0020] In one embodiment, the addresses in the virtual address space and the bus address space are both contiguous.

[0021] In one embodiment, the address mapping of the virtual space is not contiguous with the target physical storage address in the physical storage space.

[0022] Secondly, a data transmission method, characterized in that the method includes:

[0023] The target data is stored or retrieved from the address in the bus address space to be accessed by the first device;

[0024] The address in the bus address space to be accessed is mapped to the target physical memory address in the physical memory space; the physical memory space is the storage space on the memory of the second device; the second device is connected to the first device via a bus;

[0025] Based on the mapping relationship between the virtual space address and the target physical storage address, the application of the second device accesses the address of the virtual space to read or store the target data in the target physical storage address.

[0026] This application provides a data transmission system and method. The data transmission system includes a first device and a second device connected via a bus. The first device stores or reads target data in an address within a bus address space to be accessed. The address in the bus address space to be accessed is mapped to a target physical storage address in physical storage space. The physical storage space is the storage space on the memory of the second device. The second device accesses the address in the virtual space through an application based on the mapping relationship between the address in the virtual space and the target physical storage address, and reads or stores the target data in the target physical storage address. In this data transmission system, since both the bus address space to be accessed and the virtual space address are mapped to the target physical storage address, they can point to the same target physical storage space. Thus, when the first device and the second device transmit data, the second device accesses the virtual space through an app to store or read data in the target physical storage space, while the first device accesses the target physical storage space through the bus address space. Since both the virtual space and the bus address space are secure addresses, both devices access the same physical storage address through secure addresses, thereby improving the security of the data transmission process. Furthermore, both the virtual space and the bus address space are spaces that the device can directly access, meaning that the target physical storage space can be accessed without copying the data, thus achieving copy-free transmission of the target data and greatly improving the data transmission efficiency between the first and second devices. Attached Figure Description

[0027] Figure 1 This is a schematic diagram of a data transmission system architecture provided in one embodiment;

[0028] Figure 2 This is a schematic diagram illustrating the mapping to a target physical storage address in one embodiment;

[0029] Figure 3 This is a schematic diagram of mapping to a target physical storage address provided in another embodiment;

[0030] Figure 4This is a schematic diagram of the first and second device frameworks provided in one embodiment;

[0031] Figure 5 This is a schematic diagram illustrating data transmission between the virtual space and the bus address space to be accessed in one embodiment;

[0032] Figure 6 This is a schematic diagram of a data transmission method provided in one embodiment;

[0033] Figure 7 This is a schematic diagram of the internal structure of a data transmission device provided in one embodiment;

[0034] Figure 8 This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation

[0035] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0036] It is understood that the serial numbers assigned to components in this application, such as "first" and "second," are merely used to distinguish the described objects and do not have any sequential or technical meaning. The terms "connection" and "linkage" used in this application, unless otherwise specified, include both direct and indirect connections (linkages). In the description of this application, it should be understood that directional terms such as "upper" and "lower" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. These are merely for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. In this application, unless otherwise expressly specified and limited, "upper" or "lower" of the first feature and the second feature can mean that the first and second features are in direct contact, or that the first and second features are in indirect contact through an intermediate medium. In this application, the difference in name is not used as a method of distinguishing components; rather, the difference in function of the components is used as the distinguishing principle.

[0037] Next, the data transmission system provided in the embodiments of this application will be described in detail with reference to the accompanying drawings.

[0038] like Figure 1As shown, this application provides a data transmission system, which includes: a first device 100 and a second device 200, the first device 100 and the second device 200 being connected via a bus; the first device 100 is used to store or read target data in an address of a bus address space to be accessed; the address of the bus address space to be accessed is mapped to a target physical storage address in physical storage space; the physical storage space is the storage space on the memory of the second device 200; the second device 200 is used to access the address of the virtual space through an application program according to the mapping relationship between the address of the virtual space and the target physical storage address, and to read or store target data in the target physical storage address.

[0039] In practical applications, data transmission is required between the first device 100 and the second device 200, and the two are connected by a bus to transmit data via the bus.

[0040] Optionally, the first device 100 is an ultrasound data acquisition device; the second device 200 is an ultrasound data imaging device. Taking the data transmitted between the ultrasound data acquisition device and the ultrasound data imaging device as ultrasound data, the ultrasound data acquired by the ultrasound data acquisition device (first device 100) mainly consists of ultrasound signals detected by the ultrasound sensors within the acquisition device. The ultrasound data imaging device (second device 200) then generates and displays the corresponding ultrasound image. For example, taking an ultrasound machine as an example, the probe of the ultrasound machine refers to the ultrasound data acquisition device, which is the first device 100, while the computer (PC) of the ultrasound machine is the ultrasound data imaging device, which is the second device 200. When ultrasound data is acquired at a certain part of the body through the probe of the ultrasound machine, the generated ultrasound image can be seen on the computer display interface of the ultrasound machine.

[0041] Optionally, the bus is a high-speed serial computer expansion bus standard (Peripheral Component Interconnect express, PCIe). The first device 100 and the second device 200 are connected via the PCIe bus.

[0042] Taking the first device 100 as an ultrasonic data acquisition device and the second device 200 as an ultrasonic data imaging device as an example, in actual applications, when transmitting ultrasonic data, the transmission bandwidth requirements between the hardware devices of the ultrasonic data acquisition device and the ultrasonic data imaging device are relatively high. PCIe has advantages such as higher maximum system bus throughput, lower number of I / O pins and smaller physical size, better bus device performance scaling, reduced latency, and direct connection between PCIe devices and the PCIe bus, which brings the cache and data closer to the CPU and eliminates the overhead of traditional storage protocols. Therefore, the ultrasonic data acquisition device and the ultrasonic data imaging device can use PCIe to transmit data when transmitting ultrasonic data to meet the bandwidth requirements between them.

[0043] Specifically, when data is transmitted between the first device 100 and the second device 200, the first device 100 stores or reads target data from an address in the bus address space to be accessed; the address in the bus address space to be accessed is mapped to a target physical storage address in the physical storage space; the physical storage space is the storage space on the memory of the second device 200. The second device 200, based on the mapping relationship between the virtual address and the target physical storage address, accesses the address in the virtual space through an application program, and reads or stores the target data from the target physical storage address.

[0044] The target data refers to the data currently being transmitted between the first device 100 and the second device 200. For example, the target data is the ultrasonic data acquired by the ultrasonic data acquisition device and transmitted to the ultrasonic imaging device; or, the target data is the sound wave data emitted by the ultrasonic imaging device to the ultrasonic data acquisition device; or, the target data may also be the configuration data sent by the ultrasonic imaging device to the ultrasonic data acquisition device, etc. The embodiments of this application do not limit the type of target data, and the data to be transmitted in the actual situation shall prevail.

[0045] In one embodiment, if the bus is a PCIe bus, the bus address space to be accessed is the Bar space within the PCIe bus address space. The base address register (Bar) consists of six registers from 0x10 to 0x24 in the Peripheral Component Interconnect (PCI) configuration space, used to define the size of the configuration space required by PCI and the address space occupied by the PCI device. The Bar specifies the memory that the device wants to map to main memory; this address belongs to the PCIe bus definition and ensures the security of the first device 100 when storing or retrieving target data in the address space of the bus to be accessed.

[0046] The address of the bus address space to be accessed is pre-mapped to the target physical memory address in the physical memory space of the second device 200. Here, the physical memory space of the second device 200 is the storage space on the memory of the second device 200. As mentioned earlier, the second device 200 can be an ultrasound data imaging device. For any type of data imaging device, it includes memory (DRAM) to store the program and data during the operation of the imaging device. For example, the memory space of a computer's RAM is the computer's physical address space. Then, a memory space is pre-allocated in the memory of the second device 200; this memory space refers to the physical memory space in this embodiment.

[0047] Based on the physical storage space of the second device 200, a mapping relationship is set between the bus address space to be accessed and the target physical storage address in the physical storage space. In this way, when the first device 100 stores or reads the target data in the address of the bus address space to be accessed, it is equivalent to the first device 100 storing or reading the target data in the target physical storage address in the physical storage space of the second device 200.

[0048] The virtual space is a segment of space mapped or partitioned within the user space of the second device 200. The user space of the second device 200 will be described here. Since the second device is an imaging device, which is generally a computer device, it can be divided into two layers from a framework perspective: a bottom layer and an upper layer. The bottom layer is the kernel space, where the second device 200 and the first device 100 directly interact with each other. The upper layer is the user space, which is the space that users can directly access. The virtual space that is pre-mapped or partitioned within this user space is the aforementioned virtual space.

[0049] A mapping relationship is also established between the virtual space and the aforementioned target physical storage address, so that the aforementioned target physical storage address can also be accessed by accessing the virtual space.

[0050] The virtual space is created in the user space of the second device 200, so access to the virtual space can be achieved through the application (App) in the user space.

[0051] Specifically, the second device 200 is an imaging device with a display interface, belonging to the category of human-computer interaction devices. This allows users to conveniently perform image processing-related operations on the second device 200 based on the data transmitted from the first device 100. Therefore, the second device 200 includes an app for image processing, through which users can access the imaging interface. In this way, the second device 200 can access the address of the virtual space through the app based on the mapping relationship between the address of the virtual space and the target physical storage address, thereby enabling the reading or storage of target data at the target physical storage address.

[0052] In other words, because the target physical storage address is mapped in the physical storage space of the second device 200 in advance based on the address of the bus address space to be accessed by the first device 100, and a virtual space with a mapping relationship with the target physical storage address is established in the user space of the second device 200, and the APP in the user space of the second device 200 can enable the user to access the virtual space, both the user accessing the virtual space through the APP of the second device 200 and the first device 100 accessing the bus address space to be accessed are direct access to the target physical storage address.

[0053] For example, such as Figure 2 As shown, Figure 2 In this context, vaddr represents the virtual address space, iova represents the PCIe bus address space, and paddr represents the target physical memory address. Figure 2 The shaded background shown indicates that DRAM represents the memory in the second device 200, so from... Figure 2 As can be seen, the target physical storage address paddr is a part of the address in the DRAM memory of the second device 200. The bus address space iova to be accessed by the first device 100 and the virtual space address vaddr in the user space of the second device 200 are both mapped to the target physical storage address paddr. In this way, the virtual space accessed by the App of the second device 200 and the PCIe bus address space accessed by the first device 100 point to the same physical storage space.

[0054] In this embodiment, a data transmission system is provided, comprising a first device and a second device connected via a bus. The first device stores or retrieves target data in an address within a bus address space to be accessed. The address of the bus address space to be accessed is mapped to a target physical storage address in physical storage space. The physical storage space is the storage space on the memory of the second device. The second device, based on the mapping relationship between the address in the virtual space and the target physical storage address, accesses the address in the virtual space through an application program to read or store target data in the target physical storage address. In this data transmission system, since both the bus address space to be accessed and the virtual space address are mapped to the target physical storage address, they can point to the same target physical storage space. Thus, when the first device and the second device transmit data, the second device accesses the virtual space through an app to store or retrieve data in the target physical storage space, while the first device accesses the target physical storage space through the bus address space. Since both the virtual space and the bus address space are secure addresses, both devices access the same physical storage address through secure addresses, thereby improving the security of the data transmission process. Furthermore, both the virtual space and the bus address space are spaces that the device can directly access, meaning that the target physical storage space can be accessed without copying the data, thus achieving copy-free transmission of the target data and greatly improving the data transmission efficiency between the first and second devices.

[0055] In the above embodiments, data transmission between the first device 100 and the second device 200 can be performed either by the first device 100 acting as the sender and the second device 200 acting as the receiver, or by the first device 100 acting as the receiver and the second device 200 acting as the sender. Optionally, in one embodiment, if the first device 100 stores the target data in the address of the bus address space to be accessed, then the second device 200 accesses the address of the virtual space through the application program and reads the target data in the target physical storage address; if the first device 100 reads the target data in the address of the bus address space to be accessed, then the second device 200 accesses the address of the virtual space through the application program and stores the target data in the target physical storage address.

[0056] Taking the example where the first device 100 is an ultrasound data acquisition device and the second device 200 is an ultrasound imaging device:

[0057] If the ultrasound data acquisition device needs to transmit the acquired ultrasound data to the ultrasound imaging device, then the first device 100 is the transmitting end and the second device 200 is the receiving end. That is, the first device 100 stores the target data (acquired ultrasound data) in the target physical storage address through the address of the bus address space to be accessed, and the second device 200 accesses the address of the virtual space through the APP to read the target data in the target physical storage address.

[0058] However, if the ultrasound imaging device needs to transmit sound wave data to the ultrasound data acquisition device, or if the ultrasound imaging device needs to send configuration data to the ultrasound data acquisition device, then the first device 100 is the receiving end and the second device 200 is the transmitting end. That is, the second device 200 accesses the address of the virtual space through the application program to store the target data (sound wave data or configuration data) in the target physical storage address, and the first device 100 reads the target data in the target physical storage address through the address of the bus address space to be accessed.

[0059] Therefore, in this embodiment, whether the first device 100 and the second device 200 store or read target data depends on the nature of the target data. If the target data is sent from the first device 100 to the second device 200, then the first device 100 stores the target data, and the second device 200 reads the target data stored by the first device 100. If the target data is sent from the second device 200 to the first device 100, then the first device 100 reads the target data stored by the second device 200, and the second device 200 stores the target data. Of course, this only applies to scenarios where one party obtains data from the other. However, in some practical applications, the first device 100 can also read its own stored target data, and similarly, the second device 200 can also read its own stored target data. This embodiment does not limit this.

[0060] As mentioned earlier, from a framework perspective, the second device 200 can be divided into kernel space and user space. In one embodiment, the user space includes the VFIO driver framework. The second device 200 interacts directly with the first device 100 through the kernel space and implements the driver program for the first device in the user space through the VFIO driver framework.

[0061] VFIO (Virtual Function IO) is a framework that safely exposes device I / O, interrupts, and Direct Memory Access (DMA) to user space, allowing device drivers to be implemented in user space. VFIO offers advantages such as low-overhead direct device access in user space, virtual machine device allocation, and high-performance applications, enabling higher I / O performance.

[0062] For the development of the PCIe driver for the first device 100, if it is developed in the kernel space of the second device 200, the driver and the operating system are in the same space (the operating system is also in the kernel space), which makes the driver development difficult, debugging difficult, and has high system call overhead. Based on this, the embodiment of this application adopts the VFIO driver framework. The driver program for the first device is implemented in the user space of the second device 200 through the VFIO driver framework. Instead, data interaction with the first device 100 is carried out directly through the kernel space. In this way, there is no need for cumbersome driver development in the kernel space of the second device 200, nor is there a need to copy data between the kernel space and the user space. The driver development for the first device 100 is implemented in the user space, and data interaction with the first device 100 is implemented in the kernel space. Zero copying of data is achieved between the kernel space and the user space of the second device 200, which greatly improves the data processing efficiency of the second device 200. For example, if the second device 200 is an ultrasound data imaging device, it will greatly increase the frame rate (i.e., the number of images) of the ultrasound data imaging device.

[0063] In conjunction with the above data transmission process, the first device 100 writes the collected data into the Bar space, which is the PCIe bus address space. After a data packet is written, an interrupt is initiated. The driver in user space receives the interrupt first. Since the driver and the APP of the second device 200 are at the same layer, i.e., both are in user space, the APP can also quickly receive the interrupt. In this way, the user can read the data written by the first device 100 by accessing the virtual address through the APP. Thus, the data transmission between the first device 100 and the second device 200 is completed. Moreover, there is no data copying in this data transmission process. In fact, the first device 100 writing into the Bar space, which is the PCIe bus address space, and the second device 200 accessing the virtual space through the APP are both accessing the target physical memory address in the memory of the second device 200. Thus, the data transmission process without copying greatly improves the data processing efficiency of the second device 200.

[0064] In one embodiment, the second device 200 includes an IOMMU and an MMU; the second device 200 is used to map the address of the bus address space to be accessed to the target physical storage address in the physical storage space through the IOMMU; and to map the address of the virtual space to the target physical storage address through the MMU.

[0065] In this embodiment, the driver program of the first device 100 is completed in the user space of the second device 200, while the target physical storage address is located in the kernel space of the second device 200. In order to ensure the security and efficiency of data interaction between the user space and the kernel space, it is necessary to establish a mapping relationship between the virtual space accessed by the user through the above-mentioned APP and the bus address space to be accessed by the first device 100 and the target physical storage address of the kernel space.

[0066] Based on this, such as Figure 3 As shown, this embodiment of the application uses an Input / Output Memory Management Unit (IOMMU) and a Memory Management Unit (MMU) to implement the above mapping relationship. Specifically, Figure 3 In this context, App refers to the user-space application of the second device, vaddr represents the virtual address space, iova represents the PCIe bus address space, and paddr represents the target physical storage address. Figure 3 The shaded background shown indicates that DRAM represents the memory in the second device 200, and the target physical memory address paddr is a portion of the address within the DRAM memory of the second device 200. Figure 3 As shown, the virtual space and the target physical storage address are mapped through the MMU, and then the address of the bus address space to be accessed by the first device 100 and the target physical storage address are mapped through the IOMMU.

[0067] In this way, by establishing a mapping relationship between the virtual space address and the address of the bus address space to be accessed, and the target physical storage address of the kernel space of the second device 200, the device can securely access data through the virtual space address and the address of the bus address space to be accessed, thereby improving the security of data transmission. Furthermore, since the device only needs to access the virtual space address and the address of the bus address space to access the data in the target physical storage address, data copying is unnecessary, avoiding the bounce buffer problem, thus greatly improving the data transmission efficiency between the first and second devices.

[0068] In practical applications, the amount of data transferred between many devices is usually quite large. Direct Memory Access (DMA) allows hardware devices of different speeds to interact in a computer without relying on a large interrupt load from the Central Processing Unit (CPU). Therefore, in order to reduce the CPU overhead, DMA is usually used for data transfer.

[0069] In one embodiment, taking the data transfer between the first device 100 and the second device 200 via DMA as an example, the first device 100 is used to write the target data into the bus address space to be accessed after initiating a DMA transfer request for the target data, and write the target data into the target physical storage address through DMA. After the writing is completed, it sends an interrupt signal to the second device 200. The second device 200 is used to read or store the target data by accessing the address of the virtual space through the application according to the interrupt signal.

[0070] To perform DMA transfers, a physically contiguous memory space is typically allocated in the second device 200 as a DMA buffer for access by the first device 100. This DMA buffer is the target physical memory address allocated in the memory of the second device 200.

[0071] like Figure 4 As shown, data transfer between the first device 100 and the second device 200 is performed via DMA, and the target physical storage address ( Figure 4 (Not shown in the image) and DMA are located in the kernel space of the second device.

[0072] Optionally, the target physical memory addresses are not contiguous. That is, the virtual address and the bus address space to be accessed are not mapped to the target physical memory address in the memory physical memory space of the second device 200.

[0073] Generally, for situations where the amount of data transferred in a single DMA transfer is large, the second device 200 needs to allocate a large, contiguous physical memory space as the target physical storage address. However, due to the fragmentation of the memory of the second device 200 itself, it is usually difficult to request a large contiguous physical memory in the second device 200, and the request may even fail. Therefore, in this embodiment of the application, during the DMA transfer process of the first device 100, a scatter-gather list (linked memory space) method is used to request the target physical storage address in the physical storage space of the second device 200's memory.

[0074] Specifically, when allocating a target physical memory address in the memory of the second device 200, the allocated target physical memory address does not need to be entirely contiguous. Instead, a linked list can be used to link many fragmented physical addresses, where each small fragmented physical address only needs to be contiguous, to facilitate access by the first device 100 and the user. For example, see the above. Figure 2 or Figure 3In the diagram, each shaded paddr represents a small fragmented physical address. Multiple paddrs representing small fragmented physical addresses are linked together in a linked list to form the target physical storage address. It is understood that in practical applications, if the memory in the second device 200 is sufficient, the allocated target physical storage addresses can also be entirely contiguous; this embodiment does not limit this.

[0075] However, it should be noted that although the target physical storage address is not contiguous, in one embodiment, the address of the virtual space and the address of the bus address space to be accessed are both contiguous. This makes it convenient and quick for the first device 100 to access the bus address space to be accessed and for the user to conveniently and quickly access the virtual space through the APP.

[0076] Based on the allocated target physical storage address, and combined with the data transmission between the first device 100 and the second device 200, after the first device 100 initiates a DMA transfer request for the target data, it writes the target data into the bus address space to be accessed, and writes the target data into the target physical storage address through DMA. After the writing is completed, it sends an interrupt signal to the second device 200. The second device 200 reads or stores the target data by accessing the address of the virtual space through the application program according to the interrupt signal.

[0077] Data transmission between the first device 100 and the second device 200 is divided into data sending and receiving. In actual applications, the data sending and data receiving processes are the same. Therefore, the process of the entire transmission will be explained by taking the second device 200 receiving data transmitted by the first device 100 as an example.

[0078] Specifically, after the first device 100 acquires the target data, it needs to initiate a DMA transfer request for the target data to the DMA controller. The first device 100 writes the target data into the bus address space to be accessed and requests the DMA controller to write the target data into the target physical memory address. After the DMA controller has transferred a small block of physically contiguous physical addresses, it does not initiate an interrupt for the time being. Instead, it transfers the next block of physically contiguous addresses according to the linked list of target physical memory addresses until all data transfers are completed, indicating that a data packet has been written. After that, the DMA controller initiates an interrupt. For the second device 200, both the App and the driver are in the user space of the second device 200. The driver will receive the interrupt signal first. Because this embodiment uses VFIO, VFIO allows the interrupt to be safely exposed in the user space. Therefore, after the driver receives the interrupt, the App can also safely receive the interrupt. Then, the second device 200 can access the target physical memory address from the virtual space address through the App to read the target data that has just been written. Since both the virtual space address and the bus address space to be accessed are mapped to the target physical storage address, the data transmission process is actually accessing the target physical storage address in the memory of the second device 200. The entire data transmission process does not require data copying, which greatly improves the data processing efficiency of the second device 200.

[0079] Moreover, after the DMA controller has transferred a small block of physical contiguous addresses, it does not need to initiate an interrupt. Instead, it uses a linked list to transfer the data in the next block of physical contiguous addresses until all data transfers are completed, at which point it initiates an interrupt. This greatly reduces the number of interrupts compared to initiating an interrupt after each block of physical addresses has been transferred, thus improving the efficiency of data transfer.

[0080] In this embodiment, the target physical storage address applied for in the second device 200 may be non-contiguous, consisting of multiple fragmented physical addresses, without requiring contiguous physical space, thereby supporting scatter-gather DMA, resulting in high data transmission efficiency. Moreover, during data transmission, the first device 100 can only access the mapped memory region, thus enhancing security.

[0081] In the aforementioned data transmission process, to achieve continuous and orderly data transmission, in one embodiment, both the virtual space and the bus address space to be accessed are ring spaces. Optionally, both the virtual space and the bus address space are circular buffer structures. Optionally, the virtual space is a circular queue buffer; the bus address space is a first-in-first-out buffer.

[0082] In the user space App of the second device 200, the virtual space is designed as a ring space; on the first device 100, the bus address space to be accessed is also designed as a ring space. Designing both the virtual space and the bus address space as ring spaces allows both to be circularly connected. Optionally, both the virtual space and the bus address space to be accessed can be circular buffer structures. For example, the virtual space can be a ring buffer, and the bus address space to be accessed can be a First-In-First-Out (FIFO) memory. It is understood that both the virtual space and the bus address space to be accessed can be rings, both can be FIFOs, or the virtual space can be a FIFO memory and the bus address space to be accessed can be a ring buffer. This application does not limit this.

[0083] The following explanation focuses on the data transmission between the first device 100 and the second device 200.

[0084] like Figure 5 As shown, taking the TX ring buffer on the second device 200 corresponding to the TX FIFO on the first device 100, and the RX ring buffer on the second device 200 corresponding to the RX FIFO on the first device 100 as an example, the implementation of DMA read and write is explained. Here, the TX ring buffer represents the virtual space in the second device 200 during the data transmission process, and the TX FIFO represents the bus address space to be accessed in the first device 100 during the data transmission process; while the RX ring buffer represents the virtual space in the second device 200 during the data reception process, and the RX FIFO represents the bus address space to be accessed in the first device 100 during the data reception process.

[0085] Figure 5Both the data sending and receiving processes are illustrated, but since the principles of the data sending and receiving processes are the same, this application uses the data receiving process as an example for explanation. The first device 100 initiates a DMA transfer, writing a certain amount of target data into the RX FIFO. Then, the address offset in the RX FIFO is written, which means writing the address to an empty address after the RX FIFO to facilitate recording the position of the next data write. An interrupt is initiated after each transfer is completed. Because this embodiment uses a VFIO driver to securely expose the interrupt to the user space of the second device 200, and both the driver and the App are in user space, the App on the second device 200 can safely and quickly receive the interrupt. After receiving the interrupt, it reads the target data, and the address in the virtual space RX ring buffer is also offset to record the position of the data transfer in the RX ring buffer. This process is repeated. When the RX FIFO space cannot hold the amount of data for one DMA transfer, the data is written from the beginning, and previously written data is directly overwritten. The operation of the RX ring buffer is the same.

[0086] In this embodiment, the virtual space and the bus address space to be accessed are designed as a circular queue, which enables the continuous and orderly transmission of target data from the first device 100 to the second device 200, thereby realizing an efficient, secure and orderly data transmission method between the first device 100 and the second device 200.

[0087] Based on the descriptions of the above embodiments, the following example, taking an ultrasound equipment scenario as an example, with the first device 100 being an ultrasound data acquisition device, the second device 200 being an ultrasound data imaging device, and the bus address space to be accessed being the Bar space in the PCIe bus address space, provides an embodiment, which includes:

[0088] The ultrasound data acquisition device and the ultrasound data imaging device are connected via a PCIe bus. The ultrasound data imaging device is generally a PC, which is divided into two layers. The bottom layer is the kernel space, in which direct data interaction with the ultrasound data acquisition device takes place. The upper layer is the user space, where the VFIO driver framework is located. The ultrasound data imaging device allocates a memory space in its main memory as the target physical storage address. The ultrasound data acquisition device accesses the Bar space in the PCIe bus address space and accesses the target physical storage address via DMA (DMA is set in the kernel space of the ultrasound data imaging device). (The base address of the Bar space and the target physical storage address are mapped.) The user space application (App) of the ultrasound data imaging device accesses this target physical storage address through the mapped virtual space address. In this way, the virtual space accessed by the App and the Bar space in the PCIe bus address space accessed by the ultrasound data acquisition device point to the same physical storage space. The entire process does not require copying, thus avoiding bounce buffers and not requiring contiguous physical space, thereby supporting scatter-gather DMA, resulting in high data transfer efficiency. Moreover, the data acquisition device can only access the mapped memory area, which enhances security. This achieves efficient data transfer between the ultrasound data acquisition device and the ultrasound data imaging device. Furthermore, because a virtual space is mapped in user space and the actual target physical storage address is accessed through the address of the virtual space, the App program completely shields the underlying target physical storage address at the user space level, thus realizing user space-driven VFIO, simplifying development and maintenance.

[0089] In addition, based on the data transmission system provided in the above embodiments, this application also provides a data transmission method, such as... Figure 6 As shown, this embodiment includes the following steps:

[0090] S101, the first device stores or reads the target data in the address of the bus address space to be accessed.

[0091] S102, the address in the bus address space to be accessed is mapped to the target physical storage address in the physical storage space; the physical storage space is the storage space on the memory of the second device; the second device is connected to the first device via a bus.

[0092] S103, based on the mapping relationship between the virtual space address and the target physical storage address, the application of the second device accesses the address of the virtual space to read or store the target data in the target physical storage address.

[0093] The implementation principles and technical effects of each step in the data transmission method provided in this embodiment are similar to those of the embodiments in the previous data transmission system, and will not be repeated here. The implementation methods of each step in this embodiment are only examples and are not limited to any particular implementation method. The order of each step can be adjusted in actual applications, as long as the purpose of each step can be achieved.

[0094] It should be understood that although the steps in the flowchart above are shown sequentially as indicated by the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowchart above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages in other steps.

[0095] In one embodiment, such as Figure 7 As shown, a data transmission device is provided, comprising: a first operation module 10, a processing module 11, and a second operation module 12, wherein:

[0096] The first operation module 10 is used to store or read target data in the address of the bus address space to be accessed through the first device;

[0097] Processing module 11 is used to map the address of the bus address space to be accessed to the target physical storage address in the physical storage space; the physical storage space is the storage space on the memory of the second device; the second device is connected to the first device through a bus;

[0098] The second operation module 12 is used to access the address of the virtual space through the application of the second device according to the mapping relationship between the address of the virtual space and the target physical storage address, so as to read or store the target data in the target physical storage address.

[0099] Specific limitations regarding the data transmission device can be found in the limitations of the data transmission system described above, and will not be repeated here. Each module in this data transmission device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in the processor of the electronic device in hardware form or independently of it, or stored in the memory of the electronic device in software form, so that the processor can call and execute the operations corresponding to each module.

[0100] In one embodiment, a computer device is provided, which may be a terminal, and its internal structure diagram may be as follows: Figure 8 As shown, the computer device includes a processor, memory, communication interface, display screen, and input devices connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The communication interface is used for wired or wireless communication with external terminals; wireless communication can be achieved through Wi-Fi, carrier networks, NFC (Near Field Communication), or other technologies. When the computer program is executed by the processor, it implements a data transmission method. The display screen can be an LCD screen or an e-ink screen. The input devices can be a touch layer covering the display screen, buttons, a trackball, or a touchpad mounted on the computer device casing, or an external keyboard, touchpad, or mouse.

[0101] Those skilled in the art will understand that Figure 8 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0102] In one embodiment, this application also provides a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it performs the following steps:

[0103] The target data is stored or retrieved from the address in the bus address space to be accessed by the first device;

[0104] The address in the bus address space to be accessed is mapped to the target physical memory address in the physical memory space; the physical memory space is the storage space on the memory of the second device; the second device is connected to the first device via a bus;

[0105] Based on the mapping relationship between the virtual space address and the target physical storage address, the application of the second device accesses the address of the virtual space to read or store the target data in the target physical storage address.

[0106] The computer device provided in this embodiment has a similar implementation principle and technical effect to the above-described method embodiments, and will not be described again here.

[0107] In one embodiment, this application also provides a storage medium storing a computer program thereon, which, when executed by a processor, performs the following steps:

[0108] The target data is stored or retrieved from the address in the bus address space to be accessed by the first device;

[0109] The address in the bus address space to be accessed is mapped to the target physical memory address in the physical memory space; the physical memory space is the storage space on the memory of the second device; the second device is connected to the first device via a bus;

[0110] Based on the mapping relationship between the virtual space address and the target physical storage address, the application of the second device accesses the address of the virtual space to read or store the target data in the target physical storage address.

[0111] The storage medium provided in this embodiment has a similar implementation principle and technical effect to the above-described method embodiments, and will not be described again here.

[0112] In one embodiment, this application also provides a computer program product, including a computer program / instructions, which, when executed by a processor, performs the following steps:

[0113] The target data is stored or retrieved from the address in the bus address space to be accessed by the first device;

[0114] The address in the bus address space to be accessed is mapped to the target physical memory address in the physical memory space; the physical memory space is the storage space on the memory of the second device; the second device is connected to the first device via a bus;

[0115] Based on the mapping relationship between the virtual space address and the target physical storage address, the application of the second device accesses the address of the virtual space to read or store the target data in the target physical storage address.

[0116] The computer program product provided in this embodiment has a similar implementation principle and technical effect to the above method embodiments, and will not be described again here.

[0117] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, or optical storage, etc. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM), etc.

[0118] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0119] The above embodiments merely illustrate several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A data transmission system, characterized in that, The system includes: a first device and a second device, the first device and the second device being connected via a bus; the second device includes a user space and a kernel space, the user space including a VFIO driver framework, the second device directly interacts with the first device through the kernel space, and the driver program for the first device is implemented in the user space through the VFIO driver framework; The first device is used to store or retrieve target data in an address of the bus address space to be accessed via direct memory access; the address of the bus address space to be accessed is mapped to a target physical memory address in the physical storage space; the physical storage space is the storage space on the memory of the second device. The second device is configured to access the address of the virtual space through an application running in the user space of the second device, based on the mapping relationship between the address of the virtual space and the target physical storage address, and read or store the target data in the target physical storage address; wherein the address of the virtual space and the address of the bus address space to be accessed are not contiguous in the target physical storage address mapped in the physical storage space, and the target physical storage address is composed of multiple fragmented physical addresses linked by a linked list; the virtual space and the bus address space to be accessed form a circular queue; the second device is configured to map the address of the bus address space to be accessed to the target physical storage address in the physical storage space through the IOMMU; and to map the address of the virtual space to the target physical storage address through the MMU.

2. The data transmission system according to claim 1, characterized in that, If the first device stores the target data in the address of the bus address space to be accessed, the second device accesses the address of the virtual space through the application and reads the target data in the target physical storage address; If the first device reads the target data from the address in the bus address space to be accessed, the second device accesses the address in the virtual space through the application program and stores the target data in the target physical storage address.

3. The data transmission system according to claim 1 or 2, characterized in that, The first device and the second device transmit data via DMA; The first device is configured to, after initiating a DMA transfer request for the target data, write the target data into the bus address space to be accessed, and write the target data into the target physical storage address through the DMA, and send an interrupt signal to the second device after the writing is completed; The second device is used to read or store the target data by accessing the address of the virtual space through the application based on the interrupt signal.

4. The data transmission system according to claim 1 or 2, characterized in that, The bus is a PCIe bus, and the bus address space to be accessed is the Bar space in the PCIe bus address space.

5. The data transmission system according to claim 1 or 2, characterized in that, The addresses of the virtual space and the bus address space to be accessed are both consecutive.

6. The data transmission system according to claim 1 or 2, characterized in that, The virtual space is a circular queue buffer, and the bus address space to be accessed is a first-in-first-out buffer.

7. The data transmission system according to claim 1 or 2, characterized in that, The second device exposes an interrupt signal to the user space through the VFIO driver framework. The application receives the interrupt signal in the user space and accesses the address of the virtual space according to the interrupt signal.

8. The data transmission system according to claim 1 or 2, characterized in that, The first device is an ultrasonic data acquisition device.

9. The data transmission system according to claim 1 or 2, characterized in that, The second device is an ultrasonic data imaging device.

10. A data transmission method, characterized in that, The method includes: The first device stores or retrieves target data in the address of the bus address space to be accessed using the direct memory access method. The address of the bus address space to be accessed is mapped to the target physical storage address in the physical storage space; the physical storage space is the storage space on the memory of the second device; the second device is connected to the first device through a bus; the second device includes a user space and a kernel space, the user space includes a VFIO driver framework, the second device interacts directly with the first device through the kernel space, and the driver program of the first device is implemented in the user space through the VFIO driver framework; Based on the mapping relationship between the virtual space address and the target physical storage address, the application running in the user space of the second device accesses the address of the virtual space to read or store the target data in the target physical storage address; wherein, the address of the virtual space and the address of the bus address space to be accessed are not contiguous in the target physical storage address mapped in the physical storage space, and the target physical storage address is composed of multiple fragmented physical addresses linked by a linked list; the virtual space and the bus address space to be accessed form a circular queue; the second device is used to map the address of the bus address space to be accessed to the target physical storage address in the physical storage space through the IOMMU; and to map the address of the virtual space to the target physical storage address through the MMU.

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