金属走线密度的调整方法及设备

By detecting and trimming the power fill grid in the layout, the chip performance problem caused by excessive metal trace density is solved, achieving efficient layout correction and power fill grid retention, thus improving chip manufacturing efficiency and quality.

CN115587566BActive Publication Date: 2026-07-17CHANGXIN MEMORY TECH INC
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
CHANGXIN MEMORY TECH INC
Filing Date
2021-07-06
Publication Date
2026-07-17

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Abstract

本申请实施例提供了一种金属走线密度的调整方法及设备，通过检测目标版图在各个金属密度检测窗口内的金属走线密度，可以快速的定位到目标版图中金属走线密度大于预设密度阈值的区域，提升版图布局的修正效率；之后通过对金属走线密度大于预设密度阈值的目标金属密度检测窗口内的电源填充网格进行若干次裁剪，直至各个金属密度检测窗口内的金属走线密度均小于或等于预设密度阈值，可以在保障目标版图中金属走线密度小于或等于预设密度阈值的前提下，还能够使目标版图中保留足够多的电源填充网格。
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