Semiconductor process modeling system and method

Abstract

Semiconductor process modeling systems and methods are provided. The semiconductor process modeling system includes a preprocessing component configured to generate tensor data from raw data obtained from a semiconductor manufacturing equipment, wherein, when the raw data is represented as an original matrix representing values of a plurality of process parameters for each of a plurality of wafers, at least one element of the original matrix is omitted, when the tensor data is represented as a tensor matrix representing values of a plurality of preprocessed process parameters for each of the plurality of wafers, a number of omitted elements of the tensor matrix is less than a number of omitted elements of the original matrix; and the preprocessing component is configured to generate the tensor data by modifying the raw data based on at least one of a characteristic of the semiconductor manufacturing equipment and a characteristic of the plurality of process parameters.

Description

[0001] Cross-reference to related applications

[0002] This application is based on and claims priority to Korean Patent Application No. 10-2021-0089329, filed on July 7, 2021, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. Technical Field

[0003] The present invention relates to semiconductor process modeling systems and methods, and more specifically, to semiconductor process modeling systems and methods including preprocessing components and methods. Background Technology

[0004] Raw data is generated by using sensors to measure process parameters in semiconductor manufacturing processes. Monitoring this raw data allows for the detection of faults in semiconductor manufacturing equipment, and by modeling the semiconductor process using this raw data, process outcome values ​​can be predicted. However, because the measurement rules for process parameters differ among sensors in semiconductor manufacturing equipment, when the raw data is represented as a matrix representing the values ​​of multiple process parameters for each wafer, several elements of this matrix can be omitted. Models generated based on raw data with omitted elements may have low accuracy. Summary of the Invention

[0005] The present invention provides a semiconductor process modeling system and method that facilitates simple and accurate process modeling, as well as a semiconductor manufacturing system including the semiconductor process modeling system.

[0006] According to one aspect of the present invention, a semiconductor process modeling system including a preprocessing component is provided, the preprocessing component being configured to generate tensor data based on raw data obtained from a semiconductor manufacturing equipment, wherein when the raw data is represented as a raw matrix representing the values ​​of a plurality of process parameters for each of a plurality of wafers, at least one element of the raw matrix is ​​omitted, wherein when the tensor data is represented as a tensor matrix representing the values ​​of a plurality of preprocessing process parameters for each of a plurality of wafers, the number of omitted elements in the tensor matrix is ​​less than the number of omitted elements in the raw matrix, and wherein the preprocessing component is configured to generate the tensor data by modifying the raw data based on at least one of the characteristics of the semiconductor manufacturing equipment and the characteristics of the plurality of process parameters.

[0007] According to another aspect of the present invention, a semiconductor manufacturing system is provided, comprising: a semiconductor manufacturing apparatus configured to process a plurality of wafers; and a semiconductor process modeling system, wherein the semiconductor process modeling system includes: a preprocessing component configured to generate tensor data based on raw data obtained from the semiconductor manufacturing apparatus; and a modeling component configured to model a semiconductor process using the tensor data, wherein when the raw data is represented as a raw matrix representing the values ​​of a plurality of process parameters for each of the plurality of wafers, at least one element of the raw matrix is ​​omitted, and wherein when the tensor data is represented as a tensor matrix representing the values ​​of a plurality of preprocessed process parameters for each of the plurality of wafers, the number of omitted elements in the tensor matrix is ​​less than the number of omitted elements in the raw matrix, and wherein the preprocessing component is configured to generate the tensor data by modifying the raw data based on at least one of the characteristics of the semiconductor manufacturing apparatus and the characteristics of the plurality of process parameters.

[0008] According to another aspect of the present invention, a semiconductor process modeling method is provided, the method comprising: obtaining raw data including multiple process parameter values ​​from a semiconductor manufacturing equipment; and generating tensor data by modifying the raw data based on at least one of the characteristics of the semiconductor manufacturing equipment and the characteristics of the multiple process parameters, wherein when the raw data is represented as a raw matrix representing the values ​​of multiple process parameters for each of a plurality of wafers, at least one element of the raw matrix is ​​omitted, and wherein when the tensor data is represented as a tensor matrix representing the values ​​of multiple preprocessed process parameters for each of a plurality of wafers, the number of omitted elements in the tensor matrix is ​​less than the number of omitted elements in the raw matrix. Attached Figure Description

[0009] Embodiments of the present invention will become clearer from the following detailed description taken in conjunction with the accompanying drawings, in which similar reference numerals correspond to similar elements. In the drawings:

[0010] Figure 1 This is a block diagram of a semiconductor manufacturing system according to an example embodiment;

[0011] Figure 2 This is a diagram based on the original data from the example embodiment;

[0012] Figure 3 It is a graph of tensor data based on the example embodiment;

[0013] Figure 4 It is a graph of tensor data based on the example embodiment;

[0014] Figure 5 This is a block diagram of a computer system according to an example embodiment;

[0015] Figure 6 This is a block diagram of a computer system for accessing a computer-readable medium according to an example embodiment;

[0016] Figure 7 This is a diagram illustrating the operation of a semiconductor manufacturing system according to an example embodiment;

[0017] Figure 8 Through Figure 7 A graph of the raw data generated by the operation;

[0018] Figure 9 Through Figure 7 A graph of tensor data generated by the operation;

[0019] Figure 10 This is a diagram illustrating the operation of a semiconductor manufacturing system according to an example embodiment;

[0020] Figure 11 Through Figure 10 A graph of the raw data generated by the operation;

[0021] Figure 12 Through Figure 10 A graph of tensor data generated by the operation;

[0022] Figure 13 This is a diagram illustrating the operation of a semiconductor manufacturing system according to an example embodiment;

[0023] Figure 14 Through Figure 13 A graph of the raw data generated by the operation;

[0024] Figure 15 Through Figure 13 A graph of tensor data generated by the operation;

[0025] Figure 16 This is a diagram illustrating the operation of a semiconductor manufacturing system according to an example embodiment;

[0026] Figure 17 Through Figure 16 A graph of the raw data generated by the operation;

[0027] Figure 18 Through Figure 14 A graph of tensor data generated by the operation;

[0028] Figure 19 This is a block diagram of the modeling components according to an example embodiment;

[0029] Figure 20 This is a conceptual diagram of the operation of the modeling components according to the example embodiment;

[0030] Figure 21This is a conceptual diagram of the operation of the modeling components according to the example embodiment;

[0031] Figure 22 This is a conceptual diagram of the operation of the modeling components according to the example embodiment;

[0032] Figure 23 This is a graph showing the modeling results for the comparison examples;

[0033] Figure 24 This is a diagram showing the modeling results based on the example embodiment;

[0034] Figure 25 This is a flowchart of a semiconductor process modeling method according to an example embodiment;

[0035] Figure 26 This is a flowchart of a semiconductor process modeling method according to an example embodiment;

[0036] Figure 27 This is a flowchart of a semiconductor process modeling method according to an example embodiment;

[0037] Figure 28 This is a flowchart of a semiconductor process modeling method according to an example embodiment;

[0038] Figure 29 This is a flowchart of a semiconductor process modeling method according to an example embodiment;

[0039] Figure 30 This is a flowchart of a semiconductor process modeling method according to an example embodiment; and

[0040] Figure 31 This is a flowchart of a semiconductor process modeling method according to an example embodiment. Specific Implementation

[0041] Figure 1 This is a block diagram of a semiconductor manufacturing system 1000 according to an example embodiment.

[0042] refer to Figure 1 The semiconductor manufacturing system 1000 according to the example embodiment may include a first semiconductor manufacturing apparatus 1100a to an eighth semiconductor manufacturing apparatus 1100h and a semiconductor process modeling system MS. Although Figure 1 The semiconductor manufacturing system 1000 is shown to include eight manufacturing devices, namely the first semiconductor manufacturing device 1100a to the eighth semiconductor manufacturing device 1100h, but the number of semiconductor manufacturing devices can be any natural number. The first semiconductor manufacturing device 1100a to the eighth semiconductor manufacturing device 1100h can be used as an example of multiple semiconductor manufacturing devices used in a semiconductor process.

[0043] In some embodiments, the first semiconductor manufacturing apparatus 1100a may include etching equipment. The first semiconductor manufacturing apparatus 1100a may be configured to remove at least some portions of a wafer or a material layer on a wafer. The first semiconductor manufacturing apparatus 1100a may include at least one of dry etching equipment and wet etching equipment.

[0044] In some embodiments, the second semiconductor manufacturing apparatus 1100b may include photolithography equipment. The second semiconductor manufacturing apparatus 1100b may be configured to form a photoresist pattern on a wafer. For example, the second semiconductor manufacturing apparatus 1100b may form a photoresist layer on the wafer, partially expose the photoresist layer, and partially remove the photoresist layer. The second semiconductor manufacturing apparatus 1100b may include at least one of photoresist coating equipment (e.g., spin coating equipment), exposure equipment, and developing equipment.

[0045] In some embodiments, the third semiconductor manufacturing apparatus 1100c may include cleaning equipment. The third semiconductor manufacturing apparatus 1100c may be configured to remove residues or contaminants from a wafer or a material layer on a wafer. The third semiconductor manufacturing apparatus 1100c may include at least one of wet cleaning equipment, dry cleaning equipment, and steam cleaning equipment.

[0046] In some embodiments, the fourth semiconductor manufacturing apparatus 1100d may include a chemical vapor deposition (CVD) apparatus. The fourth semiconductor manufacturing apparatus 1100d may be configured to form a material layer on a wafer using a CVD method. The fourth semiconductor manufacturing apparatus 1100d may include at least one of a thermal CVD apparatus, a plasma CVD apparatus, and a photochemical CVD apparatus. Although not illustrated, in addition to the chemical vapor deposition (CVD) apparatus included in the fourth semiconductor manufacturing apparatus 1100d, the fourth semiconductor manufacturing apparatus 1100d may also include at least one of a physical vapor deposition (PVD) apparatus, an atomic layer deposition (ALD) apparatus, and an electroplating apparatus.

[0047] In some embodiments, the fifth semiconductor manufacturing apparatus 1100e may include a chemical physical polishing (CMP) apparatus. The fifth semiconductor manufacturing apparatus 1100e can planarize or remove a wafer or a material layer on a wafer by polishing it.

[0048] In some embodiments, the sixth semiconductor manufacturing apparatus 1100f may include an ion implantation device. The sixth semiconductor manufacturing apparatus 1100f may be configured to implant impurity ions into a wafer or a material layer on the wafer. The impurity ions may include at least one of Group 15 elements and Group 13 elements. Group 15 elements may include phosphorus (P), arsenic (AS), or combinations thereof. Group 13 elements may include boron (B).

[0049] In some embodiments, the seventh semiconductor manufacturing apparatus 1100g may include a diffusion device. The seventh semiconductor manufacturing apparatus 1100g may be configured to diffuse impurity ions in or on a material layer within a wafer.

[0050] In some embodiments, the eighth semiconductor manufacturing apparatus 1100h may include metallization equipment. The eighth semiconductor manufacturing apparatus 1100h may be configured to form metal wiring on a wafer.

[0051] Each of the first semiconductor manufacturing apparatus 1100a to the eighth semiconductor manufacturing apparatus 1100h can sequentially process wafers. The first semiconductor manufacturing apparatus 1100a to the eighth semiconductor manufacturing apparatus 1100h may include at least one sensor for measuring at least one process parameter. For example, each of the first semiconductor manufacturing apparatus 1100a to the eighth semiconductor manufacturing apparatus 1100h may include at least one of the following: a temperature sensor, a pressure sensor, a flux sensor, a humidity sensor, a pH sensor, a position sensor, a power sensor, a voltage sensor, and a current sensor.

[0052] The semiconductor process modeling system MS can be configured to generate tensor data TD based on raw data RD, including values ​​of multiple process parameters obtained from sensors from the first semiconductor manufacturing equipment 1100a to the eighth semiconductor manufacturing equipment 1100h, and to model the semiconductor process based on the tensor data TD. The semiconductor process modeling system MS may include a preprocessing component 1200 and a modeling component 1300 implemented by a computer system.

[0053] The preprocessing component 1200 can be configured to generate tensor data TD based on raw data RD obtained from the first semiconductor manufacturing equipment 1100a to the eighth semiconductor manufacturing equipment 1100h. The preprocessing component 1200 can be configured to generate tensor data TD by modifying the raw data RD based on at least one of the characteristics of the first semiconductor manufacturing equipment 1100a to the eighth semiconductor manufacturing equipment 1100h and the characteristics of a plurality of process parameters.

[0054] The modeling component 1300 can model the semiconductor process based on tensor data TD to predict process outcome values. Here, process outcomes can be, for example, yield, pattern width, pattern length, pattern diameter, hole diameter, hole depth, standard deviation of pattern size, etc. In some embodiments, machine learning can be used for semiconductor process modeling. In this case, the modeling component 1300 can train a machine learning model to predict process outcome values ​​based on tensor data TD.

[0055] User UR can control, change, and / or adjust at least one of the first semiconductor manufacturing equipment 1100a to the eighth semiconductor manufacturing equipment 1100h based on the modeling component 1300 of the semiconductor process modeling system MS. For example, user UR can control, change, and / or adjust at least one of the first semiconductor manufacturing equipment 1100a to the eighth semiconductor manufacturing equipment 1100h to achieve a desired process result value. For example, to improve yield, user UR can identify the process parameters that have the greatest impact on yield, and then control, change, and / or adjust at least one of the first semiconductor manufacturing equipment 1100a to the eighth semiconductor manufacturing equipment 1100h to change the process parameters.

[0056] Figure 2 This is a graph of the original data RD based on the example embodiment.

[0057] refer to Figure 2 The raw data RD can be represented as a raw matrix, which represents the values ​​of multiple process parameters P for each of multiple wafers WF (e.g., first wafer WF1 to fourth wafer WF4) and batch WF0, which may include first wafers WF1 to fourth wafers WF4. The values ​​of process parameters P may include, for example, temperatures T11, T12, T2, and T3, thickness t4, and thickness difference Δt4. Although not shown, process parameters P may also include pressure, throughput, pH, humidity, illuminance, time, voltage, power, current, etc. Figure 2 As shown, some elements FC of the original matrix can have values, while other elements EC of the original matrix can have no values. That is, some elements FC of the original matrix can be filled, while other elements EC of the original matrix can be omitted.

[0058] When constant values ​​(e.g., 0) are arbitrarily inserted into omitted data, or when modeling is performed using only the filled data FC, the modeling is based on distorted data, which can lead to performance degradation in semiconductor process models. To fill the data with meaningful values, it is necessary to understand the characteristics of the equipment related to the measurement parameters and the characteristics of the measurement parameters themselves. Therefore, performing modeling using such raw data RD from the equipment may not be easy for non-experts.

[0059] Figure 3 This is a graph of tensor data TD according to the example embodiment.

[0060] refer to Figure 3 Tensor data TD can be represented as a tensor matrix representing the values ​​of multiple preprocessing process parameters P′ for each of multiple wafers WF (e.g., first wafer W1 to fourth wafer W4). The values ​​of the preprocessing process parameters P′ can be calculated from the values ​​of the process parameters P in the original data RD. For example... Figure 3 As shown, some elements FC′ of a tensor matrix can have values, while other elements EC′ can have no values. For example, some elements FC′ of a tensor matrix can be filled, while other elements EC′ can be omitted. However, the number of omitted elements EC′ in a tensor matrix can be greater than... Figure 2 The original matrix RD has a small number of omitted elements EC. For example, Figure 3 The number of omitted elements EC′ in the tensor matrix is ​​3, while Figure 2 The number of omitted elements EC in the original matrix is ​​16.

[0061] Among multiple preprocessing process parameters P′, preprocessing process parameters T1, T3, and t4, which have corresponding values ​​for each wafer WF, can be defined as tensorized. On the other hand, some parameters T2 and Δt4 among the multiple preprocessing process parameters P′ can be untensorized. The tensorization rate can be defined as "(number of tensorized preprocessing process parameters) / (number of all preprocessing process parameters) × 100". Figure 3 In the example, the tensor rate is (3 / 5) × 100 = 60%. When modeling semiconductor processes based on tensor data (TD), the performance of the semiconductor process model can be improved. For example, the model can better predict process outcome values ​​based on at least one of several preprocessing process parameters P′.

[0062] Figure 4 This is a graph of tensor data TD0 based on the example embodiment.

[0063] refer to Figure 4 Tensor data TD0 can be represented as a tensor matrix that represents the values ​​of multiple preprocessing process parameters P0′ for each of multiple wafers WF (e.g., first wafer W1 to fourth wafer W4). All elements of the tensor matrix can be filled. That is, the number of omitted elements in the tensor matrix can be zero. In other words, the tensor matrix may not include omitted elements. For example, tensor data TD0 can be fully tensorized, and the tensor quantization rate of tensor data TD0 can be 100%. When modeling a semiconductor process based on tensor data TD0, the performance of the model can be improved. For example, the model can better predict process outcome values ​​based on at least one of the multiple preprocessing process parameters P0′. Because there are no omitted elements, even non-experts can use tensor data TD0 and modeling component 1300 (see [link to modeling component 1300]). Figure 1 This allows for easy modeling of semiconductor processes.

[0064] Figure 5 This is a block diagram of a computer system 170 according to an example embodiment. Reference operations can be performed in computer system 170. Figures 25 to 31 The semiconductor process modeling method described herein. In some embodiments, the computer system 170 may be referred to as a semiconductor process modeling system MS (see [link to documentation]). Figure 1 ).

[0065] Computer system 170 may include at least one computing device. For example, computer system 170 may include implementations... Figure 1 The first computing device and implementation of the preprocessing component 1200 Figure 1 The modeling component 1300 is a second computing device. In another embodiment, the preprocessing component 1200 and the modeling component 1300 may be implemented in the same computing device. The computing device may be a fixed computing device such as a desktop computer, workstation, server, etc., or a portable computing device such as a laptop computer, tablet computer, smartphone, etc.

[0066] like Figure 5 As shown, the computer system 170 may include a processor 171, an input / output (I / O) device 172, a network interface 173, random access memory (RAM) 174, read-only memory (ROM) 175, and a storage device 176. The processor 171, I / O device 172, network interface 173, RAM 174, ROM 175, and storage device 176 may be connected to a bus 177 and communicate with each other through the bus 177.

[0067] Processor 171 may be referred to as a processing unit and may include at least one core capable of executing a set of instructions (e.g., Intel Architecture (IA)-32, 64-bit Extended IA-32, x86-64, PowerPC, Sparc, MIPS, ARM, IA-64, etc.), such as a microprocessor, application processor (AP), digital signal processor (DSP), and graphics processing unit (GPU). For example, processor 171 may access memory, i.e., RAM 174 or ROM 175, via bus 177 and execute commands stored in RAM 174 or ROM 175.

[0068] RAM 174 may store a program 174_1 or at least a portion thereof for semiconductor process modeling, and the program 174_1 for semiconductor process modeling may cause processor 171 to execute a semiconductor process modeling method. For example, program 174_1 may include a plurality of commands executable by processor 171, and the plurality of commands included in program 174_1 may cause processor 171 to execute a semiconductor process modeling method.

[0069] Even when the power supply to the computer system 170 is cut off, the storage device 176 may retain its stored data. For example, the storage device 176 may include a non-volatile storage device, or it may include storage media such as magnetic tape, optical disc, and magnetic disk. Furthermore, the storage device 176 may be removable from the computer system 170. According to an exemplary embodiment of the present invention, the storage device 176 may store a program 174_1, and the program 174_1, or at least a portion thereof, may be loaded from the storage device 176 into RAM 174 before the processor 171 executes the program 174_1. Alternatively, the storage device 176 may store a file written in a programming language, and the program 174_1, or at least a portion thereof, generated by a compiler, may be loaded from that file into RAM 174. Figure 5 As shown, storage device 176 can store database 176_1, and database 176_1 can include data required for semiconductor process modeling, such as... Figure 1 The original data RD.

[0070] Storage device 176 can store data to be processed by processor 171 or data processed by processor 171. For example, processor 171 can generate data by processing the data stored in storage device 176 according to program 174_1, and then process the generated data (e.g., Figure 1 The tensor data (TD) and the predicted values ​​of the process results are stored in the storage device 176.

[0071] I / O device 172 may include input devices such as a keyboard and pointing device, and output devices such as a display device and a printer. For example, a user can use I / O device 172 to trigger processor 171 to execute program 174_1 and check the result data.

[0072] Network interface 173 can provide access to networks outside of computer system 170. For example, the network may include multiple computing systems and communication links, and the communication links may include wired links, optical links, wireless links, or any other type of link.

[0073] Figure 6 This is a block diagram of a computer system 182 accessing a computer-readable medium 184 according to an example embodiment. Figures 25 to 31 At least some of the operations included in the semiconductor process modeling method shown can be performed by computer system 182. Computer system 182 can access computer-readable medium 184 and can execute program 184_1 stored in computer-readable medium 184. In some embodiments, computer system 182 and computer-readable medium 184 can be collectively referred to as a semiconductor process modeling system MS (see [link to documentation]). Figure 1 ).

[0074] Computer system 182 may include at least one computer subsystem, and program 184_1 may include at least one component implemented by the at least one computer subsystem. For example, at least one component may include preprocessing component 1200 (see...). Figure 1 ) and modeling component 1300 (see Figure 1 Similar to Figure 5 The storage device 176 and the computer-readable medium 184 may include non-volatile storage devices, or storage media such as magnetic tape, optical discs, and magnetic disks. Furthermore, the computer-readable medium 184 may be removable from the computer system 182.

[0075] Figure 7 This is a diagram illustrating the operation of a semiconductor manufacturing system 1000-1 according to an example embodiment. Figure 8 Through Figure 7 The graph of the original data RD1 generated by the operation. Figure 9 Through Figure 7 The graph of tensor data TD1 generated by the operation.

[0076] refer to Figures 7 to 9 Semiconductor manufacturing equipment 1100-1 may include a first chamber CH1 and a second chamber CH2. Semiconductor manufacturing equipment 1100-1 can process some wafers from first wafer WF1 to fourth wafer WF4, such as first wafer WF1 and third wafer WF3, in the first chamber CH1. Semiconductor manufacturing equipment 1100-1 can process some wafers from first wafer WF1 to fourth wafer WF4, such as second wafer WF2 and fourth wafer WF4, in the second chamber CH2. Semiconductor manufacturing equipment 1100-1 may be... Figure 1 Any one of the first semiconductor manufacturing equipment 1100a to the eighth semiconductor manufacturing equipment 1100h.

[0077] The preprocessing component 1200 can obtain the value of a first process parameter T11 from the first chamber CH1 of the semiconductor manufacturing equipment 1100-1, which sequentially processes the first wafer WF1 and the third wafer WF3. Furthermore, the preprocessing component 1200 can obtain the value of a second process parameter T12 from the second chamber CH2 of the semiconductor manufacturing equipment 1100-1, which sequentially processes the second wafer WF2 and the fourth wafer WF4. For example, the first process parameter T11 can be the temperature of the first chamber CH1, and the second process parameter T12 can be the temperature of the second chamber CH2.

[0078] In this scenario, the raw data RD1 may include the value of the first process parameter T11 for each of the first wafer WF1 and the third wafer WF3, and the value of the second process parameter T12 for each of the second wafer WF2 and the fourth wafer WF4. Conversely, the raw data RD1 may not include the value of the second process parameter T12 for each of the first wafer WF1 and the third wafer WF3, and the value of the first process parameter T11 for each of the second wafer WF2 and the fourth wafer WF4.

[0079] The preprocessing component 1200 can generate tensor data TD1 by merging the first process parameter T11 and the second process parameter T12 into a single preprocessing process parameter T1. For example, the value of the preprocessing process parameter T1 for the first wafer WF1 can be the same as the value of the first process parameter T11 for the first wafer WF1, the value of the preprocessing process parameter T1 for the second wafer WF2 can be the same as the value of the second process parameter T12 for the second wafer WF2, the value of the preprocessing process parameter T1 for the third wafer WF3 can be the same as the value of the first process parameter T11 for the third wafer WF3, and the value of the preprocessing process parameter T1 for the fourth wafer WF4 can be the same as the value of the second process parameter T12 for the fourth wafer WF4. The preprocessing component 1200 can then provide the generated tensor data TD1 to the modeling component 1300 for further processing.

[0080] Figure 10 This is a diagram illustrating the operation of the semiconductor manufacturing system 1000-2 according to an example embodiment. Figure 11 Through Figure 10 The graph of the raw data RD2 generated by the operation. Figure 12 Through Figure 10 The graph of tensor data TD2 generated by the operation.

[0081] Semiconductor manufacturing equipment 1100-2 may include a chamber CH-2. Chamber CH-2 can simultaneously accommodate two wafers. Semiconductor manufacturing equipment 1100-2 can simultaneously process a first wafer WF1 and a second wafer WF2 in chamber CH-2. Furthermore, semiconductor manufacturing equipment 1100-2 can simultaneously process a third wafer WF3 and a fourth wafer WF4 in chamber CH-2. Semiconductor manufacturing equipment 1100-2 can be... Figure 1 Any one of the first semiconductor manufacturing equipment 1100a to the eighth semiconductor manufacturing equipment 1100h.

[0082] The pretreatment component 1200 can obtain the value of process parameter T2 from chamber CH-2. In some embodiments, process parameter T2 may be the temperature of chamber CH-2.

[0083] In this case, the raw data RD2 may include the value of the process parameter T2 of the first wafer WF1, exclude the value of the process parameter T2 of the second wafer WF2, include the value of the process parameter T2 of the third wafer WF3, and exclude the value of the process parameter T2 of the fourth wafer WF4.

[0084] The preprocessing component 1200 can generate tensor data TD2 by copying the value of the process parameter T2 of the first wafer WF1 as the value of the preprocessing process parameter T2′ for each of the first wafer WF1 and the second wafer WF2, and by copying the value of the process parameter T2 of the third wafer WF3 as the value of the preprocessing process parameter T2′ for each of the third wafer WF3 and the fourth wafer WF4. For example, the value of the preprocessing process parameter T2′ for each of the first wafer WF1 and the second wafer WF2 can be the same as the value of the process parameter T2 of the first wafer WF1, and the value of the preprocessing process parameter T2′ for each of the third wafer WF3 and the fourth wafer WF4 can be the same as the value of the process parameter T2 of the third wafer WF3. The preprocessing component 1200 can provide the generated tensor data TD2 to the modeling component 1300 for further processing.

[0085] Figure 13 This is a diagram illustrating the operation of the semiconductor manufacturing system 1000-3 according to an example embodiment. Figure 14 Through Figure 13 The graph of the raw data RD3 generated by the operation. Figure 15 Through Figure 13 The graph of tensor data TD3 generated by the operation.

[0086] refer to Figures 13 to 15 Semiconductor manufacturing equipment 1100-3 may include a chamber CH-3, and semiconductor manufacturing equipment 1100-3 may process a batch of WF0 including a first wafer WF1 to a fourth wafer WF4 in the chamber CH. For example, semiconductor manufacturing equipment 1100-3 may simultaneously process the first wafer WF1 to the fourth wafer WF4 in the chamber CH-3. Semiconductor manufacturing equipment 1100-3 may be Figure 1 Any one of the first semiconductor manufacturing equipment 1100a to the eighth semiconductor manufacturing equipment 1100h.

[0087] The pretreatment component 1200 can obtain the value of process parameter T3 from chamber CH-3 of the processing batch WF0 of the semiconductor manufacturing equipment 1100-3. Here, process parameter T3 can be the temperature of chamber CH-3.

[0088] In this case, the raw data RD3 may include the value of the process parameter T3 for batch WF0, but may not include the value of the process parameter T3 for the first wafer WF1 to the fourth wafer WF4.

[0089] The preprocessing component 1200 can generate tensor data TD3 by copying the value of process parameter T3 of batch WF0 as the value of preprocessing process parameter T3′ for each of the first wafers WF1 to the fourth wafers WF4. For example, the value of preprocessing process parameter T3′ for each of the first wafers WF1 to the fourth wafers WF4 can be the same as the value of process parameter T3 of batch WF0. The preprocessing component 1200 can provide the generated tensor data TD3 to the modeling component 1300 for further processing.

[0090] although Figures 13 to 15 A batch comprising four wafers (e.g., first wafer WF1 to fourth wafer WF4) is shown, but the number of wafers in a batch may be more or less. For example, a batch WF0 may include two wafers (e.g., first wafer WF1 and second wafer WF2), three wafers (e.g., first wafer WF1 to third wafer WF3), or more than four wafers (e.g., first wafer WF1 to nth wafer WFn).

[0091] Figure 16 This is a diagram illustrating the operation of the semiconductor manufacturing system 1000-4 according to an example embodiment. Figure 17 Through Figure 16 The graph of the original data RD4 generated by the operation. Figure 18 Through Figure 14 The graph of tensor data TD4 generated by the operation.

[0092] refer to Figures 16 to 18 Semiconductor manufacturing equipment 1100-4 can sequentially process the first wafer WF1 to the fourth wafer WF4. Semiconductor manufacturing equipment 1100-4 can be... Figure 1 The first semiconductor manufacturing equipment 1100a to the eighth semiconductor manufacturing equipment 1100h may be used. The preprocessing unit 1200 may obtain a first process parameter t4 and a second process parameter Δt4 from the semiconductor manufacturing equipment 1100-3. The first process parameter t4 may be the thickness of the thin film on the wafer, while the second process parameter Δt4 may be the thickness difference between the thin film on the first wafer WF1 and the thin film on a wafer other than the first wafer.

[0093] The raw data RD4 may include the value of the first process parameter t4 of the first wafer WF1, but not the value of the second process parameter Δt4 of the first wafer WF1, and includes the values ​​of the first process parameter t4 and the second process parameter Δt4 of the second wafer WF2, the first process parameter t4 and the second process parameter Δt4 of the third wafer WF3, and the first process parameter t4 and the second process parameter Δt4 of the fourth wafer WF4. For example, when the raw data RD4 is represented as a raw matrix, the elements corresponding to the value of the second process parameter Δt4 of the first wafer WF1 can be omitted.

[0094] The values ​​of the second process parameter Δt4 for the second wafer WF2 to the fourth wafer WF4 can be calculated based on the values ​​of the first process parameter t4 for the first wafer WF1 to the fourth wafer WF4. For example, when the first process parameter t4 is the thickness of the thin film on the wafer, and the second process parameter Δt4 is the thickness difference between the thin film on the first wafer WF1 and the thin film on a certain wafer, the value of the second process parameter t4 for the second wafer WF2 can be calculated by subtracting the value of the first process parameter t4 for the first wafer WF1 from the value of the first process parameter t4 for the second wafer WF2. Similarly, the value of the second process parameter Δt4 for the third wafer WF3 can be calculated by subtracting the value of the first process parameter t4 for the first wafer WF1 from the value of the first process parameter t4 for the third wafer WF3. Furthermore, the value of the second process parameter Δt4 for the fourth wafer WF4 can be calculated by subtracting the value of the first process parameter t4 for the first wafer WF1 from the value of the first process parameter t4 for the fourth wafer WF4.

[0095] The preprocessing component 1200 can generate tensor data TD4 by deleting the values ​​of the second process parameter Δt4 from the second wafer WF2 to the fourth wafer WF4. For example, the tensor data TD4 may include the value of the first process parameter t4 for each of the first wafers WF1 to the fourth wafer WF4, but may not include the value of the second process parameter Δt4 for any of the first wafers WF1 to the fourth wafer WF4. The preprocessing component 1200 can provide the generated tensor data TD4 to the modeling component 1300 for further processing.

[0096] Figures 7 to 18 Examples are shown where the original matrix has omitted elements when the original data is represented as an original matrix, and examples are shown where tensor data is generated from the original data based on at least one of the characteristics and parameters of a semiconductor manufacturing device. However, besides Figures 7 to 18 Besides the example shown, there are various other examples where the original data is represented as an original matrix with omitted elements. Furthermore, in addition to... Figures 7 to 18In addition to the examples shown, there are various examples of generating tensor data from raw data based on at least one of the characteristics and parameters of semiconductor manufacturing equipment.

[0097] Figure 19 This is a block diagram of the modeling component 1300 according to an example embodiment. Figure 20 This is a conceptual diagram of the operation of the modeling component 1300 according to an example embodiment. Figure 21 This is a conceptual diagram of the operation of the modeling component 1300 according to an example embodiment. Figure 22 This is a conceptual diagram of the operation of the modeling component 1300 according to an example embodiment.

[0098] refer to Figures 19 to 22 The modeling component 1300 may include a model learning sub-component 1310, a process result value prediction sub-component 1320, and a variable importance calculation sub-component 1330.

[0099] The model learning sub-component 1310 can generate a machine learning model MD and train the machine learning model MD. The machine learning model MD can include, for example, a linear regression model, a support vector machine model, a decision tree model, a random forest model, an XG boost model, or a gradient boosting model.

[0100] The model learning sub-component 1310 can train the machine learning model MD using supervised learning, semi-supervised learning, unsupervised learning, or a combination thereof. The model learning sub-component 1310 can be trained to output predicted process results based on at least one preprocessing process parameter.

[0101] like Figure 20 As shown, the process result value prediction sub-component 1320 can predict process result values ​​based on at least one preprocessing process parameter by using a machine learning model MD trained by the model learning sub-component 1310.

[0102] like Figure 21 As shown, the variable importance calculation subcomponent 1330 can calculate the importance of each preprocessing process parameter using a first machine learning model MD1 trained by the model learning subcomponent 1310. This first machine learning model MD1 is trained to predict process outcome values ​​from multiple preprocessing process parameters. Preprocessing process parameters with higher importance can have a greater impact on the process outcome values.

[0103] Furthermore, the model learning sub-component 1310 can train a second machine learning model MD2 to predict process outcome values ​​based on the preprocessing process parameter with the highest importance among multiple preprocessing process parameters. For example... Figure 22As shown, the process result value prediction sub-component 1320 can predict process result values ​​based on the preprocessing process parameters with the highest importance by using a second machine learning model MD2 trained by the model learning sub-component 1310.

[0104] Figure 23 This is a graph showing the modeling results based on the comparative examples.

[0105] refer to Figure 23 Without converting the raw data into tensor data, process outcome values ​​are predicted using a machine learning model trained on the raw data. The XG augmentation model has been used as a machine learning model. Figure 23 In the diagram, the X-axis represents the predicted value of the process result, while the Y-axis represents the actual value of the process result. Ri represents the correlation between the predicted and actual values ​​of the process result. 2 The value has been calculated to be -0.11. R has a negative value. 2 This means there is no correlation between the predicted and actual values ​​of the process results. For example, without converting the raw data into tensor data, a machine learning model trained on the raw data may not accurately predict the process result values.

[0106] Figure 24 This is a diagram showing the modeling results based on the example embodiment.

[0107] refer to Figure 24 The XG augmentation model is used to predict process outcome values ​​by employing a machine learning model trained on tensor data. It has been used as a machine operation model. Figure 24 In the diagram, the X-axis represents the predicted value of the process result, while the Y-axis represents the actual value of the process result. Ri represents the correlation between the predicted and actual values ​​of the process result. 2 The value has been calculated to be 0.37. This value indicates a significant correlation between the predicted and actual values ​​of the process outcome. For example, a machine learning model trained on tensor data has successfully predicted the process outcome value. By... Figure 23 Comparison examples and Figure 24 By comparing the embodiments, it can be understood that by converting raw data into tensor data in a semiconductor process modeling system, users can more easily obtain high-performance models.

[0108] Figure 25 This is a flowchart of a semiconductor process modeling method 100 according to an example embodiment.

[0109] refer to Figure 25 as well as Figures 1 to 3Raw data RD, including values ​​of multiple process parameters, can be obtained from the first semiconductor manufacturing equipment 1100a to the eighth semiconductor manufacturing equipment 1100h (S110). Then, tensor data TD can be generated by modifying the raw data RD based on the characteristics of the first semiconductor manufacturing equipment 1100a to the eighth semiconductor manufacturing equipment 1100h and at least one of the characteristics of the multiple process parameters (S120). Next, modeling can be performed based on the tensor data TD (S130).

[0110] Figure 26 This is a flowchart of a semiconductor process modeling method 100-1 according to an example embodiment.

[0111] refer to Figure 26 as well as Figures 7 to 9 The operation S110-1 for obtaining raw data may include operation S110-1a for obtaining the value of the first process parameter T11 of the first wafer WF1 from the first chamber CH1 of the semiconductor manufacturing equipment 1100-1 for processing the first wafer WF1, and operation S110-1b for obtaining the value of the second process parameter T12 of the second wafer WF2 from the second chamber CH2 of the semiconductor manufacturing equipment for processing the second wafer WF2. In some embodiments, operation S110-1a for obtaining the value of the first process parameter T11 and operation S110-1b for obtaining the value of the second process parameter T12 may be performed simultaneously. Next, tensor data TD1 can be generated by merging the first process parameter T11 and the second process parameter T12 into preprocessing process parameters (S120-1). Then, modeling can be performed based on the tensor data TD1 (S130).

[0112] Figure 27 This is a flowchart of semiconductor process modeling method 100-2 according to an example embodiment.

[0113] refer to Figure 27 and Figures 10 to 12 Raw data can be obtained by acquiring the values ​​of the process parameters of the first wafer WF1 from chamber CH-2, which simultaneously processes the first wafer WF1 and the second wafer WF2 in semiconductor manufacturing equipment 1100-2 (S110-2). Next, tensor data TD2 can be generated by copying the values ​​of the process parameter T2 of the first wafer WF1 as the values ​​of the preprocessing process parameter T2′ for each of the first wafer WF1 and the second wafer WF2 (S120-2). Then, modeling can be performed based on the tensor data TD2 (S130). Figure 28 This is a flowchart of semiconductor process modeling method 100-3 according to an example embodiment.

[0114] refer to Figure 28 as well as Figures 13 to 15Raw data can be obtained by acquiring the value of process parameter T3 from chamber CH-3 of the semiconductor manufacturing equipment 1100-3, which processes batch WF0 including the first wafer WF1 to the fourth wafer WF4 (S110-3). Next, tensor data TD3 can be generated by copying the value of process parameter T3 of batch WF0 as the value of preprocessing process parameter T3′ for each wafer in the first wafer WF1 to the fourth wafer WF4. Then, modeling can be performed based on the tensor data TD3 (S130).

[0115] Figure 29 This is a flowchart of semiconductor process modeling method 100-4 according to an example embodiment.

[0116] refer to Figure 29 as well as Figures 16 to 18 The operation S110-4 for obtaining the raw data may include operation S110-4a for obtaining the value of the first process parameter t4 of the first wafer WF1, and operation S110-4b for obtaining the values ​​of the first process parameter t4 and the second process parameter Δt4 of the second wafer WF2. Next, tensor data TD4 can be generated by deleting the second process parameter Δt4 of the second wafer WF2 (S120-4). Then, modeling can be performed based on the tensor data TD4 (S130).

[0117] In some embodiments, operation S110-4b can be performed on the third wafer WF3 and the fourth wafer WF4. For example, in operation S110-4b, the values ​​of the first process parameter t4 and the second process parameter Δt4 of the second wafer WF2 to the fourth wafer WF4 can be obtained. In such an embodiment, in operation S120-4, tensor data TD4 can be generated by deleting the second process parameter Δt4 of each of the second wafers WF2 to the fourth wafer WF4.

[0118] Figure 30 This is a flowchart of semiconductor process modeling method 100-5 according to an example embodiment.

[0119] refer to Figure 30 and Figure 20 The original data can be obtained (S110), and tensor data can be generated from the original data (S120). Next, the modeling operation S130-5 may include operation S130-5a of training the machine learning model MD to predict the process result value based on at least one preprocessing process parameter, and operation S130-5b of using the machine learning model MD to predict the process result value based on at least one preprocessing process parameter.

[0120] Figure 31 This is a flowchart of semiconductor process modeling method 100-6 according to an example embodiment.

[0121] refer to Figure 31 , Figure 21 and Figure 22 The original data can be obtained (S110), and tensor data can be generated from the original data (S120). Next, the modeling operation S130-6 may include: operation S130-6a of training a first machine learning model MD1 to predict the process result value based on multiple preprocessing process parameters; operation S130-6b of using the first machine learning model MD1 to calculate the importance of multiple preprocessing process parameters; operation S130-6c of training a second machine learning model MD2 to predict the process result value based on the preprocessing process parameter with the highest importance among the multiple preprocessing process parameters; and operation S130-6d of using the second machine learning model MD2 to predict the process result value based on the preprocessing process parameter with the highest importance.

[0122] Although the inventive concept has been specifically shown and described with reference to embodiments thereof, it will be understood that various changes in form and detail may be made therein without departing from the spirit and scope of the appended claims.

Claims

1. A semiconductor process modeling system, comprising: The preprocessing component is configured to generate tensor data based on raw data obtained from semiconductor manufacturing equipment. Wherein, when the original data is represented as an original matrix representing the values ​​of multiple process parameters for each of multiple wafers, at least one element of the original matrix is ​​omitted. Wherein, when the tensor data is represented as a tensor matrix representing the values ​​of multiple preprocessing process parameters for each of the plurality of wafers, the number of omitted elements in the tensor matrix is ​​less than the number of omitted elements in the original matrix, and The preprocessing component is configured to generate the tensor data by modifying the original data based on at least one of the characteristics of the semiconductor manufacturing equipment and the characteristics of the plurality of process parameters.

2. The semiconductor process modeling system according to claim 1, in, The number of omitted elements in the tensor matrix is ​​0.

3. The semiconductor process modeling system according to claim 1, in, The raw data includes the values ​​of the first process parameters of the first wafer and the values ​​of the second process parameters of the second wafer, and The preprocessing component is configured to generate the tensor data based on the original data, such that the values ​​of the preprocessing process parameters of the first wafer are the same as the values ​​of the first process parameters of the first wafer, and the values ​​of the preprocessing process parameters of the second wafer are the same as the values ​​of the second process parameters of the second wafer.

4. The semiconductor process modeling system according to claim 3, in, The preprocessing component is configured to obtain the value of the first process parameter from a first chamber of the semiconductor manufacturing equipment that processes the first wafer, and to obtain the value of the second process parameter from a second chamber of the semiconductor manufacturing equipment that processes the second wafer.

5. The semiconductor process modeling system according to claim 1, in, The raw data includes the values ​​of the process parameters of the first wafer, and The preprocessing component is configured to generate the tensor data based on the original data, such that the values ​​of the preprocessing process parameters for each of the first and second wafers are the same as the values ​​of the process parameters for the first wafer.

6. The semiconductor process modeling system according to claim 5, in, The preprocessing component is configured to obtain process parameter values ​​from the chambers of the semiconductor manufacturing equipment that simultaneously process the first wafer and the second wafer.

7. The semiconductor process modeling system according to claim 1, in, The raw data includes the values ​​of process parameters for the batch, including the first wafer and the second wafer, and The preprocessing component is configured to generate the tensor data based on the raw data, such that the values ​​of the preprocessing process parameters for each of the first and second wafers are the same as the values ​​of the process parameters for the batch.

8. The semiconductor process modeling system according to claim 7, in, The preprocessing component is configured to obtain values ​​of process parameters from the processing chamber of the semiconductor manufacturing equipment for the batch.

9. The semiconductor process modeling system according to claim 1, in, The raw data includes the values ​​of the first process parameters of the first wafer, and the values ​​of the first process parameters and the second process parameters of the second wafer, and The preprocessing component is configured to generate the tensor data based on the raw data, such that the tensor data includes the values ​​of the first process parameters of each of the first wafer and the second wafer, and omits the values ​​of the second process parameters of the second wafer.

10. The semiconductor process modeling system according to claim 9, in, In the raw data, the value of the second process parameter of the second wafer is calculated based on the value of the first process parameter of each of the first wafer and the second wafer.

11. The semiconductor process modeling system according to claim 1, further comprising: The modeling component includes a model learning sub-component configured to train a first machine learning model to predict process outcome values ​​based on at least one of the plurality of preprocessing process parameters.

12. The semiconductor process modeling system according to claim 11, in, The modeling component further includes a variable importance calculation subcomponent, configured to use the first machine learning model to calculate the importance of the plurality of preprocessing process parameters to the process result value.

13. The semiconductor process modeling system according to claim 12, in, The model learning sub-component is configured to train a second machine learning model to predict process outcome values ​​based on the most important preprocessing process parameter among the plurality of preprocessing process parameters.

14. A semiconductor manufacturing system, comprising: Semiconductor manufacturing equipment, configured to process multiple wafers; as well as Semiconductor process modeling system The semiconductor process modeling system includes: A preprocessing component is configured to generate tensor data based on raw data obtained from the semiconductor manufacturing equipment; and A modeling component is configured to model semiconductor processes using the tensor data. Wherein, when the original data is represented as an original matrix representing the values ​​of multiple process parameters for each of the plurality of wafers, at least one element of the original matrix is ​​omitted, and Wherein, when the tensor data is represented as a tensor matrix representing the values ​​of multiple preprocessing process parameters for each of the plurality of wafers, the number of omitted elements in the tensor matrix is ​​less than the number of omitted elements in the original matrix, and The preprocessing component is configured to generate the tensor data by modifying the original data based on at least one of the characteristics of the semiconductor manufacturing equipment and the characteristics of the plurality of process parameters.

15. The semiconductor manufacturing system according to claim 14, in, The raw data includes the values ​​of the first process parameters of the first wafer and the values ​​of the second process parameters of the second wafer, and The preprocessing component is configured to generate the tensor data by merging the first process parameter and the second process parameter into a single preprocessing process parameter.

16. The semiconductor manufacturing system according to claim 15, in, The semiconductor manufacturing apparatus includes a first chamber and a second chamber, and is configured to process the first wafer in the first chamber and the second wafer in the second chamber. The pretreatment component is configured to obtain the value of the first process parameter from the first chamber and the value of the second process parameter from the second chamber.

17. The semiconductor manufacturing system according to claim 14, in, The raw data includes the values ​​of the process parameters of the first wafer, and The preprocessing component is configured to generate the tensor data by copying the values ​​of the process parameters of the first wafer as the values ​​of the preprocessing process parameters for each of the first and second wafers.

18. The semiconductor manufacturing system according to claim 14, in, The raw data includes the values ​​of process parameters for the batch, including the first wafer and the second wafer, and The preprocessing component is configured to generate the tensor data by copying the values ​​of the process parameters of the batch as the values ​​of the preprocessing process parameters for each of the first and second wafers.

19. The semiconductor manufacturing system according to claim 14, in, The raw data includes the values ​​of the first process parameters of the first wafer, and the values ​​of the first process parameters and the second process parameters of the second wafer, and The preprocessing component is configured to generate the tensor data by deleting the values ​​of the second process parameters of the second wafer.

20. A semiconductor process modeling method, comprising: Obtain raw data, including values ​​of multiple process parameters, from semiconductor manufacturing equipment; as well as Tensor data is generated by modifying the original data based on at least one of the characteristics of the semiconductor manufacturing equipment and the characteristics of the plurality of process parameters. Wherein, when the original data is represented as an original matrix representing the values ​​of the plurality of process parameters for each of a plurality of wafers, at least one element of the original matrix is ​​omitted, and Wherein, when the tensor data represents a tensor matrix representing the values ​​of multiple preprocessing process parameters for each of the plurality of wafers, the number of omitted elements in the tensor matrix is ​​less than the number of omitted elements in the original matrix.

Images