Semiconductor package and method of manufacturing the same

CN115602634BActive Publication Date: 2026-08-07JMJ KOREA CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
JMJ KOREA CO LTD
Filing Date
2022-05-19
Publication Date
2026-08-07

AI Technical Summary

Technical Problem

[0006]但,如上述地通过磨轮去除密封材料时,密封材料的消耗量增加,并且,在使用磨轮研磨密封材料时,可能使得构成基板的金属层被磨削而在陶瓷等绝缘层上发生裂纹,因此,如果为了防止裂纹的发生而使得金属层的厚度较厚地形成,存在费用上升的问题,并且,研磨时的金属颗粒残留在密封材料之间,而可能发生绝缘电压的问题,并且,因向半导体封装施加的压力,可能发生层间剥离(delamination)现象

Benefits of technology

根据本发明,具有如下效果:可通过激光阴刻加工的止动件而能够调整用于与散热器的接合及热传送的热传送接合部件的厚度,并且,能够恒定地维持而防止剥离现象,提高热传送效率。

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Abstract

The present application provides a semiconductor package having a package case with a negative engraved surface shape and a manufacturing method thereof, which can adjust the thickness of a heat transfer joint member for joint with a heat sink and heat transfer by a stopper processed by laser negative engraving, and can constantly maintain to prevent peeling phenomenon, improving heat transfer efficiency.
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Description

Technical Field

[0001] This invention relates to a semiconductor package with an etched surface shape and a method for manufacturing the same, which allows for adjustment of the thickness of a heat transfer bonding component for bonding with a heat sink and heat transfer via a stopper processed by laser etch, and which can maintain a constant thickness to prevent peeling and improve heat transfer efficiency. Background Technology

[0002] As is well known, electrical and electronic components, especially semiconductor components, generate heat during operation. Therefore, heat sinks are used to prevent overheating and maintain their performance.

[0003] In particular, semiconductor components used in high-power applications are prevented from overheating by a heat sink with circulating coolant, and a cooling component that contacts the circulating coolant is inserted into the heat sink to cool the heat transferred from the semiconductor component to the cooling component.

[0004] and, Figure 1 The figure shows the cross-sectional structure of a conventional semiconductor package. Referring to the figure, a sealing material is molded by covering the lower substrate 21 and the upper substrate 22 with a lower molding mold (not shown) and an upper molding mold (not shown) to form a package shell 30. However, due to the error of the molding mold, the sealing material is overmolded.

[0005] In order to bond the heat sink 50 to the exposed surface (A) of the lower substrate 21 or the upper substrate 22 by means of the adhesive 40, the secondary-formed sealing material on the upper part of the lower substrate (21) or the upper substrate 22 is removed by means of the grinding wheel 11.

[0006] However, when the sealing material is removed by grinding wheel as described above, the consumption of sealing material increases. Furthermore, when grinding the sealing material with grinding wheel, the metal layer constituting the substrate may be ground down, causing cracks in the insulating layer such as ceramic. Therefore, if the metal layer is made thicker to prevent cracks, there is a problem of increased cost. In addition, metal particles left between the sealing materials during grinding may cause insulation voltage problems. Moreover, due to the pressure applied to the semiconductor package, delamination may occur.

[0007] Furthermore, when applying the adhesive for bonding with the heat sink, no step difference is formed between the substrate surface and the sealing material. Therefore, the thickness of the adhesive cannot be maintained consistently, especially at both ends of the adhesive, which reduces heat transfer efficiency and causes peeling.

[0008] [Preliminary Technology Documents] [Patent Documents] (Patent Document 0001) Korean Registered Patent No. 10-2231769 (Exposed Semiconductor Package for High Thermal Conductivity Heat Sink and Manufacturing Method Thereof, Announced 2021.04.01) (Patent Document 0002) Korean Registered Patent Publication No. 10-1239117 (Power Semiconductor Packaging and Manufacturing Method Thereof, Announced on March 6, 2013) (Patent Document 0003) Korean Registered Patent No. 10-2172689 (Semiconductor Packaging and Manufacturing Method Thereof, Announced 2020.11.02) Summary of the Invention

[0009] The technical problem that the invention aims to solve The technical problem to be solved by the present invention is to provide a semiconductor package with an engraved surface shape and a method for manufacturing the same. The thickness of the heat transfer bonding component for bonding with the heat sink and heat transfer can be adjusted by using a stop member processed by laser engraving, and can be maintained constant to prevent peeling and improve heat transfer efficiency.

[0010] Technical solutions to the problem To achieve the above objectives, one embodiment of the present invention provides a semiconductor package with an encapsulated surface shape, comprising: one or more substrates on which one or more semiconductor chips are mounted; one or more terminal leads electrically connected to the substrates; an electrical connection member connecting the semiconductor chips and the substrates or the terminal leads; an encapsulation housing enclosing the semiconductor chips, the electrical connection member, and the one or more substrates; one or more stop members formed of the same material as the encapsulation housing, formed at a predetermined height above the exposed surface of the substrates, and formed on or covering at least a portion of the exposed surface of the substrates; and one or more heat sinks for dissipating heat from the semiconductor chips, wherein at least a portion of the exposed surface of the one or more substrates is formed above, below, or above and below the encapsulation housing, and the exposed surfaces of the one or more substrates and the heat sinks are joined by a heat transfer bonding member.

[0011] Another embodiment of the present invention provides a semiconductor package with an encapsulated surface shape, comprising: one or more substrates on which one or more semiconductor chips are mounted; one or more terminal leads electrically connected to the substrates; an electrical connection member connecting the semiconductor chips and the substrates or the terminal leads; an encapsulation housing enclosing the semiconductor chips, the electrical connection member, and the one or more substrates; one or more stop members formed of the same material as the encapsulation housing, formed at a predetermined height above the exposed surface of the substrates, and formed without overlapping the exposed surface of the substrates; and one or more heat sinks for dissipating heat from the semiconductor chips, wherein at least a portion of the exposed surface of the one or more substrates is formed above, below, or above and below the encapsulation housing, and the exposed surface of the one or more substrates and the heat sink are joined by a heat transfer bonding member.

[0012] Here, the substrate is a metal substrate, or includes one or more insulating layers.

[0013] Furthermore, the height of the stop is 1. Up to 1 mm.

[0014] Furthermore, the stop is formed relatively high in one or more planar shapes, such as circles, squares, and polygons.

[0015] Furthermore, the one or more stop members are formed by laser engraving a portion of the surface of the encapsulation shell.

[0016] Furthermore, the height of the one or more stops is determined based on a portion of the surface of the encapsulation housing that has not undergone intaglio processing.

[0017] Furthermore, the electrical connection component is formed of a single metal selected from Au, Ag, Al, and Cu, or an alloy containing more than 50% by weight of one or more of Au, Ag, Al, and Cu.

[0018] Furthermore, the electrical connection component is a conductive spacer in the shape of a hexahedron or a cylinder.

[0019] Furthermore, one side of the spacer is electrically bonded to the semiconductor chip on the first substrate by a conductive adhesive, and the other side of the spacer is electrically bonded to the second substrate by a conductive adhesive.

[0020] Furthermore, the electrical connection component is electrically connected between the one or more semiconductor chips and the substrate.

[0021] Furthermore, the semiconductor chip is mounted on an upper substrate or a lower substrate.

[0022] Furthermore, one or more spherical particles or one or more spherical circular grooves are formed on the wall surface of the stop.

[0023] Furthermore, the diameter of the particle or the depth of the circular groove is 1. Up to 100 .

[0024] Furthermore, one side of the heat sink has one or more metal layers or one or more ceramic layers.

[0025] Furthermore, the thickness of the heat transfer bonding member formed between one side of the heat sink and the exposed surface of one or more substrates is 1. Up to 1 mm.

[0026] Furthermore, the heat transfer rate of the heat transfer joint component is from 1 W / (m·K) to 400 W / (m·K).

[0027] Furthermore, the heat transfer bonding component is more than 60% concentrated inside the stop, the exposed surface of the substrate, and one side of the heat sink.

[0028] Furthermore, the one or more semiconductor chips are structurally connected on one side of the lower substrate by an adhesive, and the one or more stop members are not formed on the other side of the lower substrate. The one or more stop members are formed on one side of the upper substrate, and the other side of the upper substrate is electrically connected to the semiconductor chips through the electrical connection member.

[0029] Furthermore, the one or more semiconductor chips are structurally connected on one side of the lower substrate by an adhesive, and the one or more stop members are formed on the other side of the lower substrate. The one or more stop members are formed on one side of the upper substrate, and the other side of the upper substrate is electrically connected to the semiconductor chips through the electrical connection member.

[0030] Another embodiment of the present invention provides a semiconductor packaging manufacturing method for a package housing having an etched surface shape, comprising the following steps: preparing a lower substrate and an upper substrate for mounting one or more semiconductor chips, an electrical connection component, and one or more terminal leads; structurally connecting the lower substrate, the upper substrate, the semiconductor chip, and the electrical connection component by introducing a conductive adhesive; forming a package housing by encapsulating the entire mounting surface and at least a portion of the exposed surface of the semiconductor chip, the electrical connection component, the lower substrate, and the upper substrate; performing an etched pattern on a portion of the surface of the package housing using a laser to form a stop member at a predetermined height higher than the exposed surface of the lower substrate or the upper substrate; and joining the exposed surface of the one or more substrates with a heat sink by introducing a heat transfer bonding component.

[0031] Here, the height of the stop is 1. Up to 1 mm.

[0032] The effects of the invention According to the present invention, the following effects are achieved: the thickness of the heat transfer joint component for joining with the heat sink and for heat transfer can be adjusted by the stop component processed by laser engraving, and the thickness can be maintained constant to prevent peeling and improve heat transfer efficiency.

[0033] Furthermore, it has the following effects: compared with the previous stop structure and forming method of grinding wheel, it can minimize the consumption of sealing material for molding the package shell, prevent the ceramic of the insulating layer of the substrate from cracking, minimize the thickness of the metal layer on the exposed surface of the substrate, block the insulation voltage abnormality caused by metal particles generated during grinding remaining between the package shells, minimize the pressure applied to the semiconductor package, and prevent interlayer peeling. Attached Figure Description

[0034] Figure 1 This represents the cross-sectional structure of semiconductor packaging in previous technologies. Figure 2 This illustrates the cross-sectional structure of a semiconductor package with an encapsulated surface shape, according to the present invention. Figure 3 express Figure 2 A stop structure on the upper part of the substrate in one embodiment; Figure 4 Indicates according to Figure 2 Another embodiment of the stop structure on the upper part of the substrate; Figure 5 This indicates the cross-sectional structure of a semiconductor package incorporating a heat sink. Figure 6 Example: SEM image of the side of the stop member of the semiconductor package with an encapsulated housing having an etched surface shape according to the present invention; Figure 7 This invention illustrates a method for manufacturing a semiconductor package having an encapsulated surface shape, according to yet another embodiment of the present invention.

[0035] Attached Figure Symbols 110: Semiconductor chip; 111: Adhesive 112: Adhesive 121: Lower substrate 122: Upper substrate; 123: Conductive adhesive 130: Terminal lead 141: Spacer 142: Metal wire; 150: Encapsulation housing 160: Stopping component; 161: Particles 162: Circular groove; 170: Radiator 171: Heat transfer joint component 172: One side 173: Metal cooling column A: Exposed surface H: Height Detailed Implementation

[0036] Hereinafter, embodiments of the present invention having the above features will be described in more detail with reference to the accompanying drawings.

[0037] The present invention relates to a semiconductor package having a package housing with an etched surface shape in one embodiment having a stop member 160 formed overlapping with the exposed surfaces (A) of substrates 121, 122 on a package housing 150; a semiconductor package having a package housing with an etched surface shape in another embodiment having a stop member 160 not overlapping with the exposed surfaces (A) of substrates 121, 122; and a method for manufacturing a semiconductor package having a package housing with an etched surface shape and a stop member 160 formed by an etched process of laser 10.

[0038] Reference Figure 2 and Figure 3 The essence of a semiconductor package with an encapsulated surface shape according to an embodiment of the present invention includes: one or more substrates 121, 122 on which one or more semiconductor chips 110 are mounted; one or more terminal leads 130 electrically connected to the substrates 121, 122; an electrical connection component connecting the semiconductor chip 110 to the substrates 121, 122 or the terminal leads 130; an encapsulation housing 150 encapsulating the semiconductor chip 110, the electrical connection component, and the one or more substrates 121, 122; and a package formed of the same material as the encapsulation housing 150, with a predetermined height relative to the exposed surface (A) of the substrates 121, 122. The substrates 121 and 122 are formed to a higher degree, and one or more stop members 160 are formed on or covering at least a portion of the exposed surfaces (A) of the substrates 121 and 122; and one or more heat sinks 170 are formed to transfer heat from the semiconductor chip 110. At least a portion of the exposed surfaces (A) of the substrates 121 and 122 are formed on the top, bottom or upper-lower surface of the package housing 150. The exposed surfaces (A) of the substrates 121 and 122 and the heat sink 170 are joined by intervening heat transfer bonding member 171, and the overall thickness of the heat transfer bonding member 171 is maintained constant.

[0039] Reference Figure 2 and Figure 4The essence of a semiconductor package with an encapsulated surface shape according to another embodiment of the present invention includes: one or more substrates 121, 122 on which one or more semiconductor chips 110 are mounted; one or more terminal leads 130 electrically connected to the substrates 121, 122; an electrical connection component connecting the semiconductor chips 110 to the substrates 121, 122 or the terminal leads 130; an encapsulation housing 150 encapsulating the semiconductor chips 110 and the electrical connection component and one or more substrates 121, 122; and a package formed of the same material as the encapsulation housing 150, compared to the substrates 121, 122, 121, 122. The exposed surface (A) of 22 is formed at a predetermined height, and one or more stop members 160 are formed without overlapping with the exposed surfaces (A) of substrates 121 and 122; and one or more heat sinks 170 are formed to transfer heat from the semiconductor chip 110. At least a portion of the exposed surfaces (A) of one or more substrates 121 and 122 are formed on the top, bottom or upper-lower surface of the package housing 150. The exposed surfaces (A) of one or more substrates 121 and 122 are joined with the heat sink 170 by intervening in the heat transfer bonding member 171, and the overall thickness of the heat transfer bonding member 171 is predetermined.

[0040] First, the substrate is formed from more than one, and more than one semiconductor chip 110 is mounted on it.

[0041] The substrate may be a metal substrate, or the substrate may include one or more insulating layers formed of ceramic, such as... Figure 2 As shown, a laminated structure can be formed by one or more metal layers 121a, 122a; insulating layers 121b, 122b formed on the metal layers 121a, 122a; and one or more metal layers 121c, 122c formed on the insulating layers 121b, 122b, forming a metal pattern.

[0042] For example, the substrate may be exposed on one or both sides of the package housing 150 according to a single-sided substrate structure or a double-sided substrate structure. It is formed by a lower substrate 121 for mounting the semiconductor chip 110 and an upper substrate 122 separated from the lower substrate 121. The semiconductor chip 110 and the upper substrate 122 are electrically connected in a surface bonding manner through an electrical connection member, i.e., a spacer 141. An adhesive 111 is filled between the semiconductor chip 110 and the electrical connection member.

[0043] Furthermore, the semiconductor chip 110 can be mounted on the lower substrate 121 or the upper substrate 122, and can be a diode, a semiconductor thyristor, an IGBT (Insulated Gate Bipolar Transistor), or a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). In particular, it is suitable for devices such as inverters, converters, or OBCs (On Board Chargers) that convert or control power, and convert power into other types of power such as specific current, specific voltage, or specific frequency.

[0044] Then, one or more terminal leads 130 are formed and electrically connected to the lower substrate 121 and / or the upper substrate 122, and exposed to the outside of the package housing 150 to provide electrical signals to the semiconductor chip 110.

[0045] Here, the terminal lead 130 may be formed of a metal containing 80% by weight or more Cu or 60% by weight or more Al.

[0046] Then, the electrical connection component electrically connects the semiconductor chip 110 and the substrate 121, 122 or the terminal lead 130, and is formed of a single metal selected from Au, Ag, Al and Cu, or an alloy containing more than 50% by weight of one or more metals selected from Au, Ag, Al and Cu.

[0047] For example, such as Figure 2 As shown, the electrical connection component may be a hexahedral or cylindrical conductive spacer 141 that electrically connects the semiconductor chip 110 on the lower substrate 121 or the upper substrate 122 to the upper substrate 122 or the lower substrate 121, or a metal wire 142 or metal clip that electrically connects the semiconductor chip 110 to the terminal lead 130 between one or more semiconductor chips 110 and the substrates 121, 122.

[0048] Here, one side of the spacer 141 is electrically bonded to the semiconductor chip 110 on the first substrate, i.e. the lower substrate 121, by a conductive adhesive 111, and the other side of the spacer 141 is electrically bonded to the second substrate, i.e. the upper substrate 122, by a conductive adhesive 123.

[0049] Then, the package housing 150 is a semiconductor circuit protection insulator that encapsulates and protects the semiconductor chip 110, electrical connection components, and one or more substrates 121, 122. It can be EMC (Epoxy Molding Compound), but it can also be a non-epoxy series composite material such as PPS (Poly Phenylene Sulfide) or PBT (Poly Butylene Terephtalate).

[0050] Then, one or more stop members 160 are formed of the same material as the package housing 150, and the exposed surface (A) of 122 is formed at a predetermined height compared to the substrate 121, while the thickness of the heat transfer bonding member 171 for engaging with the heat sink 170 is adjusted so that the thickness of the two ends of the heat transfer bonding member 171 is maintained constant and uniformly.

[0051] Therefore, such as Figure 7 As shown in b and c, on the package housing 150 covering the substrates 121 and 122 at a predetermined height, a portion of the surface of the package housing 150 is engraved using a laser 10 to form one or more stop members 160. Furthermore, as shown in one embodiment, the stop members 160 are formed overlapping with the exposed surface (A) of the substrates 121 and 122, or as shown in another embodiment, they are formed without overlap.

[0052] Right now, Figure 3 express Figure 2 One embodiment of the stop structure on the upper part of the substrate. Figure 4 express Figure 2 Another embodiment of the stop structure on the upper part of the substrate.

[0053] For more details, see [link to relevant documentation]. Figure 3 and Figure 5 In one embodiment, a stop member 160 on the upper part of the substrate 121, 122 is formed on the exposed surface (A) of the substrate 121, 122, or is formed covering at least a portion of the exposed surface (A) of the substrate 121, 122. This increases the contact area between the stop member 160 and the heat transfer bonding member 171, suppresses the peeling phenomenon of the heat transfer bonding member 171, improves the bonding force with the heat sink 170, and enables uniform heat transfer to the heat sink 170 through the heat transfer bonding member 171 of uniform thickness.

[0054] Or, refer to Figure 4 and Figure 5According to another embodiment, the stop member 160 on the upper part of the substrate 121, 122 is formed without overlapping the exposed surface (A) of the substrate 121, 122, thereby increasing the contact area between the stop member 160 and the heat transfer bonding member 171, suppressing the peeling phenomenon of the heat transfer bonding member 171, improving the bonding force with the heat sink 170, and enabling uniform heat transfer to the heat sink 170 through the heat transfer bonding member 171 of uniform thickness.

[0055] And, as Figure 3 and Figure 4 As shown, the height (H) of the stop 160 can be formed in the same way as 1. Up to 1 mm, and the stop 160 can be formed in a planar shape of one or more of the following: circular, quadrilateral, and polygonal.

[0056] Furthermore, the height (H) of one or more stop members 160 is determined based on a portion of the surface of the package housing 150 that has not been etched using the laser 10. That is, the height (H) of the stop member 160 is determined by the height from the exposed surface (A) of the substrate 121, 122 to a portion of the surface of the package housing 150 that has not been etched.

[0057] And, as Figure 5 As shown, one or more semiconductor chips 110 are structurally connected on one side of the lower substrate 121 by an adhesive 112. No stop 160 is formed on the other side of the lower substrate 121. One or more stop 160 are formed on one side of the upper substrate 122. The other side of the upper substrate 122 is electrically connected to the semiconductor chips 110 by an electrical connection member, i.e., a spacer 141.

[0058] Or, such as Figure 2 As shown, one or more semiconductor chips 110 are structurally connected on one side of the lower substrate 121 by an adhesive 112, and a stop member 160 is formed on the other side of the lower substrate 121. One or more stop members 160 are formed on one side of the upper substrate 122, and the other side of the upper substrate 122 is electrically connected to the semiconductor chip 110 by an electrical connection member, i.e., a spacer 141.

[0059] Furthermore, referring to Figure 6 One or more spherical particles 161, or one or more spherical circular grooves 162, are formed on the wall surface of the stop 160 to further improve the bonding force with the heat transfer coupling component 171. Preferably, the diameter of the particles 161 or the depth of the circular grooves 162 can be 1. Up to 100 .

[0060] Then, the heat sink 170 is formed by one or more, so that the coolant circulates and dissipates heat from the semiconductor chip 110.

[0061] For example, one or more metal cooling columns 173 are arranged in the coolant flow direction in the inner space of the heat sink 170, so that the coolant in direct contact with the metal cooling columns 173 can effectively dissipate heat from the semiconductor package.

[0062] Here, as Figure 5 As shown, one side 172 of the heat sink 170 may be one or more metal layers or one or more ceramic layers. The thickness of the heat transfer bonding member 171 formed between one side 172 of the heat sink 170 and the exposed surface (A) of one or more substrates 121, 122 is correspondingly 1 to the height (H) of the stop member 160. Up to 1 mm.

[0063] Furthermore, the heat transfer rate of the heat transfer joint 171 is from 1 W / (m·K) to 400 W / (m·K).

[0064] Furthermore, the heat transfer bonding member 171 can be packed by filling more than 60% of the exposed surfaces (A) of the stop member 160, the substrate 121, 122 and the heat sink 170.

[0065] Thus, at least a portion of the exposed surface (A) of one or more substrates 121, 122 is formed on the top, bottom or upper-lower surface of the package housing 150, and the exposed surface (A) of one or more substrates 121, 122 is joined to the heat sink 170 by means of the heat transfer joining member 171, and the overall thickness of the heat transfer joining member 171 is maintained by means of the stop member 160.

[0066] Figure 7This diagram illustrates a method for manufacturing a semiconductor package with an encapsulated surface shape according to another embodiment of the present invention. Referring to the figure, the method includes: preparing a lower substrate 121 and an upper substrate 122 for mounting one or more semiconductor chips 110, electrical connection components 141, 142 and one or more terminal leads 130, and using conductive adhesives 111, 112, 123 to connect the lower substrate 121, the upper substrate 122 and the semiconductor chips 110. The steps are as follows: (A) Structurally connecting the semiconductor chip 110 and the electrical connection components 141, 142; (b) Forming a package housing 150 by encapsulating at least a portion of the semiconductor chip mounting surface and exposed surface (A) of the semiconductor chip 110, the electrical connection components 141, 142, the lower substrate 121 and the upper substrate 122; and (c) Engraving a portion of the surface of the package housing 150 using a laser 10, and forming the stop member 160 at a predetermined height relative to the exposed surface (A) of the lower substrate 121 or the upper substrate 122.

[0067] Here, the height (H) of the stop 160 can be 1. The thickness of the heat transfer joint member 171, which is used to engage with the heat sink 170, is adjusted by the stop member 160 to maintain a constant and uniform thickness at both ends of the heat transfer joint member 171.

[0068] Furthermore, referring to Figure 7 In d, the exposed surface (A) of one or more substrates 121, 122 is joined to the heat sink 170 through the heat transfer bonding member 171. At least a portion of the exposed surface (A) of one or more substrates 121, 122 is formed on the top, bottom or upper-bottom of the package housing 150. The exposed surface (A) of one or more substrates 121, 122 is joined to the heat sink 170 through the heat transfer bonding member 171, thereby maintaining the overall thickness of the heat transfer bonding member 171 constant.

[0069] Therefore, by using the semiconductor package with the engraved surface shape and the manufacturing method thereof, the thickness of the heat transfer bonding component for bonding with the heat sink and heat transfer can be adjusted and maintained constant by using a stop member processed by laser engraving. This suppresses delamination, improves heat transfer efficiency, and compared with the conventional stop member structure and forming method using a grinding wheel, it minimizes the consumption of sealing material for molding the package, prevents cracking of the ceramic that constitutes the insulating layer of the substrate, minimizes the thickness of the metal layer with the exposed surface of the substrate, and prevents insulation voltage abnormalities caused by metal particles generated during grinding remaining between the package shells, minimizes the pressure applied to the semiconductor package, and prevents delamination.

[0070] The embodiments described in this specification and the configurations shown in the accompanying drawings are only the most preferred embodiments of the present invention and do not represent all the technical ideas of the present invention. Therefore, it should be understood that various equivalents and modifications may exist to replace the present invention.

Claims

1. A semiconductor package, characterized in that, include: One or more substrates are formed from a lower substrate and an upper substrate separated from the lower substrate, wherein one or more semiconductor chips are mounted on the lower substrate; One or more terminal leads are electrically connected to the lower substrate; An electrical connection component has one side electrically bonded to the semiconductor chip on the lower substrate via a conductive adhesive, and the other side electrically bonded to the upper substrate via a conductive adhesive. A package housing that encloses the semiconductor chip, the electrical connection components, and the one or more substrates; Multiple stops, formed of the same material as the encapsulation housing, are formed at a predetermined height above the exposed surface of the substrate, and are formed on the exposed surface of the substrate, or form covering at least a portion of the exposed surface of the substrate, and are arranged spaced apart from each other in the horizontal direction. One or more heat sinks that dissipate heat generated from the semiconductor chip; as well as A heat transfer engagement component is arranged between the plurality of stops. Furthermore, at least a portion of the exposed surface of the one or more substrates is formed on the top, bottom, or upper-lower surface of the package housing. The heat transfer bonding member is arranged in direct contact with the exposed surfaces of the one or more substrates and the heat sink, thereby bonding the heat sink to the exposed surfaces of the one or more substrates. The wall surface of the heat transfer joining component is in contact with the wall surface of the stop, the thickness of the heat transfer joining component is the same as the height of the stop, and the heat transfer joining component has a uniform thickness.

2. The semiconductor package according to claim 1, characterized in that, The substrate is a metal substrate, or a substrate comprising one or more insulating layers between metal layers.

3. The semiconductor package according to claim 1, characterized in that, The height of the stop is 1. Up to 1 mm.

4. The semiconductor package according to claim 1, characterized in that, The stop is formed in one or more planar shapes, such as circles and polygons.

5. The semiconductor package according to claim 1, characterized in that, The plurality of stoppers are formed by laser engraving a portion of the surface of the encapsulation shell.

6. The semiconductor package according to claim 1, characterized in that, The height of the plurality of stops is determined based on a portion of the surface of the encapsulation housing that has not undergone intaglio processing.

7. The semiconductor package according to claim 1, characterized in that, The electrical connection component is formed of a single metal of Au, Ag, Al and Cu, or an alloy containing more than 50% by weight of one or more of Au, Ag, Al and Cu.

8. The semiconductor package according to claim 1, characterized in that, The electrical connection component is a conductive spacer in the shape of a hexahedron or a cylinder.

9. The semiconductor package according to claim 1, characterized in that, One or more spherical particles or one or more spherical circular grooves are formed on the wall surface of the stop.

10. The semiconductor package according to claim 9, characterized in that, The diameter of the particle or the depth of the circular groove is 1. Up to 100 .

11. The semiconductor package according to claim 1, characterized in that, One side of the heat sink has one or more metal layers or one or more ceramic layers.

12. The semiconductor package according to claim 1, characterized in that, The thickness of the heat transfer bonding member formed between one side of the heat sink and the exposed surface of one or more substrates is 1. Up to 1 mm.

13. The semiconductor package according to claim 12, characterized in that, The heat transfer rate of the heat transfer joint component is from 1 W / (m·K) to 400 W / (m·K).

14. The semiconductor package according to claim 1, characterized in that, The interior space between the stop, the exposed surface of the substrate, and one side of the heat sink is filled with more than 60% of the heat transfer bonding component.

15. The semiconductor package according to claim 1, characterized in that, The one or more semiconductor chips are structurally connected on one side of the lower substrate by an adhesive, and the plurality of stop members are not formed on the other side of the lower substrate. The plurality of stop members are formed on one side of the upper substrate, and the other side of the upper substrate is electrically connected to the semiconductor chip through the electrical connection member.

16. The semiconductor package according to claim 1, characterized in that, The one or more semiconductor chips are structurally connected on one side of the lower substrate by an adhesive, and the plurality of stop members are formed on the other side of the lower substrate. The plurality of stop members are formed on one side of the upper substrate, and the other side of the upper substrate is electrically connected to the semiconductor chip through the electrical connection member.

17. A semiconductor packaging manufacturing method, characterized in that, Includes the following steps: Prepare a lower substrate and an upper substrate, an electrical connection component, and one or more terminal leads to mount one or more semiconductor chips, mount the one or more semiconductor chips on the lower substrate, and electrically connect the terminal leads to the lower substrate. The lower substrate, the upper substrate, the semiconductor chip, and the electrical connection component are structurally connected by the use of a conductive adhesive, and one side of the electrical connection component is electrically bonded to the semiconductor chip on the lower substrate through the conductive adhesive, and the other side of the electrical connection component is electrically bonded to the upper substrate through the conductive adhesive. The semiconductor chip, the electrical connection component, the lower substrate, and at least a portion of the mounting surface and exposed surface of the upper substrate are encapsulated to form an encapsulation shell; A portion of the surface of the encapsulation shell is laser-etched to form a plurality of stop members arranged at a predetermined height above the exposed surface of the lower substrate or the upper substrate and spaced apart from each other in the horizontal direction. and A heat transfer bonding member is arranged between the plurality of stop members, and the heat transfer bonding member is arranged in such a way that it directly contacts the exposed surface of the upper substrate or the lower substrate and a heat sink for heat dissipation from the heat generated by the semiconductor chip, thereby bonding the heat sink to the exposed surface of the upper substrate or the lower substrate. The wall surface of the heat transfer joining component is in contact with the wall surface of the stop, the thickness of the heat transfer joining component is the same as the height of the stop, and the heat transfer joining component has a uniform thickness.

18. The semiconductor packaging manufacturing method according to claim 17, characterized in that, The height of the stop is 1. Up to 1 mm.

Citation Information

Patent Citations

  • Semiconductor package and manufacturing method thereof

    CN101980359A

  • High frequency module

    CN110959189A

  • Power Semiconductor Module

    US20080224303A1