Reactance element, method of manufacturing a reactance element

Abstract

The application discloses an electric reactance element and a preparation method thereof. The electric reactance element comprises a substrate, a metal shielding layer on one side of the substrate, the metal shielding layer being connected to zero potential, at least one first dielectric layer on the side of the metal shielding layer away from the substrate, and at least one electric reactance structure on the side of the first dielectric layer away from the substrate, wherein the orthographic projection of the metal shielding layer on the substrate covers the orthographic projection of the electric reactance structure on the substrate. The embodiment of the application can improve the Q value of the electric reactance element and reduce the substrate loss.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of microelectronics technology, and in particular to a reactive element and a method for preparing the reactive element. Background Technology

[0002] Reactant components, namely inductors or capacitors, have important applications in modern electronics. Furthermore, with increasing integration levels, the use of on-chip reactive components (on-chip capacitors, on-chip inductors) is becoming increasingly widespread.

[0003] However, for on-chip reactive components, there are large eddy currents in the substrate of the on-chip reactive component under high frequency operating environment, resulting in extremely large eddy current losses in the substrate. In other words, the Q value of the reactive component is low, which seriously limits the further application of the reactive component. Summary of the Invention

[0004] This invention provides a reactive element and a method for preparing the reactive element, so as to improve the Q value of the reactive element and reduce the loss of the reactive element.

[0005] In a first aspect, embodiments of the present invention provide a reactive element, the reactive element comprising: a substrate;

[0006] A metal shielding layer located on one side of the substrate, the metal shielding layer being connected to zero potential; at least one first dielectric layer located on the side of the metal shielding layer away from the substrate; at least one reactive structure located on the side of the first dielectric layer away from the substrate; wherein the orthogonal projection of the metal shielding layer on the substrate covers the orthogonal projection of the reactive structure on the substrate.

[0007] Optionally, the reactive element further includes a back metal layer located on the side of the substrate away from the metal shielding layer;

[0008] The back metal layer and the metal shielding layer are electrically connected through a first metallized through-hole.

[0009] Optionally, the reactive element further includes a front metal layer located on the side of the first dielectric layer away from the metal shielding layer, wherein the orthographic projection of the front metal layer on the substrate does not overlap with the orthographic projection of the reactive structure on the substrate;

[0010] The front metal layer is electrically connected to the metal shielding layer through a second metallized via.

[0011] Optionally, the reactive element further includes a front metal layer located on the side of the first dielectric layer away from the metal shielding layer, wherein the orthographic projection of the front metal layer on the substrate does not overlap with the orthographic projection of the reactive structure on the substrate; the front metal layer is electrically connected to the metal shielding layer through a second metallized via; and the orthographic projection of the second metallized via on the substrate overlaps with the orthographic projection of the first metallized via on the substrate.

[0012] Optionally, the metal shielding layer, when projected onto the substrate, covers the entire surface of the substrate.

[0013] Optionally, the metal shielding layer is in the form of a block or a mesh.

[0014] Optionally, the material of the metal shielding layer is at least one of titanium, nickel, and gold.

[0015] Optionally, the thickness of the metal shielding layer is greater than or equal to 0.4 micrometers and less than or equal to 0.7 micrometers.

[0016] Optionally, the material of the first dielectric layer is at least one of silicon oxide, aluminum oxide, silicon nitride, and silicon oxynitride.

[0017] Optionally, the reactance structure is a capacitor structure or an inductor structure.

[0018] Secondly, embodiments of the present invention also provide a method for fabricating a reactive element, comprising: providing a substrate; forming a metal shielding layer on the substrate, the metal shielding layer being connected to zero potential; forming a first dielectric layer on the metal shielding layer; and forming at least one reactive structure on the first dielectric layer, wherein the orthogonal projection of the metal shielding layer on the substrate covers the orthogonal projection of the reactive structure on the substrate.

[0019] Optionally, after forming at least one reactive structure on the first dielectric layer, the method further includes:

[0020] A first metallized via is formed on the substrate, and a back metal layer is formed on the side of the substrate away from the metal shielding layer, wherein the metal shielding layer is electrically connected to the back metal layer through the first metallized via.

[0021] Optionally, after forming the first dielectric layer on the metal shielding layer, the method further includes:

[0022] A second metallized via is formed on the first dielectric layer, and a front metal layer is formed on the side of the first dielectric layer away from the substrate, wherein the orthographic projection of the front metal layer on the substrate does not overlap with the orthographic projection of the reactive structure on the substrate, and the front metal layer is electrically connected to the metal shielding layer through the second metallized via.

[0023] The technical solution of this invention employs a reactive element comprising: a substrate; a metal shielding layer located on one side of the substrate, the metal shielding layer being connected to zero potential; at least one first dielectric layer located on the side of the metal shielding layer away from the substrate; and at least one reactive structure located on the side of the first dielectric layer away from the substrate; wherein the orthogonal projection of the metal shielding layer on the substrate covers the orthogonal projection of the reactive structure on the substrate. The eddy currents generated by the reactive structure are confined within the first dielectric layer between the metal shielding layer and the reactive structure, and are much smaller than the losses of the eddy currents in the substrate, thus greatly increasing the Q value of the reactive element and expanding its application range. Attached Figure Description

[0024] Figure 1 This is a schematic diagram of the structure of a reactive element provided in an embodiment of the present invention;

[0025] Figure 2 This is a schematic diagram of the structure of another reactive element provided in an embodiment of the present invention;

[0026] Figure 3 This is a top view of a reactive element provided in an embodiment of the present invention;

[0027] Figure 4 for Figure 3 Cross-sectional view along the A1A2 direction;

[0028] Figure 5 for Figure 3 Another cross-sectional view along the A1A2 direction;

[0029] Figure 6 for Figure 3 Another cross-sectional view along the A1A2 direction;

[0030] Figure 7 This is a schematic diagram of the structure of another reactive element provided in an embodiment of the present invention;

[0031] Figure 8 This is a top view of a metal shielding layer in a reactor structure provided in an embodiment of the present invention;

[0032] Figure 9 This is a top view of a metal shielding layer in another reactive element provided in an embodiment of the present invention;

[0033] Figure 10 This is a top view of a metal shielding layer in another reactive element provided in an embodiment of the present invention;

[0034] Figure 11 This is a top view of a metal shielding layer in another reactive element provided in an embodiment of the present invention;

[0035] Figure 12This is a schematic diagram of the structure of another reactive element provided in an embodiment of the present invention;

[0036] Figure 13 A flowchart illustrating a method for preparing a reactive element according to an embodiment of the present invention;

[0037] Figures 14-20 The schematic diagram shows the structure formed by the main steps of the method for preparing the reactive element provided in the embodiments of the present invention. Detailed Implementation

[0038] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, and not all of the structures.

[0039] Figure 1 This is a schematic diagram of the structure of a reactive element provided in an embodiment of the present invention, with reference to... Figure 1 The reactive element includes: a substrate 101; a metal shielding layer 102 located on one side of the substrate 101, the metal shielding layer 102 being connected to zero potential; at least one first dielectric layer 103 located on the side of the metal shielding layer 102 away from the substrate 101; at least one reactive structure 104 located on the side of the first dielectric layer 103 away from the substrate 101; wherein the orthogonal projection of the metal shielding layer 102 on the substrate 101 covers the orthogonal projection of the reactive structure 104 on the substrate 101.

[0040] Specifically, the reactive element is an inductor or a capacitor; in this embodiment, the reactive element is a thin-film capacitor or a thin-film inductor. The substrate 101 can be, for example, one or more of the following: aluminum gallium nitride, indium gallium nitride, aluminum indium gallium nitride, indium phosphide, gallium arsenide, silicon carbide, diamond, sapphire, germanium, and silicon, or any other material capable of growing group III nitrides. The substrate 101 is generally thick and has poor insulation properties. Eddy currents generated by conventional reactive structures exist in the substrate. Due to the thickness of the substrate and its poor insulation properties, conventional reactive structures suffer significant losses. It is understood that, to improve the performance of the reactive element, an epitaxial structure 107 can be first formed on the substrate 101. The epitaxial structure 107 can, for example, include a semiconductor material based on group III-V compounds. A second dielectric layer 108 is then formed on the epitaxial structure 107. The second dielectric layer 108 can include one or more of the following: silicon oxide, aluminum oxide, silicon nitride, silicon oxynitride, or any other material capable of serving as an insulating dielectric. The metal shielding layer 102 can be formed on the second dielectric layer 108. In this embodiment, it is sufficient to form the metal shielding layer 102 on the second dielectric layer 108 directly opposite the region of the reactance structure 104, while other regions on the second dielectric layer 108 are not specifically limited. The reactance structure 104 can be a capacitor structure or an inductor structure. The specific structure of the reactance structure is well known to those skilled in the art and will not be described in detail here. A typical capacitor structure may include an upper electrode, a lower electrode, and a capacitor dielectric layer; a typical inductor structure may be, for example, a spiral inductor structure, which may include an inductor metal layer with a spiral conductive coil and an insulating layer. It is understood that the reactance structure 104 can be formed in the reactance dielectric layer 109.

[0041] When the reactor element is working, the metal shielding layer 102 is connected to zero potential, which can limit the eddy current generated by the reactor structure 104 within the first dielectric layer 103. The insulation performance of the first dielectric layer 103 is better than that of the substrate 101, and the thickness of the first dielectric layer 103 is also smaller than that of the substrate 101, which can greatly reduce the substrate loss of the reactor element.

[0042] The technical solution of this embodiment employs a reactive element comprising: a substrate; a metal shielding layer located on one side of the substrate, the metal shielding layer being connected to zero potential; at least one first dielectric layer located on the side of the metal shielding layer away from the substrate; and at least one reactive structure located on the side of the first dielectric layer away from the substrate. The orthogonal projection of the metal shielding layer onto the substrate covers the orthogonal projection of the reactive structure onto the substrate. The eddy currents generated by the reactive structure are confined within the first dielectric layer between the metal shielding layer and the reactive structure, and are much smaller than the losses of the eddy currents in the substrate. Therefore, the Q value of the reactive element can be greatly increased, expanding the application range of the reactive element.

[0043] It should be noted that the reactive elements in this embodiment refer only to the effective structures of capacitors and inductors. The effective structure of a capacitor refers to the structure within the overlapping area of ​​the upper and lower plates of the capacitor, and the effective structure of an inductor refers to the structure within the coil area. In other words, the orthographic projection of the metal shielding layer 102 on the substrate 101 must at least cover the orthographic projection of the overlapping area of ​​the upper and lower plates of the capacitor on the substrate 101, or the orthographic projection of the metal shielding layer 102 on the substrate 101 must at least cover the orthographic projection of the conductive coil in the inductor on the substrate 101. As for the electrodes of the capacitor and inductor and the lead-out structures used to electrically connect the electrodes to the effective structures, metal shielding layers may be provided or not provided. This embodiment does not specifically limit this.

[0044] Optionally, Figure 2 This is a schematic diagram of another reactive element provided in an embodiment of the present invention, with reference to... Figure 2 The reactive element also includes a back metal layer 105 located on the side of the substrate 101 away from the metal shielding layer 102; the back metal layer 105 is electrically connected to the metal shielding layer 102 through a first metallized via 1061, and the back metal layer 105 is used to provide zero potential for the metal shielding layer 102.

[0045] Specifically, in this embodiment, a back metal layer 105 can be fabricated on the back side of the reactive element (the side of the substrate 101 away from the metal shielding layer 102). The back metal layer 105 can serve as the grounding layer for the entire reactive element, providing a ground connection for the entire reactive element. Simultaneously, the back metal layer 105 can provide zero potential to the metal shielding layer 102, thereby confining the eddy currents generated by the reactive structure 104 within the first dielectric layer 103, reducing substrate losses and improving the Q value of the reactive element. Furthermore, by using the back metal layer 105 to provide zero potential to the metal shielding layer 102, it can also simultaneously provide zero potential to other integrated devices during the integration of the reactive element with other integrated devices, ensuring process compatibility of the overall device integrated with the reactive element.

[0046] Optionally, Figure 3 This is a top view of a reactive element provided in an embodiment of the present invention. Figure 4 for Figure 3 A cross-sectional view along the A1A2 direction, combined with Figure 3 and Figure 4 The reactive element also includes a front metal layer 12 located on the side of the first dielectric layer 103 away from the metal shielding layer 102; the orthographic projection of the front metal layer 12 on the substrate 101 does not overlap with the orthographic projection of the reactive structure 104 on the substrate 101; the front metal layer 12 is electrically connected to the metal shielding layer 102 through the second metallized via 1062, and the front metal layer 12 is used to provide zero potential to the metal shielding layer 102.

[0047] Specifically, in this embodiment, a front metal layer 12 can be provided on the front side of the reactive element (the side of the first dielectric layer 103 away from the substrate). The front metal layer 12 serves as the ground layer for the reactive element and simultaneously provides zero potential for the metal shielding layer 102. This ensures that the eddy currents generated by the reactive structure 104 are confined within the first dielectric layer 103, thereby reducing substrate losses and improving the Q value of the reactive element. For example, in this embodiment, a capacitor structure is used as the reactive structure. The reactive element is also a capacitor, and the capacitor structure includes an upper capacitor plate 1041 and a lower capacitor plate 1042. The lower capacitor plate 1042 is located between the upper capacitor plate 1041 and the first dielectric layer 103. There is no electrical connection between the front metal layer 12 and the reactive element 104. The front metal layer 12 can be on the same layer as the upper capacitor plate 1041. Figure 3 The example illustrates that the front metal layer 12 includes four independent metal blocks, each of which includes a test area 1201. When testing a capacitor element, the probe in contact with the test area 1201 provides a ground potential. In this embodiment, a metallized via area 1202 can be provided in the area outside the test area 1201 in the front metal layer 12, and a second metallized via 1062 is provided in the area corresponding to the metallized via area 1202. It should be noted that at least one of the four metal blocks needs to be provided with a corresponding second metallized via 1062. This embodiment does not specifically limit the number of corresponding second metallized vias in the four metal blocks. At the same time, when using the front metal layer 12 to provide zero potential for the metal shielding layer 105, the reactive element can be tested immediately after the front metal layer 12 is fabricated. That is to say, it is not necessary to fabricate the entire reactive element before testing. The testing of the reactive element is moved from a later stage to a earlier stage, which is beneficial for early detection of defective devices and saving subsequent costs.

[0048] Of course, in some other embodiments, the front metal layer 12 may be on a different layer from the upper electrode plate 104 of the capacitor, and the front metal layer 12 may not be in direct contact with the first dielectric layer 103. For example, other dielectric layers may be provided between the front metal layer 12 and the first dielectric layer 103, as long as the front metal layer 12 can provide zero potential for the metal shielding layer 102.

[0049] In some other implementations, such as Figure 5 As shown, Figure 5 for Figure 3In another cross-sectional view along the A1A2 direction, to simplify the manufacturing process, when fabricating the lower electrode of the capacitor, a lower metal layer 130 can be deposited simultaneously on the first dielectric layer 103 at the position corresponding to the front metal layer 12. The lower metal layer 130 is on the same layer as the lower electrode of the capacitor 1402. After fabricating the capacitor dielectric layer between the upper electrode 1401 and the lower electrode 1402, the lower metal layer 130 is kept exposed. Subsequently, when fabricating the upper electrode 1401, the front metal layer 12 is fabricated simultaneously. At this time, the front metal layer 12 contacts the lower metal 130 to achieve electrical connection. The zero potential in the front metal layer 12 provides zero potential to the metal shielding layer 102 through the lower metal 130 and the second metallized via 1062. In other words, the reactive element may include multiple metal layers. When the reactive element is fabricated on the first dielectric layer, each time the corresponding metal layer of the reactive element is deposited, the corresponding metal layer is deposited at the position corresponding to the front metal layer. When the corresponding non-metal layer of the reactive element is formed, the non-metal layer is not formed at the position corresponding to the front metal layer. Finally, a stacked structure of multiple metal layers is formed at the position corresponding to the front metal layer, providing zero potential for the metal shielding layer.

[0050] Or, such as Figure 6 As shown, Figure 6 for Figure 3 Another cross-sectional view along the A1A2 direction shows that in this embodiment, the reactive element includes both a front metal layer 12 and a back metal layer 105. The back metal layer 105 can provide zero potential to the metal shielding layer 102 through the first metallized via 1061, and the front metal layer 12 can provide zero potential to the metal shielding layer 102 through the second metallized via 1062. This ensures that the metal shielding layer 102 is at zero potential, thereby ensuring that the eddy currents generated by the reactive structure 104 are confined within the first dielectric layer 103, thereby reducing the substrate loss of the reactive element and improving the Q value of the reactive element. At the same time, it also has the advantages of ensuring the process compatibility of the overall device integrated with the reactive element when the back metal layer is set, and advancing the testing from the back end to the front end when the front metal layer is set.

[0051] Preferably, such as Figure 6 As shown, the orthographic projection of the second metallized via 1062 on the substrate 101 overlaps with the orthographic projection of the first metallized via 1061 on the substrate 101; exemplarily, the orthographic projection of the second metallized via 1062 on the substrate 101 covers the orthographic projection of the first metallized via 1061 on the substrate 101.

[0052] For example, the second metallized via 1062 corresponds to the position of the first metallized via 1061. When fabricating the first metallized via 1061 and the second metallized via 1062, the number of photomasks can be saved, thereby saving the cost of fabricating the reactive components.

[0053] The following descriptions all use the example of using the back metal layer to provide zero potential to the metal shielding layer. It can be understood that the following embodiments can be applied to the case where the front metal layer provides zero potential to the metal shielding layer, and the case where both the front metal layer and the back metal layer exist, and at least one of them provides zero potential to the metal shielding layer.

[0054] like Figure 7 As shown, Figure 7 This is a schematic diagram of another reactive element provided in an embodiment of the present invention. In this embodiment, the reactive element includes multiple reactive structures 104, wherein the orthographic projection of each reactive structure 104 on the substrate 101 is covered by the orthographic projection of the metal shielding layer 102 on the reactive structure 104; and the metal shielding layer 102 corresponding to each reactive structure 104 is electrically connected to the back metal layer 105. It should be noted that in this embodiment, the metal shielding layer 102 corresponding to each reactive structure 104 is an independent structure, such as... Figure 8 As shown, Figure 8 This is a top view of a metal shielding layer in a reactor structure provided in an embodiment of the present invention. Each metal shielding layer 102 is independent of each other. Therefore, each metal shielding layer 102 needs to be electrically connected to the back metal layer 105 through a corresponding first metallized via 1061 (or each needs to be electrically connected to the front metal layer through a corresponding second metallized via).

[0055] Or, in some other implementations, such as Figure 9 As shown, Figure 9 This is a top view of a metal shielding layer in a reactor element provided by an embodiment of the present invention. In this embodiment, the metal shielding layers 102 corresponding to each reactor structure 104 are not independent of each other. There is a connection structure 110 between at least two metal shielding layers 102. The connection structure 110 is in the same layer as the metal shielding layer 102. Preferably, by setting multiple connection structures 110, all metal shielding layers 102 are electrically connected. In this way, when setting the first metallized through-hole 1061 or the second metallized through-hole, only one first metallized through-hole 1061 or one second metallized through-hole is needed to electrically connect all metal shielding layers 102 to the corresponding back metal layer 105 or front metal layer. It should be noted that this embodiment only shows one electrical connection relationship between each metal shielding layer 102 and the connection structure 110. In some other embodiments, the connection relationship between each metal shielding layer 102 and the connection structure 110 can be other ways.

[0056] Optionally, such as Figure 8 and Figure 9As shown, the metal shielding layer 102 is block-shaped, meaning each reactive element 104 corresponds to one block-shaped metal shielding layer 102. The block-shaped metal shielding layer 102 can better confine eddy currents within the first dielectric layer 103, thereby significantly improving the Q value of the reactive element. In other embodiments, such as... Figure 10 and Figure 11 As shown, Figure 10 This is a top view of the metal shielding layer in another reactive element provided by an embodiment of the present invention. Figure 11 This is a top view of a metal shielding layer in a reactor element provided by an embodiment of the present invention. In this embodiment, the metal shielding layer 102 is grid-shaped, and each reactor element 104 corresponds to a grid-shaped metal shielding layer 102. The grid-shaped metal shielding layer 102 can effectively improve the Q value of the reactor element and also greatly save the material of the metal shielding layer 102, thereby reducing the material cost of the reactor element.

[0057] Preferably, Figure 12 This is a schematic diagram of another reactive element provided in an embodiment of the present invention, with reference to... Figure 12 The orthographic projection of the metal shielding layer 102 onto the substrate 101 covers the entire substrate.

[0058] Specifically, in this embodiment, the metal shielding layer 102 is a single-layer structure. On the one hand, it can limit the eddy currents generated by the reactive element to the first dielectric layer 103 to the greatest extent, minimize substrate loss, and improve the Q value of the reactive element. On the other hand, the single-layer metal shielding layer 102 is easier to manufacture. It also makes the design of the first metallized via 1061 and the second metallized via 1062 more flexible, that is, the design of the position, size and number of the first metallized via 1061 and the second metallized via 1062 is more flexible and varied.

[0059] Optionally, the metal shielding layer 102 is made of at least one of titanium, nickel, and gold.

[0060] Specifically, titanium, nickel, and gold all have advantages such as good working stability and good electrical properties. Setting the metal shielding layer 102 as at least one of titanium, nickel, and gold can greatly improve the working stability of the reactive element.

[0061] Optionally, the thickness of the metal shielding layer 102 is greater than or equal to 0.4 micrometers and less than or equal to 0.7 micrometers.

[0062] Specifically, if the metal shielding layer 102 is too thin, the effect of reducing the substrate loss of the reactive element is not obvious. If the metal shielding layer 102 is too thick, the reactive element will be too thick overall, which will affect the reliability of other devices (such as transistors on the same wafer as the reactive element). The substrate loss of the reactive element can be greatly reduced by setting the thickness of the metal shielding layer 102 to be greater than or equal to 0.4 micrometers and less than or equal to 0.7 micrometers.

[0063] Optionally, the material of the first dielectric layer 103 is at least one of silicon oxide, aluminum oxide, silicon nitride, and silicon oxynitride.

[0064] Specifically, the first dielectric layer 103 may be one or at least two layers, and the material of each first dielectric layer 103 may be at least one of silicon oxide, aluminum oxide, silicon nitride and silicon oxynitride. Silicon oxide, aluminum oxide, silicon nitride and silicon oxynitride all have excellent insulation properties, and the eddy current loss generated by the reactive element is small in the first dielectric layer. Preferably, the total thickness of all first dielectric layers 103 may be greater than or equal to 0.3 micrometers.

[0065] Continue to refer to Figure 12 The reactive element further includes an electrode 201, which is electrically connected to the reactive structure 104; the orthogonal projection of at least one of the first metallized via 1061 and the second metallized via on the substrate 101 does not overlap with the orthogonal projection of the electrode 201 on the substrate 101; and / or, the size of at least one of the first metallized via 1061 and the second metallized via is larger than the size of the electrode 201; and / or, the number of at least one of the first metallized via 1061 and the second metallized via is greater than the number of electrodes 201.

[0066] Specifically, Figure 12Taking the capacitor structure 104 as an example, the capacitor structure 104 includes an upper capacitor plate, a lower capacitor plate, and a dielectric layer 1091 between the upper and lower capacitor plates. The materials of the upper and lower capacitor plates can be at least one of titanium, nickel, and gold. The dielectric layer 1091 can include one or more combinations of silicon oxide, aluminum oxide, silicon nitride, and silicon oxynitride, or any other material that can serve as an insulating medium. The reactance element may also include a protective layer 1092, which protects the reactance element. The protective layer 1092 can include one or more combinations of silicon oxide, aluminum oxide, silicon nitride, and silicon oxynitride, or any other material that can serve as an insulating medium. The upper capacitor plate... The lower plate of the capacitor is electrically connected to the corresponding electrode 201 through the corresponding lead-out structure 202. One electrode 201 serves as the input electrode, and the other serves as the output electrode. The number of first metallized vias 1061 can be greater than the number of electrodes 201, and the first metallized vias 1061 can be set without corresponding to the electrodes 201. Their size can be made relatively large, which helps to reduce the reactance of the first metallized vias 1061 and reduce the loss during the operation of the reactance element. The number of second metallized vias can be greater than the number of electrodes 201, and the second metallized vias can be set without corresponding to the electrodes 201. Their size can be made relatively large, which helps to reduce the reactance of the second metallized vias and reduce the loss during the operation of the reactance element.

[0067] Figure 13 This is a flowchart illustrating a method for preparing a reactive element according to an embodiment of the present invention. Figures 13-19 This is a schematic diagram of the structure formed corresponding to the main steps of the method for preparing the reactive element provided in the embodiments of the present invention, with reference to... Figure 13 The methods for preparing reactive components include:

[0068] Step S301, provide a substrate;

[0069] Specifically, such as Figure 14 As shown, the substrate can be one or more of gallium nitride, aluminum gallium nitride, indium gallium nitride, aluminum indium gallium nitride, indium phosphide, gallium arsenide, silicon carbide, diamond, sapphire, germanium, silicon, or any other material capable of growing group III nitrides.

[0070] Step S302: A metal shielding layer is formed on the substrate, and the metal shielding layer is connected to zero potential;

[0071] Specifically, before forming the metallic shielding layer, an epitaxial structure can be formed first, such as... Figure 15 As shown, the epitaxial structure 107 can be multilayered, and the epitaxial structure 107 can include semiconductor materials based on III-V compound semiconductors. Subsequently, as... Figure 16As shown, a second dielectric layer 108 is formed on the epitaxial structure 107. The second dielectric layer 108 may include one or more combinations of silicon oxide, aluminum oxide, silicon nitride, silicon oxynitride, or any other material capable of serving as an insulating dielectric. Subsequently, as Figure 17 As shown, a metal shielding layer 102 is formed on the second dielectric layer 108; the material of the metal shielding layer may be one or more metals such as titanium, nickel, and gold.

[0072] Step S303: A first dielectric layer is formed on the metal shielding layer;

[0073] Specifically, such as Figure 18 As shown, the first dielectric layer 103 can be formed on its entire surface. Its material can be one or more combinations of silicon oxide, aluminum oxide, silicon nitride, silicon oxynitride, or any other material that can serve as an insulating medium. Its thickness can be greater than or equal to 0.3 micrometers. It should be noted that if the metal shielding layer 102 is not a single layer, in order to compensate for the step caused by the metal shielding layer 102, an insulating layer can be formed on the same layer as the metal shielding layer 102. The thickness of the insulating layer is the same as the thickness of the metal shielding layer 102, and the overall structure formed by the insulating layer and the metal shielding layer 102 completely covers the second dielectric layer 108. This makes the surfaces of the insulating layer and the metal shielding layer 102 away from the substrate in a plane, providing a flat plane for the fabrication of subsequent film layers.

[0074] Step S304: At least one reactive structure is formed on the first dielectric layer, wherein the orthogonal projection of the metal shielding layer on the substrate covers the orthogonal projection of the reactive structure on the substrate.

[0075] Specifically, such as Figure 19 As shown, the reactance structure 104 can be either a capacitor structure or an inductor structure. A typical capacitor structure may include an upper plate, a lower plate, and a capacitor dielectric layer. A typical inductor structure may be a spiral inductor structure, which may include an inductor metal layer with a spiral conductive coil and an insulating layer. It is understood that the reactance structure 104 can be formed in the reactance dielectric layer 109. In a high-frequency operating environment, the eddy currents generated in the reactance structure 104 will be confined within the first dielectric layer 103 due to the shielding effect of the metal shielding layer 102. Since the first dielectric layer 103 is different from the substrate 101, it does not need to have an epitaxial structure fabricated on it. Its insulation performance is excellent, and its thickness is much smaller than that of the substrate 101. Therefore, the substrate loss of the reactance element can be greatly reduced, and the Q value of the reactance element can be improved.

[0076] Optionally, the method may also include step S305, forming a first metallized via on the substrate and forming a back metal layer on the side of the substrate away from the metal shielding layer, wherein the metal shielding layer is electrically connected to the back metal layer through the first metallized via.

[0077] Specifically, such as Figure 20 As shown, a via 140 can be formed first on the side of the substrate 101 away from the metal shielding layer 102. The via 140 penetrates the substrate 101, the epitaxial structure 107, and the second dielectric layer 108, exposing the metal shielding layer 102. Subsequently, a first metallized via 1061 and a back metal layer 105 are fabricated on the side of the substrate 101 away from the metal shielding layer 102, ultimately forming... Figure 1 The structure shown completes the fabrication of the reactive element; wherein, the material of the back metal layer 105 can be the same as the material in the first metallized through hole 1061, and can be one or more of titanium, nickel, and gold.

[0078] Optionally, after step S304, step S306 can be performed first. Step S306: A second metallized via is formed on the first dielectric layer, and a front metal layer is formed on the side of the first dielectric layer away from the substrate. The orthogonal projection of the front metal layer on the substrate does not overlap with the orthogonal projection of the reactive structure on the substrate, and the front metal layer is electrically connected to the metal shielding layer through the second metallized via.

[0079] Specifically, this embodiment describes a fabrication method for providing zero potential to a metal shielding layer using a front metal layer. After forming the first dielectric layer, a via is etched at the location of the second metallized via using a mask. Subsequently, the second metallized via is metallized, and then the front metal layer is formed. This embodiment does not impose a particular limitation on the formation order of the front metal layer and the reactive element. The reactive element can be formed first, followed by the second metallized via and the front metal layer; alternatively, the second metallized via and the front metal layer can be formed first, followed by the reactive element. Preferably, the reactive element includes at least one metal layer. When forming the metal layer of the reactive element, it can be directly formed at the corresponding location of the front metal layer simultaneously. A corresponding metal layer is formed. For example, when forming the metal layer that contacts the reactance element with the first dielectric layer, metal is simultaneously deposited at the position corresponding to the front metal layer. This metal layer can both metallize the vias in the first dielectric layer to form second metallized vias and form a corresponding metal layer at the position corresponding to the front metal layer. Subsequently, when forming the metal layer of the reactance element, a corresponding metal layer is simultaneously deposited at the position corresponding to the front metal layer. When forming the corresponding non-metallic layer of the reactance element, a non-metallic layer is not formed at the position corresponding to the front metal layer. Finally, a multi-layer metal layer stack structure is formed at the position corresponding to the front metal layer, providing zero potential for the metal shielding layer. The final structure can be referenced. Figure 4 The structure shown simplifies the manufacturing process and facilitates industrialization.

[0080] If the method for fabricating the reactive element further includes step S305, step S305 is preferably performed after step S306. More preferably, the orthogonal projection of the second metallized via on the substrate can be arranged to overlap with the orthogonal projection of the first metallized via on the substrate. For example, the second metallized via and the first metallized via are positioned correspondingly and have the same size. When fabricating the first and second metallized vias, the number of photomasks can be reduced, thereby saving the cost of fabricating the reactive element.

[0081] The technical solution of this embodiment uses a method for preparing reactive components. The eddy currents generated by the reactive structure are confined within the first dielectric layer between the metal shielding layer and the reactive structure, which is much smaller than the loss of eddy currents in the substrate. Therefore, it can greatly increase the Q value of the reactive component and expand the application range of the reactive component.

[0082] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, the scope of which is determined by the scope of the appended claims.

Claims

1. A reactive element, characterized in that, The reactive element includes: Substrate; A metal shielding layer located on one side of the substrate, the metal shielding layer being connected to zero potential; At least one first dielectric layer located on the side of the metal shielding layer away from the substrate; At least one reactive structure located on the side of the first dielectric layer away from the substrate; Wherein, the orthogonal projection of the metal shielding layer on the substrate covers the orthogonal projection of the reactive structure on the substrate; The reactive element further includes a front metal layer located on the side of the first dielectric layer away from the metal shielding layer, wherein the orthographic projection of the front metal layer on the substrate does not overlap with the orthographic projection of the reactive structure on the substrate; The front metal layer is electrically connected to the metal shielding layer through a second metallized through-hole; The front metal layer includes at least one independent metal block, the metal block including a test area, the test area being used to provide a ground potential for probes contacting the test area when testing the capacitor element.

2. The reactive element according to claim 1, characterized in that, The reactive element further includes a back metal layer located on the side of the substrate away from the metal shielding layer; The back metal layer and the metal shielding layer are electrically connected through a first metallized through-hole.

3. The reactive element according to claim 2, characterized in that, The orthographic projection of the second metallized via on the substrate overlaps with the orthographic projection of the first metallized via on the substrate.

4. The reactive element according to claim 1, characterized in that, The metal shielding layer, when projected onto the substrate, covers the entire surface of the substrate.

5. The reactive element according to claim 4, characterized in that, The metal shielding layer is block-shaped or grid-shaped.

6. The reactive element according to claim 1, characterized in that, The material of the metal shielding layer is at least one of titanium, nickel, and gold.

7. The reactive element according to claim 1, characterized in that, The thickness of the metal shielding layer is greater than or equal to 0.4 micrometers and less than or equal to 0.7 micrometers.

8. The reactive element according to claim 1, characterized in that, The material of the first dielectric layer is at least one of silicon oxide, aluminum oxide, silicon nitride, and silicon oxynitride.

9. The reactive element according to claim 1, characterized in that, The reactance structure is either a capacitor structure or an inductor structure.

10. A method for preparing a reactive element, used to prepare the reactive element according to any one of claims 1-9, characterized in that, include: Provide substrate; A metal shielding layer is formed on the substrate, and the metal shielding layer is connected to zero potential; A first dielectric layer is formed on the metal shielding layer; At least one reactive structure is formed on the first dielectric layer, wherein the orthogonal projection of the metal shielding layer on the substrate covers the orthogonal projection of the reactive structure on the substrate.

11. The method for preparing the reactive element according to claim 10, characterized in that, After forming at least one reactive structure on the first dielectric layer, the method further includes: A first metallized via is formed on the substrate, and a back metal layer is formed on the side of the substrate away from the metal shielding layer, wherein the metal shielding layer is electrically connected to the back metal layer through the first metallized via.

12. The method for preparing the reactive element according to claim 10 or 11, characterized in that, After forming the first dielectric layer on the metal shielding layer, the method further includes: A second metallized via is formed on the first dielectric layer, and a front metal layer is formed on the side of the first dielectric layer away from the substrate, wherein the orthographic projection of the front metal layer on the substrate does not overlap with the orthographic projection of the reactive structure on the substrate, and the front metal layer is electrically connected to the metal shielding layer through the second metallized via.

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