Calibration method and calibration circuit of power amplifier, power amplifier chip and transmission device

Abstract

The present disclosure provides a calibration method of a power amplifier, comprising: collecting an output current of the power amplifier, generating a feedback voltage according to a reference voltage and the output current, wherein a change of the feedback voltage in different adjustment periods is negatively correlated with a change of the output current, and the reference voltage corresponds to a target current; taking the feedback voltage as a gate voltage of the power amplifier to drive the power amplifier, wherein the output current is positively correlated with the gate voltage; collecting the feedback voltage when the output current of the power amplifier is stable as a target gate voltage, and the output current when stable is equal to the target current. The present disclosure also provides a calibration circuit of a power amplifier, a power amplifier chip and a wireless transmission device.

Description

Technical Field

[0001] This disclosure relates to the field of communication technology, and in particular to a calibration method for a power amplifier, a calibration circuit for a power amplifier, a power amplifier chip, and a wireless transmission device. Background Technology

[0002] With the development of microwave communication technology, high-bandwidth, high-capacity communication equipment is widely used. Power amplifiers (PAs) are an important component of communication equipment, especially used to amplify the power of radio frequency signals. To ensure the proper functioning of communication equipment, calibration is required to ensure that each power amplifier in the equipment operates precisely at its standard quiescent operating point.

[0003] However, in some related technologies, the calibration efficiency of power amplifiers is very low, and the requirements for controlling power amplifiers are high. Summary of the Invention

[0004] This disclosure provides a calibration method for a power amplifier, a calibration circuit for a power amplifier, a power amplifier chip, and a wireless transmission device.

[0005] In a first aspect, embodiments of this disclosure provide a calibration method for a power amplifier, comprising:

[0006] The output current of the power amplifier is acquired, and a feedback voltage is generated based on the reference voltage and the output current. The change of the feedback voltage in different adjustment cycles is negatively correlated with the change of the output current, and the reference voltage corresponds to the target current.

[0007] The feedback voltage is used as the gate voltage of the power amplifier to drive the power amplifier, and the output current is positively correlated with the gate voltage;

[0008] The feedback voltage when the output current of the power amplifier is stable is collected and used as the target gate voltage. The output current when stable is equal to the target current.

[0009] In some embodiments, prior to the step of acquiring the output current of the power amplifier and generating a feedback voltage based on a reference voltage and the output current, the calibration method includes:

[0010] The reference voltage is determined according to a preset correspondence and the target current. The preset correspondence is the correspondence between the reference voltage and the target current at different static operating points of the power amplifier.

[0011] In some embodiments, the step of acquiring the output current of the power amplifier and generating a feedback voltage based on a reference voltage and the output current includes:

[0012] The output current is converted into a first voltage, and the first voltage is positively correlated with the output current;

[0013] The feedback voltage is generated based on the reference voltage and the first voltage, wherein the difference between the reference voltage and the first voltage is positively correlated with the feedback voltage.

[0014] In some embodiments, after the step of acquiring the feedback voltage when the output current of the power amplifier is stable as the target gate voltage, the calibration method further includes:

[0015] The target gate voltage is provided to the power amplifier so that the power amplifier operates at the quiescent operating point corresponding to the target current.

[0016] In some embodiments, after the step of acquiring the feedback voltage when the output current of the power amplifier is stable as the target gate voltage, the calibration method further includes:

[0017] The drain voltage of the power amplifier is controlled according to a predetermined timing sequence so that the drain of the power amplifier is powered on after the gate is powered on and powered off before the gate is powered off.

[0018] Secondly, embodiments of this disclosure provide a calibration circuit for a power amplifier, comprising:

[0019] A constant current control module is used to acquire the output current of the power amplifier, and output a feedback voltage based on a reference voltage and the output current as the gate voltage of the power amplifier. The change of the feedback voltage in different adjustment cycles is negatively correlated with the change of the output current, and the reference voltage corresponds to the target current.

[0020] The power amplifier outputs the output current under the drive of the gate voltage, and the output current is positively correlated with the gate voltage;

[0021] The gate voltage control module is used to collect the feedback voltage when the output current of the power amplifier is stable, and use it as the target gate voltage. The output current when stable is equal to the target current.

[0022] In some embodiments, the constant current control module includes a first amplifier and a current sensing amplifier. The sensing resistor of the current sensing amplifier is connected in series between the drain voltage terminal and the drain of the power amplifier. The output terminal of the current sensing amplifier is connected to the inverting input terminal of the first amplifier, the non-inverting input terminal of the first amplifier is connected to the reference voltage terminal, and the output terminal of the first amplifier is connected to the gate of the power amplifier. The output terminal of the first amplifier serves as the output terminal of the constant current control module.

[0023] The current-sensing amplifier is used to output a first voltage based on the output current;

[0024] The first amplifier is used to output the feedback voltage based on the reference voltage and the first voltage, wherein the difference between the reference voltage and the first voltage is positively correlated with the feedback voltage.

[0025] In some embodiments, the constant current control module further includes a first capacitor and a first resistor; the first capacitor and the first resistor are connected in series between the inverting input terminal of the first amplifier and the output terminal of the first amplifier.

[0026] In some embodiments, the calibration circuit further includes a drain voltage control module, which is connected to the drain voltage terminal, the drain of the power amplifier, and the drain voltage control terminal.

[0027] The leakage voltage control module is used to transmit the signal from the drain voltage terminal to the drain of the power amplifier under the control of the leakage voltage control terminal.

[0028] In some embodiments, the drain voltage control module includes a first transistor, a second transistor, and a second resistor; the source of the first transistor is connected to the drain voltage terminal, the drain of the first transistor is connected to the drain of the power amplifier, the gate of the first transistor is connected to the source of the second transistor, the drain of the second transistor is connected to the on-level terminal, the gate of the second transistor is connected to the drain voltage control terminal, and the second resistor is connected in series between the gate of the first transistor and the source of the first transistor.

[0029] The first transistor and the second transistor are turned on when the drain voltage control terminal is at the on level.

[0030] In some embodiments, the calibration circuit further includes a gate switching module, which is connected to the output terminal of the constant current control module, the gate of the power amplifier, and the gate voltage output terminal of the gate voltage control module. The switching control terminal of the gate switching module is connected to the gate voltage control module.

[0031] The gate switching module is used to connect the gate of the power amplifier to the output terminal of the constant current control module or to the gate voltage output terminal of the gate voltage control module under the control of the switch control terminal.

[0032] The gate switching module is used to connect the gate of the power amplifier to the output terminal of the constant current control module or to the gate voltage output terminal of the gate voltage control module under the control of the switch control terminal.

[0033] The gate voltage control module is also used to output the target gate voltage through the gate voltage output terminal when the gate of the power amplifier is connected to the gate voltage output terminal of the gate voltage control module, so that the power amplifier operates at the static operating point corresponding to the target current.

[0034] In some embodiments, the gate voltage control module includes a processor, the processor including a first digital-to-analog converter and a first analog-to-digital converter; the first digital-to-analog converter is connected to a reference voltage terminal, and the first analog-to-digital converter is connected to the output terminal of the constant current control module;

[0035] The processor is used to determine a digital reference voltage according to a preset correspondence and the target current. The preset correspondence is the correspondence between the digital reference voltage and the target current at different static operating points of the power amplifier.

[0036] The first digital-to-analog converter is used to generate the reference voltage based on the digital reference voltage and transmit the reference voltage to the reference voltage terminal;

[0037] The first analog-to-digital converter is used to obtain the feedback voltage when the output current of the power amplifier is stable from the output terminal of the constant current control module, and to generate a digital target gate voltage.

[0038] In some embodiments, the processor further includes at least one of a second digital-to-analog converter, a switch control port, and a leakage control port;

[0039] The leakage control port is connected to the leakage control terminal and is used to provide a conduction level to the leakage control terminal according to a predetermined timing sequence.

[0040] The switch control port is connected to the switch control terminal and is used to provide a switch control signal to the switch control terminal;

[0041] The second digital-to-analog converter is connected to the gate voltage output terminal and is used to output the target gate voltage through the gate voltage output terminal when the gate of the power amplifier is connected to the gate voltage output terminal of the gate voltage control module, so that the power amplifier operates at the static operating point corresponding to the target current.

[0042] In some embodiments, the gate voltage control module includes an analog switch controller and a voltage latch; a first control terminal of the analog switch controller is connected to a drain voltage control terminal, a second control terminal of the analog switch controller is connected to a latch enable terminal of the voltage latch, a third control terminal of the analog switch controller is connected to an output enable terminal of the voltage latch, and a fourth control terminal of the analog switch controller is connected to a switch control terminal of the gate switching module; the latch input terminal of the voltage latch is connected to the output terminal of the constant current control module, and the output terminal of the voltage latch serves as the gate voltage output terminal of the gate voltage control module.

[0043] The analog switch controller provides signals to the leakage control terminal, latch enable terminal, output enable terminal, and gate switching module switch control terminal according to a predetermined timing sequence.

[0044] The voltage latch, under the control of the analog switch controller, latches the target gate voltage during the gate voltage latching phase and outputs the target gate voltage during the normal operation phase.

[0045] Thirdly, embodiments of this disclosure provide a power amplifier chip, including a calibration circuit for any of the power amplifiers described in the second aspect of this disclosure.

[0046] Fourthly, embodiments of this disclosure provide a wireless transmission device, including the power amplifier chip described in the third aspect of embodiments of this disclosure.

[0047] In the power amplifier calibration method provided in this disclosure, the output current of the power amplifier is used as a feedback signal, and the gate voltage of the power amplifier is adjusted in conjunction with a reference voltage to eventually stabilize the power amplifier at the quiescent operating point corresponding to the target current. This allows the gate voltage corresponding to the quiescent operating point to be determined, thereby completing the calibration of the power amplifier. In the power amplifier calibration circuit provided in this disclosure, a constant current source circuit is constructed using a constant current control module and the power amplifier. This constant current source circuit can lock the output current of the power amplifier to the corresponding target current based on the reference voltage. The gate voltage control module can obtain the gate voltage that allows the power amplifier to operate at the corresponding quiescent operating point when the constant current source circuit is stable, thereby completing the calibration of the power amplifier. Locking the output current of the power amplifier using hardware circuitry is extremely fast, improving the calibration efficiency of the power amplifier; and since only a reference voltage is required during power amplifier calibration, the ease of use of the power amplifier is improved. Attached Figure Description

[0048] Figure 1 This is a flowchart of a calibration method according to an embodiment of this disclosure;

[0049] Figure 2 This is a flowchart of some steps in another calibration method according to an embodiment of this disclosure;

[0050] Figure 3 This is a flowchart of some steps in another calibration method according to an embodiment of the present disclosure;

[0051] Figure 4 This is a flowchart of some steps in another calibration method according to an embodiment of the present disclosure;

[0052] Figure 5 This is a schematic diagram of a calibration circuit according to an embodiment of this disclosure;

[0053] Figure 6 This is a schematic diagram of another calibration circuit in an embodiment of this disclosure;

[0054] Figure 7 This is a schematic diagram of yet another calibration circuit in an embodiment of this disclosure;

[0055] Figure 8 This is a schematic diagram of another calibration circuit in an embodiment of this disclosure;

[0056] Figure 9 This is a timing diagram of timing control for a calibration circuit according to an embodiment of this disclosure;

[0057] Figure 10 This is a block diagram of a power amplifier chip according to an embodiment of this disclosure;

[0058] Figure 11 This is a block diagram of a wireless transmission device according to an embodiment of the present disclosure. Detailed Implementation

[0059] To enable those skilled in the art to better understand the technical solutions of this disclosure, the calibration method for the power amplifier, the calibration circuit for the power amplifier, the power amplifier chip, and the wireless transmission device provided in this disclosure will be described in detail below with reference to the accompanying drawings.

[0060] Exemplary embodiments will be described more fully below with reference to the accompanying drawings; however, these exemplary embodiments may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will enable those skilled in the art to fully understand the scope of this disclosure.

[0061] Where there is no conflict, the various embodiments of this disclosure and the features thereof in the embodiments may be combined with each other.

[0062] As used herein, the term “and / or” includes any and all combinations of one or more related enumerated entries.

[0063] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. As used herein, the singular forms “a” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It will also be understood that when the terms “comprising” and / or “made of” are used in this specification, the presence of the stated feature, integral, step, operation, element, and / or component is specified, but the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof is not excluded.

[0064] Unless otherwise specified, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and this disclosure, and will not be interpreted as having an idealized or overly formal meaning, unless expressly so defined herein.

[0065] Firstly, referring to Figure 1 This disclosure provides a calibration method for a power amplifier, comprising:

[0066] In step S100, the output current of the power amplifier is acquired, and a feedback voltage is generated based on the reference voltage and the output current. The change of the feedback voltage in different adjustment cycles is negatively correlated with the change of the output current, and the reference voltage corresponds to the target current.

[0067] In step S200, the feedback voltage is used as the gate voltage of the power amplifier to drive the power amplifier, and the output current is positively correlated with the gate voltage;

[0068] In step S300, the feedback voltage when the output current of the power amplifier is stable is collected as the target gate voltage, and the output current when stable is equal to the target current.

[0069] In this embodiment of the disclosure, each execution of steps S100 to S200 constitutes an adjustment cycle. At least one adjustment cycle is required before the output current of the power amplifier stabilizes. That is, steps S100 to S200 are executed periodically.

[0070] It should be noted that, in the embodiments of this disclosure, the negative correlation between the change in feedback voltage and the change in output current during different adjustment cycles means that the change in the absolute value of the feedback voltage is negatively correlated with the change in the absolute value of the output current; the positive correlation between output current and gate voltage means that the absolute value of the output current is positively correlated with the absolute value of the gate voltage.

[0071] The reference voltage remains constant throughout different adjustment cycles. With the reference voltage fixed, since the change in feedback voltage during different adjustment cycles is negatively correlated with the change in output current of the power amplifier, and the gate voltage of the power amplifier is positively correlated with the output current, the output current of the power amplifier can be stabilized by executing steps S100 to S200.

[0072] In some embodiments, the correspondence between the reference voltage and the target current is obtained through the following process: setting a reference voltage, executing steps S100 to S200 until the output current of the power amplifier stabilizes, and recording the stable output current as the target current corresponding to the reference voltage. In some embodiments, the correspondence between the reference voltage and the target current is obtained through the following process: setting a target current, executing steps S100 to S200 with different reference voltages until the output current of the power amplifier stabilizes, and recording the reference voltage when the stable output current equals the target current. Accordingly, in the embodiments of this disclosure, the reference voltage corresponding to the target current means that, for any specific reference voltage, the power amplifier can output the target current corresponding to that reference voltage when the output current stabilizes.

[0073] Accordingly, given a fixed reference voltage, executing steps S100 to S200 stabilizes the power amplifier's output current at the target current. For example, if the power amplifier's output current is greater than the target current, the feedback voltage obtained from the reference voltage and output current decreases, meaning the power amplifier's gate voltage decreases, thus causing the output current to decrease; conversely, if the power amplifier's output current is less than the target current, the feedback voltage obtained from the reference voltage and output current increases, meaning the power amplifier's gate voltage increases, thus causing the output current to increase. Obtaining the feedback voltage when the power amplifier's output current equals the target current in step S300, and using this voltage as the gate voltage for normal power amplifier operation, enables the power amplifier to operate at the quiescent operating point corresponding to the target current.

[0074] It should also be noted that, in this embodiment of the disclosure, the input power of the power amplifier is zero during the execution of steps S100 to S300.

[0075] The power amplifier calibration method provided in this disclosure uses the output current of the power amplifier as a feedback signal, and adjusts the gate voltage of the power amplifier in conjunction with a reference voltage. This stabilizes the power amplifier at the quiescent operating point corresponding to the target current, thereby determining the gate voltage corresponding to the quiescent operating point and completing the calibration of the power amplifier. This calibration method can be implemented using hardware circuitry with a feedback loop, enabling extremely fast locking of the target current and improving the calibration efficiency of the power amplifier. Furthermore, the user only needs to provide a reference voltage to make the power amplifier operate at the corresponding quiescent operating point, enhancing the ease of use of the power amplifier.

[0076] In this embodiment, different quiescent operating points of the power amplifier correspond to different target currents. When the calibration method provided in this embodiment is implemented using hardware circuitry, the hardware circuitry is fixed, and the correspondence between the reference voltage and the target current is constant. In this embodiment, the correspondence between the reference voltage and the target current can be determined through pre-measurement, and the output current of the power amplifier can be locked at the target current corresponding to the reference voltage by controlling the reference voltage.

[0077] Accordingly, refer to Figure 2 Before step S100, the calibration method includes:

[0078] In step S400, the reference voltage is determined according to a preset correspondence and the target current. The preset correspondence is the correspondence between the reference voltage and the target current at different static operating points of the power amplifier.

[0079] In this embodiment of the disclosure, when the calibration method provided in this embodiment is implemented using hardware circuitry, a preset correspondence can be configured in the hardware circuitry. When using the power amplifier, the user inputs the target current to be locked into the hardware circuitry. The hardware circuitry determines the reference voltage corresponding to the target current through step S400, and completes the calibration of the power amplifier through steps S100 to S300. Alternatively, the preset correspondence can be configured outside the hardware circuitry, for example, in a control device for controlling the power amplifier. The control device determines the reference voltage corresponding to the target current through step S400 and inputs the reference voltage into the hardware circuitry to complete the calibration of the power amplifier. This embodiment of the disclosure does not impose any special limitations on this.

[0080] This disclosure does not specifically limit how step S100, which generates a feedback voltage based on a reference voltage and the output current of the power amplifier, is performed. In some embodiments, the output current of the power amplifier is converted into a first voltage, and then a feedback voltage is generated based on the difference between the reference voltage and the first voltage.

[0081] Accordingly, in some embodiments, reference is made to Figure 3Step S100 includes:

[0082] In step S110, the output current is converted into a first voltage, and the first voltage is positively correlated with the output current;

[0083] In step S120, the feedback voltage is generated based on the reference voltage and the first voltage, wherein the difference between the reference voltage and the first voltage is positively correlated with the feedback voltage.

[0084] In this embodiment of the disclosure, after obtaining the target gate voltage through step S300, the power amplifier can be driven by the target gate voltage to make the power amplifier work at the static operating point corresponding to the target current.

[0085] Accordingly, in some embodiments, reference is made to Figure 4 After step S300, the calibration method further includes:

[0086] In step S500, the target gate voltage is provided to the power amplifier so that the power amplifier operates at the quiescent operating point corresponding to the target current.

[0087] It should be noted that the target gate voltage obtained in step S300 can be stored in a memory such as flash memory after analog-to-digital conversion, or it can be latched by a voltage latch. This disclosure does not impose any special limitations on this.

[0088] It should also be noted that when the calibration method provided in the embodiments of this disclosure is implemented using hardware circuits, the target current is locked by a closed-loop circuit with a feedback loop to calibrate the power amplifier; when the power amplifier is working normally, the target gate voltage is output to an open-loop circuit that disconnects the feedback loop so that the power amplifier operates at the static operating point corresponding to the target current.

[0089] In some embodiments, the drain voltage of the power amplifier can be controlled during calibration and switching between calibration and operation states. Compared to related technologies that do not control the gate and drain voltages of the power amplifier, this ensures a safe power-on / off sequence for the gate and drain, preventing the power amplifier from burning out. It also eliminates the need for users to use additional high-precision control circuitry to control the power amplifier, thus improving its reliability and ease of use.

[0090] Accordingly, in some embodiments, reference is made to Figure 4 After step S300, the calibration method further includes:

[0091] In step S600, the drain voltage of the power amplifier is controlled according to a predetermined timing sequence so that the drain of the power amplifier is powered on after the gate is powered on and powered off before the gate is powered off.

[0092] Secondly, referring to Figure 5 This disclosure provides a calibration circuit for a power amplifier, comprising:

[0093] The constant current control module 100 is used to collect the output current of the power amplifier and output a feedback voltage based on the reference voltage and the output current as the gate voltage of the power amplifier 200. The change of the feedback voltage in different adjustment cycles is negatively correlated with the change of the output current, and the reference voltage corresponds to the target current.

[0094] The power amplifier 200 outputs the output current under the drive of the gate voltage, and the output current is positively correlated with the gate voltage;

[0095] The gate voltage control module 300 is used to collect the feedback voltage when the output current of the power amplifier 200 is stable, and use it as the target gate voltage. The output current when stable is equal to the target current.

[0096] In this embodiment of the disclosure, each execution of steps S100 to S200 constitutes an adjustment cycle. At least one adjustment cycle is required before the output current of the power amplifier stabilizes. That is, steps S100 to S200 are executed periodically.

[0097] It should be noted that, in the embodiments of this disclosure, the negative correlation between the change in feedback voltage and the change in output current during different adjustment cycles means that the change in the absolute value of the feedback voltage is negatively correlated with the change in the absolute value of the output current; the positive correlation between output current and gate voltage means that the absolute value of the output current is positively correlated with the absolute value of the gate voltage.

[0098] In this embodiment, the constant current control module 100 generates a feedback voltage based on the output current of the power amplifier 200, and uses the feedback voltage to drive the power amplifier 200, forming a feedback loop between the drain PA_VDD and the gate PA_VGG of the power amplifier 200. The reference voltage remains constant during different adjustment cycles. When the reference voltage is determined, since the feedback voltage is negatively correlated with the output current of the power amplifier and the gate voltage of the power amplifier is positively correlated with the output current, the constant current control module 100 and the power amplifier 200 constitute a constant current source circuit. When the reference voltage is determined, the output current of the power amplifier 200 is a constant value.

[0099] In some embodiments, the correspondence between the reference voltage and the target current is obtained through the following process: setting a reference voltage, recording the constant current value of the constant current source circuit composed of the constant current control module 100 and the power amplifier 200 as the target current corresponding to the reference voltage. In some embodiments, the correspondence between the reference voltage and the target current is obtained through the following process: measuring the constant current value of the constant current source circuit composed of the constant current control module 100 and the power amplifier 200, recording the reference voltage value when the constant current value is equal to the target current, and obtaining the correspondence between the reference voltage and the target current. Accordingly, in the embodiments of this disclosure, the reference voltage corresponding to the target current means that, for any specific reference voltage, the constant current value of the constant current source circuit composed of the constant current control module 100 and the power amplifier 200 is the target current corresponding to that reference voltage. That is, the constant current source circuit composed of the constant current control module 100 and the power amplifier 200 can lock the output current of the power amplifier to the target current.

[0100] It should be noted that once the constant current source circuit consisting of the constant current control module 100 and the power amplifier 200 is fixed, the correspondence between the reference voltage and the target current remains constant. By controlling the reference voltage, the output current of the power amplifier can be locked to the corresponding target current, thereby enabling the power amplifier to operate at the static operating point corresponding to the target current, thus completing the calibration of the power amplifier.

[0101] It should also be noted that during the process of the constant current source circuit consisting of the constant current control module 100 and the power amplifier 200, the input power of the power amplifier is zero.

[0102] In the calibration circuit of the power amplifier provided in this embodiment, a constant current source circuit is constructed using a constant current control module 100 and a power amplifier 200. This constant current source circuit can lock the output current of the power amplifier to a corresponding target current based on a reference voltage. The gate voltage control module 300 can acquire the gate voltage that allows the power amplifier to operate at the corresponding static operating point when the constant current source circuit is stable, thereby completing the calibration of the power amplifier. Locking the output current of the power amplifier using a hardware circuit is extremely fast, which can improve the calibration efficiency of the power amplifier; only a reference voltage needs to be provided when calibrating the power amplifier, improving the ease of use of the power amplifier.

[0103] In some embodiments, refer to Figure 7 , Figure 8The constant current control module 100 includes a first amplifier G1 and a current sensing amplifier G2. The sensing resistor Rs of the current sensing amplifier G2 is connected in series between the drain voltage terminal PA_VDD_Supply and the drain PA_VDD of the power amplifier 200. The output terminal of the current sensing amplifier G2 is connected to the inverting input terminal (-) of the first amplifier G1, and the non-inverting input terminal (+) of the first amplifier G2 is connected to the reference voltage terminal. The output terminal of the first amplifier G1 is connected to the gate PA_VGG of the power amplifier 200. The output terminal of the first amplifier G1 serves as the output terminal of the constant current control module 100.

[0104] The current-sensing amplifier G2 is used to output a first voltage based on the output current;

[0105] The first amplifier G1 is used to output the feedback voltage based on the reference voltage and the first voltage, wherein the difference between the reference voltage and the first voltage is positively correlated with the feedback voltage.

[0106] In some embodiments, refer to Figure 7 , Figure 8 The constant current control module 100 also includes a first capacitor R1 and a first resistor C1; the first capacitor C1 and the first resistor R1 are connected in series between the inverting input terminal of the first amplifier G1 and the output terminal of the first amplifier G1.

[0107] In this embodiment of the disclosure, a first capacitor C1 and a first resistor R1 are connected in series between the inverting input terminal and the output terminal of the first amplifier G1. This can improve the frequency characteristics of the circuit, prevent damage to the first amplifier G1, and control the gain of the first amplifier G1 to match the magnitude of the gate voltage of the power amplifier 200.

[0108] In some embodiments, refer to Figure 6 The calibration circuit also includes a drain voltage control module 400, which is connected to the drain voltage terminal PA_VDD_Supply, the drain PA_VDD of the power amplifier 200, and the drain voltage control terminal PA_VDD_EN.

[0109] The drain voltage control module 400 is used to transmit the signal from the drain voltage terminal PA_VDD_Supply to the drain PA_VDD of the power amplifier 200 under the control of the drain voltage control terminal PA_VDD_EN.

[0110] In some embodiments, refer to Figure 7 , Figure 8The drain voltage control module 400 includes a first transistor T1, a second transistor T2, and a second resistor R2. The source of the first transistor T1 is connected to the drain voltage terminal PA_VDD_Supply, the drain of the first transistor T1 is connected to the drain PA_VDD of the power amplifier 200, the gate of the first transistor T1 is connected to the source of the second transistor T2, the drain of the second transistor T2 is connected to the on-level terminal, the gate of the second transistor T2 is connected to the drain voltage control terminal PA_VDD_EN, and the second resistor R2 is connected in series between the gate of the first transistor T1 and the source of the first transistor T1.

[0111] The first transistor T1 and the second transistor T2 are turned on when the drain voltage control terminal PA_VDD_EN is at the on level.

[0112] In some embodiments, the first transistor is a field-effect transistor (FET). The first transistor can be an N-type FET or a P-type FET. This disclosure does not impose any particular limitation on this. For example, as... Figure 7 , Figure 8 As shown, the first transistor can be a P-type field-effect transistor, and the on-level terminal is the ground terminal.

[0113] In some embodiments, refer to Figure 6 The calibration circuit further includes a gate switching module 500, which is connected to the output terminal of the constant current control module 100, the gate PA_VGG of the power amplifier 200, and the gate voltage output terminal of the gate voltage control module 300. The switching control terminal of the gate switching module 500 is connected to the gate voltage control module 300.

[0114] The gate switching module 500 is used to connect the gate PA_VGG of the power amplifier 200 to the output terminal of the constant current control module 100 or to the gate voltage output terminal of the gate voltage control module 300 under the control of the switch control terminal.

[0115] The gate voltage control module 300 is also used to output the target gate voltage through the gate voltage output terminal when the gate PA_VGG of the power amplifier 200 is connected to the gate voltage output terminal of the gate voltage control module 300, so that the power amplifier 200 operates at the static operating point corresponding to the target current.

[0116] In some embodiments, the calibration circuit is a processor-enabled circuit, and the constant current control module 100, leakage voltage control module 400, gate switching module 500, etc. in the calibration circuit are all controlled by the processor. In some embodiments, the processor is a central processing unit (CPU). The processor-enabled calibration circuit can be used in scenarios where multiple power amplifiers are used on the same board, thereby greatly improving the calibration efficiency of the power amplifier.

[0117] Accordingly, in some embodiments, reference is made to Figure 7 The gate voltage control module 300 includes a processor 310, which includes a first digital-to-analog converter (DAC) DAC1 and a first analog-to-digital converter (ADC) ADC1. The first DAC1 is connected to the reference voltage terminal PA_BIAS, and the first ADC1 is connected to the output terminal of the constant current control module 100.

[0118] The processor 310 is used to determine a digital reference voltage based on a preset correspondence and the target current, wherein the preset correspondence is the correspondence between the digital reference voltage and the target current at different static operating points of the power amplifier 200;

[0119] The first digital-to-analog converter DAC1 is used to generate the reference voltage according to the digital reference voltage and transmit the reference voltage to the reference voltage terminal PA_BIAS;

[0120] The first analog-to-digital converter ADC1 is used to obtain the feedback voltage when the output current of the power amplifier 200 is stable from the output terminal of the constant current control module 100, and to generate a digital target gate voltage.

[0121] In some embodiments, refer to Figure 7 The processor 310 also includes at least one of a second digital-to-analog converter DAC2, a switch control port GPIO1, and a drain control port GPIO2;

[0122] The leakage control port GPIO2 is connected to the leakage control terminal PA_VDD_EN and is used to provide a conduction level to the leakage control terminal PA_VDD_EN according to a predetermined timing sequence.

[0123] The switch control port GPIO1 is connected to the switch control terminal and is used to provide a switch control signal to the switch control terminal;

[0124] The second digital-to-analog converter DAC2 is connected to the gate voltage output terminal. When the gate PA_VGG of the power amplifier 200 is connected to the gate voltage output terminal of the gate voltage control module 300, the power amplifier 200 outputs the target gate voltage through the gate voltage output terminal so that the power amplifier 200 operates at the static operating point corresponding to the target current.

[0125] In some embodiments, the calibration circuit does not include a processor and can achieve adaptive power amplifier calibration through timing control. In some embodiments, after power-on, the calibration circuit sequentially completes adaptive control processes such as target gate voltage acquisition, target gate voltage latching, gate switching, and gate voltage output according to a predetermined timing sequence, so that the PA operates at the static operating point corresponding to the target current. The entire process does not require additional control, greatly improving the ease of use of the power amplifier.

[0126] Accordingly, in some embodiments, the gate voltage control module 300 includes a timing control unit and a gate voltage latch and configuration unit. In some embodiments, refer to Figure 8 The timing control unit includes an analog switch controller 321, and the gate voltage latch and configuration unit includes a voltage latch 331. The first control terminal of the analog switch controller 321 is connected to the drain voltage control terminal PA_VDD_EN, the second control terminal of the analog switch controller 321 is connected to the latch enable terminal Latch_EN of the voltage latch 331, the third control terminal of the analog switch controller 321 is connected to the output enable terminal OUT_EN of the voltage latch, and the fourth control terminal of the analog switch controller 321 is connected to the switch control terminal Switch_Control of the gate switching module 500. The latch input terminal of the voltage latch 331 is connected to the output terminal of the constant current control module, and the output terminal of the voltage latch 331 serves as the gate voltage output terminal of the gate voltage control module 300.

[0127] The analog switch controller 321 provides signals to the leakage voltage control terminal PA_VDD_EN, the latch enable terminal Latch_EN, the output enable terminal, and the switch control terminal Switch_Control of the gate switching module according to a predetermined timing sequence.

[0128] The voltage latch 331 latches the target gate voltage during the gate voltage latching stage under the control of the analog switch controller 321, and outputs the target gate voltage during the normal operation stage.

[0129] In some embodiments, the analog switch controller 321 according to, for example Figure 9 The predetermined timing shown provides signals to the drain voltage control terminal PA_VDD_EN, the latch enable terminal Latch_EN, the output enable terminal, and the switch control terminal Switch_Control of the gate switching module, respectively.

[0130] Combination Figure 8 and Figure 9 The adaptive calibration phase includes a constant current latch phase, a gate voltage latch phase, and a gate switching phase.

[0131] During the constant current lockout phase, the fourth control terminal of the analog switch controller 321 provides a first level to the switch control terminal Switch_Control of the gate switching module 500, so that the output terminal of the constant current control module is connected to the gate PA_VGG of the power amplifier; the first control terminal of the analog switch controller 321 outputs a conduction level to the drain voltage control terminal PA_VDD_EN, so that the second transistor T2 is turned on. Since the drain of the second transistor T2 is grounded, the first transistor is turned on, so that the level of the drain voltage terminal PA_VDD_Supply is transmitted to the drain PA_VDD of the power amplifier 200;

[0132] During the gate voltage latching stage, the second control terminal of the analog switch controller 321 provides a latch enable signal to the latch enable terminal Latch_EN of the voltage latch 331, and the voltage latch 331 latches the target gate voltage.

[0133] During the gate switching phase, the first control terminal of the analog switch controller 321 outputs a turn-off level to the drain voltage control terminal PA_VDD_EN; the third control terminal of the analog switch controller 321 provides an output enable signal to the output enable terminal of the voltage latch 331 so that the voltage latch 331 outputs the target gate voltage; the fourth control terminal of the analog switch controller 321 provides a second level to the switch control terminal Switch_Control of the gate switching module 500 so that the output terminal of the voltage latch 331 is connected to the gate PA_VGG of the power amplifier so as to provide the target gate voltage to the gate PA_VGG connection of the power amplifier.

[0134] During normal operation, the first control terminal of the analog switch controller 321 outputs a conduction level to the leakage voltage control terminal PA_VDD_EN, and the power amplifier 200 enters the normal operation phase.

[0135] Thirdly, referring to Figure 10 This disclosure provides a power amplifier chip, including a calibration circuit for any of the power amplifiers described in the second aspect of this disclosure.

[0136] Fourthly, refer to Figure 11 This disclosure provides a wireless transmission device, including the power amplifier chip described in the third aspect of this disclosure.

[0137] It will be understood by those skilled in the art that all or some of the steps, systems, or apparatuses disclosed above, and their functional modules / units, can be implemented as software, firmware, hardware, or suitable combinations thereof. In hardware implementations, the division between functional modules / units mentioned above does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed collaboratively by several physical components. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit (ASIC). Such software may be distributed on a computer-readable medium, which may include computer storage media (or non-transitory media) and communication media (or transient media). As is known to those skilled in the art, the term computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disc (DVD) or other optical disc storage, magnetic cartridges, magnetic tape, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and can be accessed by a computer. Furthermore, it is well known to those skilled in the art that communication media typically contain computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.

[0138] Example embodiments have been disclosed herein, and while specific terminology has been used, it is for illustrative purposes only and should be construed as such, and is not intended to be limiting. In some instances, it will be apparent to those skilled in the art that features, characteristics, and / or elements described in connection with particular embodiments may be used alone, or in combination with features, characteristics, and / or elements described in connection with other embodiments, unless otherwise expressly indicated. Therefore, those skilled in the art will understand that various changes in form and detail may be made without departing from the scope of this disclosure as set forth by the appended claims.

Claims

1. A calibration method for a power amplifier, comprising: The output current of the power amplifier is acquired, and a feedback voltage is generated based on the reference voltage and the output current. The change of the feedback voltage in different adjustment cycles is negatively correlated with the change of the output current, and the reference voltage corresponds to the target current. The feedback voltage is used as the gate voltage of the power amplifier to drive the power amplifier, and the output current is positively correlated with the gate voltage; The feedback voltage when the output current of the power amplifier is stable is collected and used as the target gate voltage. The output current when stable is equal to the target current. Prior to the step of acquiring the output current of the power amplifier and generating a feedback voltage based on the reference voltage and the output current, the calibration method includes: The reference voltage is determined according to a preset correspondence and the target current, wherein the preset correspondence is the correspondence between the reference voltage and the target current at different static operating points of the power amplifier; The target current is locked by a closed-loop circuit with feedback loop to calibrate the power amplifier; when the power amplifier is working normally, the target gate voltage is output to an open-loop circuit with the feedback loop disconnected so that the power amplifier operates at the static operating point corresponding to the target current.

2. The calibration method according to claim 1, wherein, The step of acquiring the output current of the power amplifier and generating a feedback voltage based on the reference voltage and the output current includes: The output current is converted into a first voltage, and the first voltage is positively correlated with the output current; The feedback voltage is generated based on the reference voltage and the first voltage, wherein the difference between the reference voltage and the first voltage is positively correlated with the feedback voltage.

3. The calibration method according to claim 1, wherein, After the step of acquiring the feedback voltage when the output current of the power amplifier is stable, as the target gate voltage, the calibration method further includes: The target gate voltage is provided to the power amplifier so that the power amplifier operates at the quiescent operating point corresponding to the target current.

4. The calibration method according to claim 3, wherein, After the step of acquiring the feedback voltage when the output current of the power amplifier is stable, as the target gate voltage, the calibration method further includes: The drain voltage of the power amplifier is controlled according to a preset timing sequence so that the drain of the power amplifier is powered on after the gate is powered on and powered off before the gate is powered off.

5. A calibration circuit for a power amplifier, comprising: A constant current control module is used to acquire the output current of the power amplifier, and output a feedback voltage based on a reference voltage and the output current as the gate voltage of the power amplifier. The change of the feedback voltage in different adjustment cycles is negatively correlated with the change of the output current, and the reference voltage corresponds to the target current. The power amplifier outputs the output current under the drive of the gate voltage, and the output current is positively correlated with the gate voltage; A gate voltage control module is used to acquire the feedback voltage when the output current of the power amplifier is stable, as the target gate voltage, wherein the output current at the stable state is equal to the target current; the gate voltage control module includes a processor, which is used to determine a digital reference voltage according to a preset correspondence and the target current, wherein the preset correspondence is the correspondence between the digital reference voltage and the target current at different static operating points of the power amplifier; The target current is locked by a closed-loop circuit with feedback loop to calibrate the power amplifier; when the power amplifier is working normally, the target gate voltage is output to an open-loop circuit with the feedback loop disconnected so that the power amplifier operates at the static operating point corresponding to the target current.

6. The calibration circuit according to claim 5, wherein, The constant current control module includes a first amplifier and a current sensing amplifier. The sensing resistor of the current sensing amplifier is connected in series between the drain voltage terminal and the drain of the power amplifier. The output terminal of the current sensing amplifier is connected to the inverting input terminal of the first amplifier, the non-inverting input terminal of the first amplifier is connected to the reference voltage terminal, and the output terminal of the first amplifier is connected to the gate of the power amplifier. The output terminal of the first amplifier serves as the output terminal of the constant current control module. The current-sensing amplifier is used to output a first voltage based on the output current; The first amplifier is used to output the feedback voltage based on the reference voltage and the first voltage, wherein the difference between the reference voltage and the first voltage is positively correlated with the feedback voltage.

7. The calibration circuit according to claim 6, wherein, The constant current control module further includes a first capacitor and a first resistor; the first capacitor and the first resistor are connected in series between the inverting input terminal and the output terminal of the first amplifier.

8. The calibration circuit according to claim 5, wherein, The calibration circuit also includes a drain voltage control module, which is connected to the drain voltage terminal, the drain of the power amplifier, and the drain voltage control terminal. The leakage voltage control module is used to transmit the signal from the drain voltage terminal to the drain of the power amplifier under the control of the leakage voltage control terminal.

9. The calibration circuit according to claim 8, wherein, The drain voltage control module includes a first transistor, a second transistor, and a second resistor; the source of the first transistor is connected to the drain voltage terminal, the drain of the first transistor is connected to the drain of the power amplifier, the gate of the first transistor is connected to the source of the second transistor, the drain of the second transistor is connected to the on-level terminal, the gate of the second transistor is connected to the drain voltage control terminal, and the second resistor is connected in series between the gate of the first transistor and the source of the first transistor. The first transistor and the second transistor are turned on when the drain voltage control terminal is at the on level.

10. The calibration circuit according to claim 5, wherein, The calibration circuit further includes a gate switching module, which is connected to the output terminal of the constant current control module, the gate of the power amplifier, and the gate voltage output terminal of the gate voltage control module. The switching control terminal of the gate switching module is connected to the gate voltage control module. The gate switching module is used to connect the gate of the power amplifier to the output terminal of the constant current control module or to the gate voltage output terminal of the gate voltage control module under the control of the switch control terminal. The gate voltage control module is also used to output the target gate voltage through the gate voltage output terminal when the gate of the power amplifier is connected to the gate voltage output terminal of the gate voltage control module, so that the power amplifier operates at the static operating point corresponding to the target current.

11. The calibration circuit according to any one of claims 5 to 10, wherein, The processor includes a first digital-to-analog converter and a first analog-to-digital converter; the first digital-to-analog converter is connected to a reference voltage terminal, and the first analog-to-digital converter is connected to the output terminal of the constant current control module. The first digital-to-analog converter is used to generate the reference voltage based on the digital reference voltage and transmit the reference voltage to the reference voltage terminal; The first analog-to-digital converter is used to obtain the feedback voltage when the output current of the power amplifier is stable from the output terminal of the constant current control module, and to generate a digital target gate voltage.

12. The calibration circuit according to claim 11, wherein, The processor further includes at least one of a second digital-to-analog converter, a switch control port, and a leakage control port; The leakage control port is connected to the leakage control terminal and is used to provide a conduction level to the leakage control terminal according to a predetermined timing sequence. The switch control port is connected to the switch control terminal and is used to provide a switch control signal to the switch control terminal; The second digital-to-analog converter is connected to the gate voltage output terminal and is used to output the target gate voltage through the gate voltage output terminal when the gate of the power amplifier is connected to the gate voltage output terminal of the gate voltage control module, so that the power amplifier operates at the static operating point corresponding to the target current.

13. The calibration circuit according to any one of claims 5 to 10, wherein, The gate voltage control module includes an analog switch controller and a voltage latch; the first control terminal of the analog switch controller is connected to the drain voltage control terminal, the second control terminal of the analog switch controller is connected to the latch enable terminal of the voltage latch, the third control terminal of the analog switch controller is connected to the output enable terminal of the voltage latch, and the fourth control terminal of the analog switch controller is connected to the switch control terminal of the gate switching module; the latch input terminal of the voltage latch is connected to the output terminal of the constant current control module, and the output terminal of the voltage latch serves as the gate voltage output terminal of the gate voltage control module. The analog switch controller provides signals to the leakage control terminal, latch enable terminal, output enable terminal, and gate switching module switch control terminal according to a predetermined timing sequence. The voltage latch, under the control of the analog switch controller, latches the target gate voltage during the gate voltage latching phase and outputs the target gate voltage during the normal operation phase.

14. A power amplifier chip, comprising the calibration circuit of the power amplifier according to any one of claims 5 to 13.

15. A wireless transmission device comprising the power amplifier chip of claim 14.

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