A passive memristor crossbar array device that can directly realize weight differentiation
By designing a memristor unit with opposite resistance change characteristics in a memristor cross array and inputting opposite read voltages into adjacent memristor units, the weight difference is directly realized, and the problems of high complexity of peripheral circuits and large calculation energy consumption in the prior art are solved, and the effect of simplifying peripheral circuits and reducing energy consumption is achieved.
Patent Information
- Application Number
- CN202211288678.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-10-20
- Publication Date
- 2025-03-25
- Estimated Expiration
- 2042-10-20
AI Technical Summary
When realizing weight difference, existing memristor cross-array devices need to rely on subtractors in peripheral circuits, resulting in high complexity of peripheral circuits and high computing energy consumption.
The weight difference is directly achieved by designing two structured memristor units with opposite resistance change characteristics in the memristor cross array (memristor unit 1 and memristor unit 2), and inputting opposite read voltages into two adjacent memristor units of the same column.
Weight difference can be achieved without relying on subtraction circuits in peripheral circuits, simplifying peripheral circuits, reducing computing energy consumption, and reducing the complexity of peripheral circuits.
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Figure CN115605026B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of electronic devices, and in particular relates to a passive memristor cross array device that can directly realize weight differentiation. Background Art
[0002] With the rapid development of artificial intelligence, the scale of artificial neural networks has increased dramatically, and the amount of data that needs to be calculated and processed has also increased dramatically. There is an urgent need to significantly increase computing power to meet the development needs of artificial intelligence. The computing units and storage units in the computing hardware based on the traditional von Neumann architecture are separated. During the calculation process, the storage units need to be frequently accessed and data transmission needs to be repeated. However, when the amount of calculation increases sharply, the time and energy consumed in accessing the storage unit and transmitting data far exceeds the time and energy consumed in the calculation, becoming the main bottleneck restricting the improvement of computing power, also known as the "storage wall" or von Neumann bottleneck. The memristor crossbar array device has the characteristics of storage and computing integration, which can fundamentally break through the von Neumann bottleneck. It also has the characteristics of high computing parallelism, low energy consumption, and high integration. Therefore, it is considered to be the most promising core device in future high-performance neural network computing chips.
[0003] In neural network calculations based on memristor crossbar arrays, the conductance of the memristor unit in the memristor crossbar array corresponds to the weight in the neural network. Since the weight in the neural network can have negative values, the conductance of two memristor units is generally used to represent the weight of a neural network. At present, in order to compensate for the poor consistency of the memristor unit and effectively control the resistance state of the memristor unit in the memristor crossbar array, the unit structure in the array generally adopts a 1T1R structure in which a memristor unit is connected in series with a transistor. However, the use of the transistor makes the memristor crossbar array device an active device and will further increase energy consumption. In the memristor crossbar array device based on the 1T1R unit structure, the implementation of the difference depends on the subtractor in the peripheral circuit. If the use of the subtractor in the peripheral circuit can be avoided, the complexity of the peripheral circuit will be greatly reduced, and the computing energy consumption will be further reduced.
[0004] Some researchers have also proposed combining two adjacent IT1R structures to form a 2T2R structure, which can directly implement differential operations through current domain subtraction. Although this method avoids the use of subtractors, it cannot eliminate transistors, and the memristor crossbar array device is still an active device. In addition, the 2T2R structure increases the complexity of peripheral circuit control. Summary of the invention
[0005] In view of the above-mentioned problems or shortcomings, in order to further simplify the peripheral control circuit of the memristor cross array device, reduce the burden of the peripheral circuit and reduce the computing energy consumption, the present invention provides a passive memristor cross array device that can directly realize weight differentiation, which can directly realize weight differentiation without relying on the subtraction circuit in the peripheral circuit.
[0006] A passive memristor crossbar array device that can directly realize weight differentiation is composed of m×n memristor units, where m is the row direction (2 1 ≤m), n is the column direction (2 0 ≤n); the memristor units in the same row have the same structure, and the memristor units in two adjacent rows have different structures. The two memristor units with different structures are memristor unit 1 and memristor unit 2. Memristor unit 1 and memristor unit 2 have resistive switching characteristics and self-rectification characteristics in opposite directions.
[0007] By connecting the upper electrode / lower electrode of the memristor unit to the positive electrode / negative electrode of the signal generator respectively, the voltage pulse emitted by the signal generator is received: the memristor unit 1 exhibits a resistive switching characteristic under a positive bias, and the overall current-voltage characteristic exhibits a negative rectification characteristic; the memristor unit 2 has a resistive switching characteristic opposite to that of the memristor unit 1, and exhibits a resistive switching characteristic under a negative bias, and the overall current-voltage characteristic exhibits a positive rectification characteristic.
[0008] Furthermore, the two memristor units with different structures, such as Figure 1 As shown. It is composed of a metal lower electrode-a dielectric layer film-a metal upper electrode, and through doping: defects are generated on the surface of the dielectric layer film adjacent to the upper electrode, a defect concentration gradient from top to bottom is formed in the dielectric layer film, and a memristor unit 1 is obtained based on the dielectric layer film with the defect concentration gradient; defects are generated on the surface of the dielectric layer film adjacent to the lower electrode, a defect concentration gradient from bottom to top is formed in the dielectric layer film, and a memristor unit 2 is obtained based on the dielectric layer film with the defect concentration gradient.
[0009] Furthermore, the memristor unit 1 adopts a positive read voltage to read the device current under different voltage pulse stimulations, thereby realizing multiple stable and distinguishable resistance states.
[0010] Furthermore, the memristor unit 2 uses a negative read voltage to read the device current under different voltage pulse stimulations to achieve multiple stable and distinguishable resistance states.
[0011] Furthermore, the voltage pulse stimulation received by the memristor unit is composed of a pulse group consisting of voltage amplitude, pulse number and / or pulse waveform. The voltage amplitude ranges from 0.1V to 50V, the pulse number ranges from 1 to 200 times, and the pulse waveform includes square wave, triangle wave, and sine wave.
[0012] The above-mentioned passive memristor cross array device that can directly realize weight differential, and its method for realizing neural network weight differential is: inputting a positive read voltage to the row where the memristor unit 1 is located, and at the same time inputting a negative read voltage to the row where the memristor unit 2 is located, and the weight differential can be directly realized through the two adjacent memristor units (memristor unit 1 and memristor unit 2) in the same column.
[0013] In summary, the present invention regulates the distribution of defects in the dielectric layer film, and then regulates the structure of two adjacent rows of memristor units in the memristor cross array device, and utilizes the characteristics of two adjacent rows of memristor units in the same column having opposite memristor characteristics, and inputs opposite read voltages to them, thereby realizing a method of directly realizing weight differential without any external conditions (subtraction circuit, etc.), greatly reducing the burden of the peripheral circuit, greatly reducing the energy consumption of the entire neural network calculation process, and no longer needing to rely on the subtraction circuit for weight differential. In addition, the memristor cross array devices of the two structures can read multiple stable and distinguishable resistance states at opposite read voltages respectively through different external voltage pulse stimulations without relying on triodes, further reducing the complexity of the peripheral circuits, and multiple stable and distinguishable resistance states no longer rely on the gate voltage of the triode to obtain, which further reduces the energy consumption of the entire system. BRIEF DESCRIPTION OF THE DRAWINGS
[0014] Figure 1 A schematic diagram of the structure of a passive memristor crossbar array device according to an embodiment;
[0015] Figure 2 A transmission electron microscope image of the interface region between the electrode and the LiNbO3 single crystal thin film in the embodiment;
[0016] FIG3 is a typical IV characteristic curve of an embodiment;
[0017] FIG4 is a diagram showing the data retention characteristics of an embodiment;
[0018] Figure 5 The figure is a schematic diagram of a circuit for realizing differential based on the device of the present invention. DETAILED DESCRIPTION
[0019] The present invention is further described in detail below with reference to the accompanying drawings and embodiments:
[0020] In this embodiment, the structure of the passive memristor crossbar array device that can directly realize weight difference is as follows: Figure 1 As shown, the array is composed of 4×4 memristor units. Its basic structure (memristor unit) is composed of metal bottom electrode-single crystal film-metal top electrode. The memristor units in two adjacent rows have different structures, namely memristor unit 1 and memristor unit 2.
[0021] Memristor unit 1 is prepared by doping the surface of the LiNbO3 single crystal film near the upper electrode, and forming an oxygen vacancy defect layer at the interface between the upper electrode and the LiNbO3 single crystal film. Memristor unit 2 is prepared by doping the oxygen vacancy defect layer formed at the interface between the lower electrode and the LiNbO3 single crystal film. The transmission electron microscope image of the interface area between the electrode and the LiNbO3 single crystal film is shown in Figure 2. Figure 2 As shown, the dotted line area is the oxygen vacancy defect layer generated after doping.
[0022] The resistive switching performance of the 4×4 passive memristor cross array device of this embodiment is tested by a probe station and a signal generator. During the test, the upper and lower electrodes of the memristor unit are connected to the positive and negative electrodes of the signal generator by the probe station respectively. The resistive switching performance test includes the IV characteristics and multi-resistance data retention characteristics of memristor unit 1 and memristor unit 2.
[0023] The IV characteristic test is to apply a loop voltage from 0V to the maximum positive voltage to 0V, then to the maximum negative voltage and finally to 0V on the upper electrode of the memristor unit, and read the current value under the corresponding voltage. The IV characteristic of memristor unit 1 shows a positive resistance change characteristic and a negative rectification characteristic, as shown in Figure 3 (A). On the contrary, the IV characteristic of memristor unit 2 shows a negative resistance change characteristic and a positive rectification characteristic, as shown in Figure 3 (B).
[0024] Based on the opposite resistance switching characteristics exhibited by the memristor unit 1 and the memristor unit 2, in order to meet the requirements of neural network calculation of multiple weights, their multi-resistance state data retention characteristics are tested.
[0025] When a square wave pulse with a write voltage pulse amplitude of 21V (pulse width of 0.1s) is applied to the memristor unit 1, a read voltage of 2V (pulse width of 0.1s) is used to read the current. By setting the number of write voltage square wave pulses to 2, 5, 10, 20, 40, 60, 80, and 100, eight different resistance states are obtained, and each resistance state can be maintained for at least 1000s, as shown in FIG4(A).
[0026] As shown in FIG4(B), there are 8 different resistance states read by the memristor unit 2 at a read voltage of -2 V. These resistance states are obtained by applying 2, 5, 10, 20, 40, 60, 80, and 100 square wave pulses with a write voltage pulse amplitude of -21 V (pulse width of 0.1 s) to the memristor unit 2, and each resistance state can still be maintained for at least 1000 s.
[0027] In this embodiment, by applying a read voltage of opposite polarity (positive / negative) to the upper electrode (word line) of the passive memristor cross array (i.e., applying a positive read voltage to the row where memristor unit 1 is located, and applying a negative read voltage to the row where memristor unit 2 is located), the lower electrode (bit line) of the memristor cross array is grounded. Based on Kirchhoff's current law and Ohm's law, the weight difference of two adjacent memristor units can be directly realized. The corresponding circuit diagram is shown in FIG. Figure 5 As shown below, two adjacent memristor units G that have completed weight training 1,1 and G 2,1 Take as an example to illustrate the differential process, and the differential process of other memristor units can be inferred by analogy.
[0028] When the memristor unit G 1,1 When receiving a positive read voltage, the memristor unit G 2,1 Receiving a negative read voltage, based on Kirchhoff’s current law and Ohm’s law, the memristor unit G 1,1 and G 2,1 The output current at this time is:
[0029] I 1-2,1 =V i+ G 1,1 -V i- G 2,1
[0030] The current path of this process is Figure 5 shown.
[0031] It can be seen from the above embodiments that the present invention makes full use of defect distribution to regulate the direction of resistance change, and invents a new passive memristor cross array device. By inputting read voltages of opposite polarities to two adjacent rows of memristor units, weight differentiation can be directly performed, which greatly simplifies the peripheral circuit and greatly reduces the complexity of the peripheral circuit. It is no longer necessary to rely on subtraction circuits for weight differentiation, and it is no longer necessary to rely on transistors for multi-resistance state setting. The present invention can be directly used in subsequent neural network calculations based on memristors.
Claims
1. A passive memristor crossbar array device that can directly realize weight differentiation, which is composed of m×n memristor units and is characterized by: m is the row direction, 2 1 ≤m, n is the column direction, 2 0 ≤n, the memristor units in the same row have the same structure, and the memristor units in two adjacent rows have different structures. The two memristor units with different structures are memristor unit 1 and memristor unit 2. Memristor unit 1 and memristor unit 2 have resistive switching characteristics and self-rectification characteristics in opposite directions; By connecting the upper electrode / lower electrode of the memristor unit to the positive electrode / negative electrode of the signal generator respectively, the voltage pulse emitted by the signal generator is received: the memristor unit 1 exhibits a resistive switching characteristic under a positive bias, and the overall current-voltage characteristic exhibits a negative rectification characteristic; the memristor unit 2 has a resistive switching characteristic opposite to that of the memristor unit 1, and exhibits a resistive switching characteristic under a negative bias, and the overall current-voltage characteristic exhibits a positive rectification characteristic.
2. The passive memristor crossbar array device capable of directly realizing weight differentiation as claimed in claim 1, characterized in that: The two memristor units with different structures are composed of a metal lower electrode-a dielectric layer film-a metal upper electrode, and are doped: defects are generated on the surface of the dielectric layer film adjacent to the upper electrode, a defect concentration gradient from top to bottom is formed in the dielectric layer film, and a memristor unit 1 is obtained based on the dielectric layer film with the defect concentration gradient; defects are generated on the surface of the dielectric layer film adjacent to the lower electrode, a defect concentration gradient from bottom to top is formed in the dielectric layer film, and a memristor unit 2 is obtained based on the dielectric layer film with the defect concentration gradient.
3. The passive memristor crossbar array device capable of directly realizing weight differentiation as claimed in claim 2, characterized in that: The memristor unit 1 uses a positive read voltage to read the device current under different voltage pulse stimulations to achieve multiple stable and distinguishable resistance states.
4. The passive memristor crossbar array device capable of directly realizing weight differentiation as claimed in claim 2, characterized in that: The memristor unit 2 uses a negative read voltage to read the device current under different voltage pulse stimulations to achieve multiple stable and distinguishable resistance states.
5. The passive memristor crossbar array device capable of directly realizing weight differentiation as claimed in claim 1, characterized in that: The voltage pulse stimulation received by the memristor unit is composed of a pulse group consisting of voltage amplitude, pulse number and / or pulse waveform.
6. The passive memristor crossbar array device capable of directly realizing weight differentiation as claimed in claim 5, characterized in that: The voltage amplitude ranges from 0.1V to 50V, the pulse number ranges from 1 to 200 times, and the pulse waveform is a square wave, a triangle wave and / or a sine wave.
7. The passive memristor crossbar array device capable of directly realizing weight differentiation as claimed in claim 1, characterized in that: Method for realizing weight difference of neural network: input positive read voltage to the row where memristor unit 1 is located, and input negative read voltage to the row where memristor unit 2 is located, and directly realize weight difference through adjacent memristor unit 1 and memristor unit 2 in the same column. ,
Citation Information
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