An I2C system management method, device, storage medium and equipment

Abstract

The application provides an I2C system management method, device, storage medium and equipment, the method comprises the following steps: classifying I2C slaves in an I2C system, connecting I2C slaves of the same type into the same multiplexing controller, connecting all multiplexing controllers into the I2C system according to levels, and describing the information of all devices in the I2C system through a tree configuration description file; parsing the tree configuration description file to obtain the topology of the I2C system, and generating a device linked list based on the topology; in response to an I2C read-write operation of an application layer using an I2C slave, finding an I2C controller located at a root node based on the device linked list, and occupying or unoccupying the corresponding I2C bus through the I2C controller to complete the I2C read-write operation. The application realizes the connection of a large number of I2C slaves into the system in a complex application scenario, and the electrical influence and address conflict do not occur, and the failure of one I2C slave does not affect the whole I2C system, thereby improving the stability and reliability of the I2C system.

Description

Technical Field

[0001] This invention relates to the field of bus technology, and in particular to an I2C system management method, apparatus, storage medium and device. Background Technology

[0002] The I2C bus, or Inter-Integrated Circuit bus, is a serial half-duplex communication bus used for low-speed communication between boards or within a short distance at the board level. The I2C bus has a simple structure with only two signal lines: a clock line (SCL) for clock synchronization between communicating parties, and a data line (SDA) for bidirectional data transmission and reception. I2C devices are divided into masters and slaves. The master is responsible for initiating and terminating communication, while the slave passively responds to the master based on its own hardware address. In an I2C system, there are one or more masters and one or more slaves, making it a multi-master, multi-slave system. When multiple masters send conflicting data, the I2C controller arbitrates the bus connection.

[0003] Because of its simple structure and support for various communication rates (low speed - 100Kb, fast speed - 400Kb, high speed - 3.4Mb), the I2C bus allows for easy connection of more and more low-speed devices into systems. However, with the increasing popularity of I2C and the growing number of devices connected to it, the traditional I2C bus topology is causing serious problems: I2C uses 7-bit address bits to address slave devices, limiting the number of slave devices on a single I2C bus to 128. In modern systems with hundreds or thousands of data acquisition sensors, this topology is inadequate for management. Furthermore, the electrical impact of I2C slave devices must be carefully considered as the number of slave devices increases. A failure in one slave device can propagate to the entire bus system, reducing system stability and reliability. Slave devices of the same model with the same address cannot be connected to the bus simultaneously. Additionally, some slave devices act as both local I2C slaves and slaves of other external components, and without isolation, interference from dual masters cannot be avoided. Summary of the Invention

[0004] In view of this, the purpose of this invention is to provide an I2C system management method, apparatus, storage medium and device to solve problems such as slave address conflicts, electrical effects of multiple slave devices and I2C quantity limitations caused by a significant increase in the number of I2C slaves in an I2C system.

[0005] To achieve the above objectives, the present invention provides an I2C system management method, comprising the following steps:

[0006] The I2C slaves in the I2C system are classified, and I2C slaves of the same type are connected to the same multiplexer. All multiplexers are connected to the I2C system in a hierarchical manner, and the information of all devices in the I2C system is described through a tree configuration description file.

[0007] Parse the tree-structured configuration description file to obtain the topology of the I2C system, and generate a device list based on the topology;

[0008] In response to the application layer using I2C slave devices to perform I2C read and write operations, the I2C controller located at the root node is found based on the device linked list, and the corresponding I2C bus is occupied or de-occupied by the I2C controller to complete the I2C read and write operation.

[0009] In some embodiments, parsing the tree configuration description file to obtain the topology of the I2C system and generating a device list based on the topology includes:

[0010] Parse the tree-structured configuration description file to obtain a binary configuration file containing the topology of the I2C system.

[0011] The binary configuration file is traversed and parsed, and a root adapter structure is generated based on the I2C controller, an adapter structure is generated based on each multiplexer, and an I2C slave structure is generated based on each I2C slave. The corresponding topology connection field is filled into each structure based on the topology structure to generate a device linked list.

[0012] In some embodiments, the method further includes:

[0013] Load the corresponding driver based on the names of all devices in the device list, and add the relevant fields of the driver's interface to the corresponding structure.

[0014] In some embodiments, the adapter structure has a parent adapter field and a child adapter field.

[0015] In some embodiments, the method further includes:

[0016] Set the parent adapter field in the root adapter structure to an empty field.

[0017] In some embodiments, locating the I2C controller at the root node based on the device linked list includes:

[0018] The process involves traversing the I2C slave structure in the device chain to the connected adapter structure, and then continuing to traverse from the connected adapter structure until a node with an empty parent adapter field is reached. The device of the node is then identified as the I2C controller of the root node.

[0019] In some embodiments, the process of using an I2C controller to occupy or de-occupy the corresponding I2C bus to complete I2C read / write operations includes:

[0020] Call the bus lock on the I2C controller and occupy the corresponding I2C bus through the bus lock to transmit data related to I2C read and write operations;

[0021] In response to the completion of data transmission, the bus lock is released to release the corresponding I2C bus and complete the I2C read / write operation.

[0022] In another aspect, the present invention provides an I2C system management device, comprising:

[0023] The description module is configured to classify I2C slaves in the I2C system, connect I2C slaves of the same type to the same multiplexer, connect all multiplexers to the I2C system hierarchically, and describe the information of all devices in the I2C system through a tree-structured configuration description file.

[0024] The device list generation module is configured to parse the tree-structured configuration description file to obtain the topology of the I2C system and generate a device list based on the topology; and

[0025] The I2C read / write operation module is configured to respond to I2C read / write operations performed by the application layer using an I2C slave device. It finds the I2C controller located at the root node based on the device list and uses the I2C controller to occupy or de-occupy the corresponding I2C bus to complete the I2C read / write operation.

[0026] In another aspect, the present invention provides a computer-readable storage medium storing computer program instructions that, when executed by a processor, implement the above-described method.

[0027] In another aspect, the present invention provides a computer device including a memory and a processor, wherein the memory stores a computer program that, when executed by the processor, performs the above-described method.

[0028] The present invention has at least the following beneficial technical effects:

[0029] The I2C system management method of the present invention manages I2C slave devices individually using a multi-channel controller, sets up a tree-structured configuration description file to describe the topology of the entire I2C system, and generates a device list based on the topology. I2C read and write operations are performed by traversing the device list. This enables the connection of hundreds or thousands of I2C slave devices to the system in complex application scenarios without electrical interference or address conflicts. Furthermore, the failure of one I2C slave device will not affect the entire I2C system, greatly improving the stability and reliability of the I2C system. Attached Figure Description

[0030] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other embodiments can be obtained based on these drawings without creative effort.

[0031] Figure 1 A schematic diagram of an I2C system management method provided according to an embodiment of the present invention;

[0032] Figure 2 This is a schematic diagram of the topology of an I2C system provided according to an embodiment of the present invention;

[0033] Figure 3 This is a schematic diagram of the structure of a device linked list provided according to an embodiment of the present invention;

[0034] Figure 4 This is a schematic diagram of the equivalent structure when operating an I2C slave device from the application layer, according to an embodiment of the present invention.

[0035] Figure 5 This is a schematic diagram of an I2C system management device provided according to an embodiment of the present invention;

[0036] Figure 6 A schematic diagram of a computer-readable storage medium for implementing an I2C system management method according to an embodiment of the present invention;

[0037] Figure 7 This is a schematic diagram of the hardware structure of a computer device for executing an I2C system management method according to an embodiment of the present invention. Detailed Implementation

[0038] To make the objectives, technical solutions, and advantages of the present invention clearer, the embodiments of the present invention will be further described in detail below with reference to specific examples and the accompanying drawings.

[0039] It should be noted that all uses of the terms "first" and "second" in the embodiments of the present invention are for the purpose of distinguishing two different entities or different parameters with the same name. Therefore, "first" and "second" are merely for convenience of expression and should not be construed as limiting the embodiments of the present invention. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion, such as other steps or units inherent in a process, method, apparatus, product, or device that includes a series of steps or units.

[0040] Based on the above objectives, the first aspect of the present invention provides an embodiment of an I2C system management method. Figure 1 The diagram shown is a schematic representation of an embodiment of the I2C system management method provided by the present invention. Figure 1 As shown, the embodiments of the present invention include the following steps:

[0041] Step S10: Classify the I2C slaves in the I2C system, connect I2C slaves of the same type to the same multiplexer, connect all multiplexers to the I2C system in a hierarchical manner, and describe the information of all devices in the I2C system through a tree configuration description file;

[0042] Step S20: Parse the tree configuration description file to obtain the topology of the I2C system, and generate a device list based on the topology.

[0043] Step S30: In response to the application layer using an I2C slave device to perform I2C read / write operations, the I2C controller located at the root node is found based on the device list, and the corresponding I2C bus is occupied or de-occupied through the I2C controller to complete the I2C read / write operation.

[0044] The I2C system management method of this invention manages I2C slave devices individually using a multi-channel controller, sets up a tree-structured configuration description file to describe the topology of the entire I2C system, and generates a device list based on the topology. I2C read and write operations are performed by traversing the device list. This enables the connection of hundreds or thousands of I2C slave devices to the system in complex application scenarios without electrical interference or address conflicts. Furthermore, the failure of one I2C slave device will not affect the entire I2C system, greatly improving the stability and reliability of the I2C system.

[0045] Figure 2 This is a schematic diagram of the topology of an I2C system provided according to an embodiment of the present invention. Figure 2 As shown, the I2C slave (e.g.) Figure 2 The I2C slave is classified into DEV 1-9. Each type of I2C slave is connected to a multiplexer. In order to facilitate the control of each I2C slave, each I2C slave needs to be connected to a specific channel of the multiplexer. Finally, all the multiplexers are combined together in a hierarchical manner and connected to the I2C (Inter-Integrated Circuit, a serial half-duplex communication bus) system.

[0046] Multiplexer: A multiplexer switch that can be controlled by IO (Input / Output) or by I2C slave.

[0047] The topology of an I2C system is described by a tree-structured configuration description file. This file describes information about all devices on the I2C link, and information about each device can be obtained by traversing from the root node to each device. The tree-structured configuration description file is shown below:

[0048]

[0049]

[0050]

[0051]

[0052] In this context, I2C@root represents the I2C controller, mux@1 represents the I2C multiplexer numbered 1, channel@0 represents multiplexer channel 0, dev9@addr represents the device connected to a certain channel, and addr is the device address.

[0053] In some embodiments, parsing the tree configuration description file to obtain the topology of the I2C system and generating a device list based on the topology includes: parsing the tree configuration description file to obtain a binary configuration file containing the topology of the I2C system; traversing and parsing the binary configuration file, generating a root adapter structure based on the I2C controller, generating an adapter structure based on each multiplexer, generating an I2C slave structure based on each I2C slave, and filling each structure with the corresponding topology connection field based on the topology to generate a device list.

[0054] In some embodiments, the method further includes: loading the corresponding driver according to the names of all devices in the device list, and adding the relevant fields of the driver's interface to the corresponding structure.

[0055] This embodiment, through configuration description files and software driver layer management, enables the virtualization of numerous I2C buses from the driver software layer. It can virtualize an independent I2C bus for each I2C slave device and hide the operation details of the multiplexer in the bus, only generating specific device interfaces with operation and control for use by upper-layer applications. This makes the upper-layer applications feel that each I2C device is independent and as if it is directly connected to the bus, making the upper-layer applications simpler, more efficient, and with a lower failure rate. At the same time, the I2C bus structure is also more scalable and flexible.

[0056] In some embodiments, the adapter structure has a parent adapter field and a child adapter field.

[0057] In some embodiments, the method further includes setting the parent adapter field in the root adapter structure to an empty field.

[0058] In the above embodiments, the configuration parsing tool reads the tree-structured configuration description file, parses out the configuration data by keywords, and then generates binary configuration files related to each platform.

[0059] Next, the binary configuration file is read and parsed to generate the corresponding i2c_adapter structure (i.e., adapter structure) and i2cdev structure (i.e., I2C slave structure), as defined below:

[0060]

[0061] Figure 3 This is a schematic diagram of the structure of a device linked list provided according to an embodiment of the present invention. Figure 3 As shown, the process of generating the device linked list is as follows:

[0062] 1) Generate a root i2c_adapter structure (i.e., root adapter structure) from the I2C controller, and set its parent adapter to NULL (i.e., empty field);

[0063] 2) Generate an i2c_adapter structure based on the channels of each multiplexer and set the corresponding parent i2c_adapter structure;

[0064] 3) Generate a corresponding i2cdev structure for each I2C slave and fill adap with the i2c_adapter structure of the connected multiplexer;

[0065] 4) Link all the aforementioned structures into a device linked list.

[0066] Additionally, based on the name string in each structure in the device list, the device driver list is searched, and the corresponding driver is loaded; then the driver interface is associated with the device, and the driver interface is placed in the fops field of the structure.

[0067] In some embodiments, finding the I2C controller located at the root node based on the device list includes: traversing from the I2C slave structure in the device list to the connected adapter structure, and continuing to traverse from the connected adapter structure until a node with an empty parent adapter field is reached, and determining that the device of the node is the I2C controller of the root node.

[0068] In some embodiments, occupying or de-occupying the corresponding I2C bus through the I2C controller to complete the I2C read / write operation includes: calling a bus lock on the I2C controller and occupying the corresponding I2C bus through the bus lock to transmit data related to the I2C read / write operation; and in response to the completion of data transmission, removing the bus lock to de-occupy the corresponding I2C bus to complete the I2C read / write operation.

[0069] Specifically, the process of the application layer accessing the I2C slave device is as follows:

[0070] 1) The application layer sends I2C read / write operations to a specific I2C slave device through the I2C controller;

[0071] 2) The I2C slave, or i2cdev, structure traverses all adapters layer by layer until it reaches the root adapter, based on the bound adapter. For example... Figure 3 The process iterates through i2cdev4, finding the adapter where the device resides as i2c_adapter2_4 based on i2cdev4's adapter. It checks the parent of i2c_adapter2_4 and finds it is not NULL, recording its child nodes and continuing to search for i2c_adapter1_1. It checks the parent of i2c_adapter1_1 and finds it is not NULL, recording its child nodes and continuing to search for i2c_adapter0. Finding that the parent of i2c_adapter0 is NULL indicates that the root node has been found.

[0072] 4) Call the root node's lock (i.e., bus lock) to lock the bus, indicating that the bus needs to be occupied. Then return to the previous level and call the sops open path function of each level in turn.

[0073] 5) After establishing the communication path, perform the actual I2C transmission;

[0074] 6) After transmission is complete, each adapter path is closed sequentially in reverse order according to the hierarchical structure, that is, the sops interface of i2c_adapter is called sequentially to close the path.

[0075] 7) Finally, traverse to the root node, remove the bus lock of the I2C controller, and exit the bus occupancy state.

[0076] Therefore, this embodiment of the invention categorizes I2C slave devices according to certain rules, connects slave devices of the same type to the same multiplexer, ensuring that each I2C slave device is individually connected to a specific channel of the multiplexer, and then connects all multiplexers to the I2C host system according to a certain hierarchy. A tree-structured configuration description file describes all multiplexers and I2C slave devices under the I2C bus. During software initialization, this tree-structured configuration description file is parsed to obtain the topology of the entire I2C bus system, generating a device list with adapter paths. Based on the device names in the device list, the corresponding drivers are loaded, and the driver interfaces are bound to the devices, generating device interfaces for upper-layer applications to call and related function interfaces for implementing device operations.

[0077] Figure 4 This is a schematic diagram of the equivalent structure when operating an I2C slave device from the application layer, according to an embodiment of the present invention. Figure 4 As shown, when the application layer accesses the I2C slave, it does not need to know the specific topology of the I2C slave; it can directly open the corresponding I2C slave and perform operations.

[0078] A second aspect of the present invention also provides an I2C system management device. Figure 5 The diagram shown is a schematic representation of an embodiment of the I2C system management device provided by the present invention. Figure 5 As shown, an I2C system management device includes: a description module 10, configured to classify I2C slaves in the I2C system, connect I2C slaves of the same type to the same multiplexer, connect all multiplexers to the I2C system hierarchically, and describe the information of all devices in the I2C system through a tree configuration description file; a device list generation module 20, configured to parse the tree configuration description file to obtain the topology of the I2C system and generate a device list based on the topology; and an I2C read / write operation module 30, configured to respond to the application layer using I2C slaves to perform I2C read / write operations, find the I2C controller located at the root node based on the device list, and use the I2C controller to occupy or de-occupy the corresponding I2C bus to complete the I2C read / write operation.

[0079] The I2C system management device of this invention manages I2C slave devices individually using a multi-channel controller, sets up a tree-structured configuration description file to describe the topology of the entire I2C system, and generates a device list based on the topology. I2C read and write operations are performed by traversing the device list. This enables the connection of hundreds or thousands of I2C slave devices to the system in complex application scenarios without electrical interference or address conflicts. Furthermore, the failure of one I2C slave device will not affect the entire I2C system, greatly improving the stability and reliability of the I2C system.

[0080] In some embodiments, the device list generation module 20 is further configured to parse the tree configuration description file to obtain a binary configuration file containing the topology of the I2C system; traverse and parse the binary configuration file, generate a root adapter structure based on the I2C controller, generate an adapter structure based on each multiplexer, generate an I2C slave structure based on each I2C slave, and fill each structure with the corresponding topology connection field based on the topology to generate a device list.

[0081] In some embodiments, the system further includes a driver interface adding module, configured to load the corresponding driver based on the names of all devices in the device chain, and add the relevant fields of the driver's interface to the corresponding structure.

[0082] In some embodiments, the adapter structure has a parent adapter field and a child adapter field.

[0083] In some embodiments, the system further includes an empty field setting module configured to set the parent adapter field in the root adapter structure to an empty field.

[0084] In some embodiments, the I2C read / write operation module 30 includes a lookup module configured to traverse from the I2C slave structure in the device chain to the connected adapter structure, and continue traversing from the connected adapter structure until a node with an empty parent adapter field is reached, and determine that the device of the node is the I2C controller of the root node.

[0085] In some embodiments, the I2C read / write operation module 30 further includes a bus occupancy module, configured to invoke a bus lock on the I2C controller and occupy the corresponding I2C bus through the bus lock to transmit data related to the I2C read / write operation; in response to the completion of data transmission, the bus lock is removed to release the occupancy of the corresponding I2C bus to complete the I2C read / write operation.

[0086] A third aspect of the present invention also provides a computer-readable storage medium. Figure 6 A schematic diagram of a computer-readable storage medium for implementing an I2C system management method according to an embodiment of the present invention is shown. Figure 6 As shown, the computer-readable storage medium 3 stores computer program instructions 31. When executed by a processor, the computer program instructions 31 implement the method of any of the above embodiments.

[0087] It should be understood that, where there is no conflict, all the embodiments, features and advantages described above for the I2C system management method according to the present invention are equally applicable to the I2C system management device and storage medium according to the present invention.

[0088] A fourth aspect of the present invention also provides a computer device, including as follows: Figure 7 The memory 402 and processor 401 shown are provided. The memory 402 stores a computer program that, when executed by the processor 401, implements the method of any of the above embodiments.

[0089] like Figure 7 The diagram shown is a hardware structure schematic of an embodiment of a computer device for executing the I2C system management method provided by the present invention. Figure 7 Taking the computer device shown as an example, this computer device includes a processor 401 and a memory 402, and may also include an input device 403 and an output device 404. The processor 401, memory 402, input device 403, and output device 404 can be connected via a bus or other means. Figure 7 Taking a bus connection as an example, input device 403 can receive input digital or character information, and generate key signal inputs related to user settings and function control of the I2C system management device. Output device 404 may include display devices such as a display screen.

[0090] Memory 402, as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer-executable programs, and modules, such as the program instructions / modules corresponding to the I2C system management method in this embodiment. Memory 402 may include a program storage area and a data storage area, wherein the program storage area may store the operating system and application programs required for at least one function; the data storage area may store data created by the use of the I2C system management method, etc. In addition, memory 402 may include high-speed random access memory and may also include non-volatile memory, such as at least one disk storage device, flash memory device, or other non-volatile solid-state storage device. In some embodiments, memory 402 may optionally include memory remotely located relative to processor 401, and these remote memories can be connected to the local module via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0091] The processor 401 executes various server functions and data processing by running non-volatile software programs, instructions, and modules stored in the memory 402, thereby implementing the I2C system management method of the above method embodiment.

[0092] Finally, it should be noted that the computer-readable storage medium (e.g., memory) described herein can be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. By way of example, and not limitation, non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM), which can act as external cache memory. By way of example, and not limitation, RAM can be obtained in various forms, such as synchronous RAM (DRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct Rambus RAM (DRRAM). The storage devices disclosed herein are intended to include, but are not limited to, these and other suitable types of memory.

[0093] Those skilled in the art will also understand that the various exemplary logic blocks, modules, circuits, and algorithm steps described in conjunction with the disclosure herein can be implemented as electronic hardware, computer software, or a combination of both. To clearly illustrate this interchangeability between hardware and software, the functionality of various illustrative components, blocks, modules, circuits, and steps has been generally described. Whether this functionality is implemented as software or as hardware depends on the specific application and the design constraints imposed on the system as a whole. Those skilled in the art can implement the functionality in various ways for each specific application, but such implementation decisions should not be construed as departing from the scope of the embodiments disclosed herein.

[0094] The various exemplary logic blocks, modules, and circuits described herein can be implemented or performed using the following components designed to perform the functions herein: general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs) or other programmable logic devices, discrete gate or transistor logic, discrete hardware components, or any combination of these components. A general-purpose processor may be a microprocessor, but alternatively, the processor may be any conventional processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors combined with a DSP, and / or any other such configuration.

[0095] The above are exemplary embodiments disclosed in this invention. However, it should be noted that various changes and modifications can be made without departing from the scope of the embodiments of this invention as defined by the claims. The functions, steps, and / or actions of the methods according to the disclosed embodiments described herein do not need to be performed in any particular order. Furthermore, although the elements disclosed in the embodiments of this invention may be described or claimed individually, they may be understood as multiple unless explicitly limited to a singular number.

[0096] It should be understood that, as used herein, the singular form "a" is intended to include the plural form as well, unless the context clearly supports an exception. It should also be understood that, as used herein, "and / or" refers to any and all possible combinations of one or more of the associatedly listed items. The embodiment numbers disclosed above are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0097] Those skilled in the art should understand that the discussion of any of the above embodiments is merely exemplary and is not intended to imply that the scope of the invention (including the claims) is limited to these examples. Within the framework of the invention, technical features of the above embodiments or different embodiments can be combined, and many other variations of different aspects of the invention exist, which are not provided in the details for the sake of brevity. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the invention should be included within the protection scope of the invention.

Claims

1. An I2C system management method, characterized in that, Includes the following steps: The I2C slaves in the I2C system are classified, and I2C slaves of the same type are connected to the same multiplexer. All multiplexers are connected to the I2C system in a hierarchical manner, and the information of all devices in the I2C system is described through a tree configuration description file. Parsing the tree configuration description file to obtain the topology of the I2C system and generating a device list based on the topology includes: parsing the tree configuration description file to obtain a binary configuration file containing the topology of the I2C system; traversing and parsing the binary configuration file, generating a root adapter structure based on the I2C controller, an adapter structure based on each of the multiplexers, and an I2C slave structure based on each of the I2C slaves; filling each structure with a corresponding topology connection field based on the topology to generate the device list, wherein the adapter structure has a parent adapter field and a child adapter field; searching the device driver list based on the name string in each structure in the device list and loading the corresponding driver; associating the driver interface with the device and placing the driver interface into the fops field of the structure; In response to the application layer using the I2C slave device to perform I2C read / write operations, the I2C controller located at the root node is found based on the device linked list. The I2C controller then occupies or de-occupies the corresponding I2C bus to complete the I2C read / write operation. Calling the root node's lock function to lock the bus indicates that the bus needs to be occupied. The process then returns to the previous layer and sequentially calls the sops function of each layer to open the pathway. After the pathway is established, the actual I2C transmission is performed. After the transmission is completed, the pathways of each adapter are closed sequentially according to the hierarchical structure. Finally, the process traverses back to the root node, removes the bus lock of the I2C controller, and exits the bus occupancy state.

2. The method according to claim 1, characterized in that, Also includes: Load the corresponding driver based on the names of all devices in the device list, and add the relevant fields of the driver's interface to the corresponding structure.

3. The method according to claim 1, characterized in that, Also includes: Set the parent adapter field in the root adapter structure to an empty field.

4. The method according to claim 3, characterized in that, Locating the I2C controller located at the root node based on the device linked list includes: The process involves traversing the I2C slave structure in the device list to the connected adapter structure, and continuing to traverse from the connected adapter structure until a node is reached where the parent adapter field is empty. The device of that node is then identified as the I2C controller of the root node.

5. The method according to claim 1, characterized in that, The I2C read / write operation is completed by the I2C controller occupying or de-occupying the corresponding I2C bus. The bus lock on the I2C controller is invoked, and the corresponding I2C bus is occupied through the bus lock to transmit data related to the I2C read / write operation; In response to the completion of the data transmission, the bus lock is released to release the corresponding I2C bus from occupation, thereby completing the I2C read / write operation.

6. An I2C system management device, characterized in that, include: The description module is configured to classify the I2C slaves in the I2C system, connect I2C slaves of the same type to the same multiplexer, connect all multiplexers to the I2C system in a hierarchical manner, and describe the information of all devices in the I2C system through a tree-structured configuration description file. The device list generation module is configured to parse the tree configuration description file to obtain the topology of the I2C system and generate a device list based on the topology. as well as The I2C read / write operation module is configured to respond to I2C read / write operations performed by the application layer using the I2C slave device. Based on the device list, it locates the I2C controller at the root node and uses the I2C controller to occupy or de-occupy the corresponding I2C bus to complete the I2C read / write operation. Specifically, calling the root node's `lock` function locks the bus, indicating a need to occupy it. It then returns to the previous layer and sequentially calls the `sops` function of each layer to open the pathway. After establishing the pathway, the actual I2C transmission is performed. Upon completion of the transmission, the pathways of each adapter are closed sequentially according to the hierarchical structure. Finally, it iterates back to the root node, removes the bus lock from the I2C controller, and exits the bus occupancy state. The device list generation module is further configured to: parse the tree configuration description file to obtain a binary configuration file containing the topology of the I2C system; traverse and parse the binary configuration file, generate a root adapter structure based on the I2C controller, generate an adapter structure based on each of the multiplexers, generate an I2C slave structure based on each of the I2C slaves, and fill each structure with a corresponding topology connection field based on the topology to generate the device list, wherein the adapter structure has a parent adapter field and a child adapter field; search the device driver list based on the name string in each structure in the device list, and load the corresponding driver; associate the driver interface with the device, and put the driver interface into the fops field of the structure.

7. A computer-readable storage medium, characterized in that, The system stores computer program instructions that, when executed by a processor, implement the method as described in any one of claims 1-5.

8. A computer device, comprising a memory and a processor, characterized in that, The memory stores a computer program, which, when executed by the processor, performs the method as described in any one of claims 1-5.

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