Method, device and equipment for presenting digital circuit module call relationship and storage medium

Abstract

The application discloses a method, device and equipment for presenting a digital circuit module call relationship and a storage medium, and the method comprises the following steps: performing module compilation on a user design file, and acquiring digital circuit module information; acquiring an n-ary tree structure model of the user design file based on the digital circuit module information, wherein the n-ary tree structure model is a tree structure established after the digital circuit module call relationship is acquired according to the digital circuit module information in the user design file, and n is a natural number; and performing graphical interface processing on the n-ary tree structure model, and outputting a graphical view result. The bottom module call relationship in the user design file is visualized, so that the user can directly see the mutual connection call relationship of the bottom module, the graphical view result is presented before synthesis, whether there is a problem in the module in the design file during design is confirmed, and the development efficiency is improved.

Description

Technical Field

[0001] This invention belongs to the field of integrated circuit technology, and in particular relates to methods, apparatus, devices and storage media for presenting the calling relationship of digital circuit modules. Background Technology

[0002] Synthesis is an intermediate step in the FPGA development process, converting the circuit model described in the design file into a gate-level netlist, which is then used in subsequent FPGA development. While the synthesizer can correctly convert the circuit model, it cannot reveal the interconnections and calls between the lower-level modules in the user's design file. Users can only view the optimized top-level module information in the synthesized netlist. Because the interconnections and calls between the lower-level modules cannot be directly viewed, it is inconvenient when modifying modules in the design file. Furthermore, after each module modification, only after re-synthesis can the existence of design defects be confirmed, leading to longer development times and higher development costs. Summary of the Invention

[0003] Based on this, the present invention provides a method, apparatus, device and storage medium for presenting the calling relationship of digital circuit modules, which solves the problem that when the synthesizer converts the circuit model, it is impossible to view the inter-module connection and calling relationship of the underlying modules in the user design file, which causes inconvenience in modifying the design file modules, long development time and high development cost.

[0004] This invention provides a method for presenting the calling relationship of digital circuit modules, the method comprising:

[0005] The user design files are compiled into modules to obtain digital circuit module information;

[0006] Based on the digital circuit module information, an n-ary tree structure model of the user design file is obtained. The n-ary tree structure model is a tree structure established after obtaining the digital circuit module call relationship based on the digital circuit module information in the user design file, where n is a natural number.

[0007] The n-ary tree structure model is processed using a graphical interface, and the graphical view result is output.

[0008] Further, obtaining the n-ary tree structure model of the user design file based on the digital circuit module information includes:

[0009] Establish the root node of the n-ary tree structure model;

[0010] Traverse all the digital circuit module information, and insert the digital circuit module that meets the requirements of the first root node of the n-ary tree structure model into the first node of the total root node;

[0011] Based on the digital circuit module information in the first root node, the child nodes of the n-ary tree structure model are established.

[0012] Further, the step of traversing all the digital circuit module information and inserting the digital circuit module that satisfies the requirements of the first root node of the n-ary tree structure model into the first root node of the total root node includes:

[0013] The calling relationship of the digital circuit modules is obtained from the digital circuit module information. The digital circuit modules that are not called by other digital circuit modules meet the requirements of the first root node of the n-ary tree structure model.

[0014] The digital circuit module that meets the requirements of the first root node is inserted into the first root node of the total root node.

[0015] Further, the step of establishing the child nodes of the n-ary tree structure model based on the digital circuit module information in the first root node includes:

[0016] Based on the digital circuit module information, obtain the first sub-digital circuit module called by the digital circuit module in the first root node, and insert each first sub-digital circuit module as the first sub-node of the first root node into the first root node.

[0017] Based on the digital circuit module information, obtain the second sub-digital circuit module that is called by the first sub-digital circuit module, and insert each second sub-digital circuit module as a second sub-node of the first sub-node into the first sub-node.

[0018] The information of all the digital circuit modules is traversed sequentially to obtain the next-level sub-digital circuit module that is called by the next-level sub-digital circuit module in the previous-level sub-node, and the next-level sub-digital circuit module is inserted into the previous-level sub-node as the next-level node of the previous-level sub-node.

[0019] Furthermore, identification information is configured for all nodes in the n-ary tree structure model, and the identification information is generated based on the digital circuit module information.

[0020] Furthermore, the graphical interface processing of the n-ary tree structure model includes:

[0021] Based on the identification information of the node, different presentation effects are matched for each node of the n-ary tree structure model.

[0022] Furthermore, the step of compiling the user design file into modules to obtain digital circuit module information, wherein the digital circuit is a register conversion stage circuit, also includes:

[0023] Based on the acquired digital circuit module information, construct a storage structure for the pre-stored addresses of the digital circuit module information;

[0024] The digital circuit module information is stored in the storage structure.

[0025] The present invention also provides an apparatus for presenting the calling relationship of digital circuit modules, the apparatus comprising:

[0026] The first acquisition unit is used to compile user design files into modules and acquire digital circuit module information.

[0027] The second acquisition unit is used to acquire the n-ary tree structure model of the user design file based on the digital circuit module information. The n-ary tree structure model is a tree structure established after acquiring the digital circuit module call relationship based on the digital circuit module information in the user design file, where n is a natural number.

[0028] The visualization unit is used to perform graphical interface processing on the n-ary tree structure model and output graphical view results.

[0029] The present invention also provides a computer device, the device including a processor and a memory; the memory is used to store software programs and modules, and the processor implements the method described above by running or executing the software programs and / or modules stored in the memory.

[0030] The present invention also provides a computer-readable storage medium for storing program code executed by a processor, the program code including instructions for implementing the methods described in any of the preceding claims.

[0031] This invention provides a method for presenting the call relationships of digital circuit modules. It involves compiling a user design file into modules to obtain digital circuit module information; obtaining an n-ary tree structure model of the user design file based on the digital circuit module information; and processing the n-ary tree structure model using a graphical interface to output a graphical view. This visualizes the call relationships of the underlying modules in the user design file, allowing users to directly see the interconnections and call relationships between the underlying modules. The graphical view presented before synthesis helps confirm whether there are any design problems in the modules in the design file, thus improving development efficiency. The device, equipment, and storage medium for presenting the call relationships of digital circuit modules provided by this invention can also achieve the above effects. Attached Figure Description

[0032] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0033] Figure 1 A flowchart illustrating a method for presenting the calling relationship of digital circuit modules, provided as an embodiment of the present invention;

[0034] Figure 2 This is a schematic diagram of an n-ary tree structure model;

[0035] Figure 3 This is a schematic diagram of the digital circuit module call relationship obtained by the method for presenting digital circuit module call relationships provided by the present invention;

[0036] Figure 4 A block diagram of a first device for presenting the calling relationship of digital circuit modules provided in an embodiment of the present invention;

[0037] Figure 5 for Figure 4 A block diagram of the second acquisition unit;

[0038] Figure 6 A block diagram illustrating a second type of device for presenting the calling relationship of digital circuit modules, provided in an embodiment of the present invention;

[0039] Figure 7 A block diagram of a third device for presenting the calling relationship of digital circuit modules provided in an embodiment of the present invention;

[0040] Figure 8 This is a schematic diagram of the structure of the computer device disclosed in the embodiments of the present invention;

[0041] Figure 9 This invention discloses a computer storage medium. Detailed Implementation

[0042] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein in the specification of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application; the terms "comprising" and "having," and any variations thereof, in the specification, claims, and foregoing drawings of this application, are intended to cover non-exclusive inclusion. The terms "first," "second," etc., in the specification, claims, or foregoing drawings of this application are used to distinguish different objects, not to describe a particular order.

[0043] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0044] To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without inventive effort are within the scope of protection of this invention.

[0045] In the following description, suffixes such as “module,” “part,” or “unit” used to denote elements are used only for the purposes of this application and have no specific meaning in themselves.

[0046] like Figure 1 The diagram shown is a flowchart illustrating a method for presenting the calling relationship of digital circuit modules according to an embodiment of the present invention. The method includes:

[0047] Step S1: Compile the user design file into modules to obtain digital circuit module information;

[0048] Step S2: Obtain the n-ary tree structure model of the user design file based on the digital circuit module information. The n-ary tree structure model is a tree structure established after obtaining the digital circuit module call relationship based on the digital circuit module information in the user design file, where n is a natural number.

[0049] Step S3: Perform graphical interface processing on the n-ary tree structure model and output the graphical view result.

[0050] Specifically, a synthesis tool is used to compile the user's design file into modules. The compiled file is then parsed to obtain information about the digital circuit modules. This information includes the design file to which the digital circuit module belongs, whether the module is called, its ports, parameters, identifier, and the location and instantiation parameters of the called modules. In practical applications, users can adjust the information obtained by the synthesis tool according to their specific needs. After obtaining this information, all digital circuit modules in the user's design file are traversed to obtain their calling relationships. An n-ary tree structure model is then established based on these relationships, listing the calling relationships. This model is then displayed on the user interface using a graphical interface drawing tool, providing a clear view of the underlying module calling relationships in the user's design file.

[0051] In some embodiments, step S2 includes:

[0052] Step S21: Establish the root node of the n-ary tree structure model;

[0053] Step S22: Traverse all the digital circuit module information, and insert the digital circuit module that meets the requirements of the first root node of the n-ary tree structure model into the first root node of the total root node;

[0054] Further, step S22 includes:

[0055] Step S221: Obtain the calling relationship of the digital circuit modules from the digital circuit module information. The digital circuit modules that are not called by other digital circuit modules meet the requirements of the first root node of the n-ary tree structure model.

[0056] Step S222: Insert the digital circuit module that meets the requirements of the first root node into the first root node of the total root node.

[0057] Step S23: Based on the digital circuit module information in the first root node, establish the child nodes of the n-ary tree structure model.

[0058] Further, step S23 includes:

[0059] Step S231: Based on the digital circuit module information, obtain the first sub-digital circuit module called by the digital circuit module in the first root node, and insert each first sub-digital circuit module as the first child node of the first root node into the first root node.

[0060] Step S232: Based on the digital circuit module information, obtain the second sub-digital circuit module called by the first sub-digital circuit module, and insert each second sub-digital circuit module as a second sub-node of the first sub-node into the first sub-node;

[0061] Step S233: Iterate through all the digital circuit module information in sequence, obtain the next-level sub-digital circuit module called by the previous-level sub-digital circuit module in the previous-level sub-node, and insert the next-level sub-digital circuit module as the next-level node of the previous-level sub-node into the previous-level sub-node.

[0062] Specifically, such as Figure 2 As shown, when obtaining the n-ary tree structure model, a root node is first established. Then, based on the acquired digital circuit module information, the calling relationship of the digital circuit modules is obtained. Digital circuit modules not called by other digital circuit modules are inserted into the root node as the first root node. Next, digital circuit modules called by the digital circuit modules in the first root node are inserted into the first root node as the first child digital circuit modules of the first root node. Then, the second child digital circuit modules called by the first child digital circuit modules are inserted into the first root node as the second child nodes of the first child nodes. Finally, the nodes of the n-ary tree structure model are constructed based on the next-level child digital circuit modules called by the previous-level child digital circuit modules in the previous-level child nodes. A top-down strategy is used to build the tree structure. The n-ary tree structure model can be implemented using a programming language. One implementation method for the n-ary tree node structure is provided below:

[0063]

[0064] In digital circuit design, RTL (register-transfer level) is an abstract model of synchronous digital circuits. This model is determined based on the flow of digital signals between logic units such as hardware registers, memories, combinational logic devices, and buses, as well as their logical algebraic operation.

[0065] In some embodiments, identification information is configured for all nodes in the n-ary tree structure model, and the identification information is generated based on the digital circuit module information.

[0066] Specifically, identification information of the digital circuit module is generated based on the digital circuit module information, and then this identification is configured on the node corresponding to the digital circuit module. The identification is generated based on the characteristics of the digital circuit module information in each node, such as top-level digital circuit module identification, undefined digital circuit module identification, inactive digital circuit module identification, IP (Intelligent Property) digital circuit module identification, etc.

[0067] In some embodiments, the graphical interface processing of the n-ary tree structure model includes: matching different presentation effects to each node of the n-ary tree structure model according to the node's identification information.

[0068] When processing the n-ary tree structure model with a graphical interface, each node is matched with different presentation effects according to the identification information, so that the graphical view result is presented more clearly.

[0069] In some embodiments, the step of compiling the user design file into modules to obtain digital circuit module information, wherein the digital circuit is a register conversion stage circuit, further includes: constructing a storage structure for the pre-stored address of the digital circuit module information based on the obtained digital circuit module information; and storing the digital circuit module information in the storage structure.

[0070] Specifically, by constructing the digital circuit module information and storing it in a set storage structure, the efficiency of constructing the n-ary tree structure model is improved. The following provides a basic method for constructing the storage structure:

[0071] class Digital Circuits Module / / Basic structure of module information

[0072] {

[0073] Identify_identify; / / Unique identifier for the module

[0074] FileInfo_file_name; / / File information of the module

[0075] Bool_is_top_module; / / Whether it is called by other modules.

[0076] Dvec*_item_inst; / / A collection of instantiation information for other modules called by this module ......

[0078] };

[0079] like Figure 3 The diagram shown is a schematic representation of the digital circuit module call relationship obtained through the method for presenting digital circuit module call relationships provided by this invention. Figure 3 As can be seen, the design file contains modules top_module_1 and top_module_2 that are not called by other modules. Top_module_1 is the effective module for synthesis. Top_module_1 has two sub-modules: sub_module_1 is an undefined module and sub_module_2. Sub_module_2 calls sub_module_4, which is marked with a gray background, indicating that this module instance is not enabled under the current design conditions.

[0080] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0081] This invention obtains digital circuit module information by compiling user design files into modules; based on the digital circuit module information, it obtains an n-ary tree structure model of the user design file; and processes the n-ary tree structure model into a graphical interface to output a graphical view result. This visualizes the underlying module call relationships in the user design file, allowing users to directly see the interconnections and calls between the underlying modules. The graphical view result presented before synthesis helps confirm whether there are any design problems in the modules in the design file, thus improving development efficiency.

[0082] like Figure 4 The diagram shown is a block diagram of a first device 400 for presenting digital circuit module calling relationships according to an embodiment of the present invention. The device 400 includes:

[0083] The first acquisition unit 401 is used to compile the user design file into modules and acquire digital circuit module information.

[0084] The second acquisition unit 402 is used to acquire the n-ary tree structure model of the user design file based on the digital circuit module information. The n-ary tree structure model is a tree structure established after acquiring the digital circuit module call relationship based on the digital circuit module information in the user design file, where n is a natural number.

[0085] The visualization unit 403 is used to perform graphical interface processing on the n-ary tree structure model and output graphical view results.

[0086] In some embodiments, such as Figure 5 As shown, the second acquisition unit 402 includes:

[0087] The root node establishment module 4021 is used to establish the root node of the n-ary tree structure model.

[0088] Insertion module 4022 is used to traverse all the digital circuit module information and insert the digital circuit module that meets the requirements of the first root node of the n-ary tree structure model into the first node of the total root node;

[0089] The child node construction module 4023 is used to establish the child nodes of the n-ary tree structure model based on the digital circuit module information in the first root node.

[0090] In some embodiments, the insertion module 4022 is further configured to obtain the calling relationship of the digital circuit modules from the digital circuit module information, and the digital circuit modules that are not called by other digital circuit modules satisfy the requirement of the first root node of the n-ary tree structure model;

[0091] The digital circuit module that meets the requirements of the first root node is inserted into the first root node of the total root node.

[0092] In some embodiments, the child node construction module 4023 is further configured to obtain, based on the digital circuit module information, a first child digital circuit module called by the digital circuit module in the first root node, and insert each first child digital circuit module as a first child node of the first root node into the first root node.

[0093] Based on the digital circuit module information, obtain the second sub-digital circuit module that is called by the first sub-digital circuit module, and insert each second sub-digital circuit module as a second sub-node of the first sub-node into the first sub-node.

[0094] The information of all the digital circuit modules is traversed sequentially to obtain the next-level sub-digital circuit module that is called by the next-level sub-digital circuit module in the previous-level sub-node, and the next-level sub-digital circuit module is inserted into the previous-level sub-node as the next-level node of the previous-level sub-node.

[0095] In some embodiments, such as Figure 6 As shown, the device 400 further includes:

[0096] Configuration unit 404 is used to configure identification information for all nodes in the n-ary tree structure model, the identification information being generated based on the digital circuit module information.

[0097] In some embodiments, such as Figure 6 As shown, the device 400 further includes:

[0098] Effect matching unit 405 is used to match different presentation effects for each node of the n-ary tree structure model according to the identification information of the node.

[0099] In some embodiments, such as Figure 7 As shown, the device 400 further includes:

[0100] The storage structure construction unit 406 is used to construct a storage structure of the pre-stored address of the digital circuit module information based on the acquired digital circuit module information;

[0101] The digital circuit module information is stored in the storage structure.

[0102] Specific limitations regarding the apparatus for presenting the calling relationships of digital circuit modules can be found in the limitations of the method for presenting the calling relationships of digital circuit modules described above, and will not be repeated here. Each module in the aforementioned apparatus for presenting the calling relationships of digital circuit modules can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in hardware or independently of the processor in a computer device, or stored in software in the memory of a computer device, so that the processor can call and execute the operations corresponding to each module.

[0103] Please see Figure 8 , Figure 8 This is a schematic diagram of the structure of the computer device 800 disclosed in an embodiment of the present invention. Figure 8 As shown, the device 800 may include a processor 801 and a memory 802; the memory 802 is used to store software programs and modules, and the processor 801 implements the method for presenting digital circuit module calling relationships described above by running or executing the software programs and / or modules stored in the memory 802.

[0104] Please see Figure 9 This invention discloses a computer storage medium 901, which is used to store program code executed by a processor. The program code includes instructions for implementing the method for presenting the calling relationship of digital circuit modules as described above.

[0105] A computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. A computer-readable storage medium can be, for example—but not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples (a non-exhaustive list) of a computer-readable storage medium include: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), or flash memory, optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this document, a computer-readable storage medium can be any tangible medium that contains or stores a program that can be used by or in connection with an instruction execution system, apparatus, or device.

[0106] Computer-readable signal media may include data signals propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals may take various forms, including—but not limited to—electromagnetic signals, optical signals, or any suitable combination thereof. Computer-readable signal media may also be any computer-readable medium other than computer-readable storage media, capable of transmitting, propagating, or transmitting programs for use by or in connection with an instruction execution system, apparatus, or device.

[0107] The program code contained on a computer-readable medium may be transmitted using any suitable medium, including—but not limited to—wireless, wire, optical fiber, RF, etc., or any suitable combination thereof.

[0108] Computer program code for performing the operations of this application can be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, and C++, and conventional procedural programming languages ​​such as C or similar languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a Local Area Network (LAN) or a Wide Area Network (WAN), or it can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0109] The terminology used in the embodiments of this invention is for the purpose of describing particular embodiments only and is not intended to limit the invention. The singular forms “a,” “the,” and “the” as used in the embodiments of this invention and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0110] Depending on the context, the word "if" as used here can be interpreted as "when," "when," "in response to determination," or "in response to detection." Similarly, depending on the context, the phrase "if determination" or "if detection (of the stated condition or event)" can be interpreted as "when determination," "in response to determination," "when detection (of the stated condition or event)," or "in response to detection (of the stated condition or event)."

[0111] In the embodiments provided by this invention, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection between devices or units through some interfaces, and may be electrical, mechanical, or other forms.

[0112] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for presenting the calling relationship of digital circuit modules, characterized in that, The method includes: The user design files are compiled into modules to obtain digital circuit module information; Based on the digital circuit module information, an n-ary tree structure model of the user design file is obtained. The n-ary tree structure model is a tree structure established after obtaining the digital circuit module call relationship based on the digital circuit module information in the user design file, where n is a natural number. The n-ary tree structure model is processed using a graphical interface, and a graphical view result is output. The process of obtaining the n-ary tree structure model of the user design file based on the digital circuit module information includes: Establish the root node of the n-ary tree structure model; Traverse all the digital circuit module information, and insert the digital circuit module that meets the requirements of the first root node of the n-ary tree structure model into the first node of the total root node; Based on the digital circuit module information in the first root node, establish the child nodes of the n-ary tree structure model; The step of traversing all the digital circuit module information and inserting the digital circuit module that satisfies the requirements of the first root node of the n-ary tree structure model into the first root node of the total root node includes: The calling relationship of the digital circuit modules is obtained from the digital circuit module information. The digital circuit modules that are not called by other digital circuit modules meet the requirements of the first root node of the n-ary tree structure model. The digital circuit module that meets the requirements of the first root node is inserted into the first root node of the total root node; Among them, there are multiple digital circuit modules that meet the requirements of the first root node, and the multiple digital circuit modules are respectively inserted into the multiple first root nodes of the total root node.

2. The method for presenting the calling relationship of digital circuit modules according to claim 1, characterized in that, The step of establishing the child nodes of the n-ary tree structure model based on the digital circuit module information in the first root node includes: Based on the digital circuit module information, obtain the first sub-digital circuit module called by the digital circuit module in the first root node, and insert each first sub-digital circuit module as the first sub-node of the first root node into the first root node. Based on the digital circuit module information, obtain the second sub-digital circuit module that is called by the first sub-digital circuit module, and insert each second sub-digital circuit module as a second sub-node of the first sub-node into the first sub-node. Iterate through all the digital circuit module information in sequence, obtain the next-level sub-digital circuit module that is called by the previous-level sub-digital circuit module in the previous-level sub-node, and insert the next-level sub-digital circuit module as the next-level node of the previous-level sub-node into the previous-level sub-node.

3. The method for presenting the calling relationship of digital circuit modules according to claim 2, characterized in that, Identification information is configured for all nodes in the n-ary tree structure model, and the identification information is generated based on the digital circuit module information.

4. The method for presenting the calling relationship of digital circuit modules according to claim 3, characterized in that, The graphical interface processing of the n-ary tree structure model includes: Based on the identification information of the node, different presentation effects are matched for each node of the n-ary tree structure model.

5. The method for presenting the calling relationship of digital circuit modules according to claim 1, characterized in that, The step of compiling user design files into modules to obtain digital circuit module information, wherein the digital circuit is a register conversion stage circuit; also includes: Based on the acquired digital circuit module information, construct a storage structure for the pre-stored addresses of the digital circuit module information; The digital circuit module information is stored in the storage structure.

6. A device for presenting the calling relationship of digital circuit modules, characterized in that, The device includes: The first acquisition unit is used to perform module compilation on the user design file and acquire digital circuit module information, wherein the digital circuit is a register conversion stage circuit. The second acquisition unit is used to acquire the n-ary tree structure model of the user design file based on the digital circuit module information. The n-ary tree structure model is a tree structure established after acquiring the digital circuit module call relationship based on the digital circuit module information in the user design file, where n is a natural number. The visualization unit is used to perform graphical interface processing on the n-ary tree structure model and output graphical view results. The second acquisition unit is used to acquire the n-ary tree structure model of the user design file based on the digital circuit module information, including: Establish the root node of the n-ary tree structure model; Traverse all the digital circuit module information, and insert the digital circuit module that meets the requirements of the first root node of the n-ary tree structure model into the first node of the total root node; Based on the digital circuit module information in the first root node, establish the child nodes of the n-ary tree structure model; The step of traversing all the digital circuit module information and inserting the digital circuit module that satisfies the requirements of the first root node of the n-ary tree structure model into the first root node of the total root node includes: The calling relationship of the digital circuit modules is obtained from the digital circuit module information. The digital circuit modules that are not called by other digital circuit modules meet the requirements of the first root node of the n-ary tree structure model. The digital circuit module that meets the requirements of the first root node is inserted into the first root node of the total root node; Among them, there are multiple digital circuit modules that meet the requirements of the first root node, and the multiple digital circuit modules are respectively inserted into the multiple first root nodes of the total root node.

7. A computer device, characterized in that, The device includes a processor and a memory; the memory is used to store software programs and modules, and the processor implements the method as described in any one of claims 1 to 5 by running or executing the software programs and / or modules stored in the memory.

8. A computer-readable storage medium, characterized in that, The computer-readable storage medium is used to store program code executed by a processor, the program code including instructions for implementing the method as described in any one of claims 1 to 5.

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