一种维持大功率MOS管衬底电位均匀的芯片版图
By setting multiple rows of back gate transistors and spaced doped active regions in high-power MOSFETs, the problem of substrate potential non-uniformity is solved, achieving high-efficiency operation and current consistency of high-power MOSFETs, simplifying chip design and reducing line impedance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SG MICRO CORP
- Filing Date
- 2021-07-14
- Publication Date
- 2026-07-17
AI Technical Summary
In the prior art, the inconsistent distance and metal line length between multiple power transistors and back gate transistors leads to uneven substrate potential of high-power MOSFETs, affecting their working performance and the consistency of output current.
Multiple rows of back gate transistors are arranged between multiple rows of power transistors, and multiple doped active regions of power transistors and back gate transistors are arranged at intervals to ensure the uniformity of power transistor substrate parameters. The rows of MOS transistors are connected in parallel by multilayer metal lines to achieve uniform distance and current consistency between back gate transistors and power transistors.
It improves the operating performance and output current consistency of high-power MOSFETs, reduces line impedance, saves chip area, and achieves more efficient current amplification within a limited chip area.
Smart Images
Figure CN115621274B_ABST